| 1 | /* mach/dma.h - arch-specific DMA defines |
| 2 | * |
| 3 | * Copyright 2004-2008 Analog Devices Inc. |
| 4 | * |
| 5 | * Licensed under the GPL-2 or later. |
| 6 | */ |
| 7 | |
| 8 | #ifndef _MACH_DMA_H_ |
| 9 | #define _MACH_DMA_H_ |
| 10 | |
| 11 | #define MAX_DMA_CHANNELS 16 |
| 12 | |
| 13 | #define CH_PPI 0 /* PPI receive/transmit or NFC */ |
| 14 | #define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */ |
| 15 | #define CH_EMAC_HOSTDP 1 /* Ethernet MAC receive or HOSTDP */ |
| 16 | #define CH_EMAC_TX 2 /* Ethernet MAC transmit or NFC */ |
| 17 | #define CH_SPORT0_RX 3 /* SPORT0 receive */ |
| 18 | #define CH_SPORT0_TX 4 /* SPORT0 transmit */ |
| 19 | #define CH_SPORT1_RX 5 /* SPORT1 receive */ |
| 20 | #define CH_SPORT1_TX 6 /* SPORT1 transmit */ |
| 21 | #define CH_SPI 7 /* SPI transmit/receive */ |
| 22 | #define CH_UART0_RX 8 /* UART0 receive */ |
| 23 | #define CH_UART0_TX 9 /* UART0 transmit */ |
| 24 | #define CH_UART1_RX 10 /* UART1 receive */ |
| 25 | #define CH_UART1_TX 11 /* UART1 transmit */ |
| 26 | |
| 27 | #define CH_MEM_STREAM0_DEST 12 /* TX */ |
| 28 | #define CH_MEM_STREAM0_SRC 13 /* RX */ |
| 29 | #define CH_MEM_STREAM1_DEST 14 /* TX */ |
| 30 | #define CH_MEM_STREAM1_SRC 15 /* RX */ |
| 31 | |
| 32 | #if defined(CONFIG_BF527_NAND_D_PORTF) |
| 33 | #define CH_NFC CH_PPI /* PPI receive/transmit or NFC */ |
| 34 | #elif defined(CONFIG_BF527_NAND_D_PORTH) |
| 35 | #define CH_NFC CH_EMAC_TX /* PPI receive/transmit or NFC */ |
| 36 | #endif |
| 37 | |
| 38 | #endif |