| 1 | Kernel driver lm90 |
| 2 | ================== |
| 3 | |
| 4 | Supported chips: |
| 5 | * National Semiconductor LM90 |
| 6 | Prefix: 'lm90' |
| 7 | Addresses scanned: I2C 0x4c |
| 8 | Datasheet: Publicly available at the National Semiconductor website |
| 9 | http://www.national.com/pf/LM/LM90.html |
| 10 | * National Semiconductor LM89 |
| 11 | Prefix: 'lm89' (no auto-detection) |
| 12 | Addresses scanned: I2C 0x4c and 0x4d |
| 13 | Datasheet: Publicly available at the National Semiconductor website |
| 14 | http://www.national.com/mpf/LM/LM89.html |
| 15 | * National Semiconductor LM99 |
| 16 | Prefix: 'lm99' |
| 17 | Addresses scanned: I2C 0x4c and 0x4d |
| 18 | Datasheet: Publicly available at the National Semiconductor website |
| 19 | http://www.national.com/pf/LM/LM99.html |
| 20 | * National Semiconductor LM86 |
| 21 | Prefix: 'lm86' |
| 22 | Addresses scanned: I2C 0x4c |
| 23 | Datasheet: Publicly available at the National Semiconductor website |
| 24 | http://www.national.com/mpf/LM/LM86.html |
| 25 | * Analog Devices ADM1032 |
| 26 | Prefix: 'adm1032' |
| 27 | Addresses scanned: I2C 0x4c and 0x4d |
| 28 | Datasheet: Publicly available at the ON Semiconductor website |
| 29 | http://www.onsemi.com/PowerSolutions/product.do?id=ADM1032 |
| 30 | * Analog Devices ADT7461 |
| 31 | Prefix: 'adt7461' |
| 32 | Addresses scanned: I2C 0x4c and 0x4d |
| 33 | Datasheet: Publicly available at the ON Semiconductor website |
| 34 | http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461 |
| 35 | * Maxim MAX6646 |
| 36 | Prefix: 'max6646' |
| 37 | Addresses scanned: I2C 0x4d |
| 38 | Datasheet: Publicly available at the Maxim website |
| 39 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497 |
| 40 | * Maxim MAX6647 |
| 41 | Prefix: 'max6646' |
| 42 | Addresses scanned: I2C 0x4e |
| 43 | Datasheet: Publicly available at the Maxim website |
| 44 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497 |
| 45 | * Maxim MAX6648 |
| 46 | Prefix: 'max6646' |
| 47 | Addresses scanned: I2C 0x4c |
| 48 | Datasheet: Publicly available at the Maxim website |
| 49 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500 |
| 50 | * Maxim MAX6649 |
| 51 | Prefix: 'max6646' |
| 52 | Addresses scanned: I2C 0x4c |
| 53 | Datasheet: Publicly available at the Maxim website |
| 54 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497 |
| 55 | * Maxim MAX6657 |
| 56 | Prefix: 'max6657' |
| 57 | Addresses scanned: I2C 0x4c |
| 58 | Datasheet: Publicly available at the Maxim website |
| 59 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 |
| 60 | * Maxim MAX6658 |
| 61 | Prefix: 'max6657' |
| 62 | Addresses scanned: I2C 0x4c |
| 63 | Datasheet: Publicly available at the Maxim website |
| 64 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 |
| 65 | * Maxim MAX6659 |
| 66 | Prefix: 'max6657' |
| 67 | Addresses scanned: I2C 0x4c, 0x4d (unsupported 0x4e) |
| 68 | Datasheet: Publicly available at the Maxim website |
| 69 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 |
| 70 | * Maxim MAX6680 |
| 71 | Prefix: 'max6680' |
| 72 | Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, |
| 73 | 0x4c, 0x4d and 0x4e |
| 74 | Datasheet: Publicly available at the Maxim website |
| 75 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370 |
| 76 | * Maxim MAX6681 |
| 77 | Prefix: 'max6680' |
| 78 | Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, |
| 79 | 0x4c, 0x4d and 0x4e |
| 80 | Datasheet: Publicly available at the Maxim website |
| 81 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370 |
| 82 | * Maxim MAX6692 |
| 83 | Prefix: 'max6646' |
| 84 | Addresses scanned: I2C 0x4c |
| 85 | Datasheet: Publicly available at the Maxim website |
| 86 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500 |
| 87 | * Winbond/Nuvoton W83L771AWG/ASG |
| 88 | Prefix: 'w83l771' |
| 89 | Addresses scanned: I2C 0x4c |
| 90 | Datasheet: Not publicly available, can be requested from Nuvoton |
| 91 | |
| 92 | |
| 93 | Author: Jean Delvare <khali@linux-fr.org> |
| 94 | |
| 95 | |
| 96 | Description |
| 97 | ----------- |
| 98 | |
| 99 | The LM90 is a digital temperature sensor. It senses its own temperature as |
| 100 | well as the temperature of up to one external diode. It is compatible |
| 101 | with many other devices, many of which are supported by this driver. |
| 102 | |
| 103 | Note that there is no easy way to differentiate between the MAX6657, |
| 104 | MAX6658 and MAX6659 variants. The extra address and features of the |
| 105 | MAX6659 are not supported by this driver. The MAX6680 and MAX6681 only |
| 106 | differ in their pinout, therefore they obviously can't (and don't need to) |
| 107 | be distinguished. |
| 108 | |
| 109 | The specificity of this family of chipsets over the ADM1021/LM84 |
| 110 | family is that it features critical limits with hysteresis, and an |
| 111 | increased resolution of the remote temperature measurement. |
| 112 | |
| 113 | The different chipsets of the family are not strictly identical, although |
| 114 | very similar. For reference, here comes a non-exhaustive list of specific |
| 115 | features: |
| 116 | |
| 117 | LM90: |
| 118 | * Filter and alert configuration register at 0xBF. |
| 119 | * ALERT is triggered by temperatures over critical limits. |
| 120 | |
| 121 | LM86 and LM89: |
| 122 | * Same as LM90 |
| 123 | * Better external channel accuracy |
| 124 | |
| 125 | LM99: |
| 126 | * Same as LM89 |
| 127 | * External temperature shifted by 16 degrees down |
| 128 | |
| 129 | ADM1032: |
| 130 | * Consecutive alert register at 0x22. |
| 131 | * Conversion averaging. |
| 132 | * Up to 64 conversions/s. |
| 133 | * ALERT is triggered by open remote sensor. |
| 134 | * SMBus PEC support for Write Byte and Receive Byte transactions. |
| 135 | |
| 136 | ADT7461: |
| 137 | * Extended temperature range (breaks compatibility) |
| 138 | * Lower resolution for remote temperature |
| 139 | |
| 140 | MAX6657 and MAX6658: |
| 141 | * Better local resolution |
| 142 | * Remote sensor type selection |
| 143 | |
| 144 | MAX6659: |
| 145 | * Better local resolution |
| 146 | * Selectable address |
| 147 | * Second critical temperature limit |
| 148 | * Remote sensor type selection |
| 149 | |
| 150 | MAX6680 and MAX6681: |
| 151 | * Selectable address |
| 152 | * Remote sensor type selection |
| 153 | |
| 154 | W83L771AWG/ASG |
| 155 | * The AWG and ASG variants only differ in package format. |
| 156 | * Filter and alert configuration register at 0xBF |
| 157 | * Diode ideality factor configuration (remote sensor) at 0xE3 |
| 158 | * Moving average (depending on conversion rate) |
| 159 | |
| 160 | All temperature values are given in degrees Celsius. Resolution |
| 161 | is 1.0 degree for the local temperature, 0.125 degree for the remote |
| 162 | temperature, except for the MAX6657, MAX6658 and MAX6659 which have a |
| 163 | resolution of 0.125 degree for both temperatures. |
| 164 | |
| 165 | Each sensor has its own high and low limits, plus a critical limit. |
| 166 | Additionally, there is a relative hysteresis value common to both critical |
| 167 | values. To make life easier to user-space applications, two absolute values |
| 168 | are exported, one for each channel, but these values are of course linked. |
| 169 | Only the local hysteresis can be set from user-space, and the same delta |
| 170 | applies to the remote hysteresis. |
| 171 | |
| 172 | The lm90 driver will not update its values more frequently than every |
| 173 | other second; reading them more often will do no harm, but will return |
| 174 | 'old' values. |
| 175 | |
| 176 | SMBus Alert Support |
| 177 | ------------------- |
| 178 | |
| 179 | This driver has basic support for SMBus alert. When an alert is received, |
| 180 | the status register is read and the faulty temperature channel is logged. |
| 181 | |
| 182 | The Analog Devices chips (ADM1032 and ADT7461) do not implement the SMBus |
| 183 | alert protocol properly so additional care is needed: the ALERT output is |
| 184 | disabled when an alert is received, and is re-enabled only when the alarm |
| 185 | is gone. Otherwise the chip would block alerts from other chips in the bus |
| 186 | as long as the alarm is active. |
| 187 | |
| 188 | PEC Support |
| 189 | ----------- |
| 190 | |
| 191 | The ADM1032 is the only chip of the family which supports PEC. It does |
| 192 | not support PEC on all transactions though, so some care must be taken. |
| 193 | |
| 194 | When reading a register value, the PEC byte is computed and sent by the |
| 195 | ADM1032 chip. However, in the case of a combined transaction (SMBus Read |
| 196 | Byte), the ADM1032 computes the CRC value over only the second half of |
| 197 | the message rather than its entirety, because it thinks the first half |
| 198 | of the message belongs to a different transaction. As a result, the CRC |
| 199 | value differs from what the SMBus master expects, and all reads fail. |
| 200 | |
| 201 | For this reason, the lm90 driver will enable PEC for the ADM1032 only if |
| 202 | the bus supports the SMBus Send Byte and Receive Byte transaction types. |
| 203 | These transactions will be used to read register values, instead of |
| 204 | SMBus Read Byte, and PEC will work properly. |
| 205 | |
| 206 | Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC. |
| 207 | Instead, it will try to write the PEC value to the register (because the |
| 208 | SMBus Send Byte transaction with PEC is similar to a Write Byte transaction |
| 209 | without PEC), which is not what we want. Thus, PEC is explicitly disabled |
| 210 | on SMBus Send Byte transactions in the lm90 driver. |
| 211 | |
| 212 | PEC on byte data transactions represents a significant increase in bandwidth |
| 213 | usage (+33% for writes, +25% for reads) in normal conditions. With the need |
| 214 | to use two SMBus transaction for reads, this overhead jumps to +50%. Worse, |
| 215 | two transactions will typically mean twice as much delay waiting for |
| 216 | transaction completion, effectively doubling the register cache refresh time. |
| 217 | I guess reliability comes at a price, but it's quite expensive this time. |
| 218 | |
| 219 | So, as not everyone might enjoy the slowdown, PEC can be disabled through |
| 220 | sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1 |
| 221 | to that file to enable PEC again. |