Merge branch 'slab/next' into slab/for-linus
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / virt / kvm / irq_comm.c
CommitLineData
3de42dc0
XZ
1/*
2 * irq_comm.c: Common API for in kernel interrupt controller
3 * Copyright (c) 2007, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * Authors:
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19 *
9611c187 20 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
3de42dc0
XZ
21 */
22
23#include <linux/kvm_host.h>
5a0e3ad6 24#include <linux/slab.h>
229456fc 25#include <trace/events/kvm.h>
79950e10 26
79950e10 27#include <asm/msidef.h>
58c2dde1
GN
28#ifdef CONFIG_IA64
29#include <asm/iosapic.h>
30#endif
79950e10 31
3de42dc0
XZ
32#include "irq.h"
33
34#include "ioapic.h"
35
4925663a 36static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c 37 struct kvm *kvm, int irq_source_id, int level)
399ec807
AK
38{
39#ifdef CONFIG_X86
1a6e4a8c 40 struct kvm_pic *pic = pic_irqchip(kvm);
1a577b72 41 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
4925663a
GN
42#else
43 return -1;
399ec807
AK
44#endif
45}
46
4925663a 47static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
1a6e4a8c 48 struct kvm *kvm, int irq_source_id, int level)
399ec807 49{
1a6e4a8c 50 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
1a577b72 51 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level);
399ec807
AK
52}
53
58c2dde1 54inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
116191b6 55{
58c2dde1
GN
56#ifdef CONFIG_IA64
57 return irq->delivery_mode ==
58 (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
59#else
60 return irq->delivery_mode == APIC_DM_LOWEST;
61#endif
62}
116191b6 63
58c2dde1
GN
64int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
65 struct kvm_lapic_irq *irq)
66{
67 int i, r = -1;
68 struct kvm_vcpu *vcpu, *lowest = NULL;
69
70 if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
1e08ec4a 71 kvm_is_dm_lowest_prio(irq)) {
343f94fe 72 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
1e08ec4a
GN
73 irq->delivery_mode = APIC_DM_FIXED;
74 }
75
76 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r))
77 return r;
343f94fe 78
988a2cae
GN
79 kvm_for_each_vcpu(i, vcpu, kvm) {
80 if (!kvm_apic_present(vcpu))
343f94fe
GN
81 continue;
82
58c2dde1
GN
83 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
84 irq->dest_id, irq->dest_mode))
343f94fe
GN
85 continue;
86
58c2dde1
GN
87 if (!kvm_is_dm_lowest_prio(irq)) {
88 if (r < 0)
89 r = 0;
90 r += kvm_apic_set_irq(vcpu, irq);
aefd18f0 91 } else if (kvm_lapic_enabled(vcpu)) {
58c2dde1
GN
92 if (!lowest)
93 lowest = vcpu;
94 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
95 lowest = vcpu;
e1035715 96 }
343f94fe
GN
97 }
98
58c2dde1
GN
99 if (lowest)
100 r = kvm_apic_set_irq(lowest, irq);
101
102 return r;
116191b6
SY
103}
104
bd2b53b2
MT
105int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
106 struct kvm *kvm, int irq_source_id, int level)
79950e10 107{
58c2dde1 108 struct kvm_lapic_irq irq;
79950e10 109
1a6e4a8c
GN
110 if (!level)
111 return -1;
112
1000ff8d
GN
113 trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
114
58c2dde1 115 irq.dest_id = (e->msi.address_lo &
116191b6 116 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
58c2dde1 117 irq.vector = (e->msi.data &
116191b6 118 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
58c2dde1
GN
119 irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
120 irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
121 irq.delivery_mode = e->msi.data & 0x700;
122 irq.level = 1;
123 irq.shorthand = 0;
116191b6
SY
124
125 /* TODO Deal with RH bit of MSI message address */
58c2dde1 126 return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
79950e10
SY
127}
128
07975ad3
JK
129int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi)
130{
131 struct kvm_kernel_irq_routing_entry route;
132
133 if (!irqchip_in_kernel(kvm) || msi->flags != 0)
134 return -EINVAL;
135
136 route.msi.address_lo = msi->address_lo;
137 route.msi.address_hi = msi->address_hi;
138 route.msi.data = msi->data;
139
140 return kvm_set_msi(&route, kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 1);
141}
142
680b3648 143/*
4925663a
GN
144 * Return value:
145 * < 0 Interrupt was ignored (masked or not delivered for other reasons)
146 * = 0 Interrupt was coalesced (previous irq is still pending)
147 * > 0 Number of CPUs interrupt was delivered to
148 */
46e624b9 149int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
3de42dc0 150{
eba0226b
GN
151 struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS];
152 int ret = -1, i = 0;
46e624b9
GN
153 struct kvm_irq_routing_table *irq_rt;
154 struct hlist_node *n;
79950e10 155
ae8c1c40 156 trace_kvm_set_irq(irq, level, irq_source_id);
229456fc 157
3de42dc0
XZ
158 /* Not possible to detect if the guest uses the PIC or the
159 * IOAPIC. So set the bit in both. The guest will ignore
160 * writes to the unused one.
161 */
e42bba90
GN
162 rcu_read_lock();
163 irq_rt = rcu_dereference(kvm->irq_routing);
46e624b9 164 if (irq < irq_rt->nr_rt_entries)
eba0226b
GN
165 hlist_for_each_entry(e, n, &irq_rt->map[irq], link)
166 irq_set[i++] = *e;
e42bba90 167 rcu_read_unlock();
eba0226b
GN
168
169 while(i--) {
170 int r;
171 r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level);
172 if (r < 0)
173 continue;
174
175 ret = r + ((ret < 0) ? 0 : ret);
176 }
177
4925663a 178 return ret;
3de42dc0
XZ
179}
180
44882eed 181void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
3de42dc0
XZ
182{
183 struct kvm_irq_ack_notifier *kian;
184 struct hlist_node *n;
3e71f88b 185 int gsi;
44882eed 186
229456fc
MT
187 trace_kvm_ack_irq(irqchip, pin);
188
e42bba90
GN
189 rcu_read_lock();
190 gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
3e71f88b 191 if (gsi != -1)
280aa177
GN
192 hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
193 link)
3e71f88b
GN
194 if (kian->gsi == gsi)
195 kian->irq_acked(kian);
280aa177 196 rcu_read_unlock();
3de42dc0
XZ
197}
198
199void kvm_register_irq_ack_notifier(struct kvm *kvm,
200 struct kvm_irq_ack_notifier *kian)
201{
fa40a821 202 mutex_lock(&kvm->irq_lock);
280aa177 203 hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
fa40a821 204 mutex_unlock(&kvm->irq_lock);
3de42dc0
XZ
205}
206
fa40a821
MT
207void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
208 struct kvm_irq_ack_notifier *kian)
3de42dc0 209{
fa40a821 210 mutex_lock(&kvm->irq_lock);
280aa177 211 hlist_del_init_rcu(&kian->link);
fa40a821 212 mutex_unlock(&kvm->irq_lock);
280aa177 213 synchronize_rcu();
3de42dc0 214}
5550af4d 215
5550af4d
SY
216int kvm_request_irq_source_id(struct kvm *kvm)
217{
218 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
fa40a821
MT
219 int irq_source_id;
220
221 mutex_lock(&kvm->irq_lock);
cd5a2685 222 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
61552367 223
cd5a2685 224 if (irq_source_id >= BITS_PER_LONG) {
5550af4d 225 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
0c6ddceb
JS
226 irq_source_id = -EFAULT;
227 goto unlock;
61552367
MM
228 }
229
230 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
7a84428a
AW
231#ifdef CONFIG_X86
232 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
233#endif
61552367 234 set_bit(irq_source_id, bitmap);
0c6ddceb 235unlock:
fa40a821 236 mutex_unlock(&kvm->irq_lock);
61552367 237
5550af4d
SY
238 return irq_source_id;
239}
240
241void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
242{
61552367 243 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
7a84428a
AW
244#ifdef CONFIG_X86
245 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
246#endif
61552367 247
fa40a821 248 mutex_lock(&kvm->irq_lock);
61552367 249 if (irq_source_id < 0 ||
cd5a2685 250 irq_source_id >= BITS_PER_LONG) {
5550af4d 251 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
0c6ddceb 252 goto unlock;
5550af4d 253 }
e50212bb
MT
254 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
255 if (!irqchip_in_kernel(kvm))
256 goto unlock;
257
1a577b72 258 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
1a6e4a8c 259#ifdef CONFIG_X86
1a577b72 260 kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
1a6e4a8c 261#endif
0c6ddceb 262unlock:
fa40a821 263 mutex_unlock(&kvm->irq_lock);
5550af4d 264}
75858a84
AK
265
266void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
267 struct kvm_irq_mask_notifier *kimn)
268{
fa40a821 269 mutex_lock(&kvm->irq_lock);
75858a84 270 kimn->irq = irq;
280aa177 271 hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
fa40a821 272 mutex_unlock(&kvm->irq_lock);
75858a84
AK
273}
274
275void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
276 struct kvm_irq_mask_notifier *kimn)
277{
fa40a821 278 mutex_lock(&kvm->irq_lock);
280aa177 279 hlist_del_rcu(&kimn->link);
fa40a821 280 mutex_unlock(&kvm->irq_lock);
280aa177 281 synchronize_rcu();
75858a84
AK
282}
283
4a994358
GN
284void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
285 bool mask)
75858a84
AK
286{
287 struct kvm_irq_mask_notifier *kimn;
288 struct hlist_node *n;
4a994358 289 int gsi;
75858a84 290
280aa177 291 rcu_read_lock();
4a994358
GN
292 gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
293 if (gsi != -1)
294 hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
295 if (kimn->irq == gsi)
296 kimn->func(kimn, mask);
280aa177 297 rcu_read_unlock();
75858a84
AK
298}
299
399ec807
AK
300void kvm_free_irq_routing(struct kvm *kvm)
301{
e42bba90
GN
302 /* Called only during vm destruction. Nobody can use the pointer
303 at this stage */
46e624b9 304 kfree(kvm->irq_routing);
399ec807
AK
305}
306
46e624b9
GN
307static int setup_routing_entry(struct kvm_irq_routing_table *rt,
308 struct kvm_kernel_irq_routing_entry *e,
cded19f3 309 const struct kvm_irq_routing_entry *ue)
399ec807
AK
310{
311 int r = -EINVAL;
312 int delta;
d72118ce 313 unsigned max_pin;
46e624b9
GN
314 struct kvm_kernel_irq_routing_entry *ei;
315 struct hlist_node *n;
316
317 /*
318 * Do not allow GSI to be mapped to the same irqchip more than once.
319 * Allow only one to one mapping between GSI and MSI.
320 */
321 hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
322 if (ei->type == KVM_IRQ_ROUTING_MSI ||
f2ebd422 323 ue->type == KVM_IRQ_ROUTING_MSI ||
46e624b9
GN
324 ue->u.irqchip.irqchip == ei->irqchip.irqchip)
325 return r;
399ec807
AK
326
327 e->gsi = ue->gsi;
5116d8f6 328 e->type = ue->type;
399ec807
AK
329 switch (ue->type) {
330 case KVM_IRQ_ROUTING_IRQCHIP:
331 delta = 0;
332 switch (ue->u.irqchip.irqchip) {
333 case KVM_IRQCHIP_PIC_MASTER:
334 e->set = kvm_set_pic_irq;
93b6547e 335 max_pin = PIC_NUM_PINS;
399ec807
AK
336 break;
337 case KVM_IRQCHIP_PIC_SLAVE:
4925663a 338 e->set = kvm_set_pic_irq;
93b6547e 339 max_pin = PIC_NUM_PINS;
399ec807
AK
340 delta = 8;
341 break;
342 case KVM_IRQCHIP_IOAPIC:
d72118ce 343 max_pin = KVM_IOAPIC_NUM_PINS;
efbc100c 344 e->set = kvm_set_ioapic_irq;
399ec807
AK
345 break;
346 default:
347 goto out;
348 }
349 e->irqchip.irqchip = ue->u.irqchip.irqchip;
350 e->irqchip.pin = ue->u.irqchip.pin + delta;
d72118ce 351 if (e->irqchip.pin >= max_pin)
3e71f88b
GN
352 goto out;
353 rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
399ec807 354 break;
79950e10
SY
355 case KVM_IRQ_ROUTING_MSI:
356 e->set = kvm_set_msi;
357 e->msi.address_lo = ue->u.msi.address_lo;
358 e->msi.address_hi = ue->u.msi.address_hi;
359 e->msi.data = ue->u.msi.data;
360 break;
399ec807
AK
361 default:
362 goto out;
363 }
46e624b9
GN
364
365 hlist_add_head(&e->link, &rt->map[e->gsi]);
399ec807
AK
366 r = 0;
367out:
368 return r;
369}
370
371
372int kvm_set_irq_routing(struct kvm *kvm,
373 const struct kvm_irq_routing_entry *ue,
374 unsigned nr,
375 unsigned flags)
376{
46e624b9 377 struct kvm_irq_routing_table *new, *old;
3e71f88b 378 u32 i, j, nr_rt_entries = 0;
399ec807
AK
379 int r;
380
46e624b9
GN
381 for (i = 0; i < nr; ++i) {
382 if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
383 return -EINVAL;
384 nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
385 }
386
387 nr_rt_entries += 1;
388
389 new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head))
390 + (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
391 GFP_KERNEL);
392
393 if (!new)
394 return -ENOMEM;
395
396 new->rt_entries = (void *)&new->map[nr_rt_entries];
397
398 new->nr_rt_entries = nr_rt_entries;
3e71f88b
GN
399 for (i = 0; i < 3; i++)
400 for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
401 new->chip[i][j] = -1;
46e624b9 402
399ec807
AK
403 for (i = 0; i < nr; ++i) {
404 r = -EINVAL;
399ec807
AK
405 if (ue->flags)
406 goto out;
46e624b9 407 r = setup_routing_entry(new, &new->rt_entries[i], ue);
399ec807
AK
408 if (r)
409 goto out;
410 ++ue;
399ec807
AK
411 }
412
fa40a821 413 mutex_lock(&kvm->irq_lock);
46e624b9 414 old = kvm->irq_routing;
bd2b53b2 415 kvm_irq_routing_update(kvm, new);
fa40a821 416 mutex_unlock(&kvm->irq_lock);
bd2b53b2 417
e42bba90 418 synchronize_rcu();
399ec807 419
46e624b9 420 new = old;
399ec807
AK
421 r = 0;
422
423out:
46e624b9 424 kfree(new);
399ec807
AK
425 return r;
426}
427
428#define IOAPIC_ROUTING_ENTRY(irq) \
429 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
430 .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
431#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
432
433#ifdef CONFIG_X86
399ec807
AK
434# define PIC_ROUTING_ENTRY(irq) \
435 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
436 .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
437# define ROUTING_ENTRY2(irq) \
438 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
439#else
440# define ROUTING_ENTRY2(irq) \
441 IOAPIC_ROUTING_ENTRY(irq)
442#endif
443
444static const struct kvm_irq_routing_entry default_routing[] = {
445 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
446 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
447 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
448 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
449 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
450 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
451 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
452 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
453 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
454 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
455 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
456 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
457#ifdef CONFIG_IA64
458 ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
459 ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
460 ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
461 ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
462 ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
463 ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
464 ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
465 ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
466 ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
467 ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
468 ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
469 ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
470#endif
471};
472
473int kvm_setup_default_irq_routing(struct kvm *kvm)
474{
475 return kvm_set_irq_routing(kvm, default_routing,
476 ARRAY_SIZE(default_routing), 0);
477}