Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Driver for CS4231 sound chips found on Sparcs. | |
3 | * Copyright (C) 2002 David S. Miller <davem@redhat.com> | |
4 | * | |
5 | * Based entirely upon drivers/sbus/audio/cs4231.c which is: | |
9e9abb4f | 6 | * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu) |
1da177e4 | 7 | * and also sound/isa/cs423x/cs4231_lib.c which is: |
c1017a4c | 8 | * Copyright (c) by Jaroslav Kysela <perex@perex.cz> |
1da177e4 LT |
9 | */ |
10 | ||
1da177e4 LT |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> | |
13 | #include <linux/slab.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/moduleparam.h> | |
9e9abb4f KH |
18 | #include <linux/irq.h> |
19 | #include <linux/io.h> | |
20 | ||
1da177e4 LT |
21 | |
22 | #include <sound/driver.h> | |
23 | #include <sound/core.h> | |
24 | #include <sound/pcm.h> | |
25 | #include <sound/info.h> | |
26 | #include <sound/control.h> | |
27 | #include <sound/timer.h> | |
28 | #include <sound/initval.h> | |
29 | #include <sound/pcm_params.h> | |
30 | ||
1da177e4 LT |
31 | #ifdef CONFIG_SBUS |
32 | #define SBUS_SUPPORT | |
1da177e4 LT |
33 | #include <asm/sbus.h> |
34 | #endif | |
35 | ||
36 | #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64) | |
37 | #define EBUS_SUPPORT | |
1da177e4 LT |
38 | #include <linux/pci.h> |
39 | #include <asm/ebus.h> | |
40 | #endif | |
41 | ||
42 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | |
43 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
9e9abb4f KH |
44 | /* Enable this card */ |
45 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
1da177e4 LT |
46 | |
47 | module_param_array(index, int, NULL, 0444); | |
48 | MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard."); | |
49 | module_param_array(id, charp, NULL, 0444); | |
50 | MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard."); | |
51 | module_param_array(enable, bool, NULL, 0444); | |
52 | MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard."); | |
53 | MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller"); | |
54 | MODULE_DESCRIPTION("Sun CS4231"); | |
55 | MODULE_LICENSE("GPL"); | |
56 | MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}"); | |
57 | ||
5a820fa7 | 58 | #ifdef SBUS_SUPPORT |
be9b7e8c | 59 | struct sbus_dma_info { |
9e9abb4f KH |
60 | spinlock_t lock; /* DMA access lock */ |
61 | int dir; | |
62 | void __iomem *regs; | |
be9b7e8c | 63 | }; |
5a820fa7 GC |
64 | #endif |
65 | ||
4f3f2f6f | 66 | struct snd_cs4231; |
be9b7e8c | 67 | struct cs4231_dma_control { |
9e9abb4f KH |
68 | void (*prepare)(struct cs4231_dma_control *dma_cont, |
69 | int dir); | |
70 | void (*enable)(struct cs4231_dma_control *dma_cont, int on); | |
71 | int (*request)(struct cs4231_dma_control *dma_cont, | |
72 | dma_addr_t bus_addr, size_t len); | |
73 | unsigned int (*address)(struct cs4231_dma_control *dma_cont); | |
74 | void (*preallocate)(struct snd_cs4231 *chip, | |
75 | struct snd_pcm *pcm); | |
1da177e4 | 76 | #ifdef EBUS_SUPPORT |
b128254f | 77 | struct ebus_dma_info ebus_info; |
1da177e4 | 78 | #endif |
5a820fa7 | 79 | #ifdef SBUS_SUPPORT |
b128254f | 80 | struct sbus_dma_info sbus_info; |
5a820fa7 | 81 | #endif |
be9b7e8c | 82 | }; |
b128254f GC |
83 | |
84 | struct snd_cs4231 { | |
9e9abb4f | 85 | spinlock_t lock; /* registers access lock */ |
b128254f GC |
86 | void __iomem *port; |
87 | ||
be9b7e8c TI |
88 | struct cs4231_dma_control p_dma; |
89 | struct cs4231_dma_control c_dma; | |
5a820fa7 | 90 | |
1da177e4 LT |
91 | u32 flags; |
92 | #define CS4231_FLAG_EBUS 0x00000001 | |
93 | #define CS4231_FLAG_PLAYBACK 0x00000002 | |
94 | #define CS4231_FLAG_CAPTURE 0x00000004 | |
95 | ||
be9b7e8c TI |
96 | struct snd_card *card; |
97 | struct snd_pcm *pcm; | |
98 | struct snd_pcm_substream *playback_substream; | |
1da177e4 | 99 | unsigned int p_periods_sent; |
be9b7e8c | 100 | struct snd_pcm_substream *capture_substream; |
1da177e4 | 101 | unsigned int c_periods_sent; |
be9b7e8c | 102 | struct snd_timer *timer; |
1da177e4 LT |
103 | |
104 | unsigned short mode; | |
105 | #define CS4231_MODE_NONE 0x0000 | |
106 | #define CS4231_MODE_PLAY 0x0001 | |
107 | #define CS4231_MODE_RECORD 0x0002 | |
108 | #define CS4231_MODE_TIMER 0x0004 | |
9e9abb4f KH |
109 | #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \ |
110 | CS4231_MODE_TIMER) | |
1da177e4 LT |
111 | |
112 | unsigned char image[32]; /* registers image */ | |
113 | int mce_bit; | |
114 | int calibrate_mute; | |
9e9abb4f KH |
115 | struct mutex mce_mutex; /* mutex for mce register */ |
116 | struct mutex open_mutex; /* mutex for ALSA open/close */ | |
1da177e4 LT |
117 | |
118 | union { | |
119 | #ifdef SBUS_SUPPORT | |
120 | struct sbus_dev *sdev; | |
121 | #endif | |
122 | #ifdef EBUS_SUPPORT | |
123 | struct pci_dev *pdev; | |
124 | #endif | |
125 | } dev_u; | |
126 | unsigned int irq[2]; | |
127 | unsigned int regs_size; | |
128 | struct snd_cs4231 *next; | |
b128254f | 129 | }; |
1da177e4 | 130 | |
be9b7e8c | 131 | static struct snd_cs4231 *cs4231_list; |
1da177e4 LT |
132 | |
133 | /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for | |
134 | * now.... -DaveM | |
135 | */ | |
136 | ||
137 | /* IO ports */ | |
7e52f3da | 138 | #include <sound/cs4231-regs.h> |
1da177e4 LT |
139 | |
140 | /* XXX offsets are different than PC ISA chips... */ | |
7e52f3da | 141 | #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2)) |
1da177e4 LT |
142 | |
143 | /* SBUS DMA register defines. */ | |
144 | ||
145 | #define APCCSR 0x10UL /* APC DMA CSR */ | |
146 | #define APCCVA 0x20UL /* APC Capture DMA Address */ | |
147 | #define APCCC 0x24UL /* APC Capture Count */ | |
148 | #define APCCNVA 0x28UL /* APC Capture DMA Next Address */ | |
149 | #define APCCNC 0x2cUL /* APC Capture Next Count */ | |
150 | #define APCPVA 0x30UL /* APC Play DMA Address */ | |
151 | #define APCPC 0x34UL /* APC Play Count */ | |
152 | #define APCPNVA 0x38UL /* APC Play DMA Next Address */ | |
153 | #define APCPNC 0x3cUL /* APC Play Next Count */ | |
154 | ||
5a820fa7 GC |
155 | /* Defines for SBUS DMA-routines */ |
156 | ||
157 | #define APCVA 0x0UL /* APC DMA Address */ | |
158 | #define APCC 0x4UL /* APC Count */ | |
159 | #define APCNVA 0x8UL /* APC DMA Next Address */ | |
160 | #define APCNC 0xcUL /* APC Next Count */ | |
161 | #define APC_PLAY 0x30UL /* Play registers start at 0x30 */ | |
162 | #define APC_RECORD 0x20UL /* Record registers start at 0x20 */ | |
163 | ||
1da177e4 LT |
164 | /* APCCSR bits */ |
165 | ||
166 | #define APC_INT_PENDING 0x800000 /* Interrupt Pending */ | |
167 | #define APC_PLAY_INT 0x400000 /* Playback interrupt */ | |
168 | #define APC_CAPT_INT 0x200000 /* Capture interrupt */ | |
169 | #define APC_GENL_INT 0x100000 /* General interrupt */ | |
170 | #define APC_XINT_ENA 0x80000 /* General ext int. enable */ | |
171 | #define APC_XINT_PLAY 0x40000 /* Playback ext intr */ | |
172 | #define APC_XINT_CAPT 0x20000 /* Capture ext intr */ | |
173 | #define APC_XINT_GENL 0x10000 /* Error ext intr */ | |
174 | #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */ | |
175 | #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */ | |
176 | #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */ | |
177 | #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */ | |
178 | #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */ | |
179 | #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */ | |
180 | #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */ | |
181 | #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */ | |
182 | #define APC_PPAUSE 0x80 /* Pause the play DMA */ | |
183 | #define APC_CPAUSE 0x40 /* Pause the capture DMA */ | |
184 | #define APC_CDC_RESET 0x20 /* CODEC RESET */ | |
185 | #define APC_PDMA_READY 0x08 /* Play DMA Go */ | |
186 | #define APC_CDMA_READY 0x04 /* Capture DMA Go */ | |
187 | #define APC_CHIP_RESET 0x01 /* Reset the chip */ | |
188 | ||
189 | /* EBUS DMA register offsets */ | |
190 | ||
191 | #define EBDMA_CSR 0x00UL /* Control/Status */ | |
192 | #define EBDMA_ADDR 0x04UL /* DMA Address */ | |
193 | #define EBDMA_COUNT 0x08UL /* DMA Count */ | |
194 | ||
195 | /* | |
196 | * Some variables | |
197 | */ | |
198 | ||
199 | static unsigned char freq_bits[14] = { | |
200 | /* 5510 */ 0x00 | CS4231_XTAL2, | |
201 | /* 6620 */ 0x0E | CS4231_XTAL2, | |
202 | /* 8000 */ 0x00 | CS4231_XTAL1, | |
203 | /* 9600 */ 0x0E | CS4231_XTAL1, | |
204 | /* 11025 */ 0x02 | CS4231_XTAL2, | |
205 | /* 16000 */ 0x02 | CS4231_XTAL1, | |
206 | /* 18900 */ 0x04 | CS4231_XTAL2, | |
207 | /* 22050 */ 0x06 | CS4231_XTAL2, | |
208 | /* 27042 */ 0x04 | CS4231_XTAL1, | |
209 | /* 32000 */ 0x06 | CS4231_XTAL1, | |
210 | /* 33075 */ 0x0C | CS4231_XTAL2, | |
211 | /* 37800 */ 0x08 | CS4231_XTAL2, | |
212 | /* 44100 */ 0x0A | CS4231_XTAL2, | |
213 | /* 48000 */ 0x0C | CS4231_XTAL1 | |
214 | }; | |
215 | ||
216 | static unsigned int rates[14] = { | |
217 | 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050, | |
218 | 27042, 32000, 33075, 37800, 44100, 48000 | |
219 | }; | |
220 | ||
be9b7e8c | 221 | static struct snd_pcm_hw_constraint_list hw_constraints_rates = { |
c6c2d57b | 222 | .count = ARRAY_SIZE(rates), |
1da177e4 LT |
223 | .list = rates, |
224 | }; | |
225 | ||
be9b7e8c | 226 | static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime) |
1da177e4 LT |
227 | { |
228 | return snd_pcm_hw_constraint_list(runtime, 0, | |
229 | SNDRV_PCM_HW_PARAM_RATE, | |
230 | &hw_constraints_rates); | |
231 | } | |
232 | ||
233 | static unsigned char snd_cs4231_original_image[32] = | |
234 | { | |
235 | 0x00, /* 00/00 - lic */ | |
236 | 0x00, /* 01/01 - ric */ | |
237 | 0x9f, /* 02/02 - la1ic */ | |
238 | 0x9f, /* 03/03 - ra1ic */ | |
239 | 0x9f, /* 04/04 - la2ic */ | |
240 | 0x9f, /* 05/05 - ra2ic */ | |
241 | 0xbf, /* 06/06 - loc */ | |
242 | 0xbf, /* 07/07 - roc */ | |
243 | 0x20, /* 08/08 - pdfr */ | |
244 | CS4231_AUTOCALIB, /* 09/09 - ic */ | |
245 | 0x00, /* 0a/10 - pc */ | |
246 | 0x00, /* 0b/11 - ti */ | |
247 | CS4231_MODE2, /* 0c/12 - mi */ | |
248 | 0x00, /* 0d/13 - lbc */ | |
249 | 0x00, /* 0e/14 - pbru */ | |
250 | 0x00, /* 0f/15 - pbrl */ | |
251 | 0x80, /* 10/16 - afei */ | |
252 | 0x01, /* 11/17 - afeii */ | |
253 | 0x9f, /* 12/18 - llic */ | |
254 | 0x9f, /* 13/19 - rlic */ | |
255 | 0x00, /* 14/20 - tlb */ | |
256 | 0x00, /* 15/21 - thb */ | |
257 | 0x00, /* 16/22 - la3mic/reserved */ | |
258 | 0x00, /* 17/23 - ra3mic/reserved */ | |
259 | 0x00, /* 18/24 - afs */ | |
260 | 0x00, /* 19/25 - lamoc/version */ | |
261 | 0x00, /* 1a/26 - mioc */ | |
262 | 0x00, /* 1b/27 - ramoc/reserved */ | |
263 | 0x20, /* 1c/28 - cdfr */ | |
264 | 0x00, /* 1d/29 - res4 */ | |
265 | 0x00, /* 1e/30 - cbru */ | |
266 | 0x00, /* 1f/31 - cbrl */ | |
267 | }; | |
268 | ||
be9b7e8c | 269 | static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr) |
1da177e4 LT |
270 | { |
271 | #ifdef EBUS_SUPPORT | |
c6c2d57b | 272 | if (cp->flags & CS4231_FLAG_EBUS) |
1da177e4 | 273 | return readb(reg_addr); |
c6c2d57b | 274 | else |
1da177e4 LT |
275 | #endif |
276 | #ifdef SBUS_SUPPORT | |
277 | return sbus_readb(reg_addr); | |
278 | #endif | |
1da177e4 LT |
279 | } |
280 | ||
9e9abb4f KH |
281 | static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, |
282 | void __iomem *reg_addr) | |
1da177e4 LT |
283 | { |
284 | #ifdef EBUS_SUPPORT | |
c6c2d57b | 285 | if (cp->flags & CS4231_FLAG_EBUS) |
1da177e4 | 286 | return writeb(val, reg_addr); |
c6c2d57b | 287 | else |
1da177e4 LT |
288 | #endif |
289 | #ifdef SBUS_SUPPORT | |
290 | return sbus_writeb(val, reg_addr); | |
291 | #endif | |
1da177e4 LT |
292 | } |
293 | ||
294 | /* | |
295 | * Basic I/O functions | |
296 | */ | |
297 | ||
c6c2d57b | 298 | static void snd_cs4231_ready(struct snd_cs4231 *chip) |
1da177e4 LT |
299 | { |
300 | int timeout; | |
1da177e4 | 301 | |
7e52f3da KH |
302 | for (timeout = 250; timeout > 0; timeout--) { |
303 | int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); | |
304 | if ((val & CS4231_INIT) == 0) | |
305 | break; | |
306 | udelay(100); | |
307 | } | |
1da177e4 LT |
308 | } |
309 | ||
9e9abb4f KH |
310 | static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, |
311 | unsigned char value) | |
1da177e4 | 312 | { |
c6c2d57b | 313 | snd_cs4231_ready(chip); |
a131430c | 314 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 315 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
c6c2d57b KH |
316 | snd_printdd("out: auto calibration time out - reg = 0x%x, " |
317 | "value = 0x%x\n", | |
318 | reg, value); | |
a131430c | 319 | #endif |
7e52f3da | 320 | __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); |
c6c2d57b | 321 | wmb(); |
7e52f3da | 322 | __cs4231_writeb(chip, value, CS4231U(chip, REG)); |
1da177e4 LT |
323 | mb(); |
324 | } | |
325 | ||
c6c2d57b KH |
326 | static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg, |
327 | unsigned char mask, unsigned char value) | |
1da177e4 | 328 | { |
c6c2d57b | 329 | unsigned char tmp = (chip->image[reg] & mask) | value; |
1da177e4 | 330 | |
c6c2d57b KH |
331 | chip->image[reg] = tmp; |
332 | if (!chip->calibrate_mute) | |
333 | snd_cs4231_dout(chip, reg, tmp); | |
334 | } | |
335 | ||
336 | static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, | |
337 | unsigned char value) | |
338 | { | |
339 | snd_cs4231_dout(chip, reg, value); | |
1da177e4 LT |
340 | chip->image[reg] = value; |
341 | mb(); | |
1da177e4 LT |
342 | } |
343 | ||
be9b7e8c | 344 | static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg) |
1da177e4 | 345 | { |
c6c2d57b | 346 | snd_cs4231_ready(chip); |
1da177e4 | 347 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 348 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
c6c2d57b KH |
349 | snd_printdd("in: auto calibration time out - reg = 0x%x\n", |
350 | reg); | |
1da177e4 | 351 | #endif |
7e52f3da | 352 | __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL)); |
1da177e4 | 353 | mb(); |
7e52f3da | 354 | return __cs4231_readb(chip, CS4231U(chip, REG)); |
1da177e4 LT |
355 | } |
356 | ||
1da177e4 LT |
357 | /* |
358 | * CS4231 detection / MCE routines | |
359 | */ | |
360 | ||
be9b7e8c | 361 | static void snd_cs4231_busy_wait(struct snd_cs4231 *chip) |
1da177e4 LT |
362 | { |
363 | int timeout; | |
364 | ||
9e9abb4f | 365 | /* looks like this sequence is proper for CS4231A chip (GUS MAX) */ |
1da177e4 | 366 | for (timeout = 5; timeout > 0; timeout--) |
7e52f3da | 367 | __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
a131430c | 368 | |
1da177e4 | 369 | /* end of cleanup sequence */ |
7e52f3da KH |
370 | for (timeout = 500; timeout > 0; timeout--) { |
371 | int val = __cs4231_readb(chip, CS4231U(chip, REGSEL)); | |
372 | if ((val & CS4231_INIT) == 0) | |
373 | break; | |
c6c2d57b | 374 | msleep(1); |
7e52f3da | 375 | } |
1da177e4 LT |
376 | } |
377 | ||
be9b7e8c | 378 | static void snd_cs4231_mce_up(struct snd_cs4231 *chip) |
1da177e4 LT |
379 | { |
380 | unsigned long flags; | |
381 | int timeout; | |
382 | ||
383 | spin_lock_irqsave(&chip->lock, flags); | |
c6c2d57b | 384 | snd_cs4231_ready(chip); |
1da177e4 | 385 | #ifdef CONFIG_SND_DEBUG |
7e52f3da | 386 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
a131430c | 387 | snd_printdd("mce_up - auto calibration time out (0)\n"); |
1da177e4 LT |
388 | #endif |
389 | chip->mce_bit |= CS4231_MCE; | |
7e52f3da | 390 | timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
1da177e4 | 391 | if (timeout == 0x80) |
9e9abb4f KH |
392 | snd_printdd("mce_up [%p]: serious init problem - " |
393 | "codec still busy\n", | |
394 | chip->port); | |
1da177e4 | 395 | if (!(timeout & CS4231_MCE)) |
7e52f3da KH |
396 | __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), |
397 | CS4231U(chip, REGSEL)); | |
1da177e4 LT |
398 | spin_unlock_irqrestore(&chip->lock, flags); |
399 | } | |
400 | ||
be9b7e8c | 401 | static void snd_cs4231_mce_down(struct snd_cs4231 *chip) |
1da177e4 LT |
402 | { |
403 | unsigned long flags; | |
404 | int timeout; | |
405 | ||
406 | spin_lock_irqsave(&chip->lock, flags); | |
407 | snd_cs4231_busy_wait(chip); | |
1da177e4 | 408 | #ifdef CONFIG_SND_DEBUG |
7e52f3da KH |
409 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
410 | snd_printdd("mce_down [%p] - auto calibration time out (0)\n", | |
411 | CS4231U(chip, REGSEL)); | |
1da177e4 LT |
412 | #endif |
413 | chip->mce_bit &= ~CS4231_MCE; | |
7e52f3da KH |
414 | timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL)); |
415 | __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), | |
416 | CS4231U(chip, REGSEL)); | |
1da177e4 | 417 | if (timeout == 0x80) |
9e9abb4f KH |
418 | snd_printdd("mce_down [%p]: serious init problem - " |
419 | "codec still busy\n", | |
420 | chip->port); | |
1da177e4 LT |
421 | if ((timeout & CS4231_MCE) == 0) { |
422 | spin_unlock_irqrestore(&chip->lock, flags); | |
423 | return; | |
424 | } | |
1da177e4 | 425 | |
56f91585 KH |
426 | /* |
427 | * Wait for (possible -- during init auto-calibration may not be set) | |
428 | * calibration process to start. Needs upto 5 sample periods on AD1848 | |
429 | * which at the slowest possible rate of 5.5125 kHz means 907 us. | |
430 | */ | |
431 | msleep(1); | |
a131430c | 432 | |
56f91585 KH |
433 | /* check condition up to 250ms */ |
434 | timeout = msecs_to_jiffies(250); | |
9e9abb4f KH |
435 | while (snd_cs4231_in(chip, CS4231_TEST_INIT) & |
436 | CS4231_CALIB_IN_PROGRESS) { | |
437 | ||
1da177e4 | 438 | spin_unlock_irqrestore(&chip->lock, flags); |
56f91585 | 439 | if (timeout <= 0) { |
9e9abb4f KH |
440 | snd_printk("mce_down - " |
441 | "auto calibration time out (2)\n"); | |
1da177e4 LT |
442 | return; |
443 | } | |
56f91585 | 444 | timeout = schedule_timeout(timeout); |
1da177e4 LT |
445 | spin_lock_irqsave(&chip->lock, flags); |
446 | } | |
a131430c | 447 | |
56f91585 KH |
448 | /* check condition up to 100ms */ |
449 | timeout = msecs_to_jiffies(100); | |
7e52f3da | 450 | while (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) { |
1da177e4 | 451 | spin_unlock_irqrestore(&chip->lock, flags); |
56f91585 | 452 | if (timeout <= 0) { |
9e9abb4f KH |
453 | snd_printk("mce_down - " |
454 | "auto calibration time out (3)\n"); | |
1da177e4 LT |
455 | return; |
456 | } | |
56f91585 | 457 | timeout = schedule_timeout(timeout); |
1da177e4 LT |
458 | spin_lock_irqsave(&chip->lock, flags); |
459 | } | |
460 | spin_unlock_irqrestore(&chip->lock, flags); | |
1da177e4 LT |
461 | } |
462 | ||
be9b7e8c TI |
463 | static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont, |
464 | struct snd_pcm_substream *substream, | |
465 | unsigned int *periods_sent) | |
1da177e4 | 466 | { |
be9b7e8c | 467 | struct snd_pcm_runtime *runtime = substream->runtime; |
1da177e4 LT |
468 | |
469 | while (1) { | |
a131430c CZ |
470 | unsigned int period_size = snd_pcm_lib_period_bytes(substream); |
471 | unsigned int offset = period_size * (*periods_sent); | |
1da177e4 | 472 | |
817dd6ee | 473 | BUG_ON(period_size >= (1 << 24)); |
1da177e4 | 474 | |
9e9abb4f KH |
475 | if (dma_cont->request(dma_cont, |
476 | runtime->dma_addr + offset, period_size)) | |
1da177e4 | 477 | return; |
1da177e4 LT |
478 | (*periods_sent) = ((*periods_sent) + 1) % runtime->periods; |
479 | } | |
480 | } | |
a131430c | 481 | |
be9b7e8c TI |
482 | static void cs4231_dma_trigger(struct snd_pcm_substream *substream, |
483 | unsigned int what, int on) | |
1da177e4 | 484 | { |
be9b7e8c TI |
485 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
486 | struct cs4231_dma_control *dma_cont; | |
a131430c | 487 | |
5a820fa7 | 488 | if (what & CS4231_PLAYBACK_ENABLE) { |
b128254f | 489 | dma_cont = &chip->p_dma; |
a131430c | 490 | if (on) { |
b128254f GC |
491 | dma_cont->prepare(dma_cont, 0); |
492 | dma_cont->enable(dma_cont, 1); | |
493 | snd_cs4231_advance_dma(dma_cont, | |
5a820fa7 GC |
494 | chip->playback_substream, |
495 | &chip->p_periods_sent); | |
a131430c | 496 | } else { |
b128254f | 497 | dma_cont->enable(dma_cont, 0); |
a131430c | 498 | } |
5a820fa7 GC |
499 | } |
500 | if (what & CS4231_RECORD_ENABLE) { | |
b128254f | 501 | dma_cont = &chip->c_dma; |
a131430c | 502 | if (on) { |
b128254f GC |
503 | dma_cont->prepare(dma_cont, 1); |
504 | dma_cont->enable(dma_cont, 1); | |
505 | snd_cs4231_advance_dma(dma_cont, | |
5a820fa7 GC |
506 | chip->capture_substream, |
507 | &chip->c_periods_sent); | |
a131430c | 508 | } else { |
b128254f | 509 | dma_cont->enable(dma_cont, 0); |
a131430c | 510 | } |
a131430c | 511 | } |
1da177e4 LT |
512 | } |
513 | ||
be9b7e8c | 514 | static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 515 | { |
be9b7e8c | 516 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
517 | int result = 0; |
518 | ||
519 | switch (cmd) { | |
520 | case SNDRV_PCM_TRIGGER_START: | |
521 | case SNDRV_PCM_TRIGGER_STOP: | |
522 | { | |
523 | unsigned int what = 0; | |
be9b7e8c | 524 | struct snd_pcm_substream *s; |
1da177e4 LT |
525 | unsigned long flags; |
526 | ||
ef991b95 | 527 | snd_pcm_group_for_each_entry(s, substream) { |
1da177e4 LT |
528 | if (s == chip->playback_substream) { |
529 | what |= CS4231_PLAYBACK_ENABLE; | |
530 | snd_pcm_trigger_done(s, substream); | |
531 | } else if (s == chip->capture_substream) { | |
532 | what |= CS4231_RECORD_ENABLE; | |
533 | snd_pcm_trigger_done(s, substream); | |
534 | } | |
535 | } | |
536 | ||
1da177e4 LT |
537 | spin_lock_irqsave(&chip->lock, flags); |
538 | if (cmd == SNDRV_PCM_TRIGGER_START) { | |
a131430c | 539 | cs4231_dma_trigger(substream, what, 1); |
1da177e4 | 540 | chip->image[CS4231_IFACE_CTRL] |= what; |
1da177e4 | 541 | } else { |
a131430c | 542 | cs4231_dma_trigger(substream, what, 0); |
1da177e4 LT |
543 | chip->image[CS4231_IFACE_CTRL] &= ~what; |
544 | } | |
545 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, | |
546 | chip->image[CS4231_IFACE_CTRL]); | |
547 | spin_unlock_irqrestore(&chip->lock, flags); | |
548 | break; | |
549 | } | |
550 | default: | |
551 | result = -EINVAL; | |
552 | break; | |
553 | } | |
a131430c | 554 | |
1da177e4 LT |
555 | return result; |
556 | } | |
557 | ||
558 | /* | |
559 | * CODEC I/O | |
560 | */ | |
561 | ||
562 | static unsigned char snd_cs4231_get_rate(unsigned int rate) | |
563 | { | |
564 | int i; | |
565 | ||
566 | for (i = 0; i < 14; i++) | |
567 | if (rate == rates[i]) | |
568 | return freq_bits[i]; | |
9e9abb4f | 569 | |
1da177e4 LT |
570 | return freq_bits[13]; |
571 | } | |
572 | ||
9e9abb4f KH |
573 | static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, |
574 | int channels) | |
1da177e4 LT |
575 | { |
576 | unsigned char rformat; | |
577 | ||
578 | rformat = CS4231_LINEAR_8; | |
579 | switch (format) { | |
9e9abb4f KH |
580 | case SNDRV_PCM_FORMAT_MU_LAW: |
581 | rformat = CS4231_ULAW_8; | |
582 | break; | |
583 | case SNDRV_PCM_FORMAT_A_LAW: | |
584 | rformat = CS4231_ALAW_8; | |
585 | break; | |
586 | case SNDRV_PCM_FORMAT_S16_LE: | |
587 | rformat = CS4231_LINEAR_16; | |
588 | break; | |
589 | case SNDRV_PCM_FORMAT_S16_BE: | |
590 | rformat = CS4231_LINEAR_16_BIG; | |
591 | break; | |
592 | case SNDRV_PCM_FORMAT_IMA_ADPCM: | |
593 | rformat = CS4231_ADPCM_16; | |
594 | break; | |
1da177e4 LT |
595 | } |
596 | if (channels > 1) | |
597 | rformat |= CS4231_STEREO; | |
1da177e4 LT |
598 | return rformat; |
599 | } | |
600 | ||
be9b7e8c | 601 | static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute) |
1da177e4 LT |
602 | { |
603 | unsigned long flags; | |
604 | ||
605 | mute = mute ? 1 : 0; | |
606 | spin_lock_irqsave(&chip->lock, flags); | |
607 | if (chip->calibrate_mute == mute) { | |
608 | spin_unlock_irqrestore(&chip->lock, flags); | |
609 | return; | |
610 | } | |
611 | if (!mute) { | |
612 | snd_cs4231_dout(chip, CS4231_LEFT_INPUT, | |
613 | chip->image[CS4231_LEFT_INPUT]); | |
614 | snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, | |
615 | chip->image[CS4231_RIGHT_INPUT]); | |
616 | snd_cs4231_dout(chip, CS4231_LOOPBACK, | |
617 | chip->image[CS4231_LOOPBACK]); | |
618 | } | |
619 | snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, | |
620 | mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]); | |
621 | snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, | |
622 | mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]); | |
623 | snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, | |
624 | mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]); | |
625 | snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, | |
626 | mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]); | |
627 | snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, | |
628 | mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]); | |
629 | snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, | |
630 | mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]); | |
631 | snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, | |
632 | mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]); | |
633 | snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, | |
634 | mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]); | |
635 | snd_cs4231_dout(chip, CS4231_MONO_CTRL, | |
636 | mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]); | |
637 | chip->calibrate_mute = mute; | |
638 | spin_unlock_irqrestore(&chip->lock, flags); | |
639 | } | |
640 | ||
9e9abb4f KH |
641 | static void snd_cs4231_playback_format(struct snd_cs4231 *chip, |
642 | struct snd_pcm_hw_params *params, | |
1da177e4 LT |
643 | unsigned char pdfr) |
644 | { | |
645 | unsigned long flags; | |
646 | ||
12aa7579 | 647 | mutex_lock(&chip->mce_mutex); |
1da177e4 LT |
648 | snd_cs4231_calibrate_mute(chip, 1); |
649 | ||
650 | snd_cs4231_mce_up(chip); | |
651 | ||
652 | spin_lock_irqsave(&chip->lock, flags); | |
653 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, | |
654 | (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ? | |
655 | (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) : | |
656 | pdfr); | |
657 | spin_unlock_irqrestore(&chip->lock, flags); | |
658 | ||
659 | snd_cs4231_mce_down(chip); | |
660 | ||
661 | snd_cs4231_calibrate_mute(chip, 0); | |
12aa7579 | 662 | mutex_unlock(&chip->mce_mutex); |
1da177e4 LT |
663 | } |
664 | ||
9e9abb4f KH |
665 | static void snd_cs4231_capture_format(struct snd_cs4231 *chip, |
666 | struct snd_pcm_hw_params *params, | |
667 | unsigned char cdfr) | |
1da177e4 LT |
668 | { |
669 | unsigned long flags; | |
670 | ||
12aa7579 | 671 | mutex_lock(&chip->mce_mutex); |
1da177e4 LT |
672 | snd_cs4231_calibrate_mute(chip, 1); |
673 | ||
674 | snd_cs4231_mce_up(chip); | |
675 | ||
676 | spin_lock_irqsave(&chip->lock, flags); | |
677 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) { | |
678 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, | |
679 | ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) | | |
680 | (cdfr & 0x0f)); | |
681 | spin_unlock_irqrestore(&chip->lock, flags); | |
682 | snd_cs4231_mce_down(chip); | |
683 | snd_cs4231_mce_up(chip); | |
684 | spin_lock_irqsave(&chip->lock, flags); | |
685 | } | |
686 | snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr); | |
687 | spin_unlock_irqrestore(&chip->lock, flags); | |
688 | ||
689 | snd_cs4231_mce_down(chip); | |
690 | ||
691 | snd_cs4231_calibrate_mute(chip, 0); | |
12aa7579 | 692 | mutex_unlock(&chip->mce_mutex); |
1da177e4 LT |
693 | } |
694 | ||
695 | /* | |
696 | * Timer interface | |
697 | */ | |
698 | ||
be9b7e8c | 699 | static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer) |
1da177e4 | 700 | { |
be9b7e8c | 701 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
702 | |
703 | return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920; | |
704 | } | |
705 | ||
be9b7e8c | 706 | static int snd_cs4231_timer_start(struct snd_timer *timer) |
1da177e4 LT |
707 | { |
708 | unsigned long flags; | |
709 | unsigned int ticks; | |
be9b7e8c | 710 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
711 | |
712 | spin_lock_irqsave(&chip->lock, flags); | |
713 | ticks = timer->sticks; | |
714 | if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 || | |
715 | (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] || | |
716 | (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) { | |
717 | snd_cs4231_out(chip, CS4231_TIMER_HIGH, | |
718 | chip->image[CS4231_TIMER_HIGH] = | |
719 | (unsigned char) (ticks >> 8)); | |
720 | snd_cs4231_out(chip, CS4231_TIMER_LOW, | |
721 | chip->image[CS4231_TIMER_LOW] = | |
722 | (unsigned char) ticks); | |
723 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, | |
9e9abb4f KH |
724 | chip->image[CS4231_ALT_FEATURE_1] | |
725 | CS4231_TIMER_ENABLE); | |
1da177e4 LT |
726 | } |
727 | spin_unlock_irqrestore(&chip->lock, flags); | |
728 | ||
729 | return 0; | |
730 | } | |
731 | ||
be9b7e8c | 732 | static int snd_cs4231_timer_stop(struct snd_timer *timer) |
1da177e4 LT |
733 | { |
734 | unsigned long flags; | |
be9b7e8c | 735 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
736 | |
737 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f | 738 | chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE; |
1da177e4 | 739 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, |
9e9abb4f | 740 | chip->image[CS4231_ALT_FEATURE_1]); |
1da177e4 LT |
741 | spin_unlock_irqrestore(&chip->lock, flags); |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
be9b7e8c | 746 | static void __init snd_cs4231_init(struct snd_cs4231 *chip) |
1da177e4 LT |
747 | { |
748 | unsigned long flags; | |
749 | ||
750 | snd_cs4231_mce_down(chip); | |
751 | ||
752 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 753 | snd_printdd("init: (1)\n"); |
1da177e4 LT |
754 | #endif |
755 | snd_cs4231_mce_up(chip); | |
756 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
757 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | |
758 | CS4231_PLAYBACK_PIO | | |
759 | CS4231_RECORD_ENABLE | | |
760 | CS4231_RECORD_PIO | | |
1da177e4 LT |
761 | CS4231_CALIB_MODE); |
762 | chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB; | |
763 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]); | |
764 | spin_unlock_irqrestore(&chip->lock, flags); | |
765 | snd_cs4231_mce_down(chip); | |
766 | ||
767 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 768 | snd_printdd("init: (2)\n"); |
1da177e4 LT |
769 | #endif |
770 | ||
771 | snd_cs4231_mce_up(chip); | |
772 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
773 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, |
774 | chip->image[CS4231_ALT_FEATURE_1]); | |
1da177e4 LT |
775 | spin_unlock_irqrestore(&chip->lock, flags); |
776 | snd_cs4231_mce_down(chip); | |
777 | ||
778 | #ifdef SNDRV_DEBUG_MCE | |
9e9abb4f KH |
779 | snd_printdd("init: (3) - afei = 0x%x\n", |
780 | chip->image[CS4231_ALT_FEATURE_1]); | |
1da177e4 LT |
781 | #endif |
782 | ||
783 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
784 | snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, |
785 | chip->image[CS4231_ALT_FEATURE_2]); | |
1da177e4 LT |
786 | spin_unlock_irqrestore(&chip->lock, flags); |
787 | ||
788 | snd_cs4231_mce_up(chip); | |
789 | spin_lock_irqsave(&chip->lock, flags); | |
9e9abb4f KH |
790 | snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, |
791 | chip->image[CS4231_PLAYBK_FORMAT]); | |
1da177e4 LT |
792 | spin_unlock_irqrestore(&chip->lock, flags); |
793 | snd_cs4231_mce_down(chip); | |
794 | ||
795 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 796 | snd_printdd("init: (4)\n"); |
1da177e4 LT |
797 | #endif |
798 | ||
799 | snd_cs4231_mce_up(chip); | |
800 | spin_lock_irqsave(&chip->lock, flags); | |
801 | snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]); | |
802 | spin_unlock_irqrestore(&chip->lock, flags); | |
803 | snd_cs4231_mce_down(chip); | |
804 | ||
805 | #ifdef SNDRV_DEBUG_MCE | |
a131430c | 806 | snd_printdd("init: (5)\n"); |
1da177e4 LT |
807 | #endif |
808 | } | |
809 | ||
be9b7e8c | 810 | static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode) |
1da177e4 LT |
811 | { |
812 | unsigned long flags; | |
813 | ||
12aa7579 | 814 | mutex_lock(&chip->open_mutex); |
1da177e4 | 815 | if ((chip->mode & mode)) { |
12aa7579 | 816 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
817 | return -EAGAIN; |
818 | } | |
819 | if (chip->mode & CS4231_MODE_OPEN) { | |
820 | chip->mode |= mode; | |
12aa7579 | 821 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
822 | return 0; |
823 | } | |
824 | /* ok. now enable and ack CODEC IRQ */ | |
825 | spin_lock_irqsave(&chip->lock, flags); | |
826 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | | |
827 | CS4231_RECORD_IRQ | | |
828 | CS4231_TIMER_IRQ); | |
829 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
830 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
831 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
832 | |
833 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ | | |
834 | CS4231_RECORD_IRQ | | |
835 | CS4231_TIMER_IRQ); | |
836 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
a131430c | 837 | |
1da177e4 LT |
838 | spin_unlock_irqrestore(&chip->lock, flags); |
839 | ||
840 | chip->mode = mode; | |
12aa7579 | 841 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
842 | return 0; |
843 | } | |
844 | ||
be9b7e8c | 845 | static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode) |
1da177e4 LT |
846 | { |
847 | unsigned long flags; | |
848 | ||
12aa7579 | 849 | mutex_lock(&chip->open_mutex); |
1da177e4 LT |
850 | chip->mode &= ~mode; |
851 | if (chip->mode & CS4231_MODE_OPEN) { | |
12aa7579 | 852 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
853 | return; |
854 | } | |
855 | snd_cs4231_calibrate_mute(chip, 1); | |
856 | ||
857 | /* disable IRQ */ | |
858 | spin_lock_irqsave(&chip->lock, flags); | |
859 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
860 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
861 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
862 | |
863 | /* now disable record & playback */ | |
864 | ||
865 | if (chip->image[CS4231_IFACE_CTRL] & | |
866 | (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | | |
867 | CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) { | |
868 | spin_unlock_irqrestore(&chip->lock, flags); | |
869 | snd_cs4231_mce_up(chip); | |
870 | spin_lock_irqsave(&chip->lock, flags); | |
871 | chip->image[CS4231_IFACE_CTRL] &= | |
872 | ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO | | |
873 | CS4231_RECORD_ENABLE | CS4231_RECORD_PIO); | |
9e9abb4f KH |
874 | snd_cs4231_out(chip, CS4231_IFACE_CTRL, |
875 | chip->image[CS4231_IFACE_CTRL]); | |
1da177e4 LT |
876 | spin_unlock_irqrestore(&chip->lock, flags); |
877 | snd_cs4231_mce_down(chip); | |
878 | spin_lock_irqsave(&chip->lock, flags); | |
879 | } | |
880 | ||
881 | /* clear IRQ again */ | |
882 | snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0); | |
7e52f3da KH |
883 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ |
884 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */ | |
1da177e4 LT |
885 | spin_unlock_irqrestore(&chip->lock, flags); |
886 | ||
887 | snd_cs4231_calibrate_mute(chip, 0); | |
888 | ||
889 | chip->mode = 0; | |
12aa7579 | 890 | mutex_unlock(&chip->open_mutex); |
1da177e4 LT |
891 | } |
892 | ||
893 | /* | |
894 | * timer open/close | |
895 | */ | |
896 | ||
be9b7e8c | 897 | static int snd_cs4231_timer_open(struct snd_timer *timer) |
1da177e4 | 898 | { |
be9b7e8c | 899 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
900 | snd_cs4231_open(chip, CS4231_MODE_TIMER); |
901 | return 0; | |
902 | } | |
903 | ||
9e9abb4f | 904 | static int snd_cs4231_timer_close(struct snd_timer *timer) |
1da177e4 | 905 | { |
be9b7e8c | 906 | struct snd_cs4231 *chip = snd_timer_chip(timer); |
1da177e4 LT |
907 | snd_cs4231_close(chip, CS4231_MODE_TIMER); |
908 | return 0; | |
909 | } | |
910 | ||
9e9abb4f | 911 | static struct snd_timer_hardware snd_cs4231_timer_table = { |
1da177e4 LT |
912 | .flags = SNDRV_TIMER_HW_AUTO, |
913 | .resolution = 9945, | |
914 | .ticks = 65535, | |
915 | .open = snd_cs4231_timer_open, | |
916 | .close = snd_cs4231_timer_close, | |
917 | .c_resolution = snd_cs4231_timer_resolution, | |
918 | .start = snd_cs4231_timer_start, | |
919 | .stop = snd_cs4231_timer_stop, | |
920 | }; | |
921 | ||
922 | /* | |
923 | * ok.. exported functions.. | |
924 | */ | |
925 | ||
be9b7e8c TI |
926 | static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream, |
927 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 928 | { |
be9b7e8c | 929 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
930 | unsigned char new_pdfr; |
931 | int err; | |
932 | ||
9e9abb4f KH |
933 | err = snd_pcm_lib_malloc_pages(substream, |
934 | params_buffer_bytes(hw_params)); | |
935 | if (err < 0) | |
1da177e4 LT |
936 | return err; |
937 | new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), | |
938 | params_channels(hw_params)) | | |
939 | snd_cs4231_get_rate(params_rate(hw_params)); | |
940 | snd_cs4231_playback_format(chip, hw_params, new_pdfr); | |
941 | ||
942 | return 0; | |
943 | } | |
944 | ||
be9b7e8c | 945 | static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 946 | { |
be9b7e8c TI |
947 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
948 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
949 | unsigned long flags; |
950 | ||
951 | spin_lock_irqsave(&chip->lock, flags); | |
a131430c | 952 | |
1da177e4 LT |
953 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | |
954 | CS4231_PLAYBACK_PIO); | |
a131430c | 955 | |
817dd6ee | 956 | BUG_ON(runtime->period_size > 0xffff + 1); |
a131430c | 957 | |
a131430c | 958 | chip->p_periods_sent = 0; |
1da177e4 LT |
959 | spin_unlock_irqrestore(&chip->lock, flags); |
960 | ||
961 | return 0; | |
962 | } | |
963 | ||
be9b7e8c TI |
964 | static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream, |
965 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 | 966 | { |
be9b7e8c | 967 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
968 | unsigned char new_cdfr; |
969 | int err; | |
970 | ||
9e9abb4f KH |
971 | err = snd_pcm_lib_malloc_pages(substream, |
972 | params_buffer_bytes(hw_params)); | |
973 | if (err < 0) | |
1da177e4 LT |
974 | return err; |
975 | new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), | |
976 | params_channels(hw_params)) | | |
977 | snd_cs4231_get_rate(params_rate(hw_params)); | |
978 | snd_cs4231_capture_format(chip, hw_params, new_cdfr); | |
979 | ||
980 | return 0; | |
981 | } | |
982 | ||
be9b7e8c | 983 | static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 | 984 | { |
be9b7e8c | 985 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
986 | unsigned long flags; |
987 | ||
988 | spin_lock_irqsave(&chip->lock, flags); | |
989 | chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | | |
990 | CS4231_RECORD_PIO); | |
991 | ||
a131430c | 992 | |
5a820fa7 | 993 | chip->c_periods_sent = 0; |
1da177e4 LT |
994 | spin_unlock_irqrestore(&chip->lock, flags); |
995 | ||
996 | return 0; | |
997 | } | |
998 | ||
be9b7e8c | 999 | static void snd_cs4231_overrange(struct snd_cs4231 *chip) |
1da177e4 LT |
1000 | { |
1001 | unsigned long flags; | |
1002 | unsigned char res; | |
1003 | ||
1004 | spin_lock_irqsave(&chip->lock, flags); | |
1005 | res = snd_cs4231_in(chip, CS4231_TEST_INIT); | |
1006 | spin_unlock_irqrestore(&chip->lock, flags); | |
1007 | ||
9e9abb4f KH |
1008 | /* detect overrange only above 0dB; may be user selectable? */ |
1009 | if (res & (0x08 | 0x02)) | |
1da177e4 LT |
1010 | chip->capture_substream->runtime->overrange++; |
1011 | } | |
1012 | ||
be9b7e8c | 1013 | static void snd_cs4231_play_callback(struct snd_cs4231 *chip) |
1da177e4 | 1014 | { |
1da177e4 LT |
1015 | if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) { |
1016 | snd_pcm_period_elapsed(chip->playback_substream); | |
b128254f | 1017 | snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream, |
1da177e4 LT |
1018 | &chip->p_periods_sent); |
1019 | } | |
1020 | } | |
1021 | ||
be9b7e8c | 1022 | static void snd_cs4231_capture_callback(struct snd_cs4231 *chip) |
1da177e4 | 1023 | { |
1da177e4 LT |
1024 | if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) { |
1025 | snd_pcm_period_elapsed(chip->capture_substream); | |
b128254f | 1026 | snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream, |
1da177e4 LT |
1027 | &chip->c_periods_sent); |
1028 | } | |
1029 | } | |
1da177e4 | 1030 | |
9e9abb4f KH |
1031 | static snd_pcm_uframes_t snd_cs4231_playback_pointer( |
1032 | struct snd_pcm_substream *substream) | |
1da177e4 | 1033 | { |
be9b7e8c TI |
1034 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1035 | struct cs4231_dma_control *dma_cont = &chip->p_dma; | |
5a820fa7 | 1036 | size_t ptr; |
9e9abb4f | 1037 | |
1da177e4 LT |
1038 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) |
1039 | return 0; | |
b128254f GC |
1040 | ptr = dma_cont->address(dma_cont); |
1041 | if (ptr != 0) | |
1042 | ptr -= substream->runtime->dma_addr; | |
9e9abb4f | 1043 | |
1da177e4 LT |
1044 | return bytes_to_frames(substream->runtime, ptr); |
1045 | } | |
1046 | ||
9e9abb4f KH |
1047 | static snd_pcm_uframes_t snd_cs4231_capture_pointer( |
1048 | struct snd_pcm_substream *substream) | |
1da177e4 | 1049 | { |
be9b7e8c TI |
1050 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1051 | struct cs4231_dma_control *dma_cont = &chip->c_dma; | |
5a820fa7 | 1052 | size_t ptr; |
9e9abb4f | 1053 | |
1da177e4 LT |
1054 | if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE)) |
1055 | return 0; | |
b128254f GC |
1056 | ptr = dma_cont->address(dma_cont); |
1057 | if (ptr != 0) | |
1058 | ptr -= substream->runtime->dma_addr; | |
9e9abb4f | 1059 | |
1da177e4 LT |
1060 | return bytes_to_frames(substream->runtime, ptr); |
1061 | } | |
1062 | ||
be9b7e8c | 1063 | static int __init snd_cs4231_probe(struct snd_cs4231 *chip) |
1da177e4 LT |
1064 | { |
1065 | unsigned long flags; | |
9e9abb4f KH |
1066 | int i; |
1067 | int id = 0; | |
1068 | int vers = 0; | |
1da177e4 LT |
1069 | unsigned char *ptr; |
1070 | ||
1da177e4 LT |
1071 | for (i = 0; i < 50; i++) { |
1072 | mb(); | |
7e52f3da | 1073 | if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT) |
9e9abb4f | 1074 | msleep(2); |
1da177e4 LT |
1075 | else { |
1076 | spin_lock_irqsave(&chip->lock, flags); | |
1077 | snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2); | |
1078 | id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f; | |
1079 | vers = snd_cs4231_in(chip, CS4231_VERSION); | |
1080 | spin_unlock_irqrestore(&chip->lock, flags); | |
1081 | if (id == 0x0a) | |
1082 | break; /* this is valid value */ | |
1083 | } | |
1084 | } | |
1085 | snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id); | |
1086 | if (id != 0x0a) | |
1087 | return -ENODEV; /* no valid device found */ | |
1088 | ||
1089 | spin_lock_irqsave(&chip->lock, flags); | |
1090 | ||
7e52f3da KH |
1091 | /* clear any pendings IRQ */ |
1092 | __cs4231_readb(chip, CS4231U(chip, STATUS)); | |
1093 | __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); | |
1da177e4 LT |
1094 | mb(); |
1095 | ||
1096 | spin_unlock_irqrestore(&chip->lock, flags); | |
1097 | ||
1098 | chip->image[CS4231_MISC_INFO] = CS4231_MODE2; | |
1099 | chip->image[CS4231_IFACE_CTRL] = | |
1100 | chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA; | |
1101 | chip->image[CS4231_ALT_FEATURE_1] = 0x80; | |
1102 | chip->image[CS4231_ALT_FEATURE_2] = 0x01; | |
1103 | if (vers & 0x20) | |
1104 | chip->image[CS4231_ALT_FEATURE_2] |= 0x02; | |
1105 | ||
1106 | ptr = (unsigned char *) &chip->image; | |
1107 | ||
1108 | snd_cs4231_mce_down(chip); | |
1109 | ||
1110 | spin_lock_irqsave(&chip->lock, flags); | |
1111 | ||
1112 | for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */ | |
1113 | snd_cs4231_out(chip, i, *ptr++); | |
1114 | ||
1115 | spin_unlock_irqrestore(&chip->lock, flags); | |
1116 | ||
1117 | snd_cs4231_mce_up(chip); | |
1118 | ||
1119 | snd_cs4231_mce_down(chip); | |
1120 | ||
1121 | mdelay(2); | |
1122 | ||
1123 | return 0; /* all things are ok.. */ | |
1124 | } | |
1125 | ||
9e9abb4f KH |
1126 | static struct snd_pcm_hardware snd_cs4231_playback = { |
1127 | .info = SNDRV_PCM_INFO_MMAP | | |
1128 | SNDRV_PCM_INFO_INTERLEAVED | | |
1129 | SNDRV_PCM_INFO_MMAP_VALID | | |
1130 | SNDRV_PCM_INFO_SYNC_START, | |
1131 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | | |
1132 | SNDRV_PCM_FMTBIT_A_LAW | | |
1133 | SNDRV_PCM_FMTBIT_IMA_ADPCM | | |
1134 | SNDRV_PCM_FMTBIT_U8 | | |
1135 | SNDRV_PCM_FMTBIT_S16_LE | | |
1136 | SNDRV_PCM_FMTBIT_S16_BE, | |
1137 | .rates = SNDRV_PCM_RATE_KNOT | | |
1138 | SNDRV_PCM_RATE_8000_48000, | |
1da177e4 LT |
1139 | .rate_min = 5510, |
1140 | .rate_max = 48000, | |
1141 | .channels_min = 1, | |
1142 | .channels_max = 2, | |
9e9abb4f | 1143 | .buffer_bytes_max = 32 * 1024, |
f9af1d9d | 1144 | .period_bytes_min = 64, |
9e9abb4f | 1145 | .period_bytes_max = 32 * 1024, |
1da177e4 LT |
1146 | .periods_min = 1, |
1147 | .periods_max = 1024, | |
1148 | }; | |
1149 | ||
9e9abb4f KH |
1150 | static struct snd_pcm_hardware snd_cs4231_capture = { |
1151 | .info = SNDRV_PCM_INFO_MMAP | | |
1152 | SNDRV_PCM_INFO_INTERLEAVED | | |
1153 | SNDRV_PCM_INFO_MMAP_VALID | | |
1154 | SNDRV_PCM_INFO_SYNC_START, | |
1155 | .formats = SNDRV_PCM_FMTBIT_MU_LAW | | |
1156 | SNDRV_PCM_FMTBIT_A_LAW | | |
1157 | SNDRV_PCM_FMTBIT_IMA_ADPCM | | |
1158 | SNDRV_PCM_FMTBIT_U8 | | |
1159 | SNDRV_PCM_FMTBIT_S16_LE | | |
1160 | SNDRV_PCM_FMTBIT_S16_BE, | |
1161 | .rates = SNDRV_PCM_RATE_KNOT | | |
1162 | SNDRV_PCM_RATE_8000_48000, | |
1da177e4 LT |
1163 | .rate_min = 5510, |
1164 | .rate_max = 48000, | |
1165 | .channels_min = 1, | |
1166 | .channels_max = 2, | |
9e9abb4f | 1167 | .buffer_bytes_max = 32 * 1024, |
f9af1d9d | 1168 | .period_bytes_min = 64, |
9e9abb4f | 1169 | .period_bytes_max = 32 * 1024, |
1da177e4 LT |
1170 | .periods_min = 1, |
1171 | .periods_max = 1024, | |
1172 | }; | |
1173 | ||
be9b7e8c | 1174 | static int snd_cs4231_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 1175 | { |
be9b7e8c TI |
1176 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1177 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1178 | int err; |
1179 | ||
1180 | runtime->hw = snd_cs4231_playback; | |
1181 | ||
9e9abb4f KH |
1182 | err = snd_cs4231_open(chip, CS4231_MODE_PLAY); |
1183 | if (err < 0) { | |
1da177e4 LT |
1184 | snd_free_pages(runtime->dma_area, runtime->dma_bytes); |
1185 | return err; | |
1186 | } | |
1187 | chip->playback_substream = substream; | |
1188 | chip->p_periods_sent = 0; | |
1189 | snd_pcm_set_sync(substream); | |
1190 | snd_cs4231_xrate(runtime); | |
1191 | ||
1192 | return 0; | |
1193 | } | |
1194 | ||
be9b7e8c | 1195 | static int snd_cs4231_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 1196 | { |
be9b7e8c TI |
1197 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1198 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1199 | int err; |
1200 | ||
1201 | runtime->hw = snd_cs4231_capture; | |
1202 | ||
9e9abb4f KH |
1203 | err = snd_cs4231_open(chip, CS4231_MODE_RECORD); |
1204 | if (err < 0) { | |
1da177e4 LT |
1205 | snd_free_pages(runtime->dma_area, runtime->dma_bytes); |
1206 | return err; | |
1207 | } | |
1208 | chip->capture_substream = substream; | |
1209 | chip->c_periods_sent = 0; | |
1210 | snd_pcm_set_sync(substream); | |
1211 | snd_cs4231_xrate(runtime); | |
1212 | ||
1213 | return 0; | |
1214 | } | |
1215 | ||
be9b7e8c | 1216 | static int snd_cs4231_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 1217 | { |
be9b7e8c | 1218 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 1219 | |
1da177e4 | 1220 | snd_cs4231_close(chip, CS4231_MODE_PLAY); |
b128254f | 1221 | chip->playback_substream = NULL; |
1da177e4 LT |
1222 | |
1223 | return 0; | |
1224 | } | |
1225 | ||
be9b7e8c | 1226 | static int snd_cs4231_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 1227 | { |
be9b7e8c | 1228 | struct snd_cs4231 *chip = snd_pcm_substream_chip(substream); |
1da177e4 | 1229 | |
1da177e4 | 1230 | snd_cs4231_close(chip, CS4231_MODE_RECORD); |
b128254f | 1231 | chip->capture_substream = NULL; |
1da177e4 LT |
1232 | |
1233 | return 0; | |
1234 | } | |
1235 | ||
1236 | /* XXX We can do some power-management, in particular on EBUS using | |
1237 | * XXX the audio AUXIO register... | |
1238 | */ | |
1239 | ||
be9b7e8c | 1240 | static struct snd_pcm_ops snd_cs4231_playback_ops = { |
1da177e4 LT |
1241 | .open = snd_cs4231_playback_open, |
1242 | .close = snd_cs4231_playback_close, | |
1243 | .ioctl = snd_pcm_lib_ioctl, | |
1244 | .hw_params = snd_cs4231_playback_hw_params, | |
c6c2d57b | 1245 | .hw_free = snd_pcm_lib_free_pages, |
1da177e4 LT |
1246 | .prepare = snd_cs4231_playback_prepare, |
1247 | .trigger = snd_cs4231_trigger, | |
1248 | .pointer = snd_cs4231_playback_pointer, | |
1249 | }; | |
1250 | ||
be9b7e8c | 1251 | static struct snd_pcm_ops snd_cs4231_capture_ops = { |
1da177e4 LT |
1252 | .open = snd_cs4231_capture_open, |
1253 | .close = snd_cs4231_capture_close, | |
1254 | .ioctl = snd_pcm_lib_ioctl, | |
1255 | .hw_params = snd_cs4231_capture_hw_params, | |
c6c2d57b | 1256 | .hw_free = snd_pcm_lib_free_pages, |
1da177e4 LT |
1257 | .prepare = snd_cs4231_capture_prepare, |
1258 | .trigger = snd_cs4231_trigger, | |
1259 | .pointer = snd_cs4231_capture_pointer, | |
1260 | }; | |
1261 | ||
c6c2d57b | 1262 | static int __init snd_cs4231_pcm(struct snd_card *card) |
1da177e4 | 1263 | { |
c6c2d57b | 1264 | struct snd_cs4231 *chip = card->private_data; |
be9b7e8c | 1265 | struct snd_pcm *pcm; |
1da177e4 LT |
1266 | int err; |
1267 | ||
c6c2d57b KH |
1268 | err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm); |
1269 | if (err < 0) | |
1da177e4 LT |
1270 | return err; |
1271 | ||
9e9abb4f KH |
1272 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
1273 | &snd_cs4231_playback_ops); | |
1274 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
1275 | &snd_cs4231_capture_ops); | |
1276 | ||
1da177e4 LT |
1277 | /* global setup */ |
1278 | pcm->private_data = chip; | |
1da177e4 LT |
1279 | pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; |
1280 | strcpy(pcm->name, "CS4231"); | |
1281 | ||
b128254f | 1282 | chip->p_dma.preallocate(chip, pcm); |
1da177e4 LT |
1283 | |
1284 | chip->pcm = pcm; | |
1285 | ||
1286 | return 0; | |
1287 | } | |
1288 | ||
c6c2d57b | 1289 | static int __init snd_cs4231_timer(struct snd_card *card) |
1da177e4 | 1290 | { |
c6c2d57b | 1291 | struct snd_cs4231 *chip = card->private_data; |
be9b7e8c TI |
1292 | struct snd_timer *timer; |
1293 | struct snd_timer_id tid; | |
1da177e4 LT |
1294 | int err; |
1295 | ||
1296 | /* Timer initialization */ | |
1297 | tid.dev_class = SNDRV_TIMER_CLASS_CARD; | |
1298 | tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; | |
c6c2d57b | 1299 | tid.card = card->number; |
1da177e4 LT |
1300 | tid.device = 0; |
1301 | tid.subdevice = 0; | |
c6c2d57b KH |
1302 | err = snd_timer_new(card, "CS4231", &tid, &timer); |
1303 | if (err < 0) | |
1da177e4 LT |
1304 | return err; |
1305 | strcpy(timer->name, "CS4231"); | |
1306 | timer->private_data = chip; | |
1da177e4 LT |
1307 | timer->hw = snd_cs4231_timer_table; |
1308 | chip->timer = timer; | |
1309 | ||
1310 | return 0; | |
1311 | } | |
9e9abb4f | 1312 | |
1da177e4 LT |
1313 | /* |
1314 | * MIXER part | |
1315 | */ | |
1316 | ||
be9b7e8c TI |
1317 | static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol, |
1318 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1319 | { |
1320 | static char *texts[4] = { | |
1321 | "Line", "CD", "Mic", "Mix" | |
1322 | }; | |
1da177e4 | 1323 | |
1da177e4 LT |
1324 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; |
1325 | uinfo->count = 2; | |
1326 | uinfo->value.enumerated.items = 4; | |
1327 | if (uinfo->value.enumerated.item > 3) | |
1328 | uinfo->value.enumerated.item = 3; | |
9e9abb4f KH |
1329 | strcpy(uinfo->value.enumerated.name, |
1330 | texts[uinfo->value.enumerated.item]); | |
1da177e4 LT |
1331 | |
1332 | return 0; | |
1333 | } | |
1334 | ||
be9b7e8c TI |
1335 | static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol, |
1336 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1337 | { |
be9b7e8c | 1338 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 | 1339 | unsigned long flags; |
9e9abb4f | 1340 | |
1da177e4 LT |
1341 | spin_lock_irqsave(&chip->lock, flags); |
1342 | ucontrol->value.enumerated.item[0] = | |
1343 | (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6; | |
1344 | ucontrol->value.enumerated.item[1] = | |
1345 | (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6; | |
1346 | spin_unlock_irqrestore(&chip->lock, flags); | |
1347 | ||
1348 | return 0; | |
1349 | } | |
1350 | ||
be9b7e8c TI |
1351 | static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol, |
1352 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1353 | { |
be9b7e8c | 1354 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1355 | unsigned long flags; |
1356 | unsigned short left, right; | |
1357 | int change; | |
9e9abb4f | 1358 | |
1da177e4 LT |
1359 | if (ucontrol->value.enumerated.item[0] > 3 || |
1360 | ucontrol->value.enumerated.item[1] > 3) | |
1361 | return -EINVAL; | |
1362 | left = ucontrol->value.enumerated.item[0] << 6; | |
1363 | right = ucontrol->value.enumerated.item[1] << 6; | |
1364 | ||
1365 | spin_lock_irqsave(&chip->lock, flags); | |
1366 | ||
1367 | left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left; | |
1368 | right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right; | |
1369 | change = left != chip->image[CS4231_LEFT_INPUT] || | |
9e9abb4f | 1370 | right != chip->image[CS4231_RIGHT_INPUT]; |
1da177e4 LT |
1371 | snd_cs4231_out(chip, CS4231_LEFT_INPUT, left); |
1372 | snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right); | |
1373 | ||
1374 | spin_unlock_irqrestore(&chip->lock, flags); | |
1375 | ||
1376 | return change; | |
1377 | } | |
1378 | ||
be9b7e8c TI |
1379 | static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol, |
1380 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1381 | { |
1382 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1383 | ||
1384 | uinfo->type = (mask == 1) ? | |
1385 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1386 | uinfo->count = 1; | |
1387 | uinfo->value.integer.min = 0; | |
1388 | uinfo->value.integer.max = mask; | |
1389 | ||
1390 | return 0; | |
1391 | } | |
1392 | ||
be9b7e8c TI |
1393 | static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol, |
1394 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1395 | { |
be9b7e8c | 1396 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1397 | unsigned long flags; |
1398 | int reg = kcontrol->private_value & 0xff; | |
1399 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1400 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1401 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
9e9abb4f | 1402 | |
1da177e4 LT |
1403 | spin_lock_irqsave(&chip->lock, flags); |
1404 | ||
1405 | ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask; | |
1406 | ||
1407 | spin_unlock_irqrestore(&chip->lock, flags); | |
1408 | ||
1409 | if (invert) | |
1410 | ucontrol->value.integer.value[0] = | |
1411 | (mask - ucontrol->value.integer.value[0]); | |
1412 | ||
1413 | return 0; | |
1414 | } | |
1415 | ||
be9b7e8c TI |
1416 | static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol, |
1417 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1418 | { |
be9b7e8c | 1419 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1420 | unsigned long flags; |
1421 | int reg = kcontrol->private_value & 0xff; | |
1422 | int shift = (kcontrol->private_value >> 8) & 0xff; | |
1423 | int mask = (kcontrol->private_value >> 16) & 0xff; | |
1424 | int invert = (kcontrol->private_value >> 24) & 0xff; | |
1425 | int change; | |
1426 | unsigned short val; | |
9e9abb4f | 1427 | |
1da177e4 LT |
1428 | val = (ucontrol->value.integer.value[0] & mask); |
1429 | if (invert) | |
1430 | val = mask - val; | |
1431 | val <<= shift; | |
1432 | ||
1433 | spin_lock_irqsave(&chip->lock, flags); | |
1434 | ||
1435 | val = (chip->image[reg] & ~(mask << shift)) | val; | |
1436 | change = val != chip->image[reg]; | |
1437 | snd_cs4231_out(chip, reg, val); | |
1438 | ||
1439 | spin_unlock_irqrestore(&chip->lock, flags); | |
1440 | ||
1441 | return change; | |
1442 | } | |
1443 | ||
be9b7e8c TI |
1444 | static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol, |
1445 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
1446 | { |
1447 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1448 | ||
1449 | uinfo->type = mask == 1 ? | |
1450 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1451 | uinfo->count = 2; | |
1452 | uinfo->value.integer.min = 0; | |
1453 | uinfo->value.integer.max = mask; | |
1454 | ||
1455 | return 0; | |
1456 | } | |
1457 | ||
be9b7e8c TI |
1458 | static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol, |
1459 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1460 | { |
be9b7e8c | 1461 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1462 | unsigned long flags; |
1463 | int left_reg = kcontrol->private_value & 0xff; | |
1464 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1465 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1466 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1467 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1468 | int invert = (kcontrol->private_value >> 22) & 1; | |
9e9abb4f | 1469 | |
1da177e4 LT |
1470 | spin_lock_irqsave(&chip->lock, flags); |
1471 | ||
9e9abb4f KH |
1472 | ucontrol->value.integer.value[0] = |
1473 | (chip->image[left_reg] >> shift_left) & mask; | |
1474 | ucontrol->value.integer.value[1] = | |
1475 | (chip->image[right_reg] >> shift_right) & mask; | |
1da177e4 LT |
1476 | |
1477 | spin_unlock_irqrestore(&chip->lock, flags); | |
1478 | ||
1479 | if (invert) { | |
1480 | ucontrol->value.integer.value[0] = | |
1481 | (mask - ucontrol->value.integer.value[0]); | |
1482 | ucontrol->value.integer.value[1] = | |
1483 | (mask - ucontrol->value.integer.value[1]); | |
1484 | } | |
1485 | ||
1486 | return 0; | |
1487 | } | |
1488 | ||
be9b7e8c TI |
1489 | static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol, |
1490 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 1491 | { |
be9b7e8c | 1492 | struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
1493 | unsigned long flags; |
1494 | int left_reg = kcontrol->private_value & 0xff; | |
1495 | int right_reg = (kcontrol->private_value >> 8) & 0xff; | |
1496 | int shift_left = (kcontrol->private_value >> 16) & 0x07; | |
1497 | int shift_right = (kcontrol->private_value >> 19) & 0x07; | |
1498 | int mask = (kcontrol->private_value >> 24) & 0xff; | |
1499 | int invert = (kcontrol->private_value >> 22) & 1; | |
1500 | int change; | |
1501 | unsigned short val1, val2; | |
9e9abb4f | 1502 | |
1da177e4 LT |
1503 | val1 = ucontrol->value.integer.value[0] & mask; |
1504 | val2 = ucontrol->value.integer.value[1] & mask; | |
1505 | if (invert) { | |
1506 | val1 = mask - val1; | |
1507 | val2 = mask - val2; | |
1508 | } | |
1509 | val1 <<= shift_left; | |
1510 | val2 <<= shift_right; | |
1511 | ||
1512 | spin_lock_irqsave(&chip->lock, flags); | |
1513 | ||
1514 | val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1; | |
1515 | val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2; | |
9e9abb4f KH |
1516 | change = val1 != chip->image[left_reg]; |
1517 | change |= val2 != chip->image[right_reg]; | |
1da177e4 LT |
1518 | snd_cs4231_out(chip, left_reg, val1); |
1519 | snd_cs4231_out(chip, right_reg, val2); | |
1520 | ||
1521 | spin_unlock_irqrestore(&chip->lock, flags); | |
1522 | ||
1523 | return change; | |
1524 | } | |
1525 | ||
1526 | #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \ | |
9e9abb4f KH |
1527 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ |
1528 | .info = snd_cs4231_info_single, \ | |
1529 | .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \ | |
1530 | .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) } | |
1531 | ||
1532 | #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \ | |
1533 | shift_right, mask, invert) \ | |
1534 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \ | |
1535 | .info = snd_cs4231_info_double, \ | |
1536 | .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \ | |
1537 | .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \ | |
1538 | ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) } | |
1da177e4 | 1539 | |
be9b7e8c | 1540 | static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = { |
9e9abb4f KH |
1541 | CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, |
1542 | CS4231_RIGHT_OUTPUT, 7, 7, 1, 1), | |
1543 | CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, | |
1544 | CS4231_RIGHT_OUTPUT, 0, 0, 63, 1), | |
1545 | CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, | |
1546 | CS4231_RIGHT_LINE_IN, 7, 7, 1, 1), | |
1547 | CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, | |
1548 | CS4231_RIGHT_LINE_IN, 0, 0, 31, 1), | |
1549 | CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, | |
1550 | CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1), | |
1551 | CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, | |
1552 | CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1), | |
1553 | CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, | |
1554 | CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1), | |
1555 | CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, | |
1556 | CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1), | |
1da177e4 LT |
1557 | CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1), |
1558 | CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1), | |
1559 | CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1), | |
1560 | CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0), | |
9e9abb4f KH |
1561 | CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, |
1562 | 15, 0), | |
1da177e4 LT |
1563 | { |
1564 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | |
1565 | .name = "Capture Source", | |
1566 | .info = snd_cs4231_info_mux, | |
1567 | .get = snd_cs4231_get_mux, | |
1568 | .put = snd_cs4231_put_mux, | |
1569 | }, | |
9e9abb4f KH |
1570 | CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, |
1571 | 1, 0), | |
1da177e4 LT |
1572 | CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0), |
1573 | CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1), | |
1574 | /* SPARC specific uses of XCTL{0,1} general purpose outputs. */ | |
1575 | CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1), | |
1576 | CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1) | |
1577 | }; | |
9e9abb4f | 1578 | |
c6c2d57b | 1579 | static int __init snd_cs4231_mixer(struct snd_card *card) |
1da177e4 | 1580 | { |
c6c2d57b | 1581 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1582 | int err, idx; |
1583 | ||
1584 | snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL); | |
1585 | ||
1da177e4 LT |
1586 | strcpy(card->mixername, chip->pcm->name); |
1587 | ||
1588 | for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) { | |
c6c2d57b KH |
1589 | err = snd_ctl_add(card, |
1590 | snd_ctl_new1(&snd_cs4231_controls[idx], chip)); | |
1591 | if (err < 0) | |
1da177e4 LT |
1592 | return err; |
1593 | } | |
1594 | return 0; | |
1595 | } | |
1596 | ||
1597 | static int dev; | |
1598 | ||
be9b7e8c | 1599 | static int __init cs4231_attach_begin(struct snd_card **rcard) |
1da177e4 | 1600 | { |
be9b7e8c | 1601 | struct snd_card *card; |
c6c2d57b | 1602 | struct snd_cs4231 *chip; |
1da177e4 LT |
1603 | |
1604 | *rcard = NULL; | |
1605 | ||
1606 | if (dev >= SNDRV_CARDS) | |
1607 | return -ENODEV; | |
1608 | ||
1609 | if (!enable[dev]) { | |
1610 | dev++; | |
1611 | return -ENOENT; | |
1612 | } | |
1613 | ||
c6c2d57b KH |
1614 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, |
1615 | sizeof(struct snd_cs4231)); | |
1da177e4 LT |
1616 | if (card == NULL) |
1617 | return -ENOMEM; | |
1618 | ||
1619 | strcpy(card->driver, "CS4231"); | |
1620 | strcpy(card->shortname, "Sun CS4231"); | |
1621 | ||
c6c2d57b KH |
1622 | chip = card->private_data; |
1623 | chip->card = card; | |
1624 | ||
1da177e4 LT |
1625 | *rcard = card; |
1626 | return 0; | |
1627 | } | |
1628 | ||
c6c2d57b | 1629 | static int __init cs4231_attach_finish(struct snd_card *card) |
1da177e4 | 1630 | { |
c6c2d57b | 1631 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1632 | int err; |
1633 | ||
c6c2d57b KH |
1634 | err = snd_cs4231_pcm(card); |
1635 | if (err < 0) | |
1da177e4 LT |
1636 | goto out_err; |
1637 | ||
c6c2d57b KH |
1638 | err = snd_cs4231_mixer(card); |
1639 | if (err < 0) | |
1da177e4 LT |
1640 | goto out_err; |
1641 | ||
c6c2d57b KH |
1642 | err = snd_cs4231_timer(card); |
1643 | if (err < 0) | |
1da177e4 LT |
1644 | goto out_err; |
1645 | ||
c6c2d57b KH |
1646 | err = snd_card_register(card); |
1647 | if (err < 0) | |
1da177e4 LT |
1648 | goto out_err; |
1649 | ||
1650 | chip->next = cs4231_list; | |
1651 | cs4231_list = chip; | |
1652 | ||
1653 | dev++; | |
1654 | return 0; | |
1655 | ||
1656 | out_err: | |
1657 | snd_card_free(card); | |
1658 | return err; | |
1659 | } | |
1660 | ||
1661 | #ifdef SBUS_SUPPORT | |
b128254f | 1662 | |
7d12e780 | 1663 | static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id) |
b128254f GC |
1664 | { |
1665 | unsigned long flags; | |
1666 | unsigned char status; | |
1667 | u32 csr; | |
be9b7e8c | 1668 | struct snd_cs4231 *chip = dev_id; |
b128254f GC |
1669 | |
1670 | /*This is IRQ is not raised by the cs4231*/ | |
7e52f3da | 1671 | if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ)) |
b128254f GC |
1672 | return IRQ_NONE; |
1673 | ||
1674 | /* ACK the APC interrupt. */ | |
1675 | csr = sbus_readl(chip->port + APCCSR); | |
1676 | ||
1677 | sbus_writel(csr, chip->port + APCCSR); | |
1678 | ||
9e9abb4f KH |
1679 | if ((csr & APC_PDMA_READY) && |
1680 | (csr & APC_PLAY_INT) && | |
b128254f GC |
1681 | (csr & APC_XINT_PNVA) && |
1682 | !(csr & APC_XINT_EMPT)) | |
1683 | snd_cs4231_play_callback(chip); | |
1684 | ||
9e9abb4f KH |
1685 | if ((csr & APC_CDMA_READY) && |
1686 | (csr & APC_CAPT_INT) && | |
b128254f GC |
1687 | (csr & APC_XINT_CNVA) && |
1688 | !(csr & APC_XINT_EMPT)) | |
1689 | snd_cs4231_capture_callback(chip); | |
9e9abb4f | 1690 | |
b128254f GC |
1691 | status = snd_cs4231_in(chip, CS4231_IRQ_STATUS); |
1692 | ||
1693 | if (status & CS4231_TIMER_IRQ) { | |
1694 | if (chip->timer) | |
1695 | snd_timer_interrupt(chip->timer, chip->timer->sticks); | |
9e9abb4f | 1696 | } |
b128254f GC |
1697 | |
1698 | if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY)) | |
1699 | snd_cs4231_overrange(chip); | |
1700 | ||
1701 | /* ACK the CS4231 interrupt. */ | |
1702 | spin_lock_irqsave(&chip->lock, flags); | |
1703 | snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0); | |
1704 | spin_unlock_irqrestore(&chip->lock, flags); | |
1705 | ||
d35a1b9e | 1706 | return IRQ_HANDLED; |
b128254f GC |
1707 | } |
1708 | ||
1709 | /* | |
1710 | * SBUS DMA routines | |
1711 | */ | |
1712 | ||
9e9abb4f KH |
1713 | static int sbus_dma_request(struct cs4231_dma_control *dma_cont, |
1714 | dma_addr_t bus_addr, size_t len) | |
b128254f GC |
1715 | { |
1716 | unsigned long flags; | |
1717 | u32 test, csr; | |
1718 | int err; | |
be9b7e8c | 1719 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
9e9abb4f | 1720 | |
b128254f GC |
1721 | if (len >= (1 << 24)) |
1722 | return -EINVAL; | |
1723 | spin_lock_irqsave(&base->lock, flags); | |
1724 | csr = sbus_readl(base->regs + APCCSR); | |
1725 | err = -EINVAL; | |
1726 | test = APC_CDMA_READY; | |
9e9abb4f | 1727 | if (base->dir == APC_PLAY) |
b128254f GC |
1728 | test = APC_PDMA_READY; |
1729 | if (!(csr & test)) | |
1730 | goto out; | |
1731 | err = -EBUSY; | |
b128254f | 1732 | test = APC_XINT_CNVA; |
9e9abb4f | 1733 | if (base->dir == APC_PLAY) |
b128254f GC |
1734 | test = APC_XINT_PNVA; |
1735 | if (!(csr & test)) | |
1736 | goto out; | |
1737 | err = 0; | |
1738 | sbus_writel(bus_addr, base->regs + base->dir + APCNVA); | |
1739 | sbus_writel(len, base->regs + base->dir + APCNC); | |
1740 | out: | |
1741 | spin_unlock_irqrestore(&base->lock, flags); | |
1742 | return err; | |
1743 | } | |
1744 | ||
be9b7e8c | 1745 | static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d) |
b128254f GC |
1746 | { |
1747 | unsigned long flags; | |
1748 | u32 csr, test; | |
be9b7e8c | 1749 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f GC |
1750 | |
1751 | spin_lock_irqsave(&base->lock, flags); | |
1752 | csr = sbus_readl(base->regs + APCCSR); | |
1753 | test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA | | |
1754 | APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL | | |
1755 | APC_XINT_PENA; | |
9e9abb4f | 1756 | if (base->dir == APC_RECORD) |
b128254f GC |
1757 | test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA | |
1758 | APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL; | |
1759 | csr |= test; | |
1760 | sbus_writel(csr, base->regs + APCCSR); | |
1761 | spin_unlock_irqrestore(&base->lock, flags); | |
1762 | } | |
1763 | ||
be9b7e8c | 1764 | static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on) |
b128254f GC |
1765 | { |
1766 | unsigned long flags; | |
1767 | u32 csr, shift; | |
be9b7e8c | 1768 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f GC |
1769 | |
1770 | spin_lock_irqsave(&base->lock, flags); | |
1771 | if (!on) { | |
d35a1b9e GC |
1772 | sbus_writel(0, base->regs + base->dir + APCNC); |
1773 | sbus_writel(0, base->regs + base->dir + APCNVA); | |
9e9abb4f | 1774 | if (base->dir == APC_PLAY) { |
3daadf33 GC |
1775 | sbus_writel(0, base->regs + base->dir + APCC); |
1776 | sbus_writel(0, base->regs + base->dir + APCVA); | |
1777 | } | |
d35a1b9e | 1778 | |
3daadf33 | 1779 | udelay(1200); |
9e9abb4f | 1780 | } |
b128254f GC |
1781 | csr = sbus_readl(base->regs + APCCSR); |
1782 | shift = 0; | |
9e9abb4f | 1783 | if (base->dir == APC_PLAY) |
b128254f GC |
1784 | shift = 1; |
1785 | if (on) | |
1786 | csr &= ~(APC_CPAUSE << shift); | |
1787 | else | |
9e9abb4f | 1788 | csr |= (APC_CPAUSE << shift); |
b128254f GC |
1789 | sbus_writel(csr, base->regs + APCCSR); |
1790 | if (on) | |
1791 | csr |= (APC_CDMA_READY << shift); | |
1792 | else | |
1793 | csr &= ~(APC_CDMA_READY << shift); | |
1794 | sbus_writel(csr, base->regs + APCCSR); | |
9e9abb4f | 1795 | |
b128254f GC |
1796 | spin_unlock_irqrestore(&base->lock, flags); |
1797 | } | |
1798 | ||
be9b7e8c | 1799 | static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont) |
b128254f | 1800 | { |
be9b7e8c | 1801 | struct sbus_dma_info *base = &dma_cont->sbus_info; |
b128254f | 1802 | |
9e9abb4f | 1803 | return sbus_readl(base->regs + base->dir + APCVA); |
b128254f GC |
1804 | } |
1805 | ||
be9b7e8c | 1806 | static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm) |
b128254f GC |
1807 | { |
1808 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS, | |
9e9abb4f KH |
1809 | snd_dma_sbus_data(chip->dev_u.sdev), |
1810 | 64 * 1024, 128 * 1024); | |
b128254f GC |
1811 | } |
1812 | ||
1813 | /* | |
1814 | * Init and exit routines | |
1815 | */ | |
1816 | ||
be9b7e8c | 1817 | static int snd_cs4231_sbus_free(struct snd_cs4231 *chip) |
1da177e4 LT |
1818 | { |
1819 | if (chip->irq[0]) | |
1820 | free_irq(chip->irq[0], chip); | |
1821 | ||
1822 | if (chip->port) | |
1823 | sbus_iounmap(chip->port, chip->regs_size); | |
1824 | ||
1da177e4 LT |
1825 | return 0; |
1826 | } | |
1827 | ||
be9b7e8c | 1828 | static int snd_cs4231_sbus_dev_free(struct snd_device *device) |
1da177e4 | 1829 | { |
be9b7e8c | 1830 | struct snd_cs4231 *cp = device->device_data; |
1da177e4 LT |
1831 | |
1832 | return snd_cs4231_sbus_free(cp); | |
1833 | } | |
1834 | ||
be9b7e8c | 1835 | static struct snd_device_ops snd_cs4231_sbus_dev_ops = { |
1da177e4 LT |
1836 | .dev_free = snd_cs4231_sbus_dev_free, |
1837 | }; | |
1838 | ||
be9b7e8c | 1839 | static int __init snd_cs4231_sbus_create(struct snd_card *card, |
1da177e4 | 1840 | struct sbus_dev *sdev, |
c6c2d57b | 1841 | int dev) |
1da177e4 | 1842 | { |
c6c2d57b | 1843 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
1844 | int err; |
1845 | ||
1da177e4 | 1846 | spin_lock_init(&chip->lock); |
b128254f GC |
1847 | spin_lock_init(&chip->c_dma.sbus_info.lock); |
1848 | spin_lock_init(&chip->p_dma.sbus_info.lock); | |
12aa7579 IM |
1849 | mutex_init(&chip->mce_mutex); |
1850 | mutex_init(&chip->open_mutex); | |
1da177e4 LT |
1851 | chip->dev_u.sdev = sdev; |
1852 | chip->regs_size = sdev->reg_addrs[0].reg_size; | |
1853 | memcpy(&chip->image, &snd_cs4231_original_image, | |
1854 | sizeof(snd_cs4231_original_image)); | |
1855 | ||
1856 | chip->port = sbus_ioremap(&sdev->resource[0], 0, | |
1857 | chip->regs_size, "cs4231"); | |
1858 | if (!chip->port) { | |
a131430c | 1859 | snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); |
1da177e4 LT |
1860 | return -EIO; |
1861 | } | |
1862 | ||
b128254f GC |
1863 | chip->c_dma.sbus_info.regs = chip->port; |
1864 | chip->p_dma.sbus_info.regs = chip->port; | |
1865 | chip->c_dma.sbus_info.dir = APC_RECORD; | |
1866 | chip->p_dma.sbus_info.dir = APC_PLAY; | |
1867 | ||
1868 | chip->p_dma.prepare = sbus_dma_prepare; | |
1869 | chip->p_dma.enable = sbus_dma_enable; | |
1870 | chip->p_dma.request = sbus_dma_request; | |
1871 | chip->p_dma.address = sbus_dma_addr; | |
b128254f GC |
1872 | chip->p_dma.preallocate = sbus_dma_preallocate; |
1873 | ||
1874 | chip->c_dma.prepare = sbus_dma_prepare; | |
1875 | chip->c_dma.enable = sbus_dma_enable; | |
1876 | chip->c_dma.request = sbus_dma_request; | |
1877 | chip->c_dma.address = sbus_dma_addr; | |
b128254f | 1878 | chip->c_dma.preallocate = sbus_dma_preallocate; |
5a820fa7 | 1879 | |
1da177e4 | 1880 | if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt, |
65ca68b3 | 1881 | IRQF_SHARED, "cs4231", chip)) { |
c6387a48 DM |
1882 | snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n", |
1883 | dev, sdev->irqs[0]); | |
1da177e4 LT |
1884 | snd_cs4231_sbus_free(chip); |
1885 | return -EBUSY; | |
1886 | } | |
1887 | chip->irq[0] = sdev->irqs[0]; | |
1888 | ||
1889 | if (snd_cs4231_probe(chip) < 0) { | |
1890 | snd_cs4231_sbus_free(chip); | |
1891 | return -ENODEV; | |
1892 | } | |
1893 | snd_cs4231_init(chip); | |
1894 | ||
1895 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, | |
1896 | chip, &snd_cs4231_sbus_dev_ops)) < 0) { | |
1897 | snd_cs4231_sbus_free(chip); | |
1898 | return err; | |
1899 | } | |
1900 | ||
1da177e4 LT |
1901 | return 0; |
1902 | } | |
1903 | ||
be9b7e8c | 1904 | static int __init cs4231_sbus_attach(struct sbus_dev *sdev) |
1da177e4 LT |
1905 | { |
1906 | struct resource *rp = &sdev->resource[0]; | |
be9b7e8c | 1907 | struct snd_card *card; |
1da177e4 LT |
1908 | int err; |
1909 | ||
1910 | err = cs4231_attach_begin(&card); | |
1911 | if (err) | |
1912 | return err; | |
1913 | ||
5863aa65 | 1914 | sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d", |
1da177e4 LT |
1915 | card->shortname, |
1916 | rp->flags & 0xffL, | |
aa0a2ddc | 1917 | (unsigned long long)rp->start, |
c6387a48 | 1918 | sdev->irqs[0]); |
1da177e4 | 1919 | |
c6c2d57b KH |
1920 | err = snd_cs4231_sbus_create(card, sdev, dev); |
1921 | if (err < 0) { | |
1da177e4 LT |
1922 | snd_card_free(card); |
1923 | return err; | |
1924 | } | |
1925 | ||
c6c2d57b | 1926 | return cs4231_attach_finish(card); |
1da177e4 LT |
1927 | } |
1928 | #endif | |
1929 | ||
1930 | #ifdef EBUS_SUPPORT | |
b128254f | 1931 | |
9e9abb4f KH |
1932 | static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, |
1933 | void *cookie) | |
b128254f | 1934 | { |
be9b7e8c | 1935 | struct snd_cs4231 *chip = cookie; |
9e9abb4f | 1936 | |
b128254f GC |
1937 | snd_cs4231_play_callback(chip); |
1938 | } | |
1939 | ||
9e9abb4f KH |
1940 | static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, |
1941 | int event, void *cookie) | |
b128254f | 1942 | { |
be9b7e8c | 1943 | struct snd_cs4231 *chip = cookie; |
b128254f GC |
1944 | |
1945 | snd_cs4231_capture_callback(chip); | |
1946 | } | |
1947 | ||
1948 | /* | |
1949 | * EBUS DMA wrappers | |
1950 | */ | |
1951 | ||
9e9abb4f KH |
1952 | static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, |
1953 | dma_addr_t bus_addr, size_t len) | |
b128254f GC |
1954 | { |
1955 | return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len); | |
1956 | } | |
1957 | ||
be9b7e8c | 1958 | static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on) |
b128254f GC |
1959 | { |
1960 | ebus_dma_enable(&dma_cont->ebus_info, on); | |
1961 | } | |
1962 | ||
be9b7e8c | 1963 | static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir) |
b128254f GC |
1964 | { |
1965 | ebus_dma_prepare(&dma_cont->ebus_info, dir); | |
1966 | } | |
1967 | ||
be9b7e8c | 1968 | static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont) |
b128254f GC |
1969 | { |
1970 | return ebus_dma_addr(&dma_cont->ebus_info); | |
1971 | } | |
1972 | ||
be9b7e8c | 1973 | static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm) |
b128254f GC |
1974 | { |
1975 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1976 | snd_dma_pci_data(chip->dev_u.pdev), | |
1977 | 64*1024, 128*1024); | |
1978 | } | |
1979 | ||
1980 | /* | |
1981 | * Init and exit routines | |
1982 | */ | |
1983 | ||
be9b7e8c | 1984 | static int snd_cs4231_ebus_free(struct snd_cs4231 *chip) |
1da177e4 | 1985 | { |
b128254f GC |
1986 | if (chip->c_dma.ebus_info.regs) { |
1987 | ebus_dma_unregister(&chip->c_dma.ebus_info); | |
1988 | iounmap(chip->c_dma.ebus_info.regs); | |
1da177e4 | 1989 | } |
b128254f GC |
1990 | if (chip->p_dma.ebus_info.regs) { |
1991 | ebus_dma_unregister(&chip->p_dma.ebus_info); | |
1992 | iounmap(chip->p_dma.ebus_info.regs); | |
1da177e4 LT |
1993 | } |
1994 | ||
1995 | if (chip->port) | |
1996 | iounmap(chip->port); | |
1da177e4 | 1997 | |
1da177e4 LT |
1998 | return 0; |
1999 | } | |
2000 | ||
be9b7e8c | 2001 | static int snd_cs4231_ebus_dev_free(struct snd_device *device) |
1da177e4 | 2002 | { |
be9b7e8c | 2003 | struct snd_cs4231 *cp = device->device_data; |
1da177e4 LT |
2004 | |
2005 | return snd_cs4231_ebus_free(cp); | |
2006 | } | |
2007 | ||
be9b7e8c | 2008 | static struct snd_device_ops snd_cs4231_ebus_dev_ops = { |
1da177e4 LT |
2009 | .dev_free = snd_cs4231_ebus_dev_free, |
2010 | }; | |
2011 | ||
be9b7e8c | 2012 | static int __init snd_cs4231_ebus_create(struct snd_card *card, |
1da177e4 | 2013 | struct linux_ebus_device *edev, |
c6c2d57b | 2014 | int dev) |
1da177e4 | 2015 | { |
c6c2d57b | 2016 | struct snd_cs4231 *chip = card->private_data; |
1da177e4 LT |
2017 | int err; |
2018 | ||
1da177e4 | 2019 | spin_lock_init(&chip->lock); |
b128254f GC |
2020 | spin_lock_init(&chip->c_dma.ebus_info.lock); |
2021 | spin_lock_init(&chip->p_dma.ebus_info.lock); | |
12aa7579 IM |
2022 | mutex_init(&chip->mce_mutex); |
2023 | mutex_init(&chip->open_mutex); | |
1da177e4 | 2024 | chip->flags |= CS4231_FLAG_EBUS; |
1da177e4 LT |
2025 | chip->dev_u.pdev = edev->bus->self; |
2026 | memcpy(&chip->image, &snd_cs4231_original_image, | |
2027 | sizeof(snd_cs4231_original_image)); | |
b128254f GC |
2028 | strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)"); |
2029 | chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; | |
2030 | chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback; | |
2031 | chip->c_dma.ebus_info.client_cookie = chip; | |
2032 | chip->c_dma.ebus_info.irq = edev->irqs[0]; | |
2033 | strcpy(chip->p_dma.ebus_info.name, "cs4231(play)"); | |
2034 | chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER; | |
2035 | chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback; | |
2036 | chip->p_dma.ebus_info.client_cookie = chip; | |
2037 | chip->p_dma.ebus_info.irq = edev->irqs[1]; | |
2038 | ||
2039 | chip->p_dma.prepare = _ebus_dma_prepare; | |
2040 | chip->p_dma.enable = _ebus_dma_enable; | |
2041 | chip->p_dma.request = _ebus_dma_request; | |
2042 | chip->p_dma.address = _ebus_dma_addr; | |
b128254f GC |
2043 | chip->p_dma.preallocate = _ebus_dma_preallocate; |
2044 | ||
2045 | chip->c_dma.prepare = _ebus_dma_prepare; | |
2046 | chip->c_dma.enable = _ebus_dma_enable; | |
2047 | chip->c_dma.request = _ebus_dma_request; | |
2048 | chip->c_dma.address = _ebus_dma_addr; | |
b128254f | 2049 | chip->c_dma.preallocate = _ebus_dma_preallocate; |
1da177e4 LT |
2050 | |
2051 | chip->port = ioremap(edev->resource[0].start, 0x10); | |
b128254f GC |
2052 | chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10); |
2053 | chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10); | |
9e9abb4f KH |
2054 | if (!chip->port || !chip->p_dma.ebus_info.regs || |
2055 | !chip->c_dma.ebus_info.regs) { | |
1da177e4 | 2056 | snd_cs4231_ebus_free(chip); |
a131430c | 2057 | snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev); |
1da177e4 LT |
2058 | return -EIO; |
2059 | } | |
2060 | ||
b128254f | 2061 | if (ebus_dma_register(&chip->c_dma.ebus_info)) { |
1da177e4 | 2062 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2063 | snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", |
2064 | dev); | |
1da177e4 LT |
2065 | return -EBUSY; |
2066 | } | |
b128254f | 2067 | if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) { |
1da177e4 | 2068 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2069 | snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", |
2070 | dev); | |
1da177e4 LT |
2071 | return -EBUSY; |
2072 | } | |
2073 | ||
b128254f | 2074 | if (ebus_dma_register(&chip->p_dma.ebus_info)) { |
1da177e4 | 2075 | snd_cs4231_ebus_free(chip); |
9e9abb4f KH |
2076 | snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", |
2077 | dev); | |
1da177e4 LT |
2078 | return -EBUSY; |
2079 | } | |
b128254f | 2080 | if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) { |
1da177e4 | 2081 | snd_cs4231_ebus_free(chip); |
a131430c | 2082 | snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev); |
1da177e4 LT |
2083 | return -EBUSY; |
2084 | } | |
2085 | ||
2086 | if (snd_cs4231_probe(chip) < 0) { | |
2087 | snd_cs4231_ebus_free(chip); | |
2088 | return -ENODEV; | |
2089 | } | |
2090 | snd_cs4231_init(chip); | |
2091 | ||
2092 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, | |
2093 | chip, &snd_cs4231_ebus_dev_ops)) < 0) { | |
2094 | snd_cs4231_ebus_free(chip); | |
2095 | return err; | |
2096 | } | |
2097 | ||
1da177e4 LT |
2098 | return 0; |
2099 | } | |
2100 | ||
be9b7e8c | 2101 | static int __init cs4231_ebus_attach(struct linux_ebus_device *edev) |
1da177e4 | 2102 | { |
be9b7e8c | 2103 | struct snd_card *card; |
1da177e4 LT |
2104 | int err; |
2105 | ||
2106 | err = cs4231_attach_begin(&card); | |
2107 | if (err) | |
2108 | return err; | |
2109 | ||
c6387a48 | 2110 | sprintf(card->longname, "%s at 0x%lx, irq %d", |
1da177e4 LT |
2111 | card->shortname, |
2112 | edev->resource[0].start, | |
c6387a48 | 2113 | edev->irqs[0]); |
1da177e4 | 2114 | |
c6c2d57b KH |
2115 | err = snd_cs4231_ebus_create(card, edev, dev); |
2116 | if (err < 0) { | |
1da177e4 LT |
2117 | snd_card_free(card); |
2118 | return err; | |
2119 | } | |
2120 | ||
c6c2d57b | 2121 | return cs4231_attach_finish(card); |
1da177e4 LT |
2122 | } |
2123 | #endif | |
2124 | ||
2125 | static int __init cs4231_init(void) | |
2126 | { | |
2127 | #ifdef SBUS_SUPPORT | |
2128 | struct sbus_bus *sbus; | |
2129 | struct sbus_dev *sdev; | |
2130 | #endif | |
2131 | #ifdef EBUS_SUPPORT | |
2132 | struct linux_ebus *ebus; | |
2133 | struct linux_ebus_device *edev; | |
2134 | #endif | |
2135 | int found; | |
2136 | ||
2137 | found = 0; | |
2138 | ||
2139 | #ifdef SBUS_SUPPORT | |
2140 | for_all_sbusdev(sdev, sbus) { | |
2141 | if (!strcmp(sdev->prom_name, "SUNW,CS4231")) { | |
2142 | if (cs4231_sbus_attach(sdev) == 0) | |
2143 | found++; | |
2144 | } | |
2145 | } | |
2146 | #endif | |
2147 | #ifdef EBUS_SUPPORT | |
2148 | for_each_ebus(ebus) { | |
2149 | for_each_ebusdev(edev, ebus) { | |
2150 | int match = 0; | |
2151 | ||
690c8fd3 | 2152 | if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) { |
1da177e4 | 2153 | match = 1; |
690c8fd3 | 2154 | } else if (!strcmp(edev->prom_node->name, "audio")) { |
3198514d | 2155 | const char *compat; |
1da177e4 | 2156 | |
690c8fd3 DM |
2157 | compat = of_get_property(edev->prom_node, |
2158 | "compatible", NULL); | |
2159 | if (compat && !strcmp(compat, "SUNW,CS4231")) | |
1da177e4 LT |
2160 | match = 1; |
2161 | } | |
2162 | ||
2163 | if (match && | |
2164 | cs4231_ebus_attach(edev) == 0) | |
2165 | found++; | |
2166 | } | |
2167 | } | |
2168 | #endif | |
2169 | ||
2170 | ||
2171 | return (found > 0) ? 0 : -EIO; | |
2172 | } | |
2173 | ||
2174 | static void __exit cs4231_exit(void) | |
2175 | { | |
be9b7e8c | 2176 | struct snd_cs4231 *p = cs4231_list; |
1da177e4 LT |
2177 | |
2178 | while (p != NULL) { | |
be9b7e8c | 2179 | struct snd_cs4231 *next = p->next; |
1da177e4 LT |
2180 | |
2181 | snd_card_free(p->card); | |
2182 | ||
2183 | p = next; | |
2184 | } | |
2185 | ||
2186 | cs4231_list = NULL; | |
2187 | } | |
2188 | ||
2189 | module_init(cs4231_init); | |
2190 | module_exit(cs4231_exit); |