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ASoC: wm_hubs: Factor out class W management
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm_hubs.c
CommitLineData
a2342ae3
MB		 1/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
79ef0abc 20#include <linux/mfd/wm8994/registers.h>
a2342ae3
MB		 21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
a2342ae3
MB		 25#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
028aa634 42 TLV_DB_RANGE_HEAD(2),
a2342ae3
MB		 43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
4dcc93d0 64static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
a2342ae3 65{
d96ca3cd 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 67 unsigned int reg;
68 int count = 0;
1479c3fb 69 int timeout;
4dcc93d0
MB		 70 unsigned int val;
71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
a2342ae3
MB		 76
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
3ed7074c 78
1479c3fb
MB		 79 if (hubs->dcs_done_irq)
80 timeout = 4;
81 else
82 timeout = 400;
d96ca3cd 83
1479c3fb
MB		 84 do {
85 count++;
86
87 if (hubs->dcs_done_irq)
88 wait_for_completion_timeout(&hubs->dcs_done,
89 msecs_to_jiffies(250));
90 else
d96ca3cd 91 msleep(1);
1479c3fb
MB		 92
93 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
94 dev_dbg(codec->dev, "DC servo: %x\n", reg);
95 } while (reg & op && count < timeout);
a2342ae3 96
4dcc93d0 97 if (reg & op)
5a9f91ca
MB		 98 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
99 op);
a2342ae3
MB		 100}
101
d96ca3cd
MB		 102irqreturn_t wm_hubs_dcs_done(int irq, void *data)
103{
104 struct wm_hubs_data *hubs = data;
105
106 complete(&hubs->dcs_done);
107
108 return IRQ_HANDLED;
109}
110EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
111
af31a227
MB		 112static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec)
113{
114 int reg;
115
116 /* If we're going via the mixer we'll need to do additional checks */
117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1);
118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) {
119 if (reg & ~WM8993_DACL_TO_MIXOUTL) {
120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
121 reg & ~WM8993_DACL_TO_HPOUT1L);
122 return false;
123 } else {
124 dev_vdbg(codec->dev, "HPL connected to mixer\n");
125 return false;
126 }
127 } else {
128 dev_vdbg(codec->dev, "HPL connected to DAC\n");
129 }
130
131 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2);
132 if (!(reg & WM8993_DACR_TO_HPOUT1R)) {
133 if (reg & ~WM8993_DACR_TO_MIXOUTR) {
134 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
135 reg & ~WM8993_DACR_TO_HPOUT1R);
136 return false;
137 } else {
138 dev_vdbg(codec->dev, "HPR connected to mixer\n");
139 return false;
140 }
141 } else {
142 dev_vdbg(codec->dev, "HPR connected to DAC\n");
143 }
144
145 return true;
146}
147
3ed7074c
MB		 148/*
149 * Startup calibration of the DC servo
150 */
151static void calibrate_dc_servo(struct snd_soc_codec *codec)
152{
b2c812e2 153 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
20a4e7fc 154 s8 offset;
79ef0abc
MB		 155 u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
156
157 switch (hubs->dcs_readback_mode) {
158 case 2:
159 dcs_reg = WM8994_DC_SERVO_4E;
160 break;
161 default:
162 dcs_reg = WM8993_DC_SERVO_3;
163 break;
164 }
3ed7074c 165
fec6dd83
MB		 166 /* If we're using a digital only path and have a previously
167 * callibrated DC servo offset stored then use that. */
af31a227 168 if (wm_hubs_dac_hp_direct(codec) && hubs->dac_hp_direct_dcs) {
fec6dd83 169 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
af31a227
MB		 170 hubs->dac_hp_direct_dcs);
171 snd_soc_write(codec, dcs_reg, hubs->dac_hp_direct_dcs);
fec6dd83
MB		 172 wait_for_dc_servo(codec,
173 WM8993_DCS_TRIG_DAC_WR_0 |
174 WM8993_DCS_TRIG_DAC_WR_1);
175 return;
176 }
177
f9acf9fe 178 if (hubs->series_startup) {
11cef5f0
MB		 179 /* Set for 32 series updates */
180 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
181 WM8993_DCS_SERIES_NO_01_MASK,
182 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
183 wait_for_dc_servo(codec,
184 WM8993_DCS_TRIG_SERIES_0 |
185 WM8993_DCS_TRIG_SERIES_1);
186 } else {
187 wait_for_dc_servo(codec,
188 WM8993_DCS_TRIG_STARTUP_0 |
189 WM8993_DCS_TRIG_STARTUP_1);
190 }
3ed7074c 191
fec6dd83
MB		 192 /* Different chips in the family support different readback
193 * methods.
194 */
195 switch (hubs->dcs_readback_mode) {
196 case 0:
197 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
ef995e3a 198 & WM8993_DCS_INTEG_CHAN_0_MASK;
fec6dd83
MB		 199 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
200 & WM8993_DCS_INTEG_CHAN_1_MASK;
201 break;
79ef0abc 202 case 2:
fec6dd83 203 case 1:
79ef0abc 204 reg = snd_soc_read(codec, dcs_reg);
d5b040c9 205 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
fec6dd83 206 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
d5b040c9 207 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
fec6dd83
MB		 208 break;
209 default:
9e3be1ed 210 WARN(1, "Unknown DCS readback method\n");
e778ba07 211 return;
fec6dd83
MB		 212 }
213
214 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
215
3ed7074c 216 /* Apply correction to DC servo result */
4537c4e7
MB		 217 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
218 dev_dbg(codec->dev,
219 "Applying %d/%d code DC servo correction\n",
220 hubs->dcs_codes_l, hubs->dcs_codes_r);
3ed7074c 221
d5b040c9
MB		 222 /* HPOUT1R */
223 offset = reg_r;
4537c4e7 224 offset += hubs->dcs_codes_r;
20a4e7fc 225 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
3ed7074c 226
d5b040c9
MB		 227 /* HPOUT1L */
228 offset = reg_l;
4537c4e7 229 offset += hubs->dcs_codes_l;
20a4e7fc 230 dcs_cfg |= (u8)offset;
3ed7074c 231
3254d285
MB		 232 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
233
3ed7074c 234 /* Do it */
79ef0abc 235 snd_soc_write(codec, dcs_reg, dcs_cfg);
4dcc93d0
MB		 236 wait_for_dc_servo(codec,
237 WM8993_DCS_TRIG_DAC_WR_0 |
238 WM8993_DCS_TRIG_DAC_WR_1);
fec6dd83 239 } else {
d5b040c9
MB		 240 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
241 dcs_cfg |= reg_l;
3ed7074c 242 }
fec6dd83
MB		 243
244 /* Save the callibrated offset if we're in class W mode and
245 * therefore don't have any analogue signal mixed in. */
af31a227
MB		 246 if (wm_hubs_dac_hp_direct(codec) && !hubs->no_cache_dac_hp_direct)
247 hubs->dac_hp_direct_dcs = dcs_cfg;
3ed7074c
MB		 248}
249
a2342ae3
MB		 250/*
251 * Update the DC servo calibration on gain changes
252 */
253static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
3ed7074c 254 struct snd_ctl_elem_value *ucontrol)
a2342ae3
MB		 255{
256 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 257 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 258 int ret;
259
c4671a95 260 ret = snd_soc_put_volsw(kcontrol, ucontrol);
a2342ae3 261
fec6dd83 262 /* Updating the analogue gains invalidates the DC servo cache */
af31a227 263 hubs->dac_hp_direct_dcs = 0;
fec6dd83 264
ae9d8607
MB		 265 /* If we're applying an offset correction then updating the
266 * callibration would be likely to introduce further offsets. */
4537c4e7 267 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
ae9d8607
MB		 268 return ret;
269
a2342ae3
MB		 270 /* Only need to do this if the outputs are active */
271 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
272 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
273 snd_soc_update_bits(codec,
274 WM8993_DC_SERVO_0,
275 WM8993_DCS_TRIG_SINGLE_0 |
276 WM8993_DCS_TRIG_SINGLE_1,
277 WM8993_DCS_TRIG_SINGLE_0 |
278 WM8993_DCS_TRIG_SINGLE_1);
279
280 return ret;
281}
282
283static const struct snd_kcontrol_new analogue_snd_controls[] = {
284SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
285 inpga_tlv),
286SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 287SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 288
289SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
290 inpga_tlv),
291SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 292SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 293
294
295SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
296 inpga_tlv),
297SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 298SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 299
300SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
301 inpga_tlv),
302SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 303SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 304
305SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
306 inmix_sw_tlv),
307SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
308 inmix_sw_tlv),
309SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
310 inmix_tlv),
311SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
312SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
313 inmix_tlv),
314
315SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
316 inmix_sw_tlv),
317SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
318 inmix_sw_tlv),
319SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
320 inmix_tlv),
321SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
322SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
323 inmix_tlv),
324
325SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
326 outmix_tlv),
327SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
328 outmix_tlv),
329SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
330 outmix_tlv),
331SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
332 outmix_tlv),
333SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
334 outmix_tlv),
335SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
336 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
337SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
338 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
339SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
340 outmix_tlv),
341
342SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
343 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
344SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
345 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
346SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
347 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
348SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
349 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
350SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
351 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
352SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
353 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
354SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
355 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
356SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
357 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
358
359SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
360 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
361SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
362 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
363SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
364 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
365
366SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
367SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
368
369SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
370 5, 1, 1, wm_hubs_spkmix_tlv),
371SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
372 4, 1, 1, wm_hubs_spkmix_tlv),
373SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
374 3, 1, 1, wm_hubs_spkmix_tlv),
375
376SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
377 5, 1, 1, wm_hubs_spkmix_tlv),
378SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
379 4, 1, 1, wm_hubs_spkmix_tlv),
380SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
381 3, 1, 1, wm_hubs_spkmix_tlv),
382
383SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
384 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
385 0, 3, 1, spkmixout_tlv),
386SOC_DOUBLE_R_TLV("Speaker Volume",
387 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
388 0, 63, 0, outpga_tlv),
389SOC_DOUBLE_R("Speaker Switch",
390 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
391 6, 1, 0),
392SOC_DOUBLE_R("Speaker ZC Switch",
393 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
394 7, 1, 0),
ed8cc471 395SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
a2342ae3
MB		 396 spkboost_tlv),
397SOC_ENUM("Speaker Reference", speaker_ref),
398SOC_ENUM("Speaker Mode", speaker_mode),
399
0f9887d1
PU		 400SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
401 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
c4671a95 402 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
0f9887d1
PU		 403 outpga_tlv),
404
a2342ae3
MB		 405SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
406 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
407SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
408 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
409
410SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
411SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
412SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
413 line_tlv),
414
415SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
416SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
417SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
418 line_tlv),
419};
420
3ed7074c
MB		 421static int hp_supply_event(struct snd_soc_dapm_widget *w,
422 struct snd_kcontrol *kcontrol, int event)
423{
424 struct snd_soc_codec *codec = w->codec;
b2c812e2 425 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
3ed7074c
MB		 426
427 switch (event) {
428 case SND_SOC_DAPM_PRE_PMU:
429 switch (hubs->hp_startup_mode) {
430 case 0:
431 break;
432 case 1:
433 /* Enable the headphone amp */
434 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
435 WM8993_HPOUT1L_ENA |
436 WM8993_HPOUT1R_ENA,
437 WM8993_HPOUT1L_ENA |
438 WM8993_HPOUT1R_ENA);
439
440 /* Enable the second stage */
441 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
442 WM8993_HPOUT1L_DLY |
443 WM8993_HPOUT1R_DLY,
444 WM8993_HPOUT1L_DLY |
445 WM8993_HPOUT1R_DLY);
446 break;
447 default:
448 dev_err(codec->dev, "Unknown HP startup mode %d\n",
449 hubs->hp_startup_mode);
450 break;
451 }
452
453 case SND_SOC_DAPM_PRE_PMD:
454 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
455 WM8993_CP_ENA, 0);
456 break;
457 }
458
459 return 0;
460}
461
a2342ae3
MB		 462static int hp_event(struct snd_soc_dapm_widget *w,
463 struct snd_kcontrol *kcontrol, int event)
464{
465 struct snd_soc_codec *codec = w->codec;
466 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
467
468 switch (event) {
469 case SND_SOC_DAPM_POST_PMU:
470 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
471 WM8993_CP_ENA, WM8993_CP_ENA);
472
473 msleep(5);
474
475 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
476 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
477 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
478
479 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
480 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
481
3ed7074c 482 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
f9925d44 483 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
3ed7074c
MB		 484
485 calibrate_dc_servo(codec);
a2342ae3
MB		 486
487 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
488 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
489 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
490 break;
491
492 case SND_SOC_DAPM_PRE_PMD:
3ed7074c 493 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 494 WM8993_HPOUT1L_OUTP |
495 WM8993_HPOUT1R_OUTP |
3ed7074c
MB		 496 WM8993_HPOUT1L_RMV_SHORT |
497 WM8993_HPOUT1R_RMV_SHORT, 0);
a2342ae3 498
3ed7074c 499 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 500 WM8993_HPOUT1L_DLY |
501 WM8993_HPOUT1R_DLY, 0);
a2342ae3 502
395e4b73
MB		 503 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
504
a2342ae3
MB		 505 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
506 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
507 0);
a2342ae3
MB		 508 break;
509 }
510
511 return 0;
512}
513
514static int earpiece_event(struct snd_soc_dapm_widget *w,
515 struct snd_kcontrol *control, int event)
516{
517 struct snd_soc_codec *codec = w->codec;
518 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
519
520 switch (event) {
521 case SND_SOC_DAPM_PRE_PMU:
522 reg |= WM8993_HPOUT2_IN_ENA;
523 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
524 udelay(50);
525 break;
526
527 case SND_SOC_DAPM_POST_PMD:
528 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
529 break;
530
531 default:
532 BUG();
533 break;
534 }
535
536 return 0;
537}
538
5f2f3890
MB		 539static int lineout_event(struct snd_soc_dapm_widget *w,
540 struct snd_kcontrol *control, int event)
541{
542 struct snd_soc_codec *codec = w->codec;
543 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
544 bool *flag;
545
546 switch (w->shift) {
547 case WM8993_LINEOUT1N_ENA_SHIFT:
548 flag = &hubs->lineout1n_ena;
549 break;
550 case WM8993_LINEOUT1P_ENA_SHIFT:
551 flag = &hubs->lineout1p_ena;
552 break;
553 case WM8993_LINEOUT2N_ENA_SHIFT:
554 flag = &hubs->lineout2n_ena;
555 break;
556 case WM8993_LINEOUT2P_ENA_SHIFT:
557 flag = &hubs->lineout2p_ena;
558 break;
559 default:
560 WARN(1, "Unknown line output");
561 return -EINVAL;
562 }
563
564 *flag = SND_SOC_DAPM_EVENT_ON(event);
565
566 return 0;
567}
568
c340304d
MB		 569void wm_hubs_update_class_w(struct snd_soc_codec *codec)
570{
571 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
572 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ;
573
574 if (!wm_hubs_dac_hp_direct(codec))
575 enable = false;
576
577 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec))
578 enable = false;
579
580 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled");
581
582 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
583 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable);
584}
585EXPORT_SYMBOL_GPL(wm_hubs_update_class_w);
586
587#define WM_HUBS_ENUM_W(xname, xenum) \
588{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
589 .info = snd_soc_info_enum_double, \
590 .get = snd_soc_dapm_get_enum_double, \
591 .put = class_w_put, \
592 .private_value = (unsigned long)&xenum }
593
594static int class_w_put(struct snd_kcontrol *kcontrol,
595 struct snd_ctl_elem_value *ucontrol)
596{
597 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
598 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
599 struct snd_soc_codec *codec = widget->codec;
600 int ret;
601
602 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
603
604 wm_hubs_update_class_w(codec);
605
606 return ret;
607}
608
609static const char *hp_mux_text[] = {
610 "Mixer",
611 "DAC",
612};
613
614static const struct soc_enum hpl_enum =
615 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
616
617const struct snd_kcontrol_new wm_hubs_hpl_mux =
618 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum);
619EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux);
620
621static const struct soc_enum hpr_enum =
622 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
623
624const struct snd_kcontrol_new wm_hubs_hpr_mux =
625 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum);
626EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux);
627
a2342ae3
MB		 628static const struct snd_kcontrol_new in1l_pga[] = {
629SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
630SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
631};
632
633static const struct snd_kcontrol_new in1r_pga[] = {
634SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
635SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
636};
637
638static const struct snd_kcontrol_new in2l_pga[] = {
639SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
640SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
641};
642
643static const struct snd_kcontrol_new in2r_pga[] = {
644SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
645SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
646};
647
648static const struct snd_kcontrol_new mixinl[] = {
649SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
650SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
651};
652
653static const struct snd_kcontrol_new mixinr[] = {
654SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
655SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
656};
657
658static const struct snd_kcontrol_new left_output_mixer[] = {
659SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
660SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
661SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
662SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
663SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
664SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
665SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
666SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
667};
668
669static const struct snd_kcontrol_new right_output_mixer[] = {
670SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
671SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
672SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
673SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
674SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
675SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
676SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
677SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
678};
679
680static const struct snd_kcontrol_new earpiece_mixer[] = {
681SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
682SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
683SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
684};
685
686static const struct snd_kcontrol_new left_speaker_boost[] = {
687SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
688SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
689SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
690};
691
692static const struct snd_kcontrol_new right_speaker_boost[] = {
693SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
694SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
695SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
696};
697
698static const struct snd_kcontrol_new line1_mix[] = {
699SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
700SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
701SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
702};
703
704static const struct snd_kcontrol_new line1n_mix[] = {
705SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
706SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
707};
708
709static const struct snd_kcontrol_new line1p_mix[] = {
710SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
711};
712
713static const struct snd_kcontrol_new line2_mix[] = {
43b6cec2
MB		 714SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
715SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
a2342ae3
MB		 716SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
717};
718
719static const struct snd_kcontrol_new line2n_mix[] = {
114395c6
UK		 720SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
721SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
a2342ae3
MB		 722};
723
724static const struct snd_kcontrol_new line2p_mix[] = {
725SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
726};
727
728static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
729SND_SOC_DAPM_INPUT("IN1LN"),
730SND_SOC_DAPM_INPUT("IN1LP"),
731SND_SOC_DAPM_INPUT("IN2LN"),
34825948 732SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
a2342ae3
MB		 733SND_SOC_DAPM_INPUT("IN1RN"),
734SND_SOC_DAPM_INPUT("IN1RP"),
735SND_SOC_DAPM_INPUT("IN2RN"),
34825948 736SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
a2342ae3 737
91e20854
MB		 738SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
739SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
a2342ae3
MB		 740
741SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
742 in1l_pga, ARRAY_SIZE(in1l_pga)),
743SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
744 in1r_pga, ARRAY_SIZE(in1r_pga)),
745
746SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
747 in2l_pga, ARRAY_SIZE(in2l_pga)),
748SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
749 in2r_pga, ARRAY_SIZE(in2r_pga)),
750
a2342ae3
MB		 751SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
752 mixinl, ARRAY_SIZE(mixinl)),
753SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
754 mixinr, ARRAY_SIZE(mixinr)),
755
a2342ae3
MB		 756SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
757 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
758SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
759 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
760
761SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
762SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
763
3ed7074c
MB		 764SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
765 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
26422625
MB		 766SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
767 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 768
769SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
770 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
771SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
772 NULL, 0, earpiece_event,
773 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
774
775SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
776 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
777SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
778 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
779
03431972 780SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
dc9c7454
MB		 781SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
782 NULL, 0),
783SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
784 NULL, 0),
a2342ae3
MB		 785
786SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
787 line1_mix, ARRAY_SIZE(line1_mix)),
788SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
789 line2_mix, ARRAY_SIZE(line2_mix)),
790
791SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
792 line1n_mix, ARRAY_SIZE(line1n_mix)),
793SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
794 line1p_mix, ARRAY_SIZE(line1p_mix)),
795SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
796 line2n_mix, ARRAY_SIZE(line2n_mix)),
797SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
798 line2p_mix, ARRAY_SIZE(line2p_mix)),
799
5f2f3890
MB		 800SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
801 NULL, 0, lineout_event,
802 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
803SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
804 NULL, 0, lineout_event,
805 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
806SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
807 NULL, 0, lineout_event,
808 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
809SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
810 NULL, 0, lineout_event,
811 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 812
813SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
814SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
815SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
816SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
817SND_SOC_DAPM_OUTPUT("HPOUT1L"),
818SND_SOC_DAPM_OUTPUT("HPOUT1R"),
819SND_SOC_DAPM_OUTPUT("HPOUT2P"),
820SND_SOC_DAPM_OUTPUT("HPOUT2N"),
821SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
822SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
823SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
824SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
825};
826
827static const struct snd_soc_dapm_route analogue_routes[] = {
4baafdd7
MB		 828 { "MICBIAS1", NULL, "CLK_SYS" },
829 { "MICBIAS2", NULL, "CLK_SYS" },
830
a2342ae3
MB		 831 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
832 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
833
4e04adaf
MB		 834 { "IN1L PGA", NULL, "VMID" },
835 { "IN1R PGA", NULL, "VMID" },
836 { "IN2L PGA", NULL, "VMID" },
837 { "IN2R PGA", NULL, "VMID" },
838
a2342ae3
MB		 839 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
840 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
841
34825948 842 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 843 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
844
34825948 845 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 846 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
847
34825948
JS		 848 { "Direct Voice", NULL, "IN2LP:VXRN" },
849 { "Direct Voice", NULL, "IN2RP:VXRP" },
a2342ae3
MB		 850
851 { "MIXINL", "IN1L Switch", "IN1L PGA" },
852 { "MIXINL", "IN2L Switch", "IN2L PGA" },
853 { "MIXINL", NULL, "Direct Voice" },
854 { "MIXINL", NULL, "IN1LP" },
855 { "MIXINL", NULL, "Left Output Mixer" },
4e04adaf 856 { "MIXINL", NULL, "VMID" },
a2342ae3
MB		 857
858 { "MIXINR", "IN1R Switch", "IN1R PGA" },
859 { "MIXINR", "IN2R Switch", "IN2R PGA" },
860 { "MIXINR", NULL, "Direct Voice" },
861 { "MIXINR", NULL, "IN1RP" },
862 { "MIXINR", NULL, "Right Output Mixer" },
4e04adaf 863 { "MIXINR", NULL, "VMID" },
a2342ae3
MB		 864
865 { "ADCL", NULL, "MIXINL" },
866 { "ADCR", NULL, "MIXINR" },
867
868 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
869 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
870 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
871 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
34825948 872 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 873 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
874 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
875
876 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
877 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
878 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
879 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
34825948 880 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 881 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
882 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
883
884 { "Left Output PGA", NULL, "Left Output Mixer" },
885 { "Left Output PGA", NULL, "TOCLK" },
886
887 { "Right Output PGA", NULL, "Right Output Mixer" },
888 { "Right Output PGA", NULL, "TOCLK" },
889
890 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
891 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
892 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
893
4e04adaf 894 { "Earpiece Driver", NULL, "VMID" },
a2342ae3
MB		 895 { "Earpiece Driver", NULL, "Earpiece Mixer" },
896 { "HPOUT2N", NULL, "Earpiece Driver" },
897 { "HPOUT2P", NULL, "Earpiece Driver" },
898
899 { "SPKL", "Input Switch", "MIXINL" },
900 { "SPKL", "IN1LP Switch", "IN1LP" },
39cca168 901 { "SPKL", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 902 { "SPKL", NULL, "TOCLK" },
903
904 { "SPKR", "Input Switch", "MIXINR" },
905 { "SPKR", "IN1RP Switch", "IN1RP" },
39cca168 906 { "SPKR", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 907 { "SPKR", NULL, "TOCLK" },
908
909 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
910 { "SPKL Boost", "SPKL Switch", "SPKL" },
911 { "SPKL Boost", "SPKR Switch", "SPKR" },
912
913 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
914 { "SPKR Boost", "SPKR Switch", "SPKR" },
915 { "SPKR Boost", "SPKL Switch", "SPKL" },
916
4e04adaf 917 { "SPKL Driver", NULL, "VMID" },
a2342ae3
MB		 918 { "SPKL Driver", NULL, "SPKL Boost" },
919 { "SPKL Driver", NULL, "CLK_SYS" },
03431972 920 { "SPKL Driver", NULL, "TSHUT" },
a2342ae3 921
4e04adaf 922 { "SPKR Driver", NULL, "VMID" },
a2342ae3
MB		 923 { "SPKR Driver", NULL, "SPKR Boost" },
924 { "SPKR Driver", NULL, "CLK_SYS" },
03431972 925 { "SPKR Driver", NULL, "TSHUT" },
a2342ae3
MB		 926
927 { "SPKOUTLP", NULL, "SPKL Driver" },
928 { "SPKOUTLN", NULL, "SPKL Driver" },
929 { "SPKOUTRP", NULL, "SPKR Driver" },
930 { "SPKOUTRN", NULL, "SPKR Driver" },
931
39cca168
MB		 932 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
933 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
a2342ae3
MB		 934
935 { "Headphone PGA", NULL, "Left Headphone Mux" },
936 { "Headphone PGA", NULL, "Right Headphone Mux" },
4e04adaf 937 { "Headphone PGA", NULL, "VMID" },
a2342ae3 938 { "Headphone PGA", NULL, "CLK_SYS" },
3ed7074c 939 { "Headphone PGA", NULL, "Headphone Supply" },
a2342ae3
MB		 940
941 { "HPOUT1L", NULL, "Headphone PGA" },
942 { "HPOUT1R", NULL, "Headphone PGA" },
943
4e04adaf
MB		 944 { "LINEOUT1N Driver", NULL, "VMID" },
945 { "LINEOUT1P Driver", NULL, "VMID" },
946 { "LINEOUT2N Driver", NULL, "VMID" },
947 { "LINEOUT2P Driver", NULL, "VMID" },
948
a2342ae3
MB		 949 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
950 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
951 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
952 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
953};
954
955static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
956 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
957 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 958 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 959
960 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
961 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
962};
963
964static const struct snd_soc_dapm_route lineout1_se_routes[] = {
d0b48af6
MB		 965 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
966 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 967
d0b48af6 968 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
a2342ae3
MB		 969
970 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
971 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
972};
973
974static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
ee76744c
MB		 975 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
976 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 977 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 978
979 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
980 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
981};
982
983static const struct snd_soc_dapm_route lineout2_se_routes[] = {
d0b48af6
MB		 984 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
985 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 986
d0b48af6 987 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3
MB		 988
989 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
990 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
991};
992
993int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
994{
ce6120cc
LG		 995 struct snd_soc_dapm_context *dapm = &codec->dapm;
996
a2342ae3
MB		 997 /* Latch volume update bits & default ZC on */
998 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
999 WM8993_IN1_VU, WM8993_IN1_VU);
1000 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
1001 WM8993_IN1_VU, WM8993_IN1_VU);
1002 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
1003 WM8993_IN2_VU, WM8993_IN2_VU);
1004 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
1005 WM8993_IN2_VU, WM8993_IN2_VU);
1006
fb5af53d
MB		 1007 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
1008 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
a2342ae3
MB		 1009 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
1010 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
1011
1012 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
fb5af53d
MB		 1013 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
1014 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
a2342ae3
MB		 1015 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
1016 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
1017 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
1018
1019 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
fb5af53d
MB		 1020 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
1021 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
a2342ae3
MB		 1022 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
1023 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
1024 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
1025
022658be 1026 snd_soc_add_codec_controls(codec, analogue_snd_controls,
a2342ae3
MB		 1027 ARRAY_SIZE(analogue_snd_controls));
1028
ce6120cc 1029 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
a2342ae3
MB		 1030 ARRAY_SIZE(analogue_dapm_widgets));
1031 return 0;
1032}
1033EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
1034
1035int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
1036 int lineout1_diff, int lineout2_diff)
1037{
d96ca3cd 1038 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
ce6120cc
LG		 1039 struct snd_soc_dapm_context *dapm = &codec->dapm;
1040
d96ca3cd
MB		 1041 init_completion(&hubs->dcs_done);
1042
ce6120cc 1043 snd_soc_dapm_add_routes(dapm, analogue_routes,
a2342ae3
MB		 1044 ARRAY_SIZE(analogue_routes));
1045
1046 if (lineout1_diff)
ce6120cc 1047 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1048 lineout1_diff_routes,
1049 ARRAY_SIZE(lineout1_diff_routes));
1050 else
ce6120cc 1051 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1052 lineout1_se_routes,
1053 ARRAY_SIZE(lineout1_se_routes));
1054
1055 if (lineout2_diff)
ce6120cc 1056 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1057 lineout2_diff_routes,
1058 ARRAY_SIZE(lineout2_diff_routes));
1059 else
ce6120cc 1060 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1061 lineout2_se_routes,
1062 ARRAY_SIZE(lineout2_se_routes));
1063
1064 return 0;
1065}
1066EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
1067
aa983d9d
MB		 1068int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
1069 int lineout1_diff, int lineout2_diff,
1070 int lineout1fb, int lineout2fb,
1071 int jd_scthr, int jd_thr, int micbias1_lvl,
1072 int micbias2_lvl)
1073{
5f2f3890
MB		 1074 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1075
1076 hubs->lineout1_se = !lineout1_diff;
1077 hubs->lineout2_se = !lineout2_diff;
1078
aa983d9d
MB		 1079 if (!lineout1_diff)
1080 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
1081 WM8993_LINEOUT1_MODE,
1082 WM8993_LINEOUT1_MODE);
1083 if (!lineout2_diff)
1084 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
1085 WM8993_LINEOUT2_MODE,
1086 WM8993_LINEOUT2_MODE);
1087
5472bbc9
MB		 1088 if (!lineout1_diff && !lineout2_diff)
1089 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1090 WM8993_LINEOUT_VMID_BUF_ENA,
1091 WM8993_LINEOUT_VMID_BUF_ENA);
1092
aa983d9d
MB		 1093 if (lineout1fb)
1094 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1095 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
1096
1097 if (lineout2fb)
1098 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1099 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
1100
1101 snd_soc_update_bits(codec, WM8993_MICBIAS,
1102 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
1103 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
1104 jd_scthr << WM8993_JD_SCTHR_SHIFT |
1105 jd_thr << WM8993_JD_THR_SHIFT |
1106 micbias1_lvl |
1107 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
1108
1109 return 0;
1110}
1111EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
1112
5f2f3890
MB		 1113void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
1114{
1115 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1116 int val = 0;
1117
1118 if (hubs->lineout1_se)
1119 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1120
1121 if (hubs->lineout2_se)
1122 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
1123
1124 /* Enable the line outputs while we power up */
1125 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
1126}
1127EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
1128
1129void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
1130 enum snd_soc_bias_level level)
1131{
1132 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1133 int val;
1134
1135 switch (level) {
d60d6c3b
MB		 1136 case SND_SOC_BIAS_STANDBY:
1137 /* Clamp the inputs to VMID while we ramp to charge caps */
1138 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1139 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
1140 break;
1141
5f2f3890
MB		 1142 case SND_SOC_BIAS_ON:
1143 /* Turn off any unneded single ended outputs */
1144 val = 0;
1145
1146 if (hubs->lineout1_se && hubs->lineout1n_ena)
1147 val |= WM8993_LINEOUT1N_ENA;
1148
1149 if (hubs->lineout1_se && hubs->lineout1p_ena)
1150 val |= WM8993_LINEOUT1P_ENA;
1151
1152 if (hubs->lineout2_se && hubs->lineout2n_ena)
1153 val |= WM8993_LINEOUT2N_ENA;
1154
1155 if (hubs->lineout2_se && hubs->lineout2p_ena)
1156 val |= WM8993_LINEOUT2P_ENA;
1157
1158 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
1159 WM8993_LINEOUT1N_ENA |
1160 WM8993_LINEOUT1P_ENA |
1161 WM8993_LINEOUT2N_ENA |
1162 WM8993_LINEOUT2P_ENA,
1163 val);
1164
d60d6c3b
MB		 1165 /* Remove the input clamps */
1166 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1167 WM8993_INPUTS_CLAMP, 0);
5f2f3890
MB		 1168 break;
1169
1170 default:
1171 break;
1172 }
1173}
1174EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
1175
a2342ae3
MB		 1176MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
1177MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1178MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)