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ASoC: jack: Always update jack state even for noop changes
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm_hubs.c
CommitLineData
a2342ae3
MB		 1/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
656baaeb 4 * Copyright 2009-12 Wolfson Microelectronics plc
a2342ae3
MB		 5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
79ef0abc 20#include <linux/mfd/wm8994/registers.h>
a2342ae3
MB		 21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
a2342ae3
MB		 25#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
028aa634 42 TLV_DB_RANGE_HEAD(2),
a2342ae3
MB		 43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
4dcc93d0 64static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
a2342ae3 65{
d96ca3cd 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 67 unsigned int reg;
68 int count = 0;
1479c3fb 69 int timeout;
4dcc93d0
MB		 70 unsigned int val;
71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
a2342ae3
MB		 76
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
3ed7074c 78
1479c3fb
MB		 79 if (hubs->dcs_done_irq)
80 timeout = 4;
81 else
82 timeout = 400;
d96ca3cd 83
1479c3fb
MB		 84 do {
85 count++;
86
87 if (hubs->dcs_done_irq)
88 wait_for_completion_timeout(&hubs->dcs_done,
89 msecs_to_jiffies(250));
90 else
d96ca3cd 91 msleep(1);
1479c3fb
MB		 92
93 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
94 dev_dbg(codec->dev, "DC servo: %x\n", reg);
95 } while (reg & op && count < timeout);
a2342ae3 96
4dcc93d0 97 if (reg & op)
5a9f91ca
MB		 98 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
99 op);
a2342ae3
MB		 100}
101
d96ca3cd
MB		 102irqreturn_t wm_hubs_dcs_done(int irq, void *data)
103{
104 struct wm_hubs_data *hubs = data;
105
106 complete(&hubs->dcs_done);
107
108 return IRQ_HANDLED;
109}
110EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
111
af31a227
MB		 112static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec)
113{
114 int reg;
115
116 /* If we're going via the mixer we'll need to do additional checks */
117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1);
118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) {
119 if (reg & ~WM8993_DACL_TO_MIXOUTL) {
120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
121 reg & ~WM8993_DACL_TO_HPOUT1L);
122 return false;
123 } else {
124 dev_vdbg(codec->dev, "HPL connected to mixer\n");
af31a227
MB		 125 }
126 } else {
127 dev_vdbg(codec->dev, "HPL connected to DAC\n");
128 }
129
130 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2);
131 if (!(reg & WM8993_DACR_TO_HPOUT1R)) {
132 if (reg & ~WM8993_DACR_TO_MIXOUTR) {
133 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
134 reg & ~WM8993_DACR_TO_HPOUT1R);
135 return false;
136 } else {
137 dev_vdbg(codec->dev, "HPR connected to mixer\n");
af31a227
MB		 138 }
139 } else {
140 dev_vdbg(codec->dev, "HPR connected to DAC\n");
141 }
142
143 return true;
144}
145
94aa733a
MB		 146struct wm_hubs_dcs_cache {
147 struct list_head list;
148 unsigned int left;
149 unsigned int right;
150 u16 dcs_cfg;
151};
152
153static bool wm_hubs_dcs_cache_get(struct snd_soc_codec *codec,
154 struct wm_hubs_dcs_cache **entry)
155{
156 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
157 struct wm_hubs_dcs_cache *cache;
158 unsigned int left, right;
159
160 left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
161 left &= WM8993_HPOUT1L_VOL_MASK;
162
163 right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
164 right &= WM8993_HPOUT1R_VOL_MASK;
165
166 list_for_each_entry(cache, &hubs->dcs_cache, list) {
167 if (cache->left != left || cache->right != right)
168 continue;
169
170 *entry = cache;
171 return true;
172 }
173
174 return false;
175}
176
177static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg)
178{
179 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
180 struct wm_hubs_dcs_cache *cache;
181
182 if (hubs->no_cache_dac_hp_direct)
183 return;
184
185 cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL);
186 if (!cache) {
187 dev_err(codec->dev, "Failed to allocate DCS cache entry\n");
188 return;
189 }
190
191 cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
192 cache->left &= WM8993_HPOUT1L_VOL_MASK;
193
194 cache->right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
195 cache->right &= WM8993_HPOUT1R_VOL_MASK;
196
197 cache->dcs_cfg = dcs_cfg;
198
199 list_add_tail(&cache->list, &hubs->dcs_cache);
200}
201
3ed7074c
MB		 202/*
203 * Startup calibration of the DC servo
204 */
205static void calibrate_dc_servo(struct snd_soc_codec *codec)
206{
b2c812e2 207 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
94aa733a 208 struct wm_hubs_dcs_cache *cache;
20a4e7fc 209 s8 offset;
79ef0abc
MB		 210 u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
211
212 switch (hubs->dcs_readback_mode) {
213 case 2:
214 dcs_reg = WM8994_DC_SERVO_4E;
215 break;
216 default:
217 dcs_reg = WM8993_DC_SERVO_3;
218 break;
219 }
3ed7074c 220
fec6dd83
MB		 221 /* If we're using a digital only path and have a previously
222 * callibrated DC servo offset stored then use that. */
94aa733a
MB		 223 if (wm_hubs_dac_hp_direct(codec) &&
224 wm_hubs_dcs_cache_get(codec, &cache)) {
225 dev_dbg(codec->dev, "Using cached DCS offset %x for %d,%d\n",
226 cache->dcs_cfg, cache->left, cache->right);
227 snd_soc_write(codec, dcs_reg, cache->dcs_cfg);
fec6dd83
MB		 228 wait_for_dc_servo(codec,
229 WM8993_DCS_TRIG_DAC_WR_0 |
230 WM8993_DCS_TRIG_DAC_WR_1);
231 return;
232 }
233
f9acf9fe 234 if (hubs->series_startup) {
11cef5f0
MB		 235 /* Set for 32 series updates */
236 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
237 WM8993_DCS_SERIES_NO_01_MASK,
238 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
239 wait_for_dc_servo(codec,
240 WM8993_DCS_TRIG_SERIES_0 |
241 WM8993_DCS_TRIG_SERIES_1);
242 } else {
243 wait_for_dc_servo(codec,
244 WM8993_DCS_TRIG_STARTUP_0 |
245 WM8993_DCS_TRIG_STARTUP_1);
246 }
3ed7074c 247
fec6dd83
MB		 248 /* Different chips in the family support different readback
249 * methods.
250 */
251 switch (hubs->dcs_readback_mode) {
252 case 0:
253 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
ef995e3a 254 & WM8993_DCS_INTEG_CHAN_0_MASK;
fec6dd83
MB		 255 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
256 & WM8993_DCS_INTEG_CHAN_1_MASK;
257 break;
79ef0abc 258 case 2:
fec6dd83 259 case 1:
79ef0abc 260 reg = snd_soc_read(codec, dcs_reg);
d5b040c9 261 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
fec6dd83 262 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
d5b040c9 263 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
fec6dd83
MB		 264 break;
265 default:
9e3be1ed 266 WARN(1, "Unknown DCS readback method\n");
e778ba07 267 return;
fec6dd83
MB		 268 }
269
270 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
271
3ed7074c 272 /* Apply correction to DC servo result */
4537c4e7
MB		 273 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
274 dev_dbg(codec->dev,
275 "Applying %d/%d code DC servo correction\n",
276 hubs->dcs_codes_l, hubs->dcs_codes_r);
3ed7074c 277
d5b040c9
MB		 278 /* HPOUT1R */
279 offset = reg_r;
4537c4e7 280 offset += hubs->dcs_codes_r;
20a4e7fc 281 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
3ed7074c 282
d5b040c9
MB		 283 /* HPOUT1L */
284 offset = reg_l;
4537c4e7 285 offset += hubs->dcs_codes_l;
20a4e7fc 286 dcs_cfg |= (u8)offset;
3ed7074c 287
3254d285
MB		 288 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
289
3ed7074c 290 /* Do it */
79ef0abc 291 snd_soc_write(codec, dcs_reg, dcs_cfg);
4dcc93d0
MB		 292 wait_for_dc_servo(codec,
293 WM8993_DCS_TRIG_DAC_WR_0 |
294 WM8993_DCS_TRIG_DAC_WR_1);
fec6dd83 295 } else {
d5b040c9
MB		 296 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
297 dcs_cfg |= reg_l;
3ed7074c 298 }
fec6dd83
MB		 299
300 /* Save the callibrated offset if we're in class W mode and
301 * therefore don't have any analogue signal mixed in. */
94aa733a
MB		 302 if (wm_hubs_dac_hp_direct(codec))
303 wm_hubs_dcs_cache_set(codec, dcs_cfg);
3ed7074c
MB		 304}
305
a2342ae3
MB		 306/*
307 * Update the DC servo calibration on gain changes
308 */
309static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
3ed7074c 310 struct snd_ctl_elem_value *ucontrol)
a2342ae3
MB		 311{
312 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 313 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 314 int ret;
315
c4671a95 316 ret = snd_soc_put_volsw(kcontrol, ucontrol);
a2342ae3 317
ae9d8607
MB		 318 /* If we're applying an offset correction then updating the
319 * callibration would be likely to introduce further offsets. */
4537c4e7 320 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
ae9d8607
MB		 321 return ret;
322
a2342ae3
MB		 323 /* Only need to do this if the outputs are active */
324 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
325 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
326 snd_soc_update_bits(codec,
327 WM8993_DC_SERVO_0,
328 WM8993_DCS_TRIG_SINGLE_0 |
329 WM8993_DCS_TRIG_SINGLE_1,
330 WM8993_DCS_TRIG_SINGLE_0 |
331 WM8993_DCS_TRIG_SINGLE_1);
332
333 return ret;
334}
335
336static const struct snd_kcontrol_new analogue_snd_controls[] = {
337SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
338 inpga_tlv),
339SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 340SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 341
342SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
343 inpga_tlv),
344SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 345SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 346
347
348SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
349 inpga_tlv),
350SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 351SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 352
353SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
354 inpga_tlv),
355SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 356SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 357
358SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
359 inmix_sw_tlv),
360SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
361 inmix_sw_tlv),
362SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
363 inmix_tlv),
364SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
365SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
366 inmix_tlv),
367
368SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
369 inmix_sw_tlv),
370SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
371 inmix_sw_tlv),
372SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
373 inmix_tlv),
374SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
375SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
376 inmix_tlv),
377
378SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
379 outmix_tlv),
380SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
381 outmix_tlv),
382SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
383 outmix_tlv),
384SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
385 outmix_tlv),
386SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
387 outmix_tlv),
388SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
389 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
390SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
391 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
392SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
393 outmix_tlv),
394
395SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
396 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
397SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
398 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
399SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
400 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
401SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
402 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
403SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
404 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
405SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
406 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
407SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
408 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
409SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
410 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
411
412SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
413 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
414SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
415 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
416SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
417 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
418
419SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
420SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
421
422SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
423 5, 1, 1, wm_hubs_spkmix_tlv),
424SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
425 4, 1, 1, wm_hubs_spkmix_tlv),
426SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
427 3, 1, 1, wm_hubs_spkmix_tlv),
428
429SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
430 5, 1, 1, wm_hubs_spkmix_tlv),
431SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
432 4, 1, 1, wm_hubs_spkmix_tlv),
433SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
434 3, 1, 1, wm_hubs_spkmix_tlv),
435
436SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
437 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
438 0, 3, 1, spkmixout_tlv),
439SOC_DOUBLE_R_TLV("Speaker Volume",
440 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
441 0, 63, 0, outpga_tlv),
442SOC_DOUBLE_R("Speaker Switch",
443 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
444 6, 1, 0),
445SOC_DOUBLE_R("Speaker ZC Switch",
446 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
447 7, 1, 0),
ed8cc471 448SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
a2342ae3
MB		 449 spkboost_tlv),
450SOC_ENUM("Speaker Reference", speaker_ref),
451SOC_ENUM("Speaker Mode", speaker_mode),
452
0f9887d1
PU		 453SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
454 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
c4671a95 455 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
0f9887d1
PU		 456 outpga_tlv),
457
a2342ae3
MB		 458SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
459 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
460SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
461 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
462
463SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
464SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
465SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
466 line_tlv),
467
468SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
469SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
470SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
471 line_tlv),
472};
473
3ed7074c
MB		 474static int hp_supply_event(struct snd_soc_dapm_widget *w,
475 struct snd_kcontrol *kcontrol, int event)
476{
477 struct snd_soc_codec *codec = w->codec;
b2c812e2 478 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
3ed7074c
MB		 479
480 switch (event) {
481 case SND_SOC_DAPM_PRE_PMU:
482 switch (hubs->hp_startup_mode) {
483 case 0:
484 break;
485 case 1:
486 /* Enable the headphone amp */
487 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
488 WM8993_HPOUT1L_ENA |
489 WM8993_HPOUT1R_ENA,
490 WM8993_HPOUT1L_ENA |
491 WM8993_HPOUT1R_ENA);
492
493 /* Enable the second stage */
494 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
495 WM8993_HPOUT1L_DLY |
496 WM8993_HPOUT1R_DLY,
497 WM8993_HPOUT1L_DLY |
498 WM8993_HPOUT1R_DLY);
499 break;
500 default:
501 dev_err(codec->dev, "Unknown HP startup mode %d\n",
502 hubs->hp_startup_mode);
503 break;
504 }
505
506 case SND_SOC_DAPM_PRE_PMD:
507 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
508 WM8993_CP_ENA, 0);
509 break;
510 }
511
512 return 0;
513}
514
a2342ae3
MB		 515static int hp_event(struct snd_soc_dapm_widget *w,
516 struct snd_kcontrol *kcontrol, int event)
517{
518 struct snd_soc_codec *codec = w->codec;
519 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
520
521 switch (event) {
522 case SND_SOC_DAPM_POST_PMU:
523 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
524 WM8993_CP_ENA, WM8993_CP_ENA);
525
526 msleep(5);
527
528 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
529 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
530 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
531
532 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
533 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
534
3ed7074c 535 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
f9925d44 536 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
3ed7074c
MB		 537
538 calibrate_dc_servo(codec);
a2342ae3
MB		 539
540 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
541 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
542 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
543 break;
544
545 case SND_SOC_DAPM_PRE_PMD:
3ed7074c 546 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 547 WM8993_HPOUT1L_OUTP |
548 WM8993_HPOUT1R_OUTP |
3ed7074c
MB		 549 WM8993_HPOUT1L_RMV_SHORT |
550 WM8993_HPOUT1R_RMV_SHORT, 0);
a2342ae3 551
3ed7074c 552 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 553 WM8993_HPOUT1L_DLY |
554 WM8993_HPOUT1R_DLY, 0);
a2342ae3 555
395e4b73
MB		 556 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
557
a2342ae3
MB		 558 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
559 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
560 0);
a2342ae3
MB		 561 break;
562 }
563
564 return 0;
565}
566
567static int earpiece_event(struct snd_soc_dapm_widget *w,
568 struct snd_kcontrol *control, int event)
569{
570 struct snd_soc_codec *codec = w->codec;
571 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
572
573 switch (event) {
574 case SND_SOC_DAPM_PRE_PMU:
575 reg |= WM8993_HPOUT2_IN_ENA;
576 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
577 udelay(50);
578 break;
579
580 case SND_SOC_DAPM_POST_PMD:
581 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
582 break;
583
584 default:
585 BUG();
586 break;
587 }
588
589 return 0;
590}
591
5f2f3890
MB		 592static int lineout_event(struct snd_soc_dapm_widget *w,
593 struct snd_kcontrol *control, int event)
594{
595 struct snd_soc_codec *codec = w->codec;
596 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
597 bool *flag;
598
599 switch (w->shift) {
600 case WM8993_LINEOUT1N_ENA_SHIFT:
601 flag = &hubs->lineout1n_ena;
602 break;
603 case WM8993_LINEOUT1P_ENA_SHIFT:
604 flag = &hubs->lineout1p_ena;
605 break;
606 case WM8993_LINEOUT2N_ENA_SHIFT:
607 flag = &hubs->lineout2n_ena;
608 break;
609 case WM8993_LINEOUT2P_ENA_SHIFT:
610 flag = &hubs->lineout2p_ena;
611 break;
612 default:
613 WARN(1, "Unknown line output");
614 return -EINVAL;
615 }
616
617 *flag = SND_SOC_DAPM_EVENT_ON(event);
618
619 return 0;
620}
621
c340304d
MB		 622void wm_hubs_update_class_w(struct snd_soc_codec *codec)
623{
624 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
625 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ;
626
627 if (!wm_hubs_dac_hp_direct(codec))
628 enable = false;
629
630 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec))
631 enable = false;
632
633 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled");
634
635 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
636 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable);
637}
638EXPORT_SYMBOL_GPL(wm_hubs_update_class_w);
639
04de57c1
MB		 640#define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \
641{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
642 .info = snd_soc_info_volsw, \
643 .get = snd_soc_dapm_get_volsw, .put = class_w_put_volsw, \
644 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
645
646static int class_w_put_volsw(struct snd_kcontrol *kcontrol,
647 struct snd_ctl_elem_value *ucontrol)
648{
649 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
650 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
651 struct snd_soc_codec *codec = widget->codec;
652 int ret;
653
654 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
655
656 wm_hubs_update_class_w(codec);
657
658 return ret;
659}
660
c340304d
MB		 661#define WM_HUBS_ENUM_W(xname, xenum) \
662{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
663 .info = snd_soc_info_enum_double, \
664 .get = snd_soc_dapm_get_enum_double, \
04de57c1 665 .put = class_w_put_double, \
c340304d
MB		 666 .private_value = (unsigned long)&xenum }
667
04de57c1
MB		 668static int class_w_put_double(struct snd_kcontrol *kcontrol,
669 struct snd_ctl_elem_value *ucontrol)
c340304d
MB		 670{
671 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
672 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
673 struct snd_soc_codec *codec = widget->codec;
674 int ret;
675
676 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
677
678 wm_hubs_update_class_w(codec);
679
680 return ret;
681}
682
683static const char *hp_mux_text[] = {
684 "Mixer",
685 "DAC",
686};
687
688static const struct soc_enum hpl_enum =
689 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
690
691const struct snd_kcontrol_new wm_hubs_hpl_mux =
692 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum);
693EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux);
694
695static const struct soc_enum hpr_enum =
696 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
697
698const struct snd_kcontrol_new wm_hubs_hpr_mux =
699 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum);
700EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux);
701
a2342ae3
MB		 702static const struct snd_kcontrol_new in1l_pga[] = {
703SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
704SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
705};
706
707static const struct snd_kcontrol_new in1r_pga[] = {
708SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
709SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
710};
711
712static const struct snd_kcontrol_new in2l_pga[] = {
713SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
714SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
715};
716
717static const struct snd_kcontrol_new in2r_pga[] = {
718SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
719SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
720};
721
722static const struct snd_kcontrol_new mixinl[] = {
723SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
724SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
725};
726
727static const struct snd_kcontrol_new mixinr[] = {
728SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
729SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
730};
731
732static const struct snd_kcontrol_new left_output_mixer[] = {
04de57c1
MB		 733WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
734WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
735WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
736WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
737WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
738WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
739WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
740WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
a2342ae3
MB		 741};
742
743static const struct snd_kcontrol_new right_output_mixer[] = {
04de57c1
MB		 744WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
745WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
746WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
747WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
748WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
749WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
750WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
751WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
a2342ae3
MB		 752};
753
754static const struct snd_kcontrol_new earpiece_mixer[] = {
755SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
756SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
757SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
758};
759
760static const struct snd_kcontrol_new left_speaker_boost[] = {
761SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
762SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
763SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
764};
765
766static const struct snd_kcontrol_new right_speaker_boost[] = {
767SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
768SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
769SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
770};
771
772static const struct snd_kcontrol_new line1_mix[] = {
773SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
774SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
775SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
776};
777
778static const struct snd_kcontrol_new line1n_mix[] = {
779SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
780SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
781};
782
783static const struct snd_kcontrol_new line1p_mix[] = {
784SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
785};
786
787static const struct snd_kcontrol_new line2_mix[] = {
43b6cec2
MB		 788SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
789SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
a2342ae3
MB		 790SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
791};
792
793static const struct snd_kcontrol_new line2n_mix[] = {
114395c6
UK		 794SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
795SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
a2342ae3
MB		 796};
797
798static const struct snd_kcontrol_new line2p_mix[] = {
799SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
800};
801
802static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
803SND_SOC_DAPM_INPUT("IN1LN"),
804SND_SOC_DAPM_INPUT("IN1LP"),
805SND_SOC_DAPM_INPUT("IN2LN"),
34825948 806SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
a2342ae3
MB		 807SND_SOC_DAPM_INPUT("IN1RN"),
808SND_SOC_DAPM_INPUT("IN1RP"),
809SND_SOC_DAPM_INPUT("IN2RN"),
34825948 810SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
a2342ae3 811
91e20854
MB		 812SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
813SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
a2342ae3
MB		 814
815SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
816 in1l_pga, ARRAY_SIZE(in1l_pga)),
817SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
818 in1r_pga, ARRAY_SIZE(in1r_pga)),
819
820SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
821 in2l_pga, ARRAY_SIZE(in2l_pga)),
822SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
823 in2r_pga, ARRAY_SIZE(in2r_pga)),
824
a2342ae3
MB		 825SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
826 mixinl, ARRAY_SIZE(mixinl)),
827SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
828 mixinr, ARRAY_SIZE(mixinr)),
829
a2342ae3
MB		 830SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
831 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
832SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
833 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
834
835SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
836SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
837
3ed7074c
MB		 838SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
839 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
26422625
MB		 840SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
841 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 842
843SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
844 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
845SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
846 NULL, 0, earpiece_event,
847 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
848
849SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
850 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
851SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
852 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
853
03431972 854SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
dc9c7454
MB		 855SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
856 NULL, 0),
857SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
858 NULL, 0),
a2342ae3
MB		 859
860SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
861 line1_mix, ARRAY_SIZE(line1_mix)),
862SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
863 line2_mix, ARRAY_SIZE(line2_mix)),
864
865SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
866 line1n_mix, ARRAY_SIZE(line1n_mix)),
867SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
868 line1p_mix, ARRAY_SIZE(line1p_mix)),
869SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
870 line2n_mix, ARRAY_SIZE(line2n_mix)),
871SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
872 line2p_mix, ARRAY_SIZE(line2p_mix)),
873
5f2f3890
MB		 874SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
875 NULL, 0, lineout_event,
876 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
877SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
878 NULL, 0, lineout_event,
879 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
880SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
881 NULL, 0, lineout_event,
882 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
883SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
884 NULL, 0, lineout_event,
885 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 886
887SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
888SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
889SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
890SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
891SND_SOC_DAPM_OUTPUT("HPOUT1L"),
892SND_SOC_DAPM_OUTPUT("HPOUT1R"),
893SND_SOC_DAPM_OUTPUT("HPOUT2P"),
894SND_SOC_DAPM_OUTPUT("HPOUT2N"),
895SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
896SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
897SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
898SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
899};
900
901static const struct snd_soc_dapm_route analogue_routes[] = {
4baafdd7
MB		 902 { "MICBIAS1", NULL, "CLK_SYS" },
903 { "MICBIAS2", NULL, "CLK_SYS" },
904
a2342ae3
MB		 905 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
906 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
907
4e04adaf
MB		 908 { "IN1L PGA", NULL, "VMID" },
909 { "IN1R PGA", NULL, "VMID" },
910 { "IN2L PGA", NULL, "VMID" },
911 { "IN2R PGA", NULL, "VMID" },
912
a2342ae3
MB		 913 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
914 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
915
34825948 916 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 917 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
918
34825948 919 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 920 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
921
34825948
JS		 922 { "Direct Voice", NULL, "IN2LP:VXRN" },
923 { "Direct Voice", NULL, "IN2RP:VXRP" },
a2342ae3
MB		 924
925 { "MIXINL", "IN1L Switch", "IN1L PGA" },
926 { "MIXINL", "IN2L Switch", "IN2L PGA" },
927 { "MIXINL", NULL, "Direct Voice" },
928 { "MIXINL", NULL, "IN1LP" },
929 { "MIXINL", NULL, "Left Output Mixer" },
4e04adaf 930 { "MIXINL", NULL, "VMID" },
a2342ae3
MB		 931
932 { "MIXINR", "IN1R Switch", "IN1R PGA" },
933 { "MIXINR", "IN2R Switch", "IN2R PGA" },
934 { "MIXINR", NULL, "Direct Voice" },
935 { "MIXINR", NULL, "IN1RP" },
936 { "MIXINR", NULL, "Right Output Mixer" },
4e04adaf 937 { "MIXINR", NULL, "VMID" },
a2342ae3
MB		 938
939 { "ADCL", NULL, "MIXINL" },
940 { "ADCR", NULL, "MIXINR" },
941
942 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
943 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
944 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
945 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
34825948 946 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 947 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
948 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
949
950 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
951 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
952 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
953 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
34825948 954 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 955 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
956 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
957
958 { "Left Output PGA", NULL, "Left Output Mixer" },
959 { "Left Output PGA", NULL, "TOCLK" },
960
961 { "Right Output PGA", NULL, "Right Output Mixer" },
962 { "Right Output PGA", NULL, "TOCLK" },
963
964 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
965 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
966 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
967
4e04adaf 968 { "Earpiece Driver", NULL, "VMID" },
a2342ae3
MB		 969 { "Earpiece Driver", NULL, "Earpiece Mixer" },
970 { "HPOUT2N", NULL, "Earpiece Driver" },
971 { "HPOUT2P", NULL, "Earpiece Driver" },
972
973 { "SPKL", "Input Switch", "MIXINL" },
974 { "SPKL", "IN1LP Switch", "IN1LP" },
39cca168 975 { "SPKL", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 976 { "SPKL", NULL, "TOCLK" },
977
978 { "SPKR", "Input Switch", "MIXINR" },
979 { "SPKR", "IN1RP Switch", "IN1RP" },
39cca168 980 { "SPKR", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 981 { "SPKR", NULL, "TOCLK" },
982
983 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
984 { "SPKL Boost", "SPKL Switch", "SPKL" },
985 { "SPKL Boost", "SPKR Switch", "SPKR" },
986
987 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
988 { "SPKR Boost", "SPKR Switch", "SPKR" },
989 { "SPKR Boost", "SPKL Switch", "SPKL" },
990
4e04adaf 991 { "SPKL Driver", NULL, "VMID" },
a2342ae3
MB		 992 { "SPKL Driver", NULL, "SPKL Boost" },
993 { "SPKL Driver", NULL, "CLK_SYS" },
03431972 994 { "SPKL Driver", NULL, "TSHUT" },
a2342ae3 995
4e04adaf 996 { "SPKR Driver", NULL, "VMID" },
a2342ae3
MB		 997 { "SPKR Driver", NULL, "SPKR Boost" },
998 { "SPKR Driver", NULL, "CLK_SYS" },
03431972 999 { "SPKR Driver", NULL, "TSHUT" },
a2342ae3
MB		 1000
1001 { "SPKOUTLP", NULL, "SPKL Driver" },
1002 { "SPKOUTLN", NULL, "SPKL Driver" },
1003 { "SPKOUTRP", NULL, "SPKR Driver" },
1004 { "SPKOUTRN", NULL, "SPKR Driver" },
1005
39cca168
MB		 1006 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
1007 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
a2342ae3
MB		 1008
1009 { "Headphone PGA", NULL, "Left Headphone Mux" },
1010 { "Headphone PGA", NULL, "Right Headphone Mux" },
4e04adaf 1011 { "Headphone PGA", NULL, "VMID" },
a2342ae3 1012 { "Headphone PGA", NULL, "CLK_SYS" },
3ed7074c 1013 { "Headphone PGA", NULL, "Headphone Supply" },
a2342ae3
MB		 1014
1015 { "HPOUT1L", NULL, "Headphone PGA" },
1016 { "HPOUT1R", NULL, "Headphone PGA" },
1017
4e04adaf
MB		 1018 { "LINEOUT1N Driver", NULL, "VMID" },
1019 { "LINEOUT1P Driver", NULL, "VMID" },
1020 { "LINEOUT2N Driver", NULL, "VMID" },
1021 { "LINEOUT2P Driver", NULL, "VMID" },
1022
a2342ae3
MB		 1023 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
1024 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
1025 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
1026 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
1027};
1028
1029static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
1030 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
1031 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 1032 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 1033
1034 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
1035 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
1036};
1037
1038static const struct snd_soc_dapm_route lineout1_se_routes[] = {
d0b48af6
MB		 1039 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
1040 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 1041
d0b48af6 1042 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
a2342ae3
MB		 1043
1044 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
1045 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
1046};
1047
1048static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
ee76744c
MB		 1049 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
1050 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 1051 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 1052
1053 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
1054 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
1055};
1056
1057static const struct snd_soc_dapm_route lineout2_se_routes[] = {
d0b48af6
MB		 1058 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
1059 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 1060
d0b48af6 1061 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3
MB		 1062
1063 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
1064 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
1065};
1066
1067int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
1068{
ce6120cc
LG		 1069 struct snd_soc_dapm_context *dapm = &codec->dapm;
1070
a2342ae3
MB		 1071 /* Latch volume update bits & default ZC on */
1072 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
1073 WM8993_IN1_VU, WM8993_IN1_VU);
1074 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
1075 WM8993_IN1_VU, WM8993_IN1_VU);
1076 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
1077 WM8993_IN2_VU, WM8993_IN2_VU);
1078 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
1079 WM8993_IN2_VU, WM8993_IN2_VU);
1080
fb5af53d
MB		 1081 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
1082 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
a2342ae3
MB		 1083 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
1084 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
1085
1086 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
fb5af53d
MB		 1087 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
1088 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
a2342ae3
MB		 1089 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
1090 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
1091 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
1092
1093 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
fb5af53d
MB		 1094 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
1095 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
a2342ae3
MB		 1096 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
1097 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
1098 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
1099
022658be 1100 snd_soc_add_codec_controls(codec, analogue_snd_controls,
a2342ae3
MB		 1101 ARRAY_SIZE(analogue_snd_controls));
1102
ce6120cc 1103 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
a2342ae3
MB		 1104 ARRAY_SIZE(analogue_dapm_widgets));
1105 return 0;
1106}
1107EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
1108
1109int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
1110 int lineout1_diff, int lineout2_diff)
1111{
d96ca3cd 1112 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
ce6120cc
LG		 1113 struct snd_soc_dapm_context *dapm = &codec->dapm;
1114
94aa733a 1115 INIT_LIST_HEAD(&hubs->dcs_cache);
d96ca3cd
MB		 1116 init_completion(&hubs->dcs_done);
1117
ce6120cc 1118 snd_soc_dapm_add_routes(dapm, analogue_routes,
a2342ae3
MB		 1119 ARRAY_SIZE(analogue_routes));
1120
1121 if (lineout1_diff)
ce6120cc 1122 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1123 lineout1_diff_routes,
1124 ARRAY_SIZE(lineout1_diff_routes));
1125 else
ce6120cc 1126 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1127 lineout1_se_routes,
1128 ARRAY_SIZE(lineout1_se_routes));
1129
1130 if (lineout2_diff)
ce6120cc 1131 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1132 lineout2_diff_routes,
1133 ARRAY_SIZE(lineout2_diff_routes));
1134 else
ce6120cc 1135 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1136 lineout2_se_routes,
1137 ARRAY_SIZE(lineout2_se_routes));
1138
1139 return 0;
1140}
1141EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
1142
aa983d9d
MB		 1143int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
1144 int lineout1_diff, int lineout2_diff,
1145 int lineout1fb, int lineout2fb,
1146 int jd_scthr, int jd_thr, int micbias1_lvl,
1147 int micbias2_lvl)
1148{
5f2f3890
MB		 1149 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1150
1151 hubs->lineout1_se = !lineout1_diff;
1152 hubs->lineout2_se = !lineout2_diff;
1153
aa983d9d
MB		 1154 if (!lineout1_diff)
1155 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
1156 WM8993_LINEOUT1_MODE,
1157 WM8993_LINEOUT1_MODE);
1158 if (!lineout2_diff)
1159 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
1160 WM8993_LINEOUT2_MODE,
1161 WM8993_LINEOUT2_MODE);
1162
5472bbc9
MB		 1163 if (!lineout1_diff && !lineout2_diff)
1164 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1165 WM8993_LINEOUT_VMID_BUF_ENA,
1166 WM8993_LINEOUT_VMID_BUF_ENA);
1167
aa983d9d
MB		 1168 if (lineout1fb)
1169 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1170 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
1171
1172 if (lineout2fb)
1173 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1174 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
1175
1176 snd_soc_update_bits(codec, WM8993_MICBIAS,
1177 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
1178 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
1179 jd_scthr << WM8993_JD_SCTHR_SHIFT |
1180 jd_thr << WM8993_JD_THR_SHIFT |
1181 micbias1_lvl |
1182 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
1183
1184 return 0;
1185}
1186EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
1187
5f2f3890
MB		 1188void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
1189{
1190 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1191 int val = 0;
1192
1193 if (hubs->lineout1_se)
1194 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1195
1196 if (hubs->lineout2_se)
1197 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
1198
1199 /* Enable the line outputs while we power up */
1200 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
1201}
1202EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
1203
1204void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
1205 enum snd_soc_bias_level level)
1206{
1207 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
de050aca 1208 int mask, val;
5f2f3890
MB		 1209
1210 switch (level) {
d60d6c3b
MB		 1211 case SND_SOC_BIAS_STANDBY:
1212 /* Clamp the inputs to VMID while we ramp to charge caps */
1213 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1214 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
1215 break;
1216
5f2f3890
MB		 1217 case SND_SOC_BIAS_ON:
1218 /* Turn off any unneded single ended outputs */
1219 val = 0;
de050aca
MB		 1220 mask = 0;
1221
1222 if (hubs->lineout1_se)
1223 mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1224
1225 if (hubs->lineout2_se)
1226 mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
5f2f3890
MB		 1227
1228 if (hubs->lineout1_se && hubs->lineout1n_ena)
1229 val |= WM8993_LINEOUT1N_ENA;
1230
1231 if (hubs->lineout1_se && hubs->lineout1p_ena)
1232 val |= WM8993_LINEOUT1P_ENA;
1233
1234 if (hubs->lineout2_se && hubs->lineout2n_ena)
1235 val |= WM8993_LINEOUT2N_ENA;
1236
1237 if (hubs->lineout2_se && hubs->lineout2p_ena)
1238 val |= WM8993_LINEOUT2P_ENA;
1239
1240 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
de050aca 1241 mask, val);
5f2f3890 1242
d60d6c3b
MB		 1243 /* Remove the input clamps */
1244 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1245 WM8993_INPUTS_CLAMP, 0);
5f2f3890
MB		 1246 break;
1247
1248 default:
1249 break;
1250 }
1251}
1252EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
1253
a2342ae3
MB		 1254MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
1255MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1256MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)