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ASoC: wm_hubs: Add trace showing semantics of the DCS update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm_hubs.c
CommitLineData
a2342ae3
MB		 1/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
656baaeb 4 * Copyright 2009-12 Wolfson Microelectronics plc
a2342ae3
MB		 5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
79ef0abc 20#include <linux/mfd/wm8994/registers.h>
a2342ae3
MB		 21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
a2342ae3
MB		 25#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
028aa634 42 TLV_DB_RANGE_HEAD(2),
a2342ae3
MB		 43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
4dcc93d0 64static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
a2342ae3 65{
d96ca3cd 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 67 unsigned int reg;
68 int count = 0;
1479c3fb 69 int timeout;
4dcc93d0
MB		 70 unsigned int val;
71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
a2342ae3
MB		 76
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
3ed7074c 78
1479c3fb
MB		 79 if (hubs->dcs_done_irq)
80 timeout = 4;
81 else
82 timeout = 400;
d96ca3cd 83
1479c3fb
MB		 84 do {
85 count++;
86
87 if (hubs->dcs_done_irq)
88 wait_for_completion_timeout(&hubs->dcs_done,
89 msecs_to_jiffies(250));
90 else
d96ca3cd 91 msleep(1);
1479c3fb
MB		 92
93 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
94 dev_dbg(codec->dev, "DC servo: %x\n", reg);
95 } while (reg & op && count < timeout);
a2342ae3 96
4dcc93d0 97 if (reg & op)
5a9f91ca
MB		 98 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
99 op);
a2342ae3
MB		 100}
101
d96ca3cd
MB		 102irqreturn_t wm_hubs_dcs_done(int irq, void *data)
103{
104 struct wm_hubs_data *hubs = data;
105
106 complete(&hubs->dcs_done);
107
108 return IRQ_HANDLED;
109}
110EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
111
af31a227
MB		 112static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec)
113{
114 int reg;
115
116 /* If we're going via the mixer we'll need to do additional checks */
117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1);
118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) {
119 if (reg & ~WM8993_DACL_TO_MIXOUTL) {
120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
121 reg & ~WM8993_DACL_TO_HPOUT1L);
122 return false;
123 } else {
124 dev_vdbg(codec->dev, "HPL connected to mixer\n");
af31a227
MB		 125 }
126 } else {
127 dev_vdbg(codec->dev, "HPL connected to DAC\n");
128 }
129
130 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2);
131 if (!(reg & WM8993_DACR_TO_HPOUT1R)) {
132 if (reg & ~WM8993_DACR_TO_MIXOUTR) {
133 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
134 reg & ~WM8993_DACR_TO_HPOUT1R);
135 return false;
136 } else {
137 dev_vdbg(codec->dev, "HPR connected to mixer\n");
af31a227
MB		 138 }
139 } else {
140 dev_vdbg(codec->dev, "HPR connected to DAC\n");
141 }
142
143 return true;
144}
145
94aa733a
MB		 146struct wm_hubs_dcs_cache {
147 struct list_head list;
148 unsigned int left;
149 unsigned int right;
150 u16 dcs_cfg;
151};
152
153static bool wm_hubs_dcs_cache_get(struct snd_soc_codec *codec,
154 struct wm_hubs_dcs_cache **entry)
155{
156 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
157 struct wm_hubs_dcs_cache *cache;
158 unsigned int left, right;
159
160 left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
161 left &= WM8993_HPOUT1L_VOL_MASK;
162
163 right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
164 right &= WM8993_HPOUT1R_VOL_MASK;
165
166 list_for_each_entry(cache, &hubs->dcs_cache, list) {
167 if (cache->left != left || cache->right != right)
168 continue;
169
170 *entry = cache;
171 return true;
172 }
173
174 return false;
175}
176
177static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg)
178{
179 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
180 struct wm_hubs_dcs_cache *cache;
181
182 if (hubs->no_cache_dac_hp_direct)
183 return;
184
185 cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL);
186 if (!cache) {
187 dev_err(codec->dev, "Failed to allocate DCS cache entry\n");
188 return;
189 }
190
191 cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
192 cache->left &= WM8993_HPOUT1L_VOL_MASK;
193
194 cache->right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
195 cache->right &= WM8993_HPOUT1R_VOL_MASK;
196
197 cache->dcs_cfg = dcs_cfg;
198
199 list_add_tail(&cache->list, &hubs->dcs_cache);
200}
201
fae4efa2
MB		 202static void wm_hubs_read_dc_servo(struct snd_soc_codec *codec,
203 u16 *reg_l, u16 *reg_r)
204{
205 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
206 u16 dcs_reg, reg;
207
208 switch (hubs->dcs_readback_mode) {
209 case 2:
210 dcs_reg = WM8994_DC_SERVO_4E;
211 break;
212 case 1:
213 dcs_reg = WM8994_DC_SERVO_READBACK;
214 break;
215 default:
216 dcs_reg = WM8993_DC_SERVO_3;
217 break;
218 }
219
220 /* Different chips in the family support different readback
221 * methods.
222 */
223 switch (hubs->dcs_readback_mode) {
224 case 0:
225 *reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
226 & WM8993_DCS_INTEG_CHAN_0_MASK;
227 *reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
228 & WM8993_DCS_INTEG_CHAN_1_MASK;
229 break;
230 case 2:
231 case 1:
232 reg = snd_soc_read(codec, dcs_reg);
233 *reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
234 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
235 *reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
236 break;
237 default:
238 WARN(1, "Unknown DCS readback method\n");
239 return;
240 }
241}
242
3ed7074c
MB		 243/*
244 * Startup calibration of the DC servo
245 */
a7892c35 246static void enable_dc_servo(struct snd_soc_codec *codec)
3ed7074c 247{
b2c812e2 248 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
94aa733a 249 struct wm_hubs_dcs_cache *cache;
20a4e7fc 250 s8 offset;
fae4efa2 251 u16 reg_l, reg_r, dcs_cfg, dcs_reg;
79ef0abc
MB		 252
253 switch (hubs->dcs_readback_mode) {
254 case 2:
255 dcs_reg = WM8994_DC_SERVO_4E;
256 break;
257 default:
258 dcs_reg = WM8993_DC_SERVO_3;
259 break;
260 }
3ed7074c 261
fec6dd83
MB		 262 /* If we're using a digital only path and have a previously
263 * callibrated DC servo offset stored then use that. */
94aa733a
MB		 264 if (wm_hubs_dac_hp_direct(codec) &&
265 wm_hubs_dcs_cache_get(codec, &cache)) {
266 dev_dbg(codec->dev, "Using cached DCS offset %x for %d,%d\n",
267 cache->dcs_cfg, cache->left, cache->right);
268 snd_soc_write(codec, dcs_reg, cache->dcs_cfg);
fec6dd83
MB		 269 wait_for_dc_servo(codec,
270 WM8993_DCS_TRIG_DAC_WR_0 |
271 WM8993_DCS_TRIG_DAC_WR_1);
272 return;
273 }
274
f9acf9fe 275 if (hubs->series_startup) {
11cef5f0
MB		 276 /* Set for 32 series updates */
277 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
278 WM8993_DCS_SERIES_NO_01_MASK,
279 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
280 wait_for_dc_servo(codec,
281 WM8993_DCS_TRIG_SERIES_0 |
282 WM8993_DCS_TRIG_SERIES_1);
283 } else {
284 wait_for_dc_servo(codec,
285 WM8993_DCS_TRIG_STARTUP_0 |
286 WM8993_DCS_TRIG_STARTUP_1);
287 }
3ed7074c 288
fae4efa2 289 wm_hubs_read_dc_servo(codec, &reg_l, &reg_r);
fec6dd83
MB		 290
291 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
292
3ed7074c 293 /* Apply correction to DC servo result */
4537c4e7
MB		 294 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
295 dev_dbg(codec->dev,
296 "Applying %d/%d code DC servo correction\n",
297 hubs->dcs_codes_l, hubs->dcs_codes_r);
3ed7074c 298
d5b040c9 299 /* HPOUT1R */
363947d7 300 offset = (s8)reg_r;
20bac1f3
MB		 301 dev_dbg(codec->dev, "DCS right %d->%d\n", offset,
302 offset + hubs->dcs_codes_r);
4537c4e7 303 offset += hubs->dcs_codes_r;
20a4e7fc 304 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
3ed7074c 305
d5b040c9 306 /* HPOUT1L */
363947d7 307 offset = (s8)reg_l;
20bac1f3
MB		 308 dev_dbg(codec->dev, "DCS left %d->%d\n", offset,
309 offset + hubs->dcs_codes_l);
4537c4e7 310 offset += hubs->dcs_codes_l;
20a4e7fc 311 dcs_cfg |= (u8)offset;
3ed7074c 312
3254d285
MB		 313 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
314
3ed7074c 315 /* Do it */
79ef0abc 316 snd_soc_write(codec, dcs_reg, dcs_cfg);
4dcc93d0
MB		 317 wait_for_dc_servo(codec,
318 WM8993_DCS_TRIG_DAC_WR_0 |
319 WM8993_DCS_TRIG_DAC_WR_1);
fec6dd83 320 } else {
d5b040c9
MB		 321 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
322 dcs_cfg |= reg_l;
3ed7074c 323 }
fec6dd83
MB		 324
325 /* Save the callibrated offset if we're in class W mode and
326 * therefore don't have any analogue signal mixed in. */
94aa733a
MB		 327 if (wm_hubs_dac_hp_direct(codec))
328 wm_hubs_dcs_cache_set(codec, dcs_cfg);
3ed7074c
MB		 329}
330
a2342ae3
MB		 331/*
332 * Update the DC servo calibration on gain changes
333 */
334static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
3ed7074c 335 struct snd_ctl_elem_value *ucontrol)
a2342ae3
MB		 336{
337 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 338 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
a2342ae3
MB		 339 int ret;
340
c4671a95 341 ret = snd_soc_put_volsw(kcontrol, ucontrol);
a2342ae3 342
ae9d8607
MB		 343 /* If we're applying an offset correction then updating the
344 * callibration would be likely to introduce further offsets. */
4537c4e7 345 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
ae9d8607
MB		 346 return ret;
347
a2342ae3
MB		 348 /* Only need to do this if the outputs are active */
349 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
350 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
351 snd_soc_update_bits(codec,
352 WM8993_DC_SERVO_0,
353 WM8993_DCS_TRIG_SINGLE_0 |
354 WM8993_DCS_TRIG_SINGLE_1,
355 WM8993_DCS_TRIG_SINGLE_0 |
356 WM8993_DCS_TRIG_SINGLE_1);
357
358 return ret;
359}
360
361static const struct snd_kcontrol_new analogue_snd_controls[] = {
362SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
363 inpga_tlv),
364SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 365SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 366
367SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
368 inpga_tlv),
369SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
ea02c63d 370SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
a2342ae3
MB		 371
372
373SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
374 inpga_tlv),
375SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 376SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 377
378SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
379 inpga_tlv),
380SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
ea02c63d 381SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
a2342ae3
MB		 382
383SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
384 inmix_sw_tlv),
385SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
386 inmix_sw_tlv),
387SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
388 inmix_tlv),
389SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
390SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
391 inmix_tlv),
392
393SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
394 inmix_sw_tlv),
395SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
396 inmix_sw_tlv),
397SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
398 inmix_tlv),
399SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
400SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
401 inmix_tlv),
402
403SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
404 outmix_tlv),
405SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
406 outmix_tlv),
407SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
408 outmix_tlv),
409SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
410 outmix_tlv),
411SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
412 outmix_tlv),
413SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
414 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
415SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
416 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
417SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
418 outmix_tlv),
419
420SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
421 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
422SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
423 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
424SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
425 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
426SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
427 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
428SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
429 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
430SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
431 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
432SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
433 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
434SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
435 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
436
437SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
438 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
439SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
440 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
441SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
442 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
443
444SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
445SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
446
447SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
448 5, 1, 1, wm_hubs_spkmix_tlv),
449SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
450 4, 1, 1, wm_hubs_spkmix_tlv),
451SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
452 3, 1, 1, wm_hubs_spkmix_tlv),
453
454SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
455 5, 1, 1, wm_hubs_spkmix_tlv),
456SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
457 4, 1, 1, wm_hubs_spkmix_tlv),
458SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
459 3, 1, 1, wm_hubs_spkmix_tlv),
460
461SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
462 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
463 0, 3, 1, spkmixout_tlv),
464SOC_DOUBLE_R_TLV("Speaker Volume",
465 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
466 0, 63, 0, outpga_tlv),
467SOC_DOUBLE_R("Speaker Switch",
468 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
469 6, 1, 0),
470SOC_DOUBLE_R("Speaker ZC Switch",
471 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
472 7, 1, 0),
ed8cc471 473SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
a2342ae3
MB		 474 spkboost_tlv),
475SOC_ENUM("Speaker Reference", speaker_ref),
476SOC_ENUM("Speaker Mode", speaker_mode),
477
0f9887d1
PU		 478SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
479 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
c4671a95 480 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
0f9887d1
PU		 481 outpga_tlv),
482
a2342ae3
MB		 483SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
484 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
485SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
486 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
487
488SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
489SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
490SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
491 line_tlv),
492
493SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
494SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
495SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
496 line_tlv),
497};
498
3ed7074c
MB		 499static int hp_supply_event(struct snd_soc_dapm_widget *w,
500 struct snd_kcontrol *kcontrol, int event)
501{
502 struct snd_soc_codec *codec = w->codec;
b2c812e2 503 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
3ed7074c
MB		 504
505 switch (event) {
506 case SND_SOC_DAPM_PRE_PMU:
507 switch (hubs->hp_startup_mode) {
508 case 0:
509 break;
510 case 1:
511 /* Enable the headphone amp */
512 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
513 WM8993_HPOUT1L_ENA |
514 WM8993_HPOUT1R_ENA,
515 WM8993_HPOUT1L_ENA |
516 WM8993_HPOUT1R_ENA);
517
518 /* Enable the second stage */
519 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
520 WM8993_HPOUT1L_DLY |
521 WM8993_HPOUT1R_DLY,
522 WM8993_HPOUT1L_DLY |
523 WM8993_HPOUT1R_DLY);
524 break;
525 default:
526 dev_err(codec->dev, "Unknown HP startup mode %d\n",
527 hubs->hp_startup_mode);
528 break;
529 }
530
531 case SND_SOC_DAPM_PRE_PMD:
532 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
533 WM8993_CP_ENA, 0);
534 break;
535 }
536
537 return 0;
538}
539
a2342ae3
MB		 540static int hp_event(struct snd_soc_dapm_widget *w,
541 struct snd_kcontrol *kcontrol, int event)
542{
543 struct snd_soc_codec *codec = w->codec;
544 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
545
546 switch (event) {
547 case SND_SOC_DAPM_POST_PMU:
548 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
549 WM8993_CP_ENA, WM8993_CP_ENA);
550
551 msleep(5);
552
553 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
554 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
555 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
556
557 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
558 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
559
3ed7074c 560 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
f9925d44 561 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
3ed7074c 562
a7892c35 563 enable_dc_servo(codec);
a2342ae3
MB		 564
565 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
566 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
567 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
568 break;
569
570 case SND_SOC_DAPM_PRE_PMD:
3ed7074c 571 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 572 WM8993_HPOUT1L_OUTP |
573 WM8993_HPOUT1R_OUTP |
3ed7074c
MB		 574 WM8993_HPOUT1L_RMV_SHORT |
575 WM8993_HPOUT1R_RMV_SHORT, 0);
a2342ae3 576
3ed7074c 577 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
6adb26bd
MB		 578 WM8993_HPOUT1L_DLY |
579 WM8993_HPOUT1R_DLY, 0);
a2342ae3 580
395e4b73
MB		 581 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
582
a2342ae3
MB		 583 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
584 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
585 0);
a2342ae3
MB		 586 break;
587 }
588
589 return 0;
590}
591
592static int earpiece_event(struct snd_soc_dapm_widget *w,
593 struct snd_kcontrol *control, int event)
594{
595 struct snd_soc_codec *codec = w->codec;
596 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
597
598 switch (event) {
599 case SND_SOC_DAPM_PRE_PMU:
600 reg |= WM8993_HPOUT2_IN_ENA;
601 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
602 udelay(50);
603 break;
604
605 case SND_SOC_DAPM_POST_PMD:
606 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
607 break;
608
609 default:
610 BUG();
611 break;
612 }
613
614 return 0;
615}
616
5f2f3890
MB		 617static int lineout_event(struct snd_soc_dapm_widget *w,
618 struct snd_kcontrol *control, int event)
619{
620 struct snd_soc_codec *codec = w->codec;
621 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
622 bool *flag;
623
624 switch (w->shift) {
625 case WM8993_LINEOUT1N_ENA_SHIFT:
626 flag = &hubs->lineout1n_ena;
627 break;
628 case WM8993_LINEOUT1P_ENA_SHIFT:
629 flag = &hubs->lineout1p_ena;
630 break;
631 case WM8993_LINEOUT2N_ENA_SHIFT:
632 flag = &hubs->lineout2n_ena;
633 break;
634 case WM8993_LINEOUT2P_ENA_SHIFT:
635 flag = &hubs->lineout2p_ena;
636 break;
637 default:
638 WARN(1, "Unknown line output");
639 return -EINVAL;
640 }
641
642 *flag = SND_SOC_DAPM_EVENT_ON(event);
643
644 return 0;
645}
646
c340304d
MB		 647void wm_hubs_update_class_w(struct snd_soc_codec *codec)
648{
649 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
650 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ;
651
652 if (!wm_hubs_dac_hp_direct(codec))
653 enable = false;
654
655 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec))
656 enable = false;
657
658 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled");
659
660 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
661 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable);
662}
663EXPORT_SYMBOL_GPL(wm_hubs_update_class_w);
664
04de57c1
MB		 665#define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \
666{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
667 .info = snd_soc_info_volsw, \
668 .get = snd_soc_dapm_get_volsw, .put = class_w_put_volsw, \
669 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
670
671static int class_w_put_volsw(struct snd_kcontrol *kcontrol,
672 struct snd_ctl_elem_value *ucontrol)
673{
674 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
675 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
676 struct snd_soc_codec *codec = widget->codec;
677 int ret;
678
679 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
680
681 wm_hubs_update_class_w(codec);
682
683 return ret;
684}
685
c340304d
MB		 686#define WM_HUBS_ENUM_W(xname, xenum) \
687{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
688 .info = snd_soc_info_enum_double, \
689 .get = snd_soc_dapm_get_enum_double, \
04de57c1 690 .put = class_w_put_double, \
c340304d
MB		 691 .private_value = (unsigned long)&xenum }
692
04de57c1
MB		 693static int class_w_put_double(struct snd_kcontrol *kcontrol,
694 struct snd_ctl_elem_value *ucontrol)
c340304d
MB		 695{
696 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
697 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
698 struct snd_soc_codec *codec = widget->codec;
699 int ret;
700
701 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
702
703 wm_hubs_update_class_w(codec);
704
705 return ret;
706}
707
708static const char *hp_mux_text[] = {
709 "Mixer",
710 "DAC",
711};
712
713static const struct soc_enum hpl_enum =
714 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
715
716const struct snd_kcontrol_new wm_hubs_hpl_mux =
717 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum);
718EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux);
719
720static const struct soc_enum hpr_enum =
721 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
722
723const struct snd_kcontrol_new wm_hubs_hpr_mux =
724 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum);
725EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux);
726
a2342ae3
MB		 727static const struct snd_kcontrol_new in1l_pga[] = {
728SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
729SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
730};
731
732static const struct snd_kcontrol_new in1r_pga[] = {
733SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
734SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
735};
736
737static const struct snd_kcontrol_new in2l_pga[] = {
738SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
739SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
740};
741
742static const struct snd_kcontrol_new in2r_pga[] = {
743SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
744SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
745};
746
747static const struct snd_kcontrol_new mixinl[] = {
748SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
749SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
750};
751
752static const struct snd_kcontrol_new mixinr[] = {
753SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
754SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
755};
756
757static const struct snd_kcontrol_new left_output_mixer[] = {
04de57c1
MB		 758WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
759WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
760WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
761WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
762WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
763WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
764WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
765WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
a2342ae3
MB		 766};
767
768static const struct snd_kcontrol_new right_output_mixer[] = {
04de57c1
MB		 769WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
770WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
771WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
772WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
773WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
774WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
775WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
776WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
a2342ae3
MB		 777};
778
779static const struct snd_kcontrol_new earpiece_mixer[] = {
780SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
781SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
782SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
783};
784
785static const struct snd_kcontrol_new left_speaker_boost[] = {
786SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
787SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
788SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
789};
790
791static const struct snd_kcontrol_new right_speaker_boost[] = {
792SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
793SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
794SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
795};
796
797static const struct snd_kcontrol_new line1_mix[] = {
798SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
799SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
800SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
801};
802
803static const struct snd_kcontrol_new line1n_mix[] = {
804SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
805SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
806};
807
808static const struct snd_kcontrol_new line1p_mix[] = {
809SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
810};
811
812static const struct snd_kcontrol_new line2_mix[] = {
43b6cec2
MB		 813SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
814SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
a2342ae3
MB		 815SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
816};
817
818static const struct snd_kcontrol_new line2n_mix[] = {
114395c6
UK		 819SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
820SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
a2342ae3
MB		 821};
822
823static const struct snd_kcontrol_new line2p_mix[] = {
824SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
825};
826
827static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
828SND_SOC_DAPM_INPUT("IN1LN"),
829SND_SOC_DAPM_INPUT("IN1LP"),
830SND_SOC_DAPM_INPUT("IN2LN"),
34825948 831SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
a2342ae3
MB		 832SND_SOC_DAPM_INPUT("IN1RN"),
833SND_SOC_DAPM_INPUT("IN1RP"),
834SND_SOC_DAPM_INPUT("IN2RN"),
34825948 835SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
a2342ae3 836
91e20854
MB		 837SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
838SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
a2342ae3
MB		 839
840SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
841 in1l_pga, ARRAY_SIZE(in1l_pga)),
842SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
843 in1r_pga, ARRAY_SIZE(in1r_pga)),
844
845SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
846 in2l_pga, ARRAY_SIZE(in2l_pga)),
847SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
848 in2r_pga, ARRAY_SIZE(in2r_pga)),
849
a2342ae3
MB		 850SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
851 mixinl, ARRAY_SIZE(mixinl)),
852SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
853 mixinr, ARRAY_SIZE(mixinr)),
854
a2342ae3
MB		 855SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
856 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
857SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
858 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
859
860SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
861SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
862
3ed7074c
MB		 863SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
864 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
26422625
MB		 865SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
866 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 867
868SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
869 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
870SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
871 NULL, 0, earpiece_event,
872 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
873
874SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
875 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
876SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
877 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
878
03431972 879SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
dc9c7454
MB		 880SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
881 NULL, 0),
882SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
883 NULL, 0),
a2342ae3
MB		 884
885SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
886 line1_mix, ARRAY_SIZE(line1_mix)),
887SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
888 line2_mix, ARRAY_SIZE(line2_mix)),
889
890SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
891 line1n_mix, ARRAY_SIZE(line1n_mix)),
892SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
893 line1p_mix, ARRAY_SIZE(line1p_mix)),
894SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
895 line2n_mix, ARRAY_SIZE(line2n_mix)),
896SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
897 line2p_mix, ARRAY_SIZE(line2p_mix)),
898
5f2f3890
MB		 899SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
900 NULL, 0, lineout_event,
901 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
902SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
903 NULL, 0, lineout_event,
904 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
905SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
906 NULL, 0, lineout_event,
907 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
908SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
909 NULL, 0, lineout_event,
910 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
a2342ae3
MB		 911
912SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
913SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
914SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
915SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
916SND_SOC_DAPM_OUTPUT("HPOUT1L"),
917SND_SOC_DAPM_OUTPUT("HPOUT1R"),
918SND_SOC_DAPM_OUTPUT("HPOUT2P"),
919SND_SOC_DAPM_OUTPUT("HPOUT2N"),
920SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
921SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
922SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
923SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
924};
925
926static const struct snd_soc_dapm_route analogue_routes[] = {
4baafdd7
MB		 927 { "MICBIAS1", NULL, "CLK_SYS" },
928 { "MICBIAS2", NULL, "CLK_SYS" },
929
a2342ae3
MB		 930 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
931 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
932
4e04adaf
MB		 933 { "IN1L PGA", NULL, "VMID" },
934 { "IN1R PGA", NULL, "VMID" },
935 { "IN2L PGA", NULL, "VMID" },
936 { "IN2R PGA", NULL, "VMID" },
937
a2342ae3
MB		 938 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
939 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
940
34825948 941 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 942 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
943
34825948 944 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 945 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
946
34825948
JS		 947 { "Direct Voice", NULL, "IN2LP:VXRN" },
948 { "Direct Voice", NULL, "IN2RP:VXRP" },
a2342ae3
MB		 949
950 { "MIXINL", "IN1L Switch", "IN1L PGA" },
951 { "MIXINL", "IN2L Switch", "IN2L PGA" },
952 { "MIXINL", NULL, "Direct Voice" },
953 { "MIXINL", NULL, "IN1LP" },
954 { "MIXINL", NULL, "Left Output Mixer" },
4e04adaf 955 { "MIXINL", NULL, "VMID" },
a2342ae3
MB		 956
957 { "MIXINR", "IN1R Switch", "IN1R PGA" },
958 { "MIXINR", "IN2R Switch", "IN2R PGA" },
959 { "MIXINR", NULL, "Direct Voice" },
960 { "MIXINR", NULL, "IN1RP" },
961 { "MIXINR", NULL, "Right Output Mixer" },
4e04adaf 962 { "MIXINR", NULL, "VMID" },
a2342ae3
MB		 963
964 { "ADCL", NULL, "MIXINL" },
965 { "ADCR", NULL, "MIXINR" },
966
967 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
968 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
969 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
970 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
34825948 971 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
a2342ae3
MB		 972 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
973 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
974
975 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
976 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
977 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
978 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
34825948 979 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
a2342ae3
MB		 980 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
981 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
982
983 { "Left Output PGA", NULL, "Left Output Mixer" },
984 { "Left Output PGA", NULL, "TOCLK" },
985
986 { "Right Output PGA", NULL, "Right Output Mixer" },
987 { "Right Output PGA", NULL, "TOCLK" },
988
989 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
990 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
991 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
992
4e04adaf 993 { "Earpiece Driver", NULL, "VMID" },
a2342ae3
MB		 994 { "Earpiece Driver", NULL, "Earpiece Mixer" },
995 { "HPOUT2N", NULL, "Earpiece Driver" },
996 { "HPOUT2P", NULL, "Earpiece Driver" },
997
998 { "SPKL", "Input Switch", "MIXINL" },
999 { "SPKL", "IN1LP Switch", "IN1LP" },
39cca168 1000 { "SPKL", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 1001 { "SPKL", NULL, "TOCLK" },
1002
1003 { "SPKR", "Input Switch", "MIXINR" },
1004 { "SPKR", "IN1RP Switch", "IN1RP" },
39cca168 1005 { "SPKR", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 1006 { "SPKR", NULL, "TOCLK" },
1007
1008 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
1009 { "SPKL Boost", "SPKL Switch", "SPKL" },
1010 { "SPKL Boost", "SPKR Switch", "SPKR" },
1011
1012 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
1013 { "SPKR Boost", "SPKR Switch", "SPKR" },
1014 { "SPKR Boost", "SPKL Switch", "SPKL" },
1015
4e04adaf 1016 { "SPKL Driver", NULL, "VMID" },
a2342ae3
MB		 1017 { "SPKL Driver", NULL, "SPKL Boost" },
1018 { "SPKL Driver", NULL, "CLK_SYS" },
03431972 1019 { "SPKL Driver", NULL, "TSHUT" },
a2342ae3 1020
4e04adaf 1021 { "SPKR Driver", NULL, "VMID" },
a2342ae3
MB		 1022 { "SPKR Driver", NULL, "SPKR Boost" },
1023 { "SPKR Driver", NULL, "CLK_SYS" },
03431972 1024 { "SPKR Driver", NULL, "TSHUT" },
a2342ae3
MB		 1025
1026 { "SPKOUTLP", NULL, "SPKL Driver" },
1027 { "SPKOUTLN", NULL, "SPKL Driver" },
1028 { "SPKOUTRP", NULL, "SPKR Driver" },
1029 { "SPKOUTRN", NULL, "SPKR Driver" },
1030
39cca168
MB		 1031 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
1032 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
a2342ae3
MB		 1033
1034 { "Headphone PGA", NULL, "Left Headphone Mux" },
1035 { "Headphone PGA", NULL, "Right Headphone Mux" },
4e04adaf 1036 { "Headphone PGA", NULL, "VMID" },
a2342ae3 1037 { "Headphone PGA", NULL, "CLK_SYS" },
3ed7074c 1038 { "Headphone PGA", NULL, "Headphone Supply" },
a2342ae3
MB		 1039
1040 { "HPOUT1L", NULL, "Headphone PGA" },
1041 { "HPOUT1R", NULL, "Headphone PGA" },
1042
4e04adaf
MB		 1043 { "LINEOUT1N Driver", NULL, "VMID" },
1044 { "LINEOUT1P Driver", NULL, "VMID" },
1045 { "LINEOUT2N Driver", NULL, "VMID" },
1046 { "LINEOUT2P Driver", NULL, "VMID" },
1047
a2342ae3
MB		 1048 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
1049 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
1050 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
1051 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
1052};
1053
1054static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
1055 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
1056 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 1057 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
a2342ae3
MB		 1058
1059 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
1060 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
1061};
1062
1063static const struct snd_soc_dapm_route lineout1_se_routes[] = {
d0b48af6
MB		 1064 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
1065 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 1066
d0b48af6 1067 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
a2342ae3
MB		 1068
1069 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
1070 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
1071};
1072
1073static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
ee76744c
MB		 1074 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
1075 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
d0b48af6 1076 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
a2342ae3
MB		 1077
1078 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
1079 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
1080};
1081
1082static const struct snd_soc_dapm_route lineout2_se_routes[] = {
d0b48af6
MB		 1083 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
1084 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3 1085
d0b48af6 1086 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
a2342ae3
MB		 1087
1088 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
1089 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
1090};
1091
1092int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
1093{
ce6120cc
LG		 1094 struct snd_soc_dapm_context *dapm = &codec->dapm;
1095
a2342ae3
MB		 1096 /* Latch volume update bits & default ZC on */
1097 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
1098 WM8993_IN1_VU, WM8993_IN1_VU);
1099 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
1100 WM8993_IN1_VU, WM8993_IN1_VU);
1101 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
1102 WM8993_IN2_VU, WM8993_IN2_VU);
1103 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
1104 WM8993_IN2_VU, WM8993_IN2_VU);
1105
fb5af53d
MB		 1106 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
1107 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
a2342ae3
MB		 1108 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
1109 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
1110
1111 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
fb5af53d
MB		 1112 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
1113 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
a2342ae3
MB		 1114 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
1115 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
1116 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
1117
1118 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
fb5af53d
MB		 1119 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
1120 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
a2342ae3
MB		 1121 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
1122 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
1123 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
1124
022658be 1125 snd_soc_add_codec_controls(codec, analogue_snd_controls,
a2342ae3
MB		 1126 ARRAY_SIZE(analogue_snd_controls));
1127
ce6120cc 1128 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
a2342ae3
MB		 1129 ARRAY_SIZE(analogue_dapm_widgets));
1130 return 0;
1131}
1132EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
1133
1134int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
1135 int lineout1_diff, int lineout2_diff)
1136{
d96ca3cd 1137 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
ce6120cc
LG		 1138 struct snd_soc_dapm_context *dapm = &codec->dapm;
1139
8cb8e83b
MB		 1140 hubs->codec = codec;
1141
94aa733a 1142 INIT_LIST_HEAD(&hubs->dcs_cache);
d96ca3cd
MB		 1143 init_completion(&hubs->dcs_done);
1144
ce6120cc 1145 snd_soc_dapm_add_routes(dapm, analogue_routes,
a2342ae3
MB		 1146 ARRAY_SIZE(analogue_routes));
1147
1148 if (lineout1_diff)
ce6120cc 1149 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1150 lineout1_diff_routes,
1151 ARRAY_SIZE(lineout1_diff_routes));
1152 else
ce6120cc 1153 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1154 lineout1_se_routes,
1155 ARRAY_SIZE(lineout1_se_routes));
1156
1157 if (lineout2_diff)
ce6120cc 1158 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1159 lineout2_diff_routes,
1160 ARRAY_SIZE(lineout2_diff_routes));
1161 else
ce6120cc 1162 snd_soc_dapm_add_routes(dapm,
a2342ae3
MB		 1163 lineout2_se_routes,
1164 ARRAY_SIZE(lineout2_se_routes));
1165
1166 return 0;
1167}
1168EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
1169
aa983d9d
MB		 1170int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
1171 int lineout1_diff, int lineout2_diff,
1172 int lineout1fb, int lineout2fb,
1173 int jd_scthr, int jd_thr, int micbias1_lvl,
1174 int micbias2_lvl)
1175{
5f2f3890
MB		 1176 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1177
1178 hubs->lineout1_se = !lineout1_diff;
1179 hubs->lineout2_se = !lineout2_diff;
1180
aa983d9d
MB		 1181 if (!lineout1_diff)
1182 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
1183 WM8993_LINEOUT1_MODE,
1184 WM8993_LINEOUT1_MODE);
1185 if (!lineout2_diff)
1186 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
1187 WM8993_LINEOUT2_MODE,
1188 WM8993_LINEOUT2_MODE);
1189
5472bbc9
MB		 1190 if (!lineout1_diff && !lineout2_diff)
1191 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1192 WM8993_LINEOUT_VMID_BUF_ENA,
1193 WM8993_LINEOUT_VMID_BUF_ENA);
1194
aa983d9d
MB		 1195 if (lineout1fb)
1196 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1197 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
1198
1199 if (lineout2fb)
1200 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1201 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
1202
1203 snd_soc_update_bits(codec, WM8993_MICBIAS,
1204 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
1205 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
1206 jd_scthr << WM8993_JD_SCTHR_SHIFT |
1207 jd_thr << WM8993_JD_THR_SHIFT |
1208 micbias1_lvl |
1209 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
1210
1211 return 0;
1212}
1213EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
1214
5f2f3890
MB		 1215void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
1216{
1217 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1218 int val = 0;
1219
1220 if (hubs->lineout1_se)
1221 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1222
1223 if (hubs->lineout2_se)
1224 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
1225
1226 /* Enable the line outputs while we power up */
1227 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
1228}
1229EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
1230
1231void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
1232 enum snd_soc_bias_level level)
1233{
1234 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
de050aca 1235 int mask, val;
5f2f3890
MB		 1236
1237 switch (level) {
d60d6c3b
MB		 1238 case SND_SOC_BIAS_STANDBY:
1239 /* Clamp the inputs to VMID while we ramp to charge caps */
1240 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1241 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
1242 break;
1243
5f2f3890
MB		 1244 case SND_SOC_BIAS_ON:
1245 /* Turn off any unneded single ended outputs */
1246 val = 0;
de050aca
MB		 1247 mask = 0;
1248
1249 if (hubs->lineout1_se)
1250 mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1251
1252 if (hubs->lineout2_se)
1253 mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
5f2f3890
MB		 1254
1255 if (hubs->lineout1_se && hubs->lineout1n_ena)
1256 val |= WM8993_LINEOUT1N_ENA;
1257
1258 if (hubs->lineout1_se && hubs->lineout1p_ena)
1259 val |= WM8993_LINEOUT1P_ENA;
1260
1261 if (hubs->lineout2_se && hubs->lineout2n_ena)
1262 val |= WM8993_LINEOUT2N_ENA;
1263
1264 if (hubs->lineout2_se && hubs->lineout2p_ena)
1265 val |= WM8993_LINEOUT2P_ENA;
1266
1267 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
de050aca 1268 mask, val);
5f2f3890 1269
d60d6c3b
MB		 1270 /* Remove the input clamps */
1271 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1272 WM8993_INPUTS_CLAMP, 0);
5f2f3890
MB		 1273 break;
1274
1275 default:
1276 break;
1277 }
1278}
1279EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
1280
a2342ae3
MB		 1281MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
1282MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1283MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)