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ASoC: WM8903: Create default platform data structure
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm9090.c
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39b8eab7
MB		 1/*
2 * ALSA SoC WM9090 driver
3 *
4 * Copyright 2009, 2010 Wolfson Microelectronics
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 */
22
23#include <linux/module.h>
24#include <linux/errno.h>
25#include <linux/device.h>
26#include <linux/i2c.h>
27#include <linux/delay.h>
28#include <linux/slab.h>
29#include <sound/initval.h>
30#include <sound/soc.h>
39b8eab7
MB		 31#include <sound/tlv.h>
32#include <sound/wm9090.h>
33
34#include "wm9090.h"
35
39b8eab7
MB		 36static const u16 wm9090_reg_defaults[] = {
37 0x9093, /* R0 - Software Reset */
38 0x0006, /* R1 - Power Management (1) */
39 0x6000, /* R2 - Power Management (2) */
40 0x0000, /* R3 - Power Management (3) */
41 0x0000, /* R4 */
42 0x0000, /* R5 */
43 0x01C0, /* R6 - Clocking 1 */
44 0x0000, /* R7 */
45 0x0000, /* R8 */
46 0x0000, /* R9 */
47 0x0000, /* R10 */
48 0x0000, /* R11 */
49 0x0000, /* R12 */
50 0x0000, /* R13 */
51 0x0000, /* R14 */
52 0x0000, /* R15 */
53 0x0000, /* R16 */
54 0x0000, /* R17 */
55 0x0000, /* R18 */
56 0x0000, /* R19 */
57 0x0000, /* R20 */
58 0x0000, /* R21 */
59 0x0003, /* R22 - IN1 Line Control */
60 0x0003, /* R23 - IN2 Line Control */
61 0x0083, /* R24 - IN1 Line Input A Volume */
62 0x0083, /* R25 - IN1 Line Input B Volume */
63 0x0083, /* R26 - IN2 Line Input A Volume */
64 0x0083, /* R27 - IN2 Line Input B Volume */
65 0x002D, /* R28 - Left Output Volume */
66 0x002D, /* R29 - Right Output Volume */
67 0x0000, /* R30 */
68 0x0000, /* R31 */
69 0x0000, /* R32 */
70 0x0000, /* R33 */
71 0x0100, /* R34 - SPKMIXL Attenuation */
72 0x0000, /* R35 */
73 0x0010, /* R36 - SPKOUT Mixers */
74 0x0140, /* R37 - ClassD3 */
75 0x0039, /* R38 - Speaker Volume Left */
76 0x0000, /* R39 */
77 0x0000, /* R40 */
78 0x0000, /* R41 */
79 0x0000, /* R42 */
80 0x0000, /* R43 */
81 0x0000, /* R44 */
82 0x0000, /* R45 - Output Mixer1 */
83 0x0000, /* R46 - Output Mixer2 */
84 0x0100, /* R47 - Output Mixer3 */
85 0x0100, /* R48 - Output Mixer4 */
86 0x0000, /* R49 */
87 0x0000, /* R50 */
88 0x0000, /* R51 */
89 0x0000, /* R52 */
90 0x0000, /* R53 */
91 0x0000, /* R54 - Speaker Mixer */
92 0x0000, /* R55 */
93 0x0000, /* R56 */
94 0x000D, /* R57 - AntiPOP2 */
95 0x0000, /* R58 */
96 0x0000, /* R59 */
97 0x0000, /* R60 */
98 0x0000, /* R61 */
99 0x0000, /* R62 */
100 0x0000, /* R63 */
101 0x0000, /* R64 */
102 0x0000, /* R65 */
103 0x0000, /* R66 */
104 0x0000, /* R67 */
105 0x0000, /* R68 */
106 0x0000, /* R69 */
107 0x0000, /* R70 - Write Sequencer 0 */
108 0x0000, /* R71 - Write Sequencer 1 */
109 0x0000, /* R72 - Write Sequencer 2 */
110 0x0000, /* R73 - Write Sequencer 3 */
111 0x0000, /* R74 - Write Sequencer 4 */
112 0x0000, /* R75 - Write Sequencer 5 */
113 0x1F25, /* R76 - Charge Pump 1 */
114 0x0000, /* R77 */
115 0x0000, /* R78 */
116 0x0000, /* R79 */
117 0x0000, /* R80 */
118 0x0000, /* R81 */
119 0x0000, /* R82 */
120 0x0000, /* R83 */
121 0x0000, /* R84 - DC Servo 0 */
122 0x054A, /* R85 - DC Servo 1 */
123 0x0000, /* R86 */
124 0x0000, /* R87 - DC Servo 3 */
125 0x0000, /* R88 - DC Servo Readback 0 */
126 0x0000, /* R89 - DC Servo Readback 1 */
127 0x0000, /* R90 - DC Servo Readback 2 */
128 0x0000, /* R91 */
129 0x0000, /* R92 */
130 0x0000, /* R93 */
131 0x0000, /* R94 */
132 0x0000, /* R95 */
133 0x0100, /* R96 - Analogue HP 0 */
134 0x0000, /* R97 */
135 0x8640, /* R98 - AGC Control 0 */
136 0xC000, /* R99 - AGC Control 1 */
137 0x0200, /* R100 - AGC Control 2 */
138};
139
140/* This struct is used to save the context */
141struct wm9090_priv {
39b8eab7
MB		 142 struct wm9090_platform_data pdata;
143};
144
d4754ec9 145static int wm9090_volatile(struct snd_soc_codec *codec, unsigned int reg)
39b8eab7
MB		 146{
147 switch (reg) {
148 case WM9090_SOFTWARE_RESET:
149 case WM9090_DC_SERVO_0:
150 case WM9090_DC_SERVO_READBACK_0:
151 case WM9090_DC_SERVO_READBACK_1:
152 case WM9090_DC_SERVO_READBACK_2:
153 return 1;
154
155 default:
156 return 0;
157 }
158}
159
160static void wait_for_dc_servo(struct snd_soc_codec *codec)
161{
162 unsigned int reg;
163 int count = 0;
164
165 dev_dbg(codec->dev, "Waiting for DC servo...\n");
166 do {
167 count++;
168 msleep(1);
169 reg = snd_soc_read(codec, WM9090_DC_SERVO_READBACK_0);
170 dev_dbg(codec->dev, "DC servo status: %x\n", reg);
171 } while ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
172 != WM9090_DCS_CAL_COMPLETE_MASK && count < 1000);
173
174 if ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
175 != WM9090_DCS_CAL_COMPLETE_MASK)
176 dev_err(codec->dev, "Timed out waiting for DC Servo\n");
177}
178
179static const unsigned int in_tlv[] = {
a1320fee 180 TLV_DB_RANGE_HEAD(3),
39b8eab7
MB		 181 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0),
182 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0),
183 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0),
184};
185static const unsigned int mix_tlv[] = {
a1320fee 186 TLV_DB_RANGE_HEAD(2),
39b8eab7
MB		 187 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0),
188 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0),
189};
190static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
191static const unsigned int spkboost_tlv[] = {
a1320fee 192 TLV_DB_RANGE_HEAD(2),
39b8eab7
MB		 193 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
194 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
195};
196
197static const struct snd_kcontrol_new wm9090_controls[] = {
198SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_INPUT_A_VOLUME, 0, 6, 0,
199 in_tlv),
200SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 7, 1, 1),
201SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 6, 1, 0),
202
203SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_INPUT_A_VOLUME, 0, 6, 0,
204 in_tlv),
205SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 7, 1, 1),
206SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 6, 1, 0),
207
208SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIXER3, 8, 1, 1),
209SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_OUTPUT_MIXER3, 6, 3, 1,
210 mix_tlv),
211SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_OUTPUT_MIXER3, 2, 3, 1,
212 mix_tlv),
213
214SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIXER4, 8, 1, 1),
215SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_OUTPUT_MIXER4, 6, 3, 1,
216 mix_tlv),
217SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_OUTPUT_MIXER4, 2, 3, 1,
218 mix_tlv),
219
220SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATTENUATION, 8, 1, 1),
221SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SPKMIXL_ATTENUATION, 6, 3, 1,
222 mix_tlv),
223SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SPKMIXL_ATTENUATION, 2, 3, 1,
224 mix_tlv),
225
226SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LEFT_OUTPUT_VOLUME,
227 WM9090_RIGHT_OUTPUT_VOLUME, 0, 63, 0, out_tlv),
228SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_OUTPUT_VOLUME,
229 WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 1),
230SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEFT_OUTPUT_VOLUME,
231 WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
232
233SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKER_VOLUME_LEFT, 0, 63, 0,
234 out_tlv),
235SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VOLUME_LEFT, 6, 1, 1),
236SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER_VOLUME_LEFT, 7, 1, 0),
237SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_CLASSD3, 3, 7, 0, spkboost_tlv),
238};
239
240static const struct snd_kcontrol_new wm9090_in1_se_controls[] = {
241SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_INPUT_B_VOLUME, 0, 6, 0,
242 in_tlv),
243SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 7, 1, 1),
244SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 6, 1, 0),
245
246SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SPKMIXL_ATTENUATION, 4, 3, 1,
247 mix_tlv),
248SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_OUTPUT_MIXER3, 4, 3, 1,
249 mix_tlv),
250SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_OUTPUT_MIXER4, 4, 3, 1,
251 mix_tlv),
252};
253
254static const struct snd_kcontrol_new wm9090_in2_se_controls[] = {
255SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_INPUT_B_VOLUME, 0, 6, 0,
256 in_tlv),
257SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 7, 1, 1),
258SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 6, 1, 0),
259
260SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SPKMIXL_ATTENUATION, 0, 3, 1,
261 mix_tlv),
262SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_OUTPUT_MIXER3, 0, 3, 1,
263 mix_tlv),
264SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_OUTPUT_MIXER4, 0, 3, 1,
265 mix_tlv),
266};
267
268static int hp_ev(struct snd_soc_dapm_widget *w,
269 struct snd_kcontrol *kcontrol, int event)
270{
271 struct snd_soc_codec *codec = w->codec;
272 unsigned int reg = snd_soc_read(codec, WM9090_ANALOGUE_HP_0);
273
274 switch (event) {
275 case SND_SOC_DAPM_POST_PMU:
276 snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
277 WM9090_CP_ENA, WM9090_CP_ENA);
278
279 msleep(5);
280
281 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
282 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
283 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA);
284
285 reg |= WM9090_HPOUT1L_DLY | WM9090_HPOUT1R_DLY;
286 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
287
288 /* Start the DC servo. We don't currently use the
289 * ability to save the state since we don't have full
290 * control of the analogue paths and they can change
291 * DC offsets; see the WM8904 driver for an example of
292 * doing so.
293 */
294 snd_soc_write(codec, WM9090_DC_SERVO_0,
295 WM9090_DCS_ENA_CHAN_0 |
296 WM9090_DCS_ENA_CHAN_1 |
297 WM9090_DCS_TRIG_STARTUP_1 |
298 WM9090_DCS_TRIG_STARTUP_0);
299 wait_for_dc_servo(codec);
300
301 reg |= WM9090_HPOUT1R_OUTP | WM9090_HPOUT1R_RMV_SHORT |
302 WM9090_HPOUT1L_OUTP | WM9090_HPOUT1L_RMV_SHORT;
303 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
304 break;
305
306 case SND_SOC_DAPM_PRE_PMD:
307 reg &= ~(WM9090_HPOUT1L_RMV_SHORT |
308 WM9090_HPOUT1L_DLY |
309 WM9090_HPOUT1L_OUTP |
310 WM9090_HPOUT1R_RMV_SHORT |
311 WM9090_HPOUT1R_DLY |
312 WM9090_HPOUT1R_OUTP);
313
314 snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
315
316 snd_soc_write(codec, WM9090_DC_SERVO_0, 0);
317
318 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
319 WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
320 0);
321
322 snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
323 WM9090_CP_ENA, 0);
324 break;
325 }
326
327 return 0;
328}
329
330static const struct snd_kcontrol_new spkmix[] = {
331SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_MIXER, 6, 1, 0),
332SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_MIXER, 4, 1, 0),
333SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_MIXER, 2, 1, 0),
334SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_MIXER, 0, 1, 0),
335};
336
337static const struct snd_kcontrol_new spkout[] = {
338SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_MIXERS, 4, 1, 0),
339};
340
341static const struct snd_kcontrol_new mixoutl[] = {
342SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER1, 6, 1, 0),
343SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER1, 4, 1, 0),
344SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER1, 2, 1, 0),
345SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER1, 0, 1, 0),
346};
347
348static const struct snd_kcontrol_new mixoutr[] = {
349SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER2, 6, 1, 0),
350SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER2, 4, 1, 0),
351SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER2, 2, 1, 0),
352SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER2, 0, 1, 0),
353};
354
355static const struct snd_soc_dapm_widget wm9090_dapm_widgets[] = {
356SND_SOC_DAPM_INPUT("IN1+"),
357SND_SOC_DAPM_INPUT("IN1-"),
358SND_SOC_DAPM_INPUT("IN2+"),
359SND_SOC_DAPM_INPUT("IN2-"),
360
361SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGEMENT_1, 3, 0, NULL, 0),
362
363SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANAGEMENT_2, 7, 0, NULL, 0),
364SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANAGEMENT_2, 6, 0, NULL, 0),
365SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
366SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
367
368SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANAGEMENT_3, 3, 0,
369 spkmix, ARRAY_SIZE(spkmix)),
370SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MANAGEMENT_3, 5, 0,
371 mixoutl, ARRAY_SIZE(mixoutl)),
372SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MANAGEMENT_3, 4, 0,
373 mixoutr, ARRAY_SIZE(mixoutr)),
374
375SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
376 hp_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
377
378SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGEMENT_3, 8, 0, NULL, 0),
379SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANAGEMENT_1, 12, 0,
380 spkout, ARRAY_SIZE(spkout)),
381
382SND_SOC_DAPM_OUTPUT("HPR"),
383SND_SOC_DAPM_OUTPUT("HPL"),
384SND_SOC_DAPM_OUTPUT("Speaker"),
385};
386
387static const struct snd_soc_dapm_route audio_map[] = {
388 { "IN1A PGA", NULL, "IN1+" },
389 { "IN2A PGA", NULL, "IN2+" },
390
391 { "SPKMIX", "IN1A Switch", "IN1A PGA" },
392 { "SPKMIX", "IN2A Switch", "IN2A PGA" },
393
394 { "MIXOUTL", "IN1A Switch", "IN1A PGA" },
395 { "MIXOUTL", "IN2A Switch", "IN2A PGA" },
396
397 { "MIXOUTR", "IN1A Switch", "IN1A PGA" },
398 { "MIXOUTR", "IN2A Switch", "IN2A PGA" },
399
400 { "HP PGA", NULL, "OSC" },
401 { "HP PGA", NULL, "MIXOUTL" },
402 { "HP PGA", NULL, "MIXOUTR" },
403
404 { "HPL", NULL, "HP PGA" },
405 { "HPR", NULL, "HP PGA" },
406
407 { "SPKPGA", NULL, "OSC" },
408 { "SPKPGA", NULL, "SPKMIX" },
409
410 { "SPKOUT", "Mixer Switch", "SPKPGA" },
411
412 { "Speaker", NULL, "SPKOUT" },
413};
414
415static const struct snd_soc_dapm_route audio_map_in1_se[] = {
416 { "IN1B PGA", NULL, "IN1-" },
417
418 { "SPKMIX", "IN1B Switch", "IN1B PGA" },
419 { "MIXOUTL", "IN1B Switch", "IN1B PGA" },
420 { "MIXOUTR", "IN1B Switch", "IN1B PGA" },
421};
422
423static const struct snd_soc_dapm_route audio_map_in1_diff[] = {
424 { "IN1A PGA", NULL, "IN1-" },
425};
426
427static const struct snd_soc_dapm_route audio_map_in2_se[] = {
428 { "IN2B PGA", NULL, "IN2-" },
429
430 { "SPKMIX", "IN2B Switch", "IN2B PGA" },
431 { "MIXOUTL", "IN2B Switch", "IN2B PGA" },
432 { "MIXOUTR", "IN2B Switch", "IN2B PGA" },
433};
434
435static const struct snd_soc_dapm_route audio_map_in2_diff[] = {
436 { "IN2A PGA", NULL, "IN2-" },
437};
438
439static int wm9090_add_controls(struct snd_soc_codec *codec)
440{
441 struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
ce6120cc 442 struct snd_soc_dapm_context *dapm = &codec->dapm;
39b8eab7
MB		 443 int i;
444
ce6120cc 445 snd_soc_dapm_new_controls(dapm, wm9090_dapm_widgets,
39b8eab7
MB		 446 ARRAY_SIZE(wm9090_dapm_widgets));
447
ce6120cc 448 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
39b8eab7
MB		 449
450 snd_soc_add_controls(codec, wm9090_controls,
451 ARRAY_SIZE(wm9090_controls));
452
453 if (wm9090->pdata.lin1_diff) {
ce6120cc 454 snd_soc_dapm_add_routes(dapm, audio_map_in1_diff,
39b8eab7
MB		 455 ARRAY_SIZE(audio_map_in1_diff));
456 } else {
ce6120cc 457 snd_soc_dapm_add_routes(dapm, audio_map_in1_se,
39b8eab7
MB		 458 ARRAY_SIZE(audio_map_in1_se));
459 snd_soc_add_controls(codec, wm9090_in1_se_controls,
460 ARRAY_SIZE(wm9090_in1_se_controls));
461 }
462
463 if (wm9090->pdata.lin2_diff) {
ce6120cc 464 snd_soc_dapm_add_routes(dapm, audio_map_in2_diff,
39b8eab7
MB		 465 ARRAY_SIZE(audio_map_in2_diff));
466 } else {
ce6120cc 467 snd_soc_dapm_add_routes(dapm, audio_map_in2_se,
39b8eab7
MB		 468 ARRAY_SIZE(audio_map_in2_se));
469 snd_soc_add_controls(codec, wm9090_in2_se_controls,
470 ARRAY_SIZE(wm9090_in2_se_controls));
471 }
472
473 if (wm9090->pdata.agc_ena) {
474 for (i = 0; i < ARRAY_SIZE(wm9090->pdata.agc); i++)
475 snd_soc_write(codec, WM9090_AGC_CONTROL_0 + i,
476 wm9090->pdata.agc[i]);
477 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
478 WM9090_AGC_ENA, WM9090_AGC_ENA);
479 } else {
480 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
481 WM9090_AGC_ENA, 0);
482 }
483
484 return 0;
485
486}
487
488/*
489 * The machine driver should call this from their set_bias_level; if there
490 * isn't one then this can just be set as the set_bias_level function.
491 */
492static int wm9090_set_bias_level(struct snd_soc_codec *codec,
493 enum snd_soc_bias_level level)
494{
495 u16 *reg_cache = codec->reg_cache;
496 int i, ret;
497
498 switch (level) {
499 case SND_SOC_BIAS_ON:
500 break;
501
502 case SND_SOC_BIAS_PREPARE:
503 snd_soc_update_bits(codec, WM9090_ANTIPOP2, WM9090_VMID_ENA,
504 WM9090_VMID_ENA);
505 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
506 WM9090_BIAS_ENA |
507 WM9090_VMID_RES_MASK,
508 WM9090_BIAS_ENA |
509 1 << WM9090_VMID_RES_SHIFT);
510 msleep(1); /* Probably an overestimate */
511 break;
512
513 case SND_SOC_BIAS_STANDBY:
ce6120cc 514 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
39b8eab7 515 /* Restore the register cache */
f0fba2ad 516 for (i = 1; i < codec->driver->reg_cache_size; i++) {
39b8eab7
MB		 517 if (reg_cache[i] == wm9090_reg_defaults[i])
518 continue;
d4754ec9 519 if (wm9090_volatile(codec, i))
39b8eab7
MB		 520 continue;
521
522 ret = snd_soc_write(codec, i, reg_cache[i]);
523 if (ret != 0)
524 dev_warn(codec->dev,
525 "Failed to restore register %d: %d\n",
526 i, ret);
527 }
528 }
529
530 /* We keep VMID off during standby since the combination of
531 * ground referenced outputs and class D speaker mean that
532 * latency is not an issue.
533 */
534 snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
535 WM9090_BIAS_ENA | WM9090_VMID_RES_MASK, 0);
536 snd_soc_update_bits(codec, WM9090_ANTIPOP2,
537 WM9090_VMID_ENA, 0);
538 break;
539
540 case SND_SOC_BIAS_OFF:
541 break;
542 }
543
ce6120cc 544 codec->dapm.bias_level = level;
39b8eab7
MB		 545
546 return 0;
547}
548
f0fba2ad 549static int wm9090_probe(struct snd_soc_codec *codec)
39b8eab7 550{
f0fba2ad 551 int ret;
39b8eab7 552
f0fba2ad
LG		 553 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
554 if (ret != 0) {
555 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
556 return ret;
39b8eab7
MB		 557 }
558
f0fba2ad
LG		 559 ret = snd_soc_read(codec, WM9090_SOFTWARE_RESET);
560 if (ret < 0)
561 return ret;
562 if (ret != wm9090_reg_defaults[WM9090_SOFTWARE_RESET]) {
563 dev_err(codec->dev, "Device is not a WM9090, ID=%x\n", ret);
564 return -EINVAL;
39b8eab7
MB		 565 }
566
f0fba2ad
LG		 567 ret = snd_soc_write(codec, WM9090_SOFTWARE_RESET, 0);
568 if (ret < 0)
569 return ret;
570
571 /* Configure some defaults; they will be written out when we
572 * bring the bias up.
573 */
a1b3b5ee
MB		 574 snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_A_VOLUME,
575 WM9090_IN1_VU | WM9090_IN1A_ZC,
576 WM9090_IN1_VU | WM9090_IN1A_ZC);
577 snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_B_VOLUME,
578 WM9090_IN1_VU | WM9090_IN1B_ZC,
579 WM9090_IN1_VU | WM9090_IN1B_ZC);
580 snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_A_VOLUME,
581 WM9090_IN2_VU | WM9090_IN2A_ZC,
582 WM9090_IN2_VU | WM9090_IN2A_ZC);
583 snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_B_VOLUME,
584 WM9090_IN2_VU | WM9090_IN2B_ZC,
585 WM9090_IN2_VU | WM9090_IN2B_ZC);
586 snd_soc_update_bits(codec, WM9090_SPEAKER_VOLUME_LEFT,
587 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC,
588 WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC);
589 snd_soc_update_bits(codec, WM9090_LEFT_OUTPUT_VOLUME,
590 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC,
591 WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC);
592 snd_soc_update_bits(codec, WM9090_RIGHT_OUTPUT_VOLUME,
593 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC,
594 WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC);
595
596 snd_soc_update_bits(codec, WM9090_CLOCKING_1,
597 WM9090_TOCLK_ENA, WM9090_TOCLK_ENA);
f0fba2ad
LG		 598
599 wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
600
39b8eab7
MB		 601 wm9090_add_controls(codec);
602
603 return 0;
39b8eab7
MB		 604}
605
606#ifdef CONFIG_PM
84b315ee 607static int wm9090_suspend(struct snd_soc_codec *codec)
39b8eab7 608{
39b8eab7
MB		 609 wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF);
610
611 return 0;
612}
613
f0fba2ad 614static int wm9090_resume(struct snd_soc_codec *codec)
39b8eab7 615{
39b8eab7
MB		 616 wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
617
618 return 0;
619}
620#else
621#define wm9090_suspend NULL
622#define wm9090_resume NULL
623#endif
624
f0fba2ad 625static int wm9090_remove(struct snd_soc_codec *codec)
39b8eab7 626{
f0fba2ad 627 wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF);
39b8eab7
MB		 628
629 return 0;
630}
631
f0fba2ad 632static struct snd_soc_codec_driver soc_codec_dev_wm9090 = {
39b8eab7
MB		 633 .probe = wm9090_probe,
634 .remove = wm9090_remove,
635 .suspend = wm9090_suspend,
636 .resume = wm9090_resume,
f0fba2ad
LG		 637 .set_bias_level = wm9090_set_bias_level,
638 .reg_cache_size = (WM9090_MAX_REGISTER + 1),
639 .reg_word_size = sizeof(u16),
640 .reg_cache_default = wm9090_reg_defaults,
641 .volatile_register = wm9090_volatile,
39b8eab7 642};
39b8eab7
MB		 643
644static int wm9090_i2c_probe(struct i2c_client *i2c,
645 const struct i2c_device_id *id)
646{
647 struct wm9090_priv *wm9090;
39b8eab7
MB		 648 int ret;
649
650 wm9090 = kzalloc(sizeof(*wm9090), GFP_KERNEL);
651 if (wm9090 == NULL) {
652 dev_err(&i2c->dev, "Can not allocate memory\n");
653 return -ENOMEM;
654 }
39b8eab7
MB		 655
656 if (i2c->dev.platform_data)
657 memcpy(&wm9090->pdata, i2c->dev.platform_data,
658 sizeof(wm9090->pdata));
659
39b8eab7
MB		 660 i2c_set_clientdata(i2c, wm9090);
661
f0fba2ad
LG		 662 ret = snd_soc_register_codec(&i2c->dev,
663 &soc_codec_dev_wm9090, NULL, 0);
39b8eab7 664 if (ret < 0)
f0fba2ad 665 kfree(wm9090);
39b8eab7
MB		 666 return ret;
667}
668
0d040df9 669static int __devexit wm9090_i2c_remove(struct i2c_client *i2c)
39b8eab7
MB		 670{
671 struct wm9090_priv *wm9090 = i2c_get_clientdata(i2c);
39b8eab7 672
f0fba2ad 673 snd_soc_unregister_codec(&i2c->dev);
39b8eab7 674 kfree(wm9090);
39b8eab7
MB		 675
676 return 0;
677}
678
679static const struct i2c_device_id wm9090_id[] = {
680 { "wm9090", 0 },
644f1ff4 681 { "wm9093", 0 },
39b8eab7
MB		 682 { }
683};
684MODULE_DEVICE_TABLE(i2c, wm9090_id);
685
686static struct i2c_driver wm9090_i2c_driver = {
687 .driver = {
f0fba2ad 688 .name = "wm9090-codec",
39b8eab7
MB		 689 .owner = THIS_MODULE,
690 },
691 .probe = wm9090_i2c_probe,
692 .remove = __devexit_p(wm9090_i2c_remove),
693 .id_table = wm9090_id,
694};
695
696static int __init wm9090_init(void)
697{
698 return i2c_add_driver(&wm9090_i2c_driver);
699}
700module_init(wm9090_init);
701
702static void __exit wm9090_exit(void)
703{
704 i2c_del_driver(&wm9090_i2c_driver);
705}
706module_exit(wm9090_exit);
707
708MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
709MODULE_DESCRIPTION("WM9090 ASoC driver");
710MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)