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ASoC: Decouple DAPM from CODECs
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / wm8940.c
CommitLineData
0b5e92c5
JC		 1/*
2 * wm8940.c -- WM8940 ALSA Soc Audio driver
3 *
4 * Author: Jonathan Cameron <jic23@cam.ac.uk>
5 *
6 * Based on wm8510.c
7 * Copyright 2006 Wolfson Microelectronics PLC.
8 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Not currently handled:
15 * Notch filter control
16 * AUXMode (inverting vs mixer)
17 * No means to obtain current gain if alc enabled.
18 * No use made of gpio
19 * Fast VMID discharge for power down
20 * Soft Start
21 * DLR and ALR Swaps not enabled
22 * Digital Sidetone not supported
23 */
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/kernel.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <linux/i2c.h>
31#include <linux/platform_device.h>
32#include <linux/spi/spi.h>
5a0e3ad6 33#include <linux/slab.h>
0b5e92c5
JC		 34#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
38#include <sound/soc-dapm.h>
39#include <sound/initval.h>
40#include <sound/tlv.h>
41
42#include "wm8940.h"
43
44struct wm8940_priv {
45 unsigned int sysclk;
46 u16 reg_cache[WM8940_CACHEREGNUM];
f0fba2ad
LG		 47 enum snd_soc_control_type control_type;
48 void *control_data;
0b5e92c5
JC		 49};
50
51static u16 wm8940_reg_defaults[] = {
52 0x8940, /* Soft Reset */
53 0x0000, /* Power 1 */
54 0x0000, /* Power 2 */
55 0x0000, /* Power 3 */
56 0x0010, /* Interface Control */
57 0x0000, /* Companding Control */
58 0x0140, /* Clock Control */
59 0x0000, /* Additional Controls */
60 0x0000, /* GPIO Control */
61 0x0002, /* Auto Increment Control */
62 0x0000, /* DAC Control */
63 0x00FF, /* DAC Volume */
64 0,
65 0,
66 0x0100, /* ADC Control */
67 0x00FF, /* ADC Volume */
68 0x0000, /* Notch Filter 1 Control 1 */
69 0x0000, /* Notch Filter 1 Control 2 */
70 0x0000, /* Notch Filter 2 Control 1 */
71 0x0000, /* Notch Filter 2 Control 2 */
72 0x0000, /* Notch Filter 3 Control 1 */
73 0x0000, /* Notch Filter 3 Control 2 */
74 0x0000, /* Notch Filter 4 Control 1 */
75 0x0000, /* Notch Filter 4 Control 2 */
76 0x0032, /* DAC Limit Control 1 */
77 0x0000, /* DAC Limit Control 2 */
78 0,
79 0,
80 0,
81 0,
82 0,
83 0,
84 0x0038, /* ALC Control 1 */
85 0x000B, /* ALC Control 2 */
86 0x0032, /* ALC Control 3 */
87 0x0000, /* Noise Gate */
88 0x0041, /* PLLN */
89 0x000C, /* PLLK1 */
90 0x0093, /* PLLK2 */
91 0x00E9, /* PLLK3 */
92 0,
93 0,
94 0x0030, /* ALC Control 4 */
95 0,
96 0x0002, /* Input Control */
97 0x0050, /* PGA Gain */
98 0,
99 0x0002, /* ADC Boost Control */
100 0,
101 0x0002, /* Output Control */
102 0x0000, /* Speaker Mixer Control */
103 0,
104 0,
105 0,
106 0x0079, /* Speaker Volume */
107 0,
108 0x0000, /* Mono Mixer Control */
109};
110
0b5e92c5
JC		 111static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
112static const struct soc_enum wm8940_adc_companding_enum
113= SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 1, 4, wm8940_companding);
114static const struct soc_enum wm8940_dac_companding_enum
115= SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 3, 4, wm8940_companding);
116
117static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
118static const struct soc_enum wm8940_alc_mode_enum
119= SOC_ENUM_SINGLE(WM8940_ALC3, 8, 2, wm8940_alc_mode_text);
120
121static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
122static const struct soc_enum wm8940_mic_bias_level_enum
123= SOC_ENUM_SINGLE(WM8940_INPUTCTL, 8, 2, wm8940_mic_bias_level_text);
124
125static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
126static const struct soc_enum wm8940_filter_mode_enum
127= SOC_ENUM_SINGLE(WM8940_ADC, 7, 2, wm8940_filter_mode_text);
128
6be01cfb
MB		 129static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
130static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
131static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
132static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
133static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
134static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
135static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
136static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
137static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
138static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
0b5e92c5
JC		 139
140static const struct snd_kcontrol_new wm8940_snd_controls[] = {
141 SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
142 6, 1, 0),
143 SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
144 SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
145
146 SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
147 SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
148 SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
149 3, 7, 1, wm8940_alc_max_tlv),
150 SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
151 0, 7, 0, wm8940_alc_min_tlv),
152 SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
153 0, 14, 0, wm8940_alc_tar_tlv),
154 SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
155 SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
156 SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
157 SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
158 SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
159 3, 1, 0),
160 SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
161 0, 7, 0),
162
163 SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
164 SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
165 SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
166 SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
167 4, 9, 1, wm8940_lim_thresh_tlv),
168 SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
169 0, 12, 0, wm8940_lim_boost_tlv),
170
171 SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
172 SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
173 0, 63, 0, wm8940_pga_vol_tlv),
174 SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
175 0, 255, 0, wm8940_adc_tlv),
176 SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
177 0, 255, 0, wm8940_adc_tlv),
178 SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
179 SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
180 8, 1, 0, wm8940_capture_boost_vol_tlv),
181 SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
182 0, 63, 0, wm8940_spk_vol_tlv),
183 SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1),
184
185 SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
186 8, 1, 1, wm8940_att_tlv),
187 SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
188
189 SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
190 SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
191 7, 1, 1, wm8940_att_tlv),
192
193 SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
194 SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
195 SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
196 SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
197 SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
198 SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
199 SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
200};
201
202static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
203 SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
204 SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
205 SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
206};
207
208static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
209 SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
210 SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
211 SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
212};
213
6be01cfb 214static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
0b5e92c5
JC		 215static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
216 SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
217 SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
218 0, 7, 0, wm8940_boost_vol_tlv),
219 SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
220 4, 7, 0, wm8940_boost_vol_tlv),
221};
222
223static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
224 SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
225 SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
226 SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
227};
228
229static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
230 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
231 &wm8940_speaker_mixer_controls[0],
232 ARRAY_SIZE(wm8940_speaker_mixer_controls)),
233 SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
234 &wm8940_mono_mixer_controls[0],
235 ARRAY_SIZE(wm8940_mono_mixer_controls)),
236 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
237
238 SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
239 SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
240 SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
241 SND_SOC_DAPM_OUTPUT("MONOOUT"),
242 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
243 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
244
245 SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
246 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
247 SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
248 &wm8940_micpga_controls[0],
249 ARRAY_SIZE(wm8940_micpga_controls)),
250 SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
251 &wm8940_input_boost_controls[0],
252 ARRAY_SIZE(wm8940_input_boost_controls)),
253 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
254
255 SND_SOC_DAPM_INPUT("MICN"),
256 SND_SOC_DAPM_INPUT("MICP"),
257 SND_SOC_DAPM_INPUT("AUX"),
258};
259
260static const struct snd_soc_dapm_route audio_map[] = {
261 /* Mono output mixer */
262 {"Mono Mixer", "PCM Playback Switch", "DAC"},
263 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
264 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
265
266 /* Speaker output mixer */
267 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
268 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
269 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
270
271 /* Outputs */
272 {"Mono Out", NULL, "Mono Mixer"},
273 {"MONOOUT", NULL, "Mono Out"},
274 {"SpkN Out", NULL, "Speaker Mixer"},
275 {"SpkP Out", NULL, "Speaker Mixer"},
276 {"SPKOUTN", NULL, "SpkN Out"},
277 {"SPKOUTP", NULL, "SpkP Out"},
278
279 /* Microphone PGA */
280 {"Mic PGA", "MICN Switch", "MICN"},
281 {"Mic PGA", "MICP Switch", "MICP"},
282 {"Mic PGA", "AUX Switch", "AUX"},
283
284 /* Boost Mixer */
285 {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
286 {"Boost Mixer", "Mic Volume", "MICP"},
287 {"Boost Mixer", "Aux Volume", "Aux Input"},
288
289 {"ADC", NULL, "Boost Mixer"},
290};
291
292static int wm8940_add_widgets(struct snd_soc_codec *codec)
293{
ce6120cc 294 struct snd_soc_dapm_context *dapm = &codec->dapm;
0b5e92c5
JC		 295 int ret;
296
ce6120cc 297 ret = snd_soc_dapm_new_controls(dapm, wm8940_dapm_widgets,
0b5e92c5
JC		 298 ARRAY_SIZE(wm8940_dapm_widgets));
299 if (ret)
300 goto error_ret;
ce6120cc 301 ret = snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
0b5e92c5
JC		 302 if (ret)
303 goto error_ret;
0b5e92c5
JC		 304
305error_ret:
306 return ret;
307}
308
8d50e447 309#define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0);
0b5e92c5
JC		 310
311static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
312 unsigned int fmt)
313{
314 struct snd_soc_codec *codec = codec_dai->codec;
8d50e447
MB		 315 u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67;
316 u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe;
0b5e92c5
JC		 317
318 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
319 case SND_SOC_DAIFMT_CBM_CFM:
320 clk |= 1;
321 break;
322 case SND_SOC_DAIFMT_CBS_CFS:
323 break;
324 default:
325 return -EINVAL;
326 }
8d50e447 327 snd_soc_write(codec, WM8940_CLOCK, clk);
0b5e92c5
JC		 328
329 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
330 case SND_SOC_DAIFMT_I2S:
331 iface |= (2 << 3);
332 break;
333 case SND_SOC_DAIFMT_LEFT_J:
334 iface |= (1 << 3);
335 break;
336 case SND_SOC_DAIFMT_RIGHT_J:
337 break;
338 case SND_SOC_DAIFMT_DSP_A:
339 iface |= (3 << 3);
340 break;
341 case SND_SOC_DAIFMT_DSP_B:
342 iface |= (3 << 3) | (1 << 7);
343 break;
344 }
345
346 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
347 case SND_SOC_DAIFMT_NB_NF:
348 break;
349 case SND_SOC_DAIFMT_NB_IF:
350 iface |= (1 << 7);
351 break;
352 case SND_SOC_DAIFMT_IB_NF:
353 iface |= (1 << 8);
354 break;
355 case SND_SOC_DAIFMT_IB_IF:
356 iface |= (1 << 8) | (1 << 7);
357 break;
358 }
359
8d50e447 360 snd_soc_write(codec, WM8940_IFACE, iface);
0b5e92c5
JC		 361
362 return 0;
363}
364
365static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
366 struct snd_pcm_hw_params *params,
367 struct snd_soc_dai *dai)
368{
369 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 370 struct snd_soc_codec *codec = rtd->codec;
8d50e447
MB		 371 u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F;
372 u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1;
373 u16 companding = snd_soc_read(codec,
0b5e92c5
JC		 374 WM8940_COMPANDINGCTL) & 0xFFDF;
375 int ret;
376
377 /* LoutR control */
378 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
379 && params_channels(params) == 2)
380 iface |= (1 << 9);
381
382 switch (params_rate(params)) {
b3172f22 383 case 8000:
0b5e92c5
JC		 384 addcntrl |= (0x5 << 1);
385 break;
b3172f22 386 case 11025:
0b5e92c5
JC		 387 addcntrl |= (0x4 << 1);
388 break;
b3172f22 389 case 16000:
0b5e92c5
JC		 390 addcntrl |= (0x3 << 1);
391 break;
b3172f22 392 case 22050:
0b5e92c5
JC		 393 addcntrl |= (0x2 << 1);
394 break;
b3172f22 395 case 32000:
0b5e92c5
JC		 396 addcntrl |= (0x1 << 1);
397 break;
b3172f22
GL		 398 case 44100:
399 case 48000:
0b5e92c5
JC		 400 break;
401 }
8d50e447 402 ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
0b5e92c5
JC		 403 if (ret)
404 goto error_ret;
405
406 switch (params_format(params)) {
407 case SNDRV_PCM_FORMAT_S8:
408 companding = companding | (1 << 5);
409 break;
410 case SNDRV_PCM_FORMAT_S16_LE:
411 break;
412 case SNDRV_PCM_FORMAT_S20_3LE:
413 iface |= (1 << 5);
414 break;
415 case SNDRV_PCM_FORMAT_S24_LE:
416 iface |= (2 << 5);
417 break;
418 case SNDRV_PCM_FORMAT_S32_LE:
419 iface |= (3 << 5);
420 break;
421 }
8d50e447 422 ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding);
0b5e92c5
JC		 423 if (ret)
424 goto error_ret;
8d50e447 425 ret = snd_soc_write(codec, WM8940_IFACE, iface);
0b5e92c5
JC		 426
427error_ret:
428 return ret;
429}
430
431static int wm8940_mute(struct snd_soc_dai *dai, int mute)
432{
433 struct snd_soc_codec *codec = dai->codec;
8d50e447 434 u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf;
0b5e92c5
JC		 435
436 if (mute)
437 mute_reg |= 0x40;
438
8d50e447 439 return snd_soc_write(codec, WM8940_DAC, mute_reg);
0b5e92c5
JC		 440}
441
442static int wm8940_set_bias_level(struct snd_soc_codec *codec,
443 enum snd_soc_bias_level level)
444{
445 u16 val;
8d50e447 446 u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0;
0b5e92c5
JC		 447 int ret = 0;
448
449 switch (level) {
450 case SND_SOC_BIAS_ON:
451 /* ensure bufioen and biasen */
452 pwr_reg |= (1 << 2) | (1 << 3);
453 /* Enable thermal shutdown */
8d50e447
MB		 454 val = snd_soc_read(codec, WM8940_OUTPUTCTL);
455 ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2);
0b5e92c5
JC		 456 if (ret)
457 break;
458 /* set vmid to 75k */
8d50e447 459 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
0b5e92c5
JC		 460 break;
461 case SND_SOC_BIAS_PREPARE:
462 /* ensure bufioen and biasen */
463 pwr_reg |= (1 << 2) | (1 << 3);
8d50e447 464 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
0b5e92c5
JC		 465 break;
466 case SND_SOC_BIAS_STANDBY:
467 /* ensure bufioen and biasen */
468 pwr_reg |= (1 << 2) | (1 << 3);
469 /* set vmid to 300k for standby */
8d50e447 470 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2);
0b5e92c5
JC		 471 break;
472 case SND_SOC_BIAS_OFF:
8d50e447 473 ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg);
0b5e92c5
JC		 474 break;
475 }
476
477 return ret;
478}
479
480struct pll_ {
481 unsigned int pre_scale:2;
482 unsigned int n:4;
483 unsigned int k;
484};
485
486static struct pll_ pll_div;
487
488/* The size in bits of the pll divide multiplied by 10
489 * to allow rounding later */
490#define FIXED_PLL_SIZE ((1 << 24) * 10)
491static void pll_factors(unsigned int target, unsigned int source)
492{
493 unsigned long long Kpart;
494 unsigned int K, Ndiv, Nmod;
495 /* The left shift ist to avoid accuracy loss when right shifting */
496 Ndiv = target / source;
497
498 if (Ndiv > 12) {
499 source <<= 1;
500 /* Multiply by 2 */
501 pll_div.pre_scale = 0;
502 Ndiv = target / source;
503 } else if (Ndiv < 3) {
504 source >>= 2;
505 /* Divide by 4 */
506 pll_div.pre_scale = 3;
507 Ndiv = target / source;
508 } else if (Ndiv < 6) {
509 source >>= 1;
510 /* divide by 2 */
511 pll_div.pre_scale = 2;
512 Ndiv = target / source;
513 } else
514 pll_div.pre_scale = 1;
515
516 if ((Ndiv < 6) || (Ndiv > 12))
517 printk(KERN_WARNING
518 "WM8940 N value %d outwith recommended range!d\n",
519 Ndiv);
520
521 pll_div.n = Ndiv;
522 Nmod = target % source;
523 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
524
525 do_div(Kpart, source);
526
527 K = Kpart & 0xFFFFFFFF;
528
529 /* Check if we need to round */
530 if ((K % 10) >= 5)
531 K += 5;
532
533 /* Move down to proper range now rounding is done */
534 K /= 10;
535
536 pll_div.k = K;
537}
538
539/* Untested at the moment */
85488037
MB		 540static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
541 int source, unsigned int freq_in, unsigned int freq_out)
0b5e92c5
JC		 542{
543 struct snd_soc_codec *codec = codec_dai->codec;
544 u16 reg;
545
546 /* Turn off PLL */
8d50e447
MB		 547 reg = snd_soc_read(codec, WM8940_POWER1);
548 snd_soc_write(codec, WM8940_POWER1, reg & 0x1df);
0b5e92c5
JC		 549
550 if (freq_in == 0 || freq_out == 0) {
551 /* Clock CODEC directly from MCLK */
8d50e447
MB		 552 reg = snd_soc_read(codec, WM8940_CLOCK);
553 snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff);
0b5e92c5 554 /* Pll power down */
8d50e447 555 snd_soc_write(codec, WM8940_PLLN, (1 << 7));
0b5e92c5
JC		 556 return 0;
557 }
558
559 /* Pll is followed by a frequency divide by 4 */
560 pll_factors(freq_out*4, freq_in);
561 if (pll_div.k)
8d50e447 562 snd_soc_write(codec, WM8940_PLLN,
0b5e92c5
JC		 563 (pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
564 else /* No factional component */
8d50e447 565 snd_soc_write(codec, WM8940_PLLN,
0b5e92c5 566 (pll_div.pre_scale << 4) | pll_div.n);
8d50e447
MB		 567 snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18);
568 snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
569 snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff);
0b5e92c5 570 /* Enable the PLL */
8d50e447
MB		 571 reg = snd_soc_read(codec, WM8940_POWER1);
572 snd_soc_write(codec, WM8940_POWER1, reg | 0x020);
0b5e92c5
JC		 573
574 /* Run CODEC from PLL instead of MCLK */
8d50e447
MB		 575 reg = snd_soc_read(codec, WM8940_CLOCK);
576 snd_soc_write(codec, WM8940_CLOCK, reg | 0x100);
0b5e92c5
JC		 577
578 return 0;
579}
580
581static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
582 int clk_id, unsigned int freq, int dir)
583{
584 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 585 struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
0b5e92c5
JC		 586
587 switch (freq) {
588 case 11289600:
589 case 12000000:
590 case 12288000:
591 case 16934400:
592 case 18432000:
593 wm8940->sysclk = freq;
594 return 0;
595 }
596 return -EINVAL;
597}
598
599static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
600 int div_id, int div)
601{
602 struct snd_soc_codec *codec = codec_dai->codec;
603 u16 reg;
604 int ret = 0;
605
606 switch (div_id) {
607 case WM8940_BCLKDIV:
8d50e447
MB		 608 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFEF3;
609 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
0b5e92c5
JC		 610 break;
611 case WM8940_MCLKDIV:
8d50e447
MB		 612 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F;
613 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
0b5e92c5
JC		 614 break;
615 case WM8940_OPCLKDIV:
8d50e447
MB		 616 reg = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFCF;
617 ret = snd_soc_write(codec, WM8940_ADDCNTRL, reg | (div << 4));
0b5e92c5
JC		 618 break;
619 }
620 return ret;
621}
622
623#define WM8940_RATES SNDRV_PCM_RATE_8000_48000
624
625#define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
626 SNDRV_PCM_FMTBIT_S16_LE | \
627 SNDRV_PCM_FMTBIT_S20_3LE | \
628 SNDRV_PCM_FMTBIT_S24_LE | \
629 SNDRV_PCM_FMTBIT_S32_LE)
630
631static struct snd_soc_dai_ops wm8940_dai_ops = {
632 .hw_params = wm8940_i2s_hw_params,
633 .set_sysclk = wm8940_set_dai_sysclk,
634 .digital_mute = wm8940_mute,
635 .set_fmt = wm8940_set_dai_fmt,
636 .set_clkdiv = wm8940_set_dai_clkdiv,
637 .set_pll = wm8940_set_dai_pll,
638};
639
f0fba2ad
LG		 640static struct snd_soc_dai_driver wm8940_dai = {
641 .name = "wm8940-hifi",
0b5e92c5
JC		 642 .playback = {
643 .stream_name = "Playback",
644 .channels_min = 1,
645 .channels_max = 2,
646 .rates = WM8940_RATES,
647 .formats = WM8940_FORMATS,
648 },
649 .capture = {
650 .stream_name = "Capture",
651 .channels_min = 1,
652 .channels_max = 2,
653 .rates = WM8940_RATES,
654 .formats = WM8940_FORMATS,
655 },
656 .ops = &wm8940_dai_ops,
657 .symmetric_rates = 1,
658};
0b5e92c5 659
f0fba2ad 660static int wm8940_suspend(struct snd_soc_codec *codec, pm_message_t state)
0b5e92c5 661{
0b5e92c5
JC		 662 return wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
663}
664
f0fba2ad 665static int wm8940_resume(struct snd_soc_codec *codec)
0b5e92c5 666{
0b5e92c5
JC		 667 int i;
668 int ret;
669 u8 data[3];
670 u16 *cache = codec->reg_cache;
671
672 /* Sync reg_cache with the hardware
673 * Could use auto incremented writes to speed this up
674 */
675 for (i = 0; i < ARRAY_SIZE(wm8940_reg_defaults); i++) {
676 data[0] = i;
677 data[1] = (cache[i] & 0xFF00) >> 8;
678 data[2] = cache[i] & 0x00FF;
679 ret = codec->hw_write(codec->control_data, data, 3);
680 if (ret < 0)
681 goto error_ret;
682 else if (ret != 3) {
683 ret = -EIO;
684 goto error_ret;
685 }
686 }
687 ret = wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
688 if (ret)
689 goto error_ret;
0b5e92c5
JC		 690
691error_ret:
692 return ret;
693}
694
f0fba2ad 695static int wm8940_probe(struct snd_soc_codec *codec)
0b5e92c5 696{
f0fba2ad
LG		 697 struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
698 struct wm8940_setup_data *pdata = codec->dev->platform_data;
0b5e92c5
JC		 699 int ret;
700 u16 reg;
0b5e92c5 701
f0fba2ad
LG		 702 codec->control_data = wm8940->control_data;
703 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8940->control_type);
e655a435 704 if (ret < 0) {
8d50e447
MB		 705 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
706 return ret;
707 }
708
0b5e92c5
JC		 709 ret = wm8940_reset(codec);
710 if (ret < 0) {
711 dev_err(codec->dev, "Failed to issue reset\n");
712 return ret;
713 }
714
0b5e92c5
JC		 715 wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
716
8d50e447 717 ret = snd_soc_write(codec, WM8940_POWER1, 0x180);
0b5e92c5
JC		 718 if (ret < 0)
719 return ret;
720
721 if (!pdata)
722 dev_warn(codec->dev, "No platform data supplied\n");
723 else {
8d50e447
MB		 724 reg = snd_soc_read(codec, WM8940_OUTPUTCTL);
725 ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi);
0b5e92c5
JC		 726 if (ret < 0)
727 return ret;
728 }
729
f0fba2ad
LG		 730 ret = snd_soc_add_controls(codec, wm8940_snd_controls,
731 ARRAY_SIZE(wm8940_snd_controls));
732 if (ret)
0b5e92c5 733 return ret;
f0fba2ad
LG		 734 ret = wm8940_add_widgets(codec);
735 if (ret)
0b5e92c5 736 return ret;
0b5e92c5 737
f0fba2ad
LG		 738 return ret;
739;
0b5e92c5
JC		 740}
741
f0fba2ad 742static int wm8940_remove(struct snd_soc_codec *codec)
0b5e92c5 743{
f0fba2ad
LG		 744 wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
745 return 0;
0b5e92c5
JC		 746}
747
f0fba2ad
LG		 748static struct snd_soc_codec_driver soc_codec_dev_wm8940 = {
749 .probe = wm8940_probe,
750 .remove = wm8940_remove,
751 .suspend = wm8940_suspend,
752 .resume = wm8940_resume,
753 .set_bias_level = wm8940_set_bias_level,
e5eec34c 754 .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults),
f0fba2ad
LG		 755 .reg_word_size = sizeof(u16),
756 .reg_cache_default = wm8940_reg_defaults,
757};
758
759#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
760static __devinit int wm8940_i2c_probe(struct i2c_client *i2c,
761 const struct i2c_device_id *id)
0b5e92c5
JC		 762{
763 struct wm8940_priv *wm8940;
f0fba2ad 764 int ret;
0b5e92c5 765
f0fba2ad 766 wm8940 = kzalloc(sizeof(struct wm8940_priv), GFP_KERNEL);
0b5e92c5
JC		 767 if (wm8940 == NULL)
768 return -ENOMEM;
769
0b5e92c5 770 i2c_set_clientdata(i2c, wm8940);
f0fba2ad 771 wm8940->control_data = i2c;
0b5e92c5 772
f0fba2ad
LG		 773 ret = snd_soc_register_codec(&i2c->dev,
774 &soc_codec_dev_wm8940, &wm8940_dai, 1);
db1e18de
AL		 775 if (ret < 0)
776 kfree(wm8940);
db1e18de 777 return ret;
0b5e92c5
JC		 778}
779
f0fba2ad 780static __devexit int wm8940_i2c_remove(struct i2c_client *client)
0b5e92c5 781{
f0fba2ad
LG		 782 snd_soc_unregister_codec(&client->dev);
783 kfree(i2c_get_clientdata(client));
0b5e92c5
JC		 784 return 0;
785}
786
787static const struct i2c_device_id wm8940_i2c_id[] = {
788 { "wm8940", 0 },
789 { }
790};
791MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
792
793static struct i2c_driver wm8940_i2c_driver = {
794 .driver = {
f0fba2ad 795 .name = "wm8940-codec",
0b5e92c5
JC		 796 .owner = THIS_MODULE,
797 },
f0fba2ad
LG		 798 .probe = wm8940_i2c_probe,
799 .remove = __devexit_p(wm8940_i2c_remove),
0b5e92c5
JC		 800 .id_table = wm8940_i2c_id,
801};
f0fba2ad 802#endif
0b5e92c5
JC		 803
804static int __init wm8940_modinit(void)
805{
f0fba2ad
LG		 806 int ret = 0;
807#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
0b5e92c5 808 ret = i2c_add_driver(&wm8940_i2c_driver);
f0fba2ad
LG		 809 if (ret != 0) {
810 printk(KERN_ERR "Failed to register wm8940 I2C driver: %d\n",
0b5e92c5 811 ret);
f0fba2ad
LG		 812 }
813#endif
0b5e92c5
JC		 814 return ret;
815}
816module_init(wm8940_modinit);
817
818static void __exit wm8940_exit(void)
819{
f0fba2ad 820#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
0b5e92c5 821 i2c_del_driver(&wm8940_i2c_driver);
f0fba2ad 822#endif
0b5e92c5
JC		 823}
824module_exit(wm8940_exit);
825
826MODULE_DESCRIPTION("ASoC WM8940 driver");
827MODULE_AUTHOR("Jonathan Cameron");
828MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)