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1 | /* |
2 | * wm8400.c -- WM8400 ALSA Soc Audio driver | |
3 | * | |
4 | * Copyright 2008, 2009 Wolfson Microelectronics PLC. | |
5 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; either version 2 of the License, or (at your | |
10 | * option) any later version. | |
11 | * | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pm.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regulator/consumer.h> | |
22 | #include <linux/mfd/wm8400-audio.h> | |
23 | #include <linux/mfd/wm8400-private.h> | |
24 | #include <sound/core.h> | |
25 | #include <sound/pcm.h> | |
26 | #include <sound/pcm_params.h> | |
27 | #include <sound/soc.h> | |
28 | #include <sound/soc-dapm.h> | |
29 | #include <sound/initval.h> | |
30 | #include <sound/tlv.h> | |
31 | ||
32 | #include "wm8400.h" | |
33 | ||
34 | /* Fake register for internal state */ | |
35 | #define WM8400_INTDRIVBITS (WM8400_REGISTER_COUNT + 1) | |
36 | #define WM8400_INMIXL_PWR 0 | |
37 | #define WM8400_AINLMUX_PWR 1 | |
38 | #define WM8400_INMIXR_PWR 2 | |
39 | #define WM8400_AINRMUX_PWR 3 | |
40 | ||
41 | static struct regulator_bulk_data power[] = { | |
42 | { | |
43 | .supply = "I2S1VDD", | |
44 | }, | |
45 | { | |
46 | .supply = "I2S2VDD", | |
47 | }, | |
48 | { | |
49 | .supply = "DCVDD", | |
50 | }, | |
24a51029 MB |
51 | { |
52 | .supply = "AVDD", | |
53 | }, | |
aaf1e176 MB |
54 | { |
55 | .supply = "FLLVDD", | |
56 | }, | |
57 | { | |
58 | .supply = "HPVDD", | |
59 | }, | |
60 | { | |
61 | .supply = "SPKVDD", | |
62 | }, | |
63 | }; | |
64 | ||
65 | /* codec private data */ | |
66 | struct wm8400_priv { | |
67 | struct snd_soc_codec codec; | |
68 | struct wm8400 *wm8400; | |
69 | u16 fake_register; | |
70 | unsigned int sysclk; | |
71 | unsigned int pcmclk; | |
72 | struct work_struct work; | |
73 | }; | |
74 | ||
75 | static inline unsigned int wm8400_read(struct snd_soc_codec *codec, | |
76 | unsigned int reg) | |
77 | { | |
78 | struct wm8400_priv *wm8400 = codec->private_data; | |
79 | ||
80 | if (reg == WM8400_INTDRIVBITS) | |
81 | return wm8400->fake_register; | |
82 | else | |
83 | return wm8400_reg_read(wm8400->wm8400, reg); | |
84 | } | |
85 | ||
86 | /* | |
87 | * write to the wm8400 register space | |
88 | */ | |
89 | static int wm8400_write(struct snd_soc_codec *codec, unsigned int reg, | |
90 | unsigned int value) | |
91 | { | |
92 | struct wm8400_priv *wm8400 = codec->private_data; | |
93 | ||
94 | if (reg == WM8400_INTDRIVBITS) { | |
95 | wm8400->fake_register = value; | |
96 | return 0; | |
97 | } else | |
98 | return wm8400_set_bits(wm8400->wm8400, reg, 0xffff, value); | |
99 | } | |
100 | ||
101 | static void wm8400_codec_reset(struct snd_soc_codec *codec) | |
102 | { | |
103 | struct wm8400_priv *wm8400 = codec->private_data; | |
104 | ||
105 | wm8400_reset_codec_reg_cache(wm8400->wm8400); | |
106 | } | |
107 | ||
108 | static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600); | |
109 | ||
110 | static const DECLARE_TLV_DB_LINEAR(in_pga_tlv, -1650, 3000); | |
111 | ||
112 | static const DECLARE_TLV_DB_LINEAR(out_mix_tlv, -2100, 0); | |
113 | ||
114 | static const DECLARE_TLV_DB_LINEAR(out_pga_tlv, -7300, 600); | |
115 | ||
116 | static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0); | |
117 | ||
118 | static const DECLARE_TLV_DB_LINEAR(out_dac_tlv, -7163, 0); | |
119 | ||
120 | static const DECLARE_TLV_DB_LINEAR(in_adc_tlv, -7163, 1763); | |
121 | ||
122 | static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv, -3600, 0); | |
123 | ||
124 | static int wm8400_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, | |
125 | struct snd_ctl_elem_value *ucontrol) | |
126 | { | |
127 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | |
128 | struct soc_mixer_control *mc = | |
129 | (struct soc_mixer_control *)kcontrol->private_value; | |
130 | int reg = mc->reg; | |
131 | int ret; | |
132 | u16 val; | |
133 | ||
134 | ret = snd_soc_put_volsw(kcontrol, ucontrol); | |
135 | if (ret < 0) | |
136 | return ret; | |
137 | ||
138 | /* now hit the volume update bits (always bit 8) */ | |
139 | val = wm8400_read(codec, reg); | |
140 | return wm8400_write(codec, reg, val | 0x0100); | |
141 | } | |
142 | ||
143 | #define WM8400_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert, tlv_array) \ | |
144 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
145 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
146 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
147 | .tlv.p = (tlv_array), \ | |
148 | .info = snd_soc_info_volsw, \ | |
149 | .get = snd_soc_get_volsw, .put = wm8400_outpga_put_volsw_vu, \ | |
150 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
151 | ||
152 | ||
153 | static const char *wm8400_digital_sidetone[] = | |
154 | {"None", "Left ADC", "Right ADC", "Reserved"}; | |
155 | ||
156 | static const struct soc_enum wm8400_left_digital_sidetone_enum = | |
157 | SOC_ENUM_SINGLE(WM8400_DIGITAL_SIDE_TONE, | |
158 | WM8400_ADC_TO_DACL_SHIFT, 2, wm8400_digital_sidetone); | |
159 | ||
160 | static const struct soc_enum wm8400_right_digital_sidetone_enum = | |
161 | SOC_ENUM_SINGLE(WM8400_DIGITAL_SIDE_TONE, | |
162 | WM8400_ADC_TO_DACR_SHIFT, 2, wm8400_digital_sidetone); | |
163 | ||
164 | static const char *wm8400_adcmode[] = | |
165 | {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; | |
166 | ||
167 | static const struct soc_enum wm8400_right_adcmode_enum = | |
168 | SOC_ENUM_SINGLE(WM8400_ADC_CTRL, WM8400_ADC_HPF_CUT_SHIFT, 3, wm8400_adcmode); | |
169 | ||
170 | static const struct snd_kcontrol_new wm8400_snd_controls[] = { | |
171 | /* INMIXL */ | |
172 | SOC_SINGLE("LIN12 PGA Boost", WM8400_INPUT_MIXER3, WM8400_L12MNBST_SHIFT, | |
173 | 1, 0), | |
174 | SOC_SINGLE("LIN34 PGA Boost", WM8400_INPUT_MIXER3, WM8400_L34MNBST_SHIFT, | |
175 | 1, 0), | |
176 | /* INMIXR */ | |
177 | SOC_SINGLE("RIN12 PGA Boost", WM8400_INPUT_MIXER3, WM8400_R12MNBST_SHIFT, | |
178 | 1, 0), | |
179 | SOC_SINGLE("RIN34 PGA Boost", WM8400_INPUT_MIXER3, WM8400_R34MNBST_SHIFT, | |
180 | 1, 0), | |
181 | ||
182 | /* LOMIX */ | |
183 | SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER3, | |
184 | WM8400_LLI3LOVOL_SHIFT, 7, 0, out_mix_tlv), | |
185 | SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3, | |
186 | WM8400_LR12LOVOL_SHIFT, 7, 0, out_mix_tlv), | |
187 | SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3, | |
188 | WM8400_LL12LOVOL_SHIFT, 7, 0, out_mix_tlv), | |
189 | SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER5, | |
190 | WM8400_LRI3LOVOL_SHIFT, 7, 0, out_mix_tlv), | |
191 | SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8400_OUTPUT_MIXER5, | |
192 | WM8400_LRBLOVOL_SHIFT, 7, 0, out_mix_tlv), | |
193 | SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8400_OUTPUT_MIXER5, | |
194 | WM8400_LRBLOVOL_SHIFT, 7, 0, out_mix_tlv), | |
195 | ||
196 | /* ROMIX */ | |
197 | SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER4, | |
198 | WM8400_RRI3ROVOL_SHIFT, 7, 0, out_mix_tlv), | |
199 | SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4, | |
200 | WM8400_RL12ROVOL_SHIFT, 7, 0, out_mix_tlv), | |
201 | SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4, | |
202 | WM8400_RR12ROVOL_SHIFT, 7, 0, out_mix_tlv), | |
203 | SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER6, | |
204 | WM8400_RLI3ROVOL_SHIFT, 7, 0, out_mix_tlv), | |
205 | SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8400_OUTPUT_MIXER6, | |
206 | WM8400_RLBROVOL_SHIFT, 7, 0, out_mix_tlv), | |
207 | SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8400_OUTPUT_MIXER6, | |
208 | WM8400_RRBROVOL_SHIFT, 7, 0, out_mix_tlv), | |
209 | ||
210 | /* LOUT */ | |
211 | WM8400_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8400_LEFT_OUTPUT_VOLUME, | |
212 | WM8400_LOUTVOL_SHIFT, WM8400_LOUTVOL_MASK, 0, out_pga_tlv), | |
213 | SOC_SINGLE("LOUT ZC", WM8400_LEFT_OUTPUT_VOLUME, WM8400_LOZC_SHIFT, 1, 0), | |
214 | ||
215 | /* ROUT */ | |
216 | WM8400_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8400_RIGHT_OUTPUT_VOLUME, | |
217 | WM8400_ROUTVOL_SHIFT, WM8400_ROUTVOL_MASK, 0, out_pga_tlv), | |
218 | SOC_SINGLE("ROUT ZC", WM8400_RIGHT_OUTPUT_VOLUME, WM8400_ROZC_SHIFT, 1, 0), | |
219 | ||
220 | /* LOPGA */ | |
221 | WM8400_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8400_LEFT_OPGA_VOLUME, | |
222 | WM8400_LOPGAVOL_SHIFT, WM8400_LOPGAVOL_MASK, 0, out_pga_tlv), | |
223 | SOC_SINGLE("LOPGA ZC Switch", WM8400_LEFT_OPGA_VOLUME, | |
224 | WM8400_LOPGAZC_SHIFT, 1, 0), | |
225 | ||
226 | /* ROPGA */ | |
227 | WM8400_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8400_RIGHT_OPGA_VOLUME, | |
228 | WM8400_ROPGAVOL_SHIFT, WM8400_ROPGAVOL_MASK, 0, out_pga_tlv), | |
229 | SOC_SINGLE("ROPGA ZC Switch", WM8400_RIGHT_OPGA_VOLUME, | |
230 | WM8400_ROPGAZC_SHIFT, 1, 0), | |
231 | ||
232 | SOC_SINGLE("LON Mute Switch", WM8400_LINE_OUTPUTS_VOLUME, | |
233 | WM8400_LONMUTE_SHIFT, 1, 0), | |
234 | SOC_SINGLE("LOP Mute Switch", WM8400_LINE_OUTPUTS_VOLUME, | |
235 | WM8400_LOPMUTE_SHIFT, 1, 0), | |
236 | SOC_SINGLE("LOP Attenuation Switch", WM8400_LINE_OUTPUTS_VOLUME, | |
237 | WM8400_LOATTN_SHIFT, 1, 0), | |
238 | SOC_SINGLE("RON Mute Switch", WM8400_LINE_OUTPUTS_VOLUME, | |
239 | WM8400_RONMUTE_SHIFT, 1, 0), | |
240 | SOC_SINGLE("ROP Mute Switch", WM8400_LINE_OUTPUTS_VOLUME, | |
241 | WM8400_ROPMUTE_SHIFT, 1, 0), | |
242 | SOC_SINGLE("ROP Attenuation Switch", WM8400_LINE_OUTPUTS_VOLUME, | |
243 | WM8400_ROATTN_SHIFT, 1, 0), | |
244 | ||
245 | SOC_SINGLE("OUT3 Mute Switch", WM8400_OUT3_4_VOLUME, | |
246 | WM8400_OUT3MUTE_SHIFT, 1, 0), | |
247 | SOC_SINGLE("OUT3 Attenuation Switch", WM8400_OUT3_4_VOLUME, | |
248 | WM8400_OUT3ATTN_SHIFT, 1, 0), | |
249 | ||
250 | SOC_SINGLE("OUT4 Mute Switch", WM8400_OUT3_4_VOLUME, | |
251 | WM8400_OUT4MUTE_SHIFT, 1, 0), | |
252 | SOC_SINGLE("OUT4 Attenuation Switch", WM8400_OUT3_4_VOLUME, | |
253 | WM8400_OUT4ATTN_SHIFT, 1, 0), | |
254 | ||
255 | SOC_SINGLE("Speaker Mode Switch", WM8400_CLASSD1, | |
256 | WM8400_CDMODE_SHIFT, 1, 0), | |
257 | ||
258 | SOC_SINGLE("Speaker Output Attenuation Volume", WM8400_SPEAKER_VOLUME, | |
259 | WM8400_SPKATTN_SHIFT, WM8400_SPKATTN_MASK, 0), | |
260 | SOC_SINGLE("Speaker DC Boost Volume", WM8400_CLASSD3, | |
261 | WM8400_DCGAIN_SHIFT, 6, 0), | |
262 | SOC_SINGLE("Speaker AC Boost Volume", WM8400_CLASSD3, | |
263 | WM8400_ACGAIN_SHIFT, 6, 0), | |
264 | ||
265 | WM8400_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", | |
266 | WM8400_LEFT_DAC_DIGITAL_VOLUME, WM8400_DACL_VOL_SHIFT, | |
267 | 127, 0, out_dac_tlv), | |
268 | ||
269 | WM8400_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", | |
270 | WM8400_RIGHT_DAC_DIGITAL_VOLUME, WM8400_DACR_VOL_SHIFT, | |
271 | 127, 0, out_dac_tlv), | |
272 | ||
273 | SOC_ENUM("Left Digital Sidetone", wm8400_left_digital_sidetone_enum), | |
274 | SOC_ENUM("Right Digital Sidetone", wm8400_right_digital_sidetone_enum), | |
275 | ||
276 | SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8400_DIGITAL_SIDE_TONE, | |
277 | WM8400_ADCL_DAC_SVOL_SHIFT, 15, 0, out_sidetone_tlv), | |
278 | SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8400_DIGITAL_SIDE_TONE, | |
279 | WM8400_ADCR_DAC_SVOL_SHIFT, 15, 0, out_sidetone_tlv), | |
280 | ||
281 | SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8400_ADC_CTRL, | |
282 | WM8400_ADC_HPF_ENA_SHIFT, 1, 0), | |
283 | ||
284 | SOC_ENUM("ADC HPF Mode", wm8400_right_adcmode_enum), | |
285 | ||
286 | WM8400_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", | |
287 | WM8400_LEFT_ADC_DIGITAL_VOLUME, | |
288 | WM8400_ADCL_VOL_SHIFT, | |
289 | WM8400_ADCL_VOL_MASK, | |
290 | 0, | |
291 | in_adc_tlv), | |
292 | ||
293 | WM8400_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", | |
294 | WM8400_RIGHT_ADC_DIGITAL_VOLUME, | |
295 | WM8400_ADCR_VOL_SHIFT, | |
296 | WM8400_ADCR_VOL_MASK, | |
297 | 0, | |
298 | in_adc_tlv), | |
299 | ||
300 | WM8400_OUTPGA_SINGLE_R_TLV("LIN12 Volume", | |
301 | WM8400_LEFT_LINE_INPUT_1_2_VOLUME, | |
302 | WM8400_LIN12VOL_SHIFT, | |
303 | WM8400_LIN12VOL_MASK, | |
304 | 0, | |
305 | in_pga_tlv), | |
306 | ||
307 | SOC_SINGLE("LIN12 ZC Switch", WM8400_LEFT_LINE_INPUT_1_2_VOLUME, | |
308 | WM8400_LI12ZC_SHIFT, 1, 0), | |
309 | ||
310 | SOC_SINGLE("LIN12 Mute Switch", WM8400_LEFT_LINE_INPUT_1_2_VOLUME, | |
311 | WM8400_LI12MUTE_SHIFT, 1, 0), | |
312 | ||
313 | WM8400_OUTPGA_SINGLE_R_TLV("LIN34 Volume", | |
314 | WM8400_LEFT_LINE_INPUT_3_4_VOLUME, | |
315 | WM8400_LIN34VOL_SHIFT, | |
316 | WM8400_LIN34VOL_MASK, | |
317 | 0, | |
318 | in_pga_tlv), | |
319 | ||
320 | SOC_SINGLE("LIN34 ZC Switch", WM8400_LEFT_LINE_INPUT_3_4_VOLUME, | |
321 | WM8400_LI34ZC_SHIFT, 1, 0), | |
322 | ||
323 | SOC_SINGLE("LIN34 Mute Switch", WM8400_LEFT_LINE_INPUT_3_4_VOLUME, | |
324 | WM8400_LI34MUTE_SHIFT, 1, 0), | |
325 | ||
326 | WM8400_OUTPGA_SINGLE_R_TLV("RIN12 Volume", | |
327 | WM8400_RIGHT_LINE_INPUT_1_2_VOLUME, | |
328 | WM8400_RIN12VOL_SHIFT, | |
329 | WM8400_RIN12VOL_MASK, | |
330 | 0, | |
331 | in_pga_tlv), | |
332 | ||
333 | SOC_SINGLE("RIN12 ZC Switch", WM8400_RIGHT_LINE_INPUT_1_2_VOLUME, | |
334 | WM8400_RI12ZC_SHIFT, 1, 0), | |
335 | ||
336 | SOC_SINGLE("RIN12 Mute Switch", WM8400_RIGHT_LINE_INPUT_1_2_VOLUME, | |
337 | WM8400_RI12MUTE_SHIFT, 1, 0), | |
338 | ||
339 | WM8400_OUTPGA_SINGLE_R_TLV("RIN34 Volume", | |
340 | WM8400_RIGHT_LINE_INPUT_3_4_VOLUME, | |
341 | WM8400_RIN34VOL_SHIFT, | |
342 | WM8400_RIN34VOL_MASK, | |
343 | 0, | |
344 | in_pga_tlv), | |
345 | ||
346 | SOC_SINGLE("RIN34 ZC Switch", WM8400_RIGHT_LINE_INPUT_3_4_VOLUME, | |
347 | WM8400_RI34ZC_SHIFT, 1, 0), | |
348 | ||
349 | SOC_SINGLE("RIN34 Mute Switch", WM8400_RIGHT_LINE_INPUT_3_4_VOLUME, | |
350 | WM8400_RI34MUTE_SHIFT, 1, 0), | |
351 | ||
352 | }; | |
353 | ||
354 | /* add non dapm controls */ | |
355 | static int wm8400_add_controls(struct snd_soc_codec *codec) | |
356 | { | |
eb5f6d75 PZ |
357 | return snd_soc_add_controls(codec, wm8400_snd_controls, |
358 | ARRAY_SIZE(wm8400_snd_controls)); | |
aaf1e176 MB |
359 | } |
360 | ||
361 | /* | |
362 | * _DAPM_ Controls | |
363 | */ | |
364 | ||
365 | static int inmixer_event (struct snd_soc_dapm_widget *w, | |
366 | struct snd_kcontrol *kcontrol, int event) | |
367 | { | |
368 | u16 reg, fakepower; | |
369 | ||
370 | reg = wm8400_read(w->codec, WM8400_POWER_MANAGEMENT_2); | |
371 | fakepower = wm8400_read(w->codec, WM8400_INTDRIVBITS); | |
372 | ||
373 | if (fakepower & ((1 << WM8400_INMIXL_PWR) | | |
374 | (1 << WM8400_AINLMUX_PWR))) { | |
375 | reg |= WM8400_AINL_ENA; | |
376 | } else { | |
377 | reg &= ~WM8400_AINL_ENA; | |
378 | } | |
379 | ||
380 | if (fakepower & ((1 << WM8400_INMIXR_PWR) | | |
381 | (1 << WM8400_AINRMUX_PWR))) { | |
382 | reg |= WM8400_AINR_ENA; | |
383 | } else { | |
384 | reg &= ~WM8400_AINL_ENA; | |
385 | } | |
386 | wm8400_write(w->codec, WM8400_POWER_MANAGEMENT_2, reg); | |
387 | ||
388 | return 0; | |
389 | } | |
390 | ||
391 | static int outmixer_event (struct snd_soc_dapm_widget *w, | |
392 | struct snd_kcontrol * kcontrol, int event) | |
393 | { | |
394 | struct soc_mixer_control *mc = | |
395 | (struct soc_mixer_control *)kcontrol->private_value; | |
396 | u32 reg_shift = mc->shift; | |
397 | int ret = 0; | |
398 | u16 reg; | |
399 | ||
400 | switch (reg_shift) { | |
401 | case WM8400_SPEAKER_MIXER | (WM8400_LDSPK << 8) : | |
402 | reg = wm8400_read(w->codec, WM8400_OUTPUT_MIXER1); | |
403 | if (reg & WM8400_LDLO) { | |
404 | printk(KERN_WARNING | |
405 | "Cannot set as Output Mixer 1 LDLO Set\n"); | |
406 | ret = -1; | |
407 | } | |
408 | break; | |
409 | case WM8400_SPEAKER_MIXER | (WM8400_RDSPK << 8): | |
410 | reg = wm8400_read(w->codec, WM8400_OUTPUT_MIXER2); | |
411 | if (reg & WM8400_RDRO) { | |
412 | printk(KERN_WARNING | |
413 | "Cannot set as Output Mixer 2 RDRO Set\n"); | |
414 | ret = -1; | |
415 | } | |
416 | break; | |
417 | case WM8400_OUTPUT_MIXER1 | (WM8400_LDLO << 8): | |
418 | reg = wm8400_read(w->codec, WM8400_SPEAKER_MIXER); | |
419 | if (reg & WM8400_LDSPK) { | |
420 | printk(KERN_WARNING | |
421 | "Cannot set as Speaker Mixer LDSPK Set\n"); | |
422 | ret = -1; | |
423 | } | |
424 | break; | |
425 | case WM8400_OUTPUT_MIXER2 | (WM8400_RDRO << 8): | |
426 | reg = wm8400_read(w->codec, WM8400_SPEAKER_MIXER); | |
427 | if (reg & WM8400_RDSPK) { | |
428 | printk(KERN_WARNING | |
429 | "Cannot set as Speaker Mixer RDSPK Set\n"); | |
430 | ret = -1; | |
431 | } | |
432 | break; | |
433 | } | |
434 | ||
435 | return ret; | |
436 | } | |
437 | ||
438 | /* INMIX dB values */ | |
439 | static const unsigned int in_mix_tlv[] = { | |
440 | TLV_DB_RANGE_HEAD(1), | |
441 | 0,7, TLV_DB_LINEAR_ITEM(-1200, 600), | |
442 | }; | |
443 | ||
444 | /* Left In PGA Connections */ | |
445 | static const struct snd_kcontrol_new wm8400_dapm_lin12_pga_controls[] = { | |
446 | SOC_DAPM_SINGLE("LIN1 Switch", WM8400_INPUT_MIXER2, WM8400_LMN1_SHIFT, 1, 0), | |
447 | SOC_DAPM_SINGLE("LIN2 Switch", WM8400_INPUT_MIXER2, WM8400_LMP2_SHIFT, 1, 0), | |
448 | }; | |
449 | ||
450 | static const struct snd_kcontrol_new wm8400_dapm_lin34_pga_controls[] = { | |
451 | SOC_DAPM_SINGLE("LIN3 Switch", WM8400_INPUT_MIXER2, WM8400_LMN3_SHIFT, 1, 0), | |
452 | SOC_DAPM_SINGLE("LIN4 Switch", WM8400_INPUT_MIXER2, WM8400_LMP4_SHIFT, 1, 0), | |
453 | }; | |
454 | ||
455 | /* Right In PGA Connections */ | |
456 | static const struct snd_kcontrol_new wm8400_dapm_rin12_pga_controls[] = { | |
457 | SOC_DAPM_SINGLE("RIN1 Switch", WM8400_INPUT_MIXER2, WM8400_RMN1_SHIFT, 1, 0), | |
458 | SOC_DAPM_SINGLE("RIN2 Switch", WM8400_INPUT_MIXER2, WM8400_RMP2_SHIFT, 1, 0), | |
459 | }; | |
460 | ||
461 | static const struct snd_kcontrol_new wm8400_dapm_rin34_pga_controls[] = { | |
462 | SOC_DAPM_SINGLE("RIN3 Switch", WM8400_INPUT_MIXER2, WM8400_RMN3_SHIFT, 1, 0), | |
463 | SOC_DAPM_SINGLE("RIN4 Switch", WM8400_INPUT_MIXER2, WM8400_RMP4_SHIFT, 1, 0), | |
464 | }; | |
465 | ||
466 | /* INMIXL */ | |
467 | static const struct snd_kcontrol_new wm8400_dapm_inmixl_controls[] = { | |
468 | SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8400_INPUT_MIXER3, | |
469 | WM8400_LDBVOL_SHIFT, WM8400_LDBVOL_MASK, 0, in_mix_tlv), | |
470 | SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8400_INPUT_MIXER5, WM8400_LI2BVOL_SHIFT, | |
471 | 7, 0, in_mix_tlv), | |
472 | SOC_DAPM_SINGLE("LINPGA12 Switch", WM8400_INPUT_MIXER3, WM8400_L12MNB_SHIFT, | |
473 | 1, 0), | |
474 | SOC_DAPM_SINGLE("LINPGA34 Switch", WM8400_INPUT_MIXER3, WM8400_L34MNB_SHIFT, | |
475 | 1, 0), | |
476 | }; | |
477 | ||
478 | /* INMIXR */ | |
479 | static const struct snd_kcontrol_new wm8400_dapm_inmixr_controls[] = { | |
480 | SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8400_INPUT_MIXER4, | |
481 | WM8400_RDBVOL_SHIFT, WM8400_RDBVOL_MASK, 0, in_mix_tlv), | |
482 | SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8400_INPUT_MIXER6, WM8400_RI2BVOL_SHIFT, | |
483 | 7, 0, in_mix_tlv), | |
484 | SOC_DAPM_SINGLE("RINPGA12 Switch", WM8400_INPUT_MIXER3, WM8400_L12MNB_SHIFT, | |
485 | 1, 0), | |
486 | SOC_DAPM_SINGLE("RINPGA34 Switch", WM8400_INPUT_MIXER3, WM8400_L34MNB_SHIFT, | |
487 | 1, 0), | |
488 | }; | |
489 | ||
490 | /* AINLMUX */ | |
491 | static const char *wm8400_ainlmux[] = | |
492 | {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; | |
493 | ||
494 | static const struct soc_enum wm8400_ainlmux_enum = | |
495 | SOC_ENUM_SINGLE( WM8400_INPUT_MIXER1, WM8400_AINLMODE_SHIFT, | |
496 | ARRAY_SIZE(wm8400_ainlmux), wm8400_ainlmux); | |
497 | ||
498 | static const struct snd_kcontrol_new wm8400_dapm_ainlmux_controls = | |
499 | SOC_DAPM_ENUM("Route", wm8400_ainlmux_enum); | |
500 | ||
501 | /* DIFFINL */ | |
502 | ||
503 | /* AINRMUX */ | |
504 | static const char *wm8400_ainrmux[] = | |
505 | {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; | |
506 | ||
507 | static const struct soc_enum wm8400_ainrmux_enum = | |
508 | SOC_ENUM_SINGLE( WM8400_INPUT_MIXER1, WM8400_AINRMODE_SHIFT, | |
509 | ARRAY_SIZE(wm8400_ainrmux), wm8400_ainrmux); | |
510 | ||
511 | static const struct snd_kcontrol_new wm8400_dapm_ainrmux_controls = | |
512 | SOC_DAPM_ENUM("Route", wm8400_ainrmux_enum); | |
513 | ||
514 | /* RXVOICE */ | |
515 | static const struct snd_kcontrol_new wm8400_dapm_rxvoice_controls[] = { | |
516 | SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8400_INPUT_MIXER5, WM8400_LR4BVOL_SHIFT, | |
517 | WM8400_LR4BVOL_MASK, 0, in_mix_tlv), | |
518 | SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8400_INPUT_MIXER6, WM8400_RL4BVOL_SHIFT, | |
519 | WM8400_RL4BVOL_MASK, 0, in_mix_tlv), | |
520 | }; | |
521 | ||
522 | /* LOMIX */ | |
523 | static const struct snd_kcontrol_new wm8400_dapm_lomix_controls[] = { | |
524 | SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8400_OUTPUT_MIXER1, | |
525 | WM8400_LRBLO_SHIFT, 1, 0), | |
526 | SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8400_OUTPUT_MIXER1, | |
527 | WM8400_LLBLO_SHIFT, 1, 0), | |
528 | SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8400_OUTPUT_MIXER1, | |
529 | WM8400_LRI3LO_SHIFT, 1, 0), | |
530 | SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8400_OUTPUT_MIXER1, | |
531 | WM8400_LLI3LO_SHIFT, 1, 0), | |
532 | SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER1, | |
533 | WM8400_LR12LO_SHIFT, 1, 0), | |
534 | SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER1, | |
535 | WM8400_LL12LO_SHIFT, 1, 0), | |
536 | SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8400_OUTPUT_MIXER1, | |
537 | WM8400_LDLO_SHIFT, 1, 0), | |
538 | }; | |
539 | ||
540 | /* ROMIX */ | |
541 | static const struct snd_kcontrol_new wm8400_dapm_romix_controls[] = { | |
542 | SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8400_OUTPUT_MIXER2, | |
543 | WM8400_RLBRO_SHIFT, 1, 0), | |
544 | SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8400_OUTPUT_MIXER2, | |
545 | WM8400_RRBRO_SHIFT, 1, 0), | |
546 | SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8400_OUTPUT_MIXER2, | |
547 | WM8400_RLI3RO_SHIFT, 1, 0), | |
548 | SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8400_OUTPUT_MIXER2, | |
549 | WM8400_RRI3RO_SHIFT, 1, 0), | |
550 | SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER2, | |
551 | WM8400_RL12RO_SHIFT, 1, 0), | |
552 | SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER2, | |
553 | WM8400_RR12RO_SHIFT, 1, 0), | |
554 | SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8400_OUTPUT_MIXER2, | |
555 | WM8400_RDRO_SHIFT, 1, 0), | |
556 | }; | |
557 | ||
558 | /* LONMIX */ | |
559 | static const struct snd_kcontrol_new wm8400_dapm_lonmix_controls[] = { | |
560 | SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8400_LINE_MIXER1, | |
561 | WM8400_LLOPGALON_SHIFT, 1, 0), | |
562 | SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8400_LINE_MIXER1, | |
563 | WM8400_LROPGALON_SHIFT, 1, 0), | |
564 | SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8400_LINE_MIXER1, | |
565 | WM8400_LOPLON_SHIFT, 1, 0), | |
566 | }; | |
567 | ||
568 | /* LOPMIX */ | |
569 | static const struct snd_kcontrol_new wm8400_dapm_lopmix_controls[] = { | |
570 | SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8400_LINE_MIXER1, | |
571 | WM8400_LR12LOP_SHIFT, 1, 0), | |
572 | SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8400_LINE_MIXER1, | |
573 | WM8400_LL12LOP_SHIFT, 1, 0), | |
574 | SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8400_LINE_MIXER1, | |
575 | WM8400_LLOPGALOP_SHIFT, 1, 0), | |
576 | }; | |
577 | ||
578 | /* RONMIX */ | |
579 | static const struct snd_kcontrol_new wm8400_dapm_ronmix_controls[] = { | |
580 | SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8400_LINE_MIXER2, | |
581 | WM8400_RROPGARON_SHIFT, 1, 0), | |
582 | SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8400_LINE_MIXER2, | |
583 | WM8400_RLOPGARON_SHIFT, 1, 0), | |
584 | SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8400_LINE_MIXER2, | |
585 | WM8400_ROPRON_SHIFT, 1, 0), | |
586 | }; | |
587 | ||
588 | /* ROPMIX */ | |
589 | static const struct snd_kcontrol_new wm8400_dapm_ropmix_controls[] = { | |
590 | SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8400_LINE_MIXER2, | |
591 | WM8400_RL12ROP_SHIFT, 1, 0), | |
592 | SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8400_LINE_MIXER2, | |
593 | WM8400_RR12ROP_SHIFT, 1, 0), | |
594 | SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8400_LINE_MIXER2, | |
595 | WM8400_RROPGAROP_SHIFT, 1, 0), | |
596 | }; | |
597 | ||
598 | /* OUT3MIX */ | |
599 | static const struct snd_kcontrol_new wm8400_dapm_out3mix_controls[] = { | |
600 | SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8400_OUT3_4_MIXER, | |
601 | WM8400_LI4O3_SHIFT, 1, 0), | |
602 | SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8400_OUT3_4_MIXER, | |
603 | WM8400_LPGAO3_SHIFT, 1, 0), | |
604 | }; | |
605 | ||
606 | /* OUT4MIX */ | |
607 | static const struct snd_kcontrol_new wm8400_dapm_out4mix_controls[] = { | |
608 | SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8400_OUT3_4_MIXER, | |
609 | WM8400_RPGAO4_SHIFT, 1, 0), | |
610 | SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8400_OUT3_4_MIXER, | |
611 | WM8400_RI4O4_SHIFT, 1, 0), | |
612 | }; | |
613 | ||
614 | /* SPKMIX */ | |
615 | static const struct snd_kcontrol_new wm8400_dapm_spkmix_controls[] = { | |
616 | SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8400_SPEAKER_MIXER, | |
617 | WM8400_LI2SPK_SHIFT, 1, 0), | |
618 | SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8400_SPEAKER_MIXER, | |
619 | WM8400_LB2SPK_SHIFT, 1, 0), | |
620 | SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8400_SPEAKER_MIXER, | |
621 | WM8400_LOPGASPK_SHIFT, 1, 0), | |
622 | SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8400_SPEAKER_MIXER, | |
623 | WM8400_LDSPK_SHIFT, 1, 0), | |
624 | SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8400_SPEAKER_MIXER, | |
625 | WM8400_RDSPK_SHIFT, 1, 0), | |
626 | SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8400_SPEAKER_MIXER, | |
627 | WM8400_ROPGASPK_SHIFT, 1, 0), | |
628 | SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8400_SPEAKER_MIXER, | |
629 | WM8400_RL12ROP_SHIFT, 1, 0), | |
630 | SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8400_SPEAKER_MIXER, | |
631 | WM8400_RI2SPK_SHIFT, 1, 0), | |
632 | }; | |
633 | ||
634 | static const struct snd_soc_dapm_widget wm8400_dapm_widgets[] = { | |
635 | /* Input Side */ | |
636 | /* Input Lines */ | |
637 | SND_SOC_DAPM_INPUT("LIN1"), | |
638 | SND_SOC_DAPM_INPUT("LIN2"), | |
639 | SND_SOC_DAPM_INPUT("LIN3"), | |
640 | SND_SOC_DAPM_INPUT("LIN4/RXN"), | |
641 | SND_SOC_DAPM_INPUT("RIN3"), | |
642 | SND_SOC_DAPM_INPUT("RIN4/RXP"), | |
643 | SND_SOC_DAPM_INPUT("RIN1"), | |
644 | SND_SOC_DAPM_INPUT("RIN2"), | |
645 | SND_SOC_DAPM_INPUT("Internal ADC Source"), | |
646 | ||
647 | /* DACs */ | |
648 | SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8400_POWER_MANAGEMENT_2, | |
649 | WM8400_ADCL_ENA_SHIFT, 0), | |
650 | SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8400_POWER_MANAGEMENT_2, | |
651 | WM8400_ADCR_ENA_SHIFT, 0), | |
652 | ||
653 | /* Input PGAs */ | |
654 | SND_SOC_DAPM_MIXER("LIN12 PGA", WM8400_POWER_MANAGEMENT_2, | |
655 | WM8400_LIN12_ENA_SHIFT, | |
656 | 0, &wm8400_dapm_lin12_pga_controls[0], | |
657 | ARRAY_SIZE(wm8400_dapm_lin12_pga_controls)), | |
658 | SND_SOC_DAPM_MIXER("LIN34 PGA", WM8400_POWER_MANAGEMENT_2, | |
659 | WM8400_LIN34_ENA_SHIFT, | |
660 | 0, &wm8400_dapm_lin34_pga_controls[0], | |
661 | ARRAY_SIZE(wm8400_dapm_lin34_pga_controls)), | |
662 | SND_SOC_DAPM_MIXER("RIN12 PGA", WM8400_POWER_MANAGEMENT_2, | |
663 | WM8400_RIN12_ENA_SHIFT, | |
664 | 0, &wm8400_dapm_rin12_pga_controls[0], | |
665 | ARRAY_SIZE(wm8400_dapm_rin12_pga_controls)), | |
666 | SND_SOC_DAPM_MIXER("RIN34 PGA", WM8400_POWER_MANAGEMENT_2, | |
667 | WM8400_RIN34_ENA_SHIFT, | |
668 | 0, &wm8400_dapm_rin34_pga_controls[0], | |
669 | ARRAY_SIZE(wm8400_dapm_rin34_pga_controls)), | |
670 | ||
671 | /* INMIXL */ | |
672 | SND_SOC_DAPM_MIXER_E("INMIXL", WM8400_INTDRIVBITS, WM8400_INMIXL_PWR, 0, | |
673 | &wm8400_dapm_inmixl_controls[0], | |
674 | ARRAY_SIZE(wm8400_dapm_inmixl_controls), | |
675 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
676 | ||
677 | /* AINLMUX */ | |
678 | SND_SOC_DAPM_MUX_E("AILNMUX", WM8400_INTDRIVBITS, WM8400_AINLMUX_PWR, 0, | |
679 | &wm8400_dapm_ainlmux_controls, inmixer_event, | |
680 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
681 | ||
682 | /* INMIXR */ | |
683 | SND_SOC_DAPM_MIXER_E("INMIXR", WM8400_INTDRIVBITS, WM8400_INMIXR_PWR, 0, | |
684 | &wm8400_dapm_inmixr_controls[0], | |
685 | ARRAY_SIZE(wm8400_dapm_inmixr_controls), | |
686 | inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
687 | ||
688 | /* AINRMUX */ | |
689 | SND_SOC_DAPM_MUX_E("AIRNMUX", WM8400_INTDRIVBITS, WM8400_AINRMUX_PWR, 0, | |
690 | &wm8400_dapm_ainrmux_controls, inmixer_event, | |
691 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
692 | ||
693 | /* Output Side */ | |
694 | /* DACs */ | |
695 | SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8400_POWER_MANAGEMENT_3, | |
696 | WM8400_DACL_ENA_SHIFT, 0), | |
697 | SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8400_POWER_MANAGEMENT_3, | |
698 | WM8400_DACR_ENA_SHIFT, 0), | |
699 | ||
700 | /* LOMIX */ | |
701 | SND_SOC_DAPM_MIXER_E("LOMIX", WM8400_POWER_MANAGEMENT_3, | |
702 | WM8400_LOMIX_ENA_SHIFT, | |
703 | 0, &wm8400_dapm_lomix_controls[0], | |
704 | ARRAY_SIZE(wm8400_dapm_lomix_controls), | |
705 | outmixer_event, SND_SOC_DAPM_PRE_REG), | |
706 | ||
707 | /* LONMIX */ | |
708 | SND_SOC_DAPM_MIXER("LONMIX", WM8400_POWER_MANAGEMENT_3, WM8400_LON_ENA_SHIFT, | |
709 | 0, &wm8400_dapm_lonmix_controls[0], | |
710 | ARRAY_SIZE(wm8400_dapm_lonmix_controls)), | |
711 | ||
712 | /* LOPMIX */ | |
713 | SND_SOC_DAPM_MIXER("LOPMIX", WM8400_POWER_MANAGEMENT_3, WM8400_LOP_ENA_SHIFT, | |
714 | 0, &wm8400_dapm_lopmix_controls[0], | |
715 | ARRAY_SIZE(wm8400_dapm_lopmix_controls)), | |
716 | ||
717 | /* OUT3MIX */ | |
718 | SND_SOC_DAPM_MIXER("OUT3MIX", WM8400_POWER_MANAGEMENT_1, WM8400_OUT3_ENA_SHIFT, | |
719 | 0, &wm8400_dapm_out3mix_controls[0], | |
720 | ARRAY_SIZE(wm8400_dapm_out3mix_controls)), | |
721 | ||
722 | /* SPKMIX */ | |
723 | SND_SOC_DAPM_MIXER_E("SPKMIX", WM8400_POWER_MANAGEMENT_1, WM8400_SPK_ENA_SHIFT, | |
724 | 0, &wm8400_dapm_spkmix_controls[0], | |
725 | ARRAY_SIZE(wm8400_dapm_spkmix_controls), outmixer_event, | |
726 | SND_SOC_DAPM_PRE_REG), | |
727 | ||
728 | /* OUT4MIX */ | |
729 | SND_SOC_DAPM_MIXER("OUT4MIX", WM8400_POWER_MANAGEMENT_1, WM8400_OUT4_ENA_SHIFT, | |
730 | 0, &wm8400_dapm_out4mix_controls[0], | |
731 | ARRAY_SIZE(wm8400_dapm_out4mix_controls)), | |
732 | ||
733 | /* ROPMIX */ | |
734 | SND_SOC_DAPM_MIXER("ROPMIX", WM8400_POWER_MANAGEMENT_3, WM8400_ROP_ENA_SHIFT, | |
735 | 0, &wm8400_dapm_ropmix_controls[0], | |
736 | ARRAY_SIZE(wm8400_dapm_ropmix_controls)), | |
737 | ||
738 | /* RONMIX */ | |
739 | SND_SOC_DAPM_MIXER("RONMIX", WM8400_POWER_MANAGEMENT_3, WM8400_RON_ENA_SHIFT, | |
740 | 0, &wm8400_dapm_ronmix_controls[0], | |
741 | ARRAY_SIZE(wm8400_dapm_ronmix_controls)), | |
742 | ||
743 | /* ROMIX */ | |
744 | SND_SOC_DAPM_MIXER_E("ROMIX", WM8400_POWER_MANAGEMENT_3, | |
745 | WM8400_ROMIX_ENA_SHIFT, | |
746 | 0, &wm8400_dapm_romix_controls[0], | |
747 | ARRAY_SIZE(wm8400_dapm_romix_controls), | |
748 | outmixer_event, SND_SOC_DAPM_PRE_REG), | |
749 | ||
750 | /* LOUT PGA */ | |
751 | SND_SOC_DAPM_PGA("LOUT PGA", WM8400_POWER_MANAGEMENT_1, WM8400_LOUT_ENA_SHIFT, | |
752 | 0, NULL, 0), | |
753 | ||
754 | /* ROUT PGA */ | |
755 | SND_SOC_DAPM_PGA("ROUT PGA", WM8400_POWER_MANAGEMENT_1, WM8400_ROUT_ENA_SHIFT, | |
756 | 0, NULL, 0), | |
757 | ||
758 | /* LOPGA */ | |
759 | SND_SOC_DAPM_PGA("LOPGA", WM8400_POWER_MANAGEMENT_3, WM8400_LOPGA_ENA_SHIFT, 0, | |
760 | NULL, 0), | |
761 | ||
762 | /* ROPGA */ | |
763 | SND_SOC_DAPM_PGA("ROPGA", WM8400_POWER_MANAGEMENT_3, WM8400_ROPGA_ENA_SHIFT, 0, | |
764 | NULL, 0), | |
765 | ||
766 | /* MICBIAS */ | |
767 | SND_SOC_DAPM_MICBIAS("MICBIAS", WM8400_POWER_MANAGEMENT_1, | |
768 | WM8400_MIC1BIAS_ENA_SHIFT, 0), | |
769 | ||
770 | SND_SOC_DAPM_OUTPUT("LON"), | |
771 | SND_SOC_DAPM_OUTPUT("LOP"), | |
772 | SND_SOC_DAPM_OUTPUT("OUT3"), | |
773 | SND_SOC_DAPM_OUTPUT("LOUT"), | |
774 | SND_SOC_DAPM_OUTPUT("SPKN"), | |
775 | SND_SOC_DAPM_OUTPUT("SPKP"), | |
776 | SND_SOC_DAPM_OUTPUT("ROUT"), | |
777 | SND_SOC_DAPM_OUTPUT("OUT4"), | |
778 | SND_SOC_DAPM_OUTPUT("ROP"), | |
779 | SND_SOC_DAPM_OUTPUT("RON"), | |
780 | ||
781 | SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), | |
782 | }; | |
783 | ||
784 | static const struct snd_soc_dapm_route audio_map[] = { | |
785 | /* Make DACs turn on when playing even if not mixed into any outputs */ | |
786 | {"Internal DAC Sink", NULL, "Left DAC"}, | |
787 | {"Internal DAC Sink", NULL, "Right DAC"}, | |
788 | ||
789 | /* Make ADCs turn on when recording | |
790 | * even if not mixed from any inputs */ | |
791 | {"Left ADC", NULL, "Internal ADC Source"}, | |
792 | {"Right ADC", NULL, "Internal ADC Source"}, | |
793 | ||
794 | /* Input Side */ | |
795 | /* LIN12 PGA */ | |
796 | {"LIN12 PGA", "LIN1 Switch", "LIN1"}, | |
797 | {"LIN12 PGA", "LIN2 Switch", "LIN2"}, | |
798 | /* LIN34 PGA */ | |
799 | {"LIN34 PGA", "LIN3 Switch", "LIN3"}, | |
800 | {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"}, | |
801 | /* INMIXL */ | |
802 | {"INMIXL", "Record Left Volume", "LOMIX"}, | |
803 | {"INMIXL", "LIN2 Volume", "LIN2"}, | |
804 | {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, | |
805 | {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, | |
806 | /* AILNMUX */ | |
807 | {"AILNMUX", "INMIXL Mix", "INMIXL"}, | |
808 | {"AILNMUX", "DIFFINL Mix", "LIN12 PGA"}, | |
809 | {"AILNMUX", "DIFFINL Mix", "LIN34 PGA"}, | |
810 | {"AILNMUX", "RXVOICE Mix", "LIN4/RXN"}, | |
811 | {"AILNMUX", "RXVOICE Mix", "RIN4/RXP"}, | |
812 | /* ADC */ | |
813 | {"Left ADC", NULL, "AILNMUX"}, | |
814 | ||
815 | /* RIN12 PGA */ | |
816 | {"RIN12 PGA", "RIN1 Switch", "RIN1"}, | |
817 | {"RIN12 PGA", "RIN2 Switch", "RIN2"}, | |
818 | /* RIN34 PGA */ | |
819 | {"RIN34 PGA", "RIN3 Switch", "RIN3"}, | |
820 | {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"}, | |
821 | /* INMIXL */ | |
822 | {"INMIXR", "Record Right Volume", "ROMIX"}, | |
823 | {"INMIXR", "RIN2 Volume", "RIN2"}, | |
824 | {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, | |
825 | {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, | |
826 | /* AIRNMUX */ | |
827 | {"AIRNMUX", "INMIXR Mix", "INMIXR"}, | |
828 | {"AIRNMUX", "DIFFINR Mix", "RIN12 PGA"}, | |
829 | {"AIRNMUX", "DIFFINR Mix", "RIN34 PGA"}, | |
830 | {"AIRNMUX", "RXVOICE Mix", "LIN4/RXN"}, | |
831 | {"AIRNMUX", "RXVOICE Mix", "RIN4/RXP"}, | |
832 | /* ADC */ | |
833 | {"Right ADC", NULL, "AIRNMUX"}, | |
834 | ||
835 | /* LOMIX */ | |
836 | {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, | |
837 | {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, | |
838 | {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, | |
839 | {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, | |
840 | {"LOMIX", "LOMIX Right ADC Bypass Switch", "AIRNMUX"}, | |
841 | {"LOMIX", "LOMIX Left ADC Bypass Switch", "AILNMUX"}, | |
842 | {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, | |
843 | ||
844 | /* ROMIX */ | |
845 | {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, | |
846 | {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, | |
847 | {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, | |
848 | {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, | |
849 | {"ROMIX", "ROMIX Right ADC Bypass Switch", "AIRNMUX"}, | |
850 | {"ROMIX", "ROMIX Left ADC Bypass Switch", "AILNMUX"}, | |
851 | {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, | |
852 | ||
853 | /* SPKMIX */ | |
854 | {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, | |
855 | {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, | |
856 | {"SPKMIX", "SPKMIX LADC Bypass Switch", "AILNMUX"}, | |
857 | {"SPKMIX", "SPKMIX RADC Bypass Switch", "AIRNMUX"}, | |
858 | {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, | |
859 | {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, | |
860 | {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, | |
861 | {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"}, | |
862 | ||
863 | /* LONMIX */ | |
864 | {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, | |
865 | {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, | |
866 | {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, | |
867 | ||
868 | /* LOPMIX */ | |
869 | {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, | |
870 | {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, | |
871 | {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, | |
872 | ||
873 | /* OUT3MIX */ | |
874 | {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXN"}, | |
875 | {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, | |
876 | ||
877 | /* OUT4MIX */ | |
878 | {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, | |
879 | {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"}, | |
880 | ||
881 | /* RONMIX */ | |
882 | {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, | |
883 | {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, | |
884 | {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, | |
885 | ||
886 | /* ROPMIX */ | |
887 | {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, | |
888 | {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, | |
889 | {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, | |
890 | ||
891 | /* Out Mixer PGAs */ | |
892 | {"LOPGA", NULL, "LOMIX"}, | |
893 | {"ROPGA", NULL, "ROMIX"}, | |
894 | ||
895 | {"LOUT PGA", NULL, "LOMIX"}, | |
896 | {"ROUT PGA", NULL, "ROMIX"}, | |
897 | ||
898 | /* Output Pins */ | |
899 | {"LON", NULL, "LONMIX"}, | |
900 | {"LOP", NULL, "LOPMIX"}, | |
901 | {"OUT3", NULL, "OUT3MIX"}, | |
902 | {"LOUT", NULL, "LOUT PGA"}, | |
903 | {"SPKN", NULL, "SPKMIX"}, | |
904 | {"ROUT", NULL, "ROUT PGA"}, | |
905 | {"OUT4", NULL, "OUT4MIX"}, | |
906 | {"ROP", NULL, "ROPMIX"}, | |
907 | {"RON", NULL, "RONMIX"}, | |
908 | }; | |
909 | ||
910 | static int wm8400_add_widgets(struct snd_soc_codec *codec) | |
911 | { | |
912 | snd_soc_dapm_new_controls(codec, wm8400_dapm_widgets, | |
913 | ARRAY_SIZE(wm8400_dapm_widgets)); | |
914 | ||
915 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); | |
916 | ||
917 | snd_soc_dapm_new_widgets(codec); | |
918 | return 0; | |
919 | } | |
920 | ||
921 | /* | |
922 | * Clock after FLL and dividers | |
923 | */ | |
924 | static int wm8400_set_dai_sysclk(struct snd_soc_dai *codec_dai, | |
925 | int clk_id, unsigned int freq, int dir) | |
926 | { | |
927 | struct snd_soc_codec *codec = codec_dai->codec; | |
928 | struct wm8400_priv *wm8400 = codec->private_data; | |
929 | ||
930 | wm8400->sysclk = freq; | |
931 | return 0; | |
932 | } | |
933 | ||
934 | /* | |
935 | * Sets ADC and Voice DAC format. | |
936 | */ | |
937 | static int wm8400_set_dai_fmt(struct snd_soc_dai *codec_dai, | |
938 | unsigned int fmt) | |
939 | { | |
940 | struct snd_soc_codec *codec = codec_dai->codec; | |
941 | u16 audio1, audio3; | |
942 | ||
943 | audio1 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_1); | |
944 | audio3 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_3); | |
945 | ||
946 | /* set master/slave audio interface */ | |
947 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | |
948 | case SND_SOC_DAIFMT_CBS_CFS: | |
949 | audio3 &= ~WM8400_AIF_MSTR1; | |
950 | break; | |
951 | case SND_SOC_DAIFMT_CBM_CFM: | |
952 | audio3 |= WM8400_AIF_MSTR1; | |
953 | break; | |
954 | default: | |
955 | return -EINVAL; | |
956 | } | |
957 | ||
958 | audio1 &= ~WM8400_AIF_FMT_MASK; | |
959 | ||
960 | /* interface format */ | |
961 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | |
962 | case SND_SOC_DAIFMT_I2S: | |
963 | audio1 |= WM8400_AIF_FMT_I2S; | |
964 | audio1 &= ~WM8400_AIF_LRCLK_INV; | |
965 | break; | |
966 | case SND_SOC_DAIFMT_RIGHT_J: | |
967 | audio1 |= WM8400_AIF_FMT_RIGHTJ; | |
968 | audio1 &= ~WM8400_AIF_LRCLK_INV; | |
969 | break; | |
970 | case SND_SOC_DAIFMT_LEFT_J: | |
971 | audio1 |= WM8400_AIF_FMT_LEFTJ; | |
972 | audio1 &= ~WM8400_AIF_LRCLK_INV; | |
973 | break; | |
974 | case SND_SOC_DAIFMT_DSP_A: | |
975 | audio1 |= WM8400_AIF_FMT_DSP; | |
976 | audio1 &= ~WM8400_AIF_LRCLK_INV; | |
977 | break; | |
978 | case SND_SOC_DAIFMT_DSP_B: | |
979 | audio1 |= WM8400_AIF_FMT_DSP | WM8400_AIF_LRCLK_INV; | |
980 | break; | |
981 | default: | |
982 | return -EINVAL; | |
983 | } | |
984 | ||
985 | wm8400_write(codec, WM8400_AUDIO_INTERFACE_1, audio1); | |
986 | wm8400_write(codec, WM8400_AUDIO_INTERFACE_3, audio3); | |
987 | return 0; | |
988 | } | |
989 | ||
990 | static int wm8400_set_dai_clkdiv(struct snd_soc_dai *codec_dai, | |
991 | int div_id, int div) | |
992 | { | |
993 | struct snd_soc_codec *codec = codec_dai->codec; | |
994 | u16 reg; | |
995 | ||
996 | switch (div_id) { | |
997 | case WM8400_MCLK_DIV: | |
998 | reg = wm8400_read(codec, WM8400_CLOCKING_2) & | |
999 | ~WM8400_MCLK_DIV_MASK; | |
1000 | wm8400_write(codec, WM8400_CLOCKING_2, reg | div); | |
1001 | break; | |
1002 | case WM8400_DACCLK_DIV: | |
1003 | reg = wm8400_read(codec, WM8400_CLOCKING_2) & | |
1004 | ~WM8400_DAC_CLKDIV_MASK; | |
1005 | wm8400_write(codec, WM8400_CLOCKING_2, reg | div); | |
1006 | break; | |
1007 | case WM8400_ADCCLK_DIV: | |
1008 | reg = wm8400_read(codec, WM8400_CLOCKING_2) & | |
1009 | ~WM8400_ADC_CLKDIV_MASK; | |
1010 | wm8400_write(codec, WM8400_CLOCKING_2, reg | div); | |
1011 | break; | |
1012 | case WM8400_BCLK_DIV: | |
1013 | reg = wm8400_read(codec, WM8400_CLOCKING_1) & | |
1014 | ~WM8400_BCLK_DIV_MASK; | |
1015 | wm8400_write(codec, WM8400_CLOCKING_1, reg | div); | |
1016 | break; | |
1017 | default: | |
1018 | return -EINVAL; | |
1019 | } | |
1020 | ||
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | /* | |
1025 | * Set PCM DAI bit size and sample rate. | |
1026 | */ | |
1027 | static int wm8400_hw_params(struct snd_pcm_substream *substream, | |
1028 | struct snd_pcm_hw_params *params, | |
1029 | struct snd_soc_dai *dai) | |
1030 | { | |
1031 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
1032 | struct snd_soc_device *socdev = rtd->socdev; | |
1033 | struct snd_soc_codec *codec = socdev->card->codec; | |
1034 | u16 audio1 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_1); | |
1035 | ||
1036 | audio1 &= ~WM8400_AIF_WL_MASK; | |
1037 | /* bit size */ | |
1038 | switch (params_format(params)) { | |
1039 | case SNDRV_PCM_FORMAT_S16_LE: | |
1040 | break; | |
1041 | case SNDRV_PCM_FORMAT_S20_3LE: | |
1042 | audio1 |= WM8400_AIF_WL_20BITS; | |
1043 | break; | |
1044 | case SNDRV_PCM_FORMAT_S24_LE: | |
1045 | audio1 |= WM8400_AIF_WL_24BITS; | |
1046 | break; | |
1047 | case SNDRV_PCM_FORMAT_S32_LE: | |
1048 | audio1 |= WM8400_AIF_WL_32BITS; | |
1049 | break; | |
1050 | } | |
1051 | ||
1052 | wm8400_write(codec, WM8400_AUDIO_INTERFACE_1, audio1); | |
1053 | return 0; | |
1054 | } | |
1055 | ||
1056 | static int wm8400_mute(struct snd_soc_dai *dai, int mute) | |
1057 | { | |
1058 | struct snd_soc_codec *codec = dai->codec; | |
1059 | u16 val = wm8400_read(codec, WM8400_DAC_CTRL) & ~WM8400_DAC_MUTE; | |
1060 | ||
1061 | if (mute) | |
1062 | wm8400_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE); | |
1063 | else | |
1064 | wm8400_write(codec, WM8400_DAC_CTRL, val); | |
1065 | ||
1066 | return 0; | |
1067 | } | |
1068 | ||
1069 | /* TODO: set bias for best performance at standby */ | |
1070 | static int wm8400_set_bias_level(struct snd_soc_codec *codec, | |
1071 | enum snd_soc_bias_level level) | |
1072 | { | |
1073 | struct wm8400_priv *wm8400 = codec->private_data; | |
1074 | u16 val; | |
1075 | int ret; | |
1076 | ||
1077 | switch (level) { | |
1078 | case SND_SOC_BIAS_ON: | |
1079 | break; | |
1080 | ||
1081 | case SND_SOC_BIAS_PREPARE: | |
1082 | /* VMID=2*50k */ | |
1083 | val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1) & | |
1084 | ~WM8400_VMID_MODE_MASK; | |
1085 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x2); | |
1086 | break; | |
1087 | ||
1088 | case SND_SOC_BIAS_STANDBY: | |
1089 | if (codec->bias_level == SND_SOC_BIAS_OFF) { | |
1090 | ret = regulator_bulk_enable(ARRAY_SIZE(power), | |
1091 | &power[0]); | |
1092 | if (ret != 0) { | |
1093 | dev_err(wm8400->wm8400->dev, | |
1094 | "Failed to enable regulators: %d\n", | |
1095 | ret); | |
1096 | return ret; | |
1097 | } | |
1098 | ||
1099 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, | |
1100 | WM8400_CODEC_ENA | WM8400_SYSCLK_ENA); | |
1101 | ||
aaf1e176 MB |
1102 | /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ |
1103 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | | |
1104 | WM8400_BUFDCOPEN | WM8400_POBCTRL); | |
1105 | ||
e3598f6e | 1106 | msleep(50); |
aaf1e176 MB |
1107 | |
1108 | /* Enable VREF & VMID at 2x50k */ | |
e3598f6e | 1109 | val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1); |
aaf1e176 MB |
1110 | val |= 0x2 | WM8400_VREF_ENA; |
1111 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); | |
1112 | ||
aaf1e176 MB |
1113 | /* Enable BUFIOEN */ |
1114 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | | |
1115 | WM8400_BUFDCOPEN | WM8400_POBCTRL | | |
1116 | WM8400_BUFIOEN); | |
1117 | ||
aaf1e176 MB |
1118 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
1119 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_BUFIOEN); | |
1120 | } | |
1121 | ||
1122 | /* VMID=2*300k */ | |
1123 | val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1) & | |
1124 | ~WM8400_VMID_MODE_MASK; | |
1125 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x4); | |
1126 | break; | |
1127 | ||
1128 | case SND_SOC_BIAS_OFF: | |
1129 | /* Enable POBCTRL and SOFT_ST */ | |
1130 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | | |
1131 | WM8400_POBCTRL | WM8400_BUFIOEN); | |
1132 | ||
1133 | /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ | |
1134 | wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST | | |
1135 | WM8400_BUFDCOPEN | WM8400_POBCTRL | | |
1136 | WM8400_BUFIOEN); | |
1137 | ||
1138 | /* mute DAC */ | |
1139 | val = wm8400_read(codec, WM8400_DAC_CTRL); | |
1140 | wm8400_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE); | |
1141 | ||
1142 | /* Enable any disabled outputs */ | |
1143 | val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1); | |
1144 | val |= WM8400_SPK_ENA | WM8400_OUT3_ENA | | |
1145 | WM8400_OUT4_ENA | WM8400_LOUT_ENA | | |
1146 | WM8400_ROUT_ENA; | |
1147 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); | |
1148 | ||
1149 | /* Disable VMID */ | |
1150 | val &= ~WM8400_VMID_MODE_MASK; | |
1151 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); | |
1152 | ||
1153 | msleep(300); | |
1154 | ||
1155 | /* Enable all output discharge bits */ | |
1156 | wm8400_write(codec, WM8400_ANTIPOP1, WM8400_DIS_LLINE | | |
1157 | WM8400_DIS_RLINE | WM8400_DIS_OUT3 | | |
1158 | WM8400_DIS_OUT4 | WM8400_DIS_LOUT | | |
1159 | WM8400_DIS_ROUT); | |
1160 | ||
1161 | /* Disable VREF */ | |
1162 | val &= ~WM8400_VREF_ENA; | |
1163 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val); | |
1164 | ||
1165 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | |
1166 | wm8400_write(codec, WM8400_ANTIPOP2, 0x0); | |
1167 | ||
1168 | ret = regulator_bulk_disable(ARRAY_SIZE(power), | |
1169 | &power[0]); | |
1170 | if (ret != 0) | |
1171 | return ret; | |
1172 | ||
1173 | break; | |
1174 | } | |
1175 | ||
1176 | codec->bias_level = level; | |
1177 | return 0; | |
1178 | } | |
1179 | ||
1180 | #define WM8400_RATES SNDRV_PCM_RATE_8000_96000 | |
1181 | ||
1182 | #define WM8400_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | |
1183 | SNDRV_PCM_FMTBIT_S24_LE) | |
1184 | ||
65ec1cd1 MB |
1185 | static struct snd_soc_dai_ops wm8400_dai_ops = { |
1186 | .hw_params = wm8400_hw_params, | |
1187 | .digital_mute = wm8400_mute, | |
1188 | .set_fmt = wm8400_set_dai_fmt, | |
1189 | .set_clkdiv = wm8400_set_dai_clkdiv, | |
1190 | .set_sysclk = wm8400_set_dai_sysclk, | |
1191 | }; | |
1192 | ||
aaf1e176 MB |
1193 | /* |
1194 | * The WM8400 supports 2 different and mutually exclusive DAI | |
1195 | * configurations. | |
1196 | * | |
1197 | * 1. ADC/DAC on Primary Interface | |
1198 | * 2. ADC on Primary Interface/DAC on secondary | |
1199 | */ | |
1200 | struct snd_soc_dai wm8400_dai = { | |
1201 | /* ADC/DAC on primary */ | |
1202 | .name = "WM8400 ADC/DAC Primary", | |
1203 | .id = 1, | |
1204 | .playback = { | |
1205 | .stream_name = "Playback", | |
1206 | .channels_min = 1, | |
1207 | .channels_max = 2, | |
1208 | .rates = WM8400_RATES, | |
1209 | .formats = WM8400_FORMATS, | |
1210 | }, | |
1211 | .capture = { | |
1212 | .stream_name = "Capture", | |
1213 | .channels_min = 1, | |
1214 | .channels_max = 2, | |
1215 | .rates = WM8400_RATES, | |
1216 | .formats = WM8400_FORMATS, | |
1217 | }, | |
65ec1cd1 | 1218 | .ops = &wm8400_dai_ops, |
aaf1e176 MB |
1219 | }; |
1220 | EXPORT_SYMBOL_GPL(wm8400_dai); | |
1221 | ||
1222 | static int wm8400_suspend(struct platform_device *pdev, pm_message_t state) | |
1223 | { | |
1224 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1225 | struct snd_soc_codec *codec = socdev->card->codec; | |
1226 | ||
1227 | wm8400_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
1228 | ||
1229 | return 0; | |
1230 | } | |
1231 | ||
1232 | static int wm8400_resume(struct platform_device *pdev) | |
1233 | { | |
1234 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1235 | struct snd_soc_codec *codec = socdev->card->codec; | |
1236 | ||
1237 | wm8400_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
1238 | ||
1239 | return 0; | |
1240 | } | |
1241 | ||
1242 | static struct snd_soc_codec *wm8400_codec; | |
1243 | ||
1244 | static int wm8400_probe(struct platform_device *pdev) | |
1245 | { | |
1246 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1247 | struct snd_soc_codec *codec; | |
1248 | int ret; | |
1249 | ||
1250 | if (!wm8400_codec) { | |
1251 | dev_err(&pdev->dev, "wm8400 not yet discovered\n"); | |
1252 | return -ENODEV; | |
1253 | } | |
1254 | codec = wm8400_codec; | |
1255 | ||
1256 | socdev->card->codec = codec; | |
1257 | ||
1258 | /* register pcms */ | |
1259 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | |
1260 | if (ret < 0) { | |
1261 | dev_err(&pdev->dev, "failed to create pcms\n"); | |
1262 | goto pcm_err; | |
1263 | } | |
1264 | ||
1265 | wm8400_add_controls(codec); | |
1266 | wm8400_add_widgets(codec); | |
1267 | ||
1268 | ret = snd_soc_init_card(socdev); | |
1269 | if (ret < 0) { | |
1270 | dev_err(&pdev->dev, "failed to register card\n"); | |
1271 | goto card_err; | |
1272 | } | |
1273 | ||
1274 | return ret; | |
1275 | ||
1276 | card_err: | |
1277 | snd_soc_free_pcms(socdev); | |
1278 | snd_soc_dapm_free(socdev); | |
1279 | pcm_err: | |
1280 | return ret; | |
1281 | } | |
1282 | ||
1283 | /* power down chip */ | |
1284 | static int wm8400_remove(struct platform_device *pdev) | |
1285 | { | |
1286 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | |
1287 | ||
1288 | snd_soc_free_pcms(socdev); | |
1289 | snd_soc_dapm_free(socdev); | |
1290 | ||
1291 | return 0; | |
1292 | } | |
1293 | ||
1294 | struct snd_soc_codec_device soc_codec_dev_wm8400 = { | |
1295 | .probe = wm8400_probe, | |
1296 | .remove = wm8400_remove, | |
1297 | .suspend = wm8400_suspend, | |
1298 | .resume = wm8400_resume, | |
1299 | }; | |
1300 | ||
1301 | static void wm8400_probe_deferred(struct work_struct *work) | |
1302 | { | |
1303 | struct wm8400_priv *priv = container_of(work, struct wm8400_priv, | |
1304 | work); | |
1305 | struct snd_soc_codec *codec = &priv->codec; | |
1306 | int ret; | |
1307 | ||
1308 | /* charge output caps */ | |
1309 | wm8400_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
1310 | ||
1311 | /* We're done, tell the subsystem. */ | |
1312 | ret = snd_soc_register_codec(codec); | |
1313 | if (ret != 0) { | |
1314 | dev_err(priv->wm8400->dev, | |
1315 | "Failed to register codec: %d\n", ret); | |
1316 | goto err; | |
1317 | } | |
1318 | ||
1319 | ret = snd_soc_register_dai(&wm8400_dai); | |
1320 | if (ret != 0) { | |
1321 | dev_err(priv->wm8400->dev, | |
1322 | "Failed to register DAI: %d\n", ret); | |
1323 | goto err_codec; | |
1324 | } | |
1325 | ||
1326 | return; | |
1327 | ||
1328 | err_codec: | |
1329 | snd_soc_unregister_codec(codec); | |
1330 | err: | |
1331 | wm8400_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
1332 | } | |
1333 | ||
1334 | static int wm8400_codec_probe(struct platform_device *dev) | |
1335 | { | |
1336 | struct wm8400_priv *priv; | |
1337 | int ret; | |
1338 | u16 reg; | |
1339 | struct snd_soc_codec *codec; | |
1340 | ||
1341 | priv = kzalloc(sizeof(struct wm8400_priv), GFP_KERNEL); | |
1342 | if (priv == NULL) | |
1343 | return -ENOMEM; | |
1344 | ||
1345 | codec = &priv->codec; | |
1346 | codec->private_data = priv; | |
1347 | codec->control_data = dev->dev.driver_data; | |
1348 | priv->wm8400 = dev->dev.driver_data; | |
1349 | ||
1350 | ret = regulator_bulk_get(priv->wm8400->dev, | |
1351 | ARRAY_SIZE(power), &power[0]); | |
1352 | if (ret != 0) { | |
1353 | dev_err(&dev->dev, "Failed to get regulators: %d\n", ret); | |
1354 | goto err; | |
1355 | } | |
1356 | ||
1357 | codec->dev = &dev->dev; | |
1358 | wm8400_dai.dev = &dev->dev; | |
1359 | ||
1360 | codec->name = "WM8400"; | |
1361 | codec->owner = THIS_MODULE; | |
1362 | codec->read = wm8400_read; | |
1363 | codec->write = wm8400_write; | |
1364 | codec->bias_level = SND_SOC_BIAS_OFF; | |
1365 | codec->set_bias_level = wm8400_set_bias_level; | |
1366 | codec->dai = &wm8400_dai; | |
1367 | codec->num_dai = 1; | |
1368 | codec->reg_cache_size = WM8400_REGISTER_COUNT; | |
1369 | mutex_init(&codec->mutex); | |
1370 | INIT_LIST_HEAD(&codec->dapm_widgets); | |
1371 | INIT_LIST_HEAD(&codec->dapm_paths); | |
1372 | INIT_WORK(&priv->work, wm8400_probe_deferred); | |
1373 | ||
1374 | wm8400_codec_reset(codec); | |
1375 | ||
1376 | reg = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1); | |
1377 | wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, reg | WM8400_CODEC_ENA); | |
1378 | ||
1379 | /* Latch volume update bits */ | |
1380 | reg = wm8400_read(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME); | |
1381 | wm8400_write(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME, | |
1382 | reg & WM8400_IPVU); | |
1383 | reg = wm8400_read(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME); | |
1384 | wm8400_write(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME, | |
1385 | reg & WM8400_IPVU); | |
1386 | ||
1387 | wm8400_write(codec, WM8400_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); | |
1388 | wm8400_write(codec, WM8400_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); | |
1389 | ||
1390 | wm8400_codec = codec; | |
1391 | ||
1392 | if (!schedule_work(&priv->work)) { | |
1393 | ret = -EINVAL; | |
1394 | goto err_regulator; | |
1395 | } | |
1396 | ||
1397 | return 0; | |
1398 | ||
1399 | err_regulator: | |
1400 | wm8400_codec = NULL; | |
1401 | regulator_bulk_free(ARRAY_SIZE(power), power); | |
1402 | err: | |
1403 | kfree(priv); | |
1404 | return ret; | |
1405 | } | |
1406 | ||
1407 | static int __exit wm8400_codec_remove(struct platform_device *dev) | |
1408 | { | |
1409 | struct wm8400_priv *priv = wm8400_codec->private_data; | |
1410 | u16 reg; | |
1411 | ||
1412 | snd_soc_unregister_dai(&wm8400_dai); | |
1413 | snd_soc_unregister_codec(wm8400_codec); | |
1414 | ||
1415 | reg = wm8400_read(wm8400_codec, WM8400_POWER_MANAGEMENT_1); | |
1416 | wm8400_write(wm8400_codec, WM8400_POWER_MANAGEMENT_1, | |
1417 | reg & (~WM8400_CODEC_ENA)); | |
1418 | ||
1419 | regulator_bulk_free(ARRAY_SIZE(power), power); | |
1420 | kfree(priv); | |
1421 | ||
1422 | wm8400_codec = NULL; | |
1423 | ||
1424 | return 0; | |
1425 | } | |
1426 | ||
1427 | static struct platform_driver wm8400_codec_driver = { | |
1428 | .driver = { | |
1429 | .name = "wm8400-codec", | |
1430 | .owner = THIS_MODULE, | |
1431 | }, | |
1432 | .probe = wm8400_codec_probe, | |
1433 | .remove = __exit_p(wm8400_codec_remove), | |
1434 | }; | |
1435 | ||
1436 | static int __init wm8400_codec_init(void) | |
1437 | { | |
1438 | return platform_driver_register(&wm8400_codec_driver); | |
1439 | } | |
1440 | module_init(wm8400_codec_init); | |
1441 | ||
1442 | static void __exit wm8400_codec_exit(void) | |
1443 | { | |
1444 | platform_driver_unregister(&wm8400_codec_driver); | |
1445 | } | |
1446 | module_exit(wm8400_codec_exit); | |
1447 | ||
1448 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8400); | |
1449 | ||
1450 | MODULE_DESCRIPTION("ASoC WM8400 driver"); | |
1451 | MODULE_AUTHOR("Mark Brown"); | |
1452 | MODULE_LICENSE("GPL"); | |
1453 | MODULE_ALIAS("platform:wm8400-codec"); |