ASoC: Constify snd_soc_dai_ops structs
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / cs4270.c
CommitLineData
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1/*
2 * CS4270 ALSA SoC (ASoC) codec driver
3 *
4 * Author: Timur Tabi <timur@freescale.com>
5 *
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6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
9 * express or implied.
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10 *
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
12 *
13 * Current features/limitations:
14 *
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15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
5e7c0344 21 * - Power management is supported
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22 */
23
24#include <linux/module.h>
25#include <linux/platform_device.h>
5a0e3ad6 26#include <linux/slab.h>
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27#include <sound/core.h>
28#include <sound/soc.h>
29#include <sound/initval.h>
30#include <linux/i2c.h>
5e7c0344 31#include <linux/delay.h>
ffbfd336 32#include <linux/regulator/consumer.h>
b0c813ce 33
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34/*
35 * The codec isn't really big-endian or little-endian, since the I2S
36 * interface requires data to be sent serially with the MSbit first.
37 * However, to support BE and LE I2S devices, we specify both here. That
38 * way, ALSA will always match the bit patterns.
39 */
40#define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
41 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
42 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
43 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
44 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
45 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
46
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47/* CS4270 registers addresses */
48#define CS4270_CHIPID 0x01 /* Chip ID */
49#define CS4270_PWRCTL 0x02 /* Power Control */
50#define CS4270_MODE 0x03 /* Mode Control */
51#define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
52#define CS4270_TRANS 0x05 /* Transition Control */
53#define CS4270_MUTE 0x06 /* Mute Control */
54#define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
55#define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
56
57#define CS4270_FIRSTREG 0x01
58#define CS4270_LASTREG 0x08
59#define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
80ab8817 60#define CS4270_I2C_INCR 0x80
9dbd627b 61
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62/* Bit masks for the CS4270 registers */
63#define CS4270_CHIPID_ID 0xF0
64#define CS4270_CHIPID_REV 0x0F
65#define CS4270_PWRCTL_FREEZE 0x80
66#define CS4270_PWRCTL_PDN_ADC 0x20
67#define CS4270_PWRCTL_PDN_DAC 0x02
68#define CS4270_PWRCTL_PDN 0x01
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69#define CS4270_PWRCTL_PDN_ALL \
70 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
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71#define CS4270_MODE_SPEED_MASK 0x30
72#define CS4270_MODE_1X 0x00
73#define CS4270_MODE_2X 0x10
74#define CS4270_MODE_4X 0x20
75#define CS4270_MODE_SLAVE 0x30
76#define CS4270_MODE_DIV_MASK 0x0E
77#define CS4270_MODE_DIV1 0x00
78#define CS4270_MODE_DIV15 0x02
79#define CS4270_MODE_DIV2 0x04
80#define CS4270_MODE_DIV3 0x06
81#define CS4270_MODE_DIV4 0x08
82#define CS4270_MODE_POPGUARD 0x01
83#define CS4270_FORMAT_FREEZE_A 0x80
84#define CS4270_FORMAT_FREEZE_B 0x40
85#define CS4270_FORMAT_LOOPBACK 0x20
86#define CS4270_FORMAT_DAC_MASK 0x18
87#define CS4270_FORMAT_DAC_LJ 0x00
88#define CS4270_FORMAT_DAC_I2S 0x08
89#define CS4270_FORMAT_DAC_RJ16 0x18
90#define CS4270_FORMAT_DAC_RJ24 0x10
91#define CS4270_FORMAT_ADC_MASK 0x01
92#define CS4270_FORMAT_ADC_LJ 0x00
93#define CS4270_FORMAT_ADC_I2S 0x01
94#define CS4270_TRANS_ONE_VOL 0x80
95#define CS4270_TRANS_SOFT 0x40
96#define CS4270_TRANS_ZERO 0x20
97#define CS4270_TRANS_INV_ADC_A 0x08
98#define CS4270_TRANS_INV_ADC_B 0x10
99#define CS4270_TRANS_INV_DAC_A 0x02
100#define CS4270_TRANS_INV_DAC_B 0x04
101#define CS4270_TRANS_DEEMPH 0x01
102#define CS4270_MUTE_AUTO 0x20
103#define CS4270_MUTE_ADC_A 0x08
104#define CS4270_MUTE_ADC_B 0x10
105#define CS4270_MUTE_POLARITY 0x04
106#define CS4270_MUTE_DAC_A 0x01
107#define CS4270_MUTE_DAC_B 0x02
108
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109/* Power-on default values for the registers
110 *
111 * This array contains the power-on default values of the registers, with the
112 * exception of the "CHIPID" register (01h). The lower four bits of that
113 * register contain the hardware revision, so it is treated as volatile.
114 *
115 * Also note that on the CS4270, the first readable register is 1, but ASoC
116 * assumes the first register is 0. Therfore, the array must have an entry for
117 * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
118 * be read.
119 */
120static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {
121 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
122};
123
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124static const char *supply_names[] = {
125 "va", "vd", "vlc"
126};
127
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128/* Private data for the CS4270 */
129struct cs4270_private {
f0fba2ad 130 enum snd_soc_control_type control_type;
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131 unsigned int mclk; /* Input frequency of the MCLK pin */
132 unsigned int mode; /* The mode (I2S or left-justified) */
4eae080d 133 unsigned int slave_mode;
1a4ba05e 134 unsigned int manual_mute;
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135
136 /* power domain regulators */
137 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
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138};
139
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140/**
141 * struct cs4270_mode_ratios - clock ratio tables
142 * @ratio: the ratio of MCLK to the sample rate
143 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
144 * this ratio
145 * @mclk: the Ratio Select bits to set in the Mode Control register for this
146 * ratio
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147 *
148 * The data for this chart is taken from Table 5 of the CS4270 reference
149 * manual.
150 *
151 * This table is used to determine how to program the Mode Control register.
152 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
153 * rates the CS4270 currently supports.
154 *
ff7bf02f 155 * @speed_mode is the corresponding bit pattern to be written to the
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156 * MODE bits of the Mode Control Register
157 *
ff7bf02f 158 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
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159 * the Mode Control Register.
160 *
161 * In situations where a single ratio is represented by multiple speed
162 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
163 * double-speed instead of quad-speed. However, the CS4270 errata states
ff7bf02f 164 * that divide-By-1.5 can cause failures, so we avoid that mode where
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165 * possible.
166 *
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167 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
168 * work if Vd is 3.3V. If this effects you, select the
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169 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
170 * never select any sample rates that require divide-by-1.5.
171 */
ff7bf02f 172struct cs4270_mode_ratios {
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173 unsigned int ratio;
174 u8 speed_mode;
175 u8 mclk;
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176};
177
d9fb7fbd 178static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
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179 {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
180#ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
181 {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
182#endif
183 {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
184 {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
185 {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
186 {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
187 {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
188 {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
189 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
190};
191
192/* The number of MCLK/LRCK ratios supported by the CS4270 */
193#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
9dbd627b 194
d4754ec9 195static int cs4270_reg_is_readable(struct snd_soc_codec *codec, unsigned int reg)
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196{
197 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
198}
199
d4754ec9 200static int cs4270_reg_is_volatile(struct snd_soc_codec *codec, unsigned int reg)
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201{
202 /* Unreadable registers are considered volatile */
203 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
204 return 1;
205
206 return reg == CS4270_CHIPID;
207}
208
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209/**
210 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
211 * @codec_dai: the codec DAI
212 * @clk_id: the clock ID (ignored)
213 * @freq: the MCLK input frequency
214 * @dir: the clock direction (ignored)
9dbd627b 215 *
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216 * This function is used to tell the codec driver what the input MCLK
217 * frequency is.
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218 *
219 * The value of MCLK is used to determine which sample rates are supported
220 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
ff7bf02f 221 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
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222 *
223 * This function calculates the nine ratios and determines which ones match
224 * a standard sample rate. If there's a match, then it is added to the list
ff7bf02f 225 * of supported sample rates.
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226 *
227 * This function must be called by the machine driver's 'startup' function,
228 * otherwise the list of supported sample rates will not be available in
229 * time for ALSA.
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230 *
231 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
232 * theoretically possible sample rates to be enabled. Call it again with a
233 * proper value set one the external clock is set (most probably you would do
234 * that from a machine's driver 'hw_param' hook.
9dbd627b 235 */
e550e17f 236static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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237 int clk_id, unsigned int freq, int dir)
238{
239 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 240 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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241
242 cs4270->mclk = freq;
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243 return 0;
244}
245
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246/**
247 * cs4270_set_dai_fmt - configure the codec for the selected audio format
248 * @codec_dai: the codec DAI
249 * @format: a SND_SOC_DAIFMT_x value indicating the data format
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250 *
251 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
252 * codec accordingly.
253 *
254 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
255 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
256 * data for playback only, but ASoC currently does not support different
257 * formats for playback vs. record.
258 */
e550e17f 259static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
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260 unsigned int format)
261{
262 struct snd_soc_codec *codec = codec_dai->codec;
b2c812e2 263 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
9dbd627b 264
4eae080d 265 /* set DAI format */
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266 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
267 case SND_SOC_DAIFMT_I2S:
268 case SND_SOC_DAIFMT_LEFT_J:
269 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
270 break;
271 default:
a6c255e0 272 dev_err(codec->dev, "invalid dai format\n");
ac60155f 273 return -EINVAL;
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274 }
275
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276 /* set master/slave audio interface */
277 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
278 case SND_SOC_DAIFMT_CBS_CFS:
279 cs4270->slave_mode = 1;
280 break;
281 case SND_SOC_DAIFMT_CBM_CFM:
282 cs4270->slave_mode = 0;
283 break;
4eae080d 284 default:
ff09d49a 285 /* all other modes are unsupported by the hardware */
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286 dev_err(codec->dev, "Unknown master/slave configuration\n");
287 return -EINVAL;
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288 }
289
ac60155f 290 return 0;
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291}
292
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293/**
294 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
295 * @substream: the audio stream
296 * @params: the hardware parameters to set
297 * @dai: the SOC DAI (ignored)
b0c813ce 298 *
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299 * This function programs the hardware with the values provided.
300 * Specifically, the sample rate and the data format.
301 *
302 * The .ops functions are used to provide board-specific data, like input
303 * frequencies, to this driver. This function takes that information,
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304 * combines it with the hardware parameters provided, and programs the
305 * hardware accordingly.
306 */
307static int cs4270_hw_params(struct snd_pcm_substream *substream,
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308 struct snd_pcm_hw_params *params,
309 struct snd_soc_dai *dai)
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310{
311 struct snd_soc_pcm_runtime *rtd = substream->private_data;
f0fba2ad 312 struct snd_soc_codec *codec = rtd->codec;
b2c812e2 313 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
e34ba212 314 int ret;
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315 unsigned int i;
316 unsigned int rate;
317 unsigned int ratio;
318 int reg;
319
320 /* Figure out which MCLK/LRCK ratio to use */
321
322 rate = params_rate(params); /* Sampling rate, in Hz */
323 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
324
9dbd627b 325 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
8432395f 326 if (cs4270_mode_ratios[i].ratio == ratio)
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327 break;
328 }
329
9dbd627b 330 if (i == NUM_MCLK_RATIOS) {
b0c813ce 331 /* We did not find a matching ratio */
a6c255e0 332 dev_err(codec->dev, "could not find matching ratio\n");
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333 return -EINVAL;
334 }
335
d5e9ba1d 336 /* Set the sample rate */
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337
338 reg = snd_soc_read(codec, CS4270_MODE);
339 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
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340 reg |= cs4270_mode_ratios[i].mclk;
341
342 if (cs4270->slave_mode)
343 reg |= CS4270_MODE_SLAVE;
344 else
345 reg |= cs4270_mode_ratios[i].speed_mode;
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346
347 ret = snd_soc_write(codec, CS4270_MODE, reg);
348 if (ret < 0) {
a6c255e0 349 dev_err(codec->dev, "i2c write failed\n");
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350 return ret;
351 }
352
d5e9ba1d 353 /* Set the DAI format */
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354
355 reg = snd_soc_read(codec, CS4270_FORMAT);
356 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
357
358 switch (cs4270->mode) {
359 case SND_SOC_DAIFMT_I2S:
360 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
361 break;
362 case SND_SOC_DAIFMT_LEFT_J:
363 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
364 break;
365 default:
a6c255e0 366 dev_err(codec->dev, "unknown dai format\n");
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367 return -EINVAL;
368 }
369
370 ret = snd_soc_write(codec, CS4270_FORMAT, reg);
371 if (ret < 0) {
a6c255e0 372 dev_err(codec->dev, "i2c write failed\n");
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373 return ret;
374 }
375
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376 return ret;
377}
378
ff7bf02f 379/**
1a4ba05e 380 * cs4270_dai_mute - enable/disable the CS4270 external mute
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381 * @dai: the SOC DAI
382 * @mute: 0 = disable mute, 1 = enable mute
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383 *
384 * This function toggles the mute bits in the MUTE register. The CS4270's
385 * mute capability is intended for external muting circuitry, so if the
386 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
387 * then this function will do nothing.
388 */
1a4ba05e 389static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
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390{
391 struct snd_soc_codec *codec = dai->codec;
b2c812e2 392 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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393 int reg6;
394
395 reg6 = snd_soc_read(codec, CS4270_MUTE);
396
397 if (mute)
d5e9ba1d 398 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
1a4ba05e 399 else {
d5e9ba1d 400 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
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401 reg6 |= cs4270->manual_mute;
402 }
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403
404 return snd_soc_write(codec, CS4270_MUTE, reg6);
405}
b0c813ce 406
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407/**
408 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
409 * alsa control.
410 * @kcontrol: mixer control
411 * @ucontrol: control element information
412 *
413 * This function basically passes the arguments on to the generic
414 * snd_soc_put_volsw() function and saves the mute information in
415 * our private data structure. This is because we want to prevent
416 * cs4270_dai_mute() neglecting the user's decision to manually
417 * mute the codec's output.
418 *
419 * Returns 0 for success.
420 */
421static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
422 struct snd_ctl_elem_value *ucontrol)
423{
424 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
b2c812e2 425 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
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426 int left = !ucontrol->value.integer.value[0];
427 int right = !ucontrol->value.integer.value[1];
428
429 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
430 (right ? CS4270_MUTE_DAC_B : 0);
431
432 return snd_soc_put_volsw(kcontrol, ucontrol);
433}
434
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435/* A list of non-DAPM controls that the CS4270 supports */
436static const struct snd_kcontrol_new cs4270_snd_controls[] = {
437 SOC_DOUBLE_R("Master Playback Volume",
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438 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
439 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
440 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
441 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
7e1aa1dc 442 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
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443 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
444 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
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445 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
446 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
447 snd_soc_get_volsw, cs4270_soc_put_mute),
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448};
449
85e7652d 450static const struct snd_soc_dai_ops cs4270_dai_ops = {
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451 .hw_params = cs4270_hw_params,
452 .set_sysclk = cs4270_set_dai_sysclk,
453 .set_fmt = cs4270_set_dai_fmt,
1a4ba05e 454 .digital_mute = cs4270_dai_mute,
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455};
456
5c75848a 457static struct snd_soc_dai_driver cs4270_dai = {
f0fba2ad 458 .name = "cs4270-hifi",
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459 .playback = {
460 .stream_name = "Playback",
461 .channels_min = 1,
462 .channels_max = 2,
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463 .rates = SNDRV_PCM_RATE_CONTINUOUS,
464 .rate_min = 4000,
465 .rate_max = 216000,
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466 .formats = CS4270_FORMATS,
467 },
468 .capture = {
469 .stream_name = "Capture",
470 .channels_min = 1,
471 .channels_max = 2,
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472 .rates = SNDRV_PCM_RATE_CONTINUOUS,
473 .rate_min = 4000,
474 .rate_max = 216000,
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475 .formats = CS4270_FORMATS,
476 },
6335d055 477 .ops = &cs4270_dai_ops,
0db4d070 478};
0db4d070 479
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480/**
481 * cs4270_probe - ASoC probe function
482 * @pdev: platform device
483 *
484 * This function is called when ASoC has all the pieces it needs to
485 * instantiate a sound driver.
04eb093c 486 */
f0fba2ad 487static int cs4270_probe(struct snd_soc_codec *codec)
04eb093c 488{
b2c812e2 489 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
11b8fca5 490 int i, ret;
04eb093c 491
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492 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
493 * then do the I2C transactions itself.
494 */
495 ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);
b0c813ce 496 if (ret < 0) {
11b8fca5 497 dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
f0fba2ad 498 return ret;
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499 }
500
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TT
501 /* Disable auto-mute. This feature appears to be buggy. In some
502 * situations, auto-mute will not deactivate when it should, so we want
503 * this feature disabled by default. An application (e.g. alsactl) can
504 * re-enabled it by using the controls.
505 */
11b8fca5 506 ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
d5e9ba1d 507 if (ret < 0) {
f0fba2ad 508 dev_err(codec->dev, "i2c write failed\n");
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TT
509 return ret;
510 }
511
512 /* Disable automatic volume control. The hardware enables, and it
513 * causes volume change commands to be delayed, sometimes until after
514 * playback has started. An application (e.g. alsactl) can
515 * re-enabled it by using the controls.
516 */
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TT
517 ret = snd_soc_update_bits(codec, CS4270_TRANS,
518 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
d5e9ba1d 519 if (ret < 0) {
f0fba2ad 520 dev_err(codec->dev, "i2c write failed\n");
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TT
521 return ret;
522 }
523
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LG
524 /* Add the non-DAPM controls */
525 ret = snd_soc_add_controls(codec, cs4270_snd_controls,
526 ARRAY_SIZE(cs4270_snd_controls));
0db4d070 527 if (ret < 0) {
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528 dev_err(codec->dev, "failed to add controls\n");
529 return ret;
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530 }
531
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532 /* get the power supply regulators */
533 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
534 cs4270->supplies[i].supply = supply_names[i];
535
536 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
537 cs4270->supplies);
538 if (ret < 0)
539 return ret;
540
541 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
542 cs4270->supplies);
543 if (ret < 0)
544 goto error_free_regulators;
ec2cd95f 545
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TT
546 return 0;
547
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548error_free_regulators:
549 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
550 cs4270->supplies);
b0c813ce 551
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TT
552 return ret;
553}
554
ff7bf02f 555/**
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556 * cs4270_remove - ASoC remove function
557 * @pdev: platform device
ff7bf02f 558 *
f0fba2ad 559 * This function is the counterpart to cs4270_probe().
ff7bf02f 560 */
f0fba2ad 561static int cs4270_remove(struct snd_soc_codec *codec)
0db4d070 562{
f0fba2ad 563 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
0db4d070 564
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565 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
566 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
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TT
567
568 return 0;
ff637d38 569};
ff637d38 570
5e7c0344
DM
571#ifdef CONFIG_PM
572
573/* This suspend/resume implementation can handle both - a simple standby
574 * where the codec remains powered, and a full suspend, where the voltage
575 * domain the codec is connected to is teared down and/or any other hardware
576 * reset condition is asserted.
577 *
578 * The codec's own power saving features are enabled in the suspend callback,
579 * and all registers are written back to the hardware when resuming.
580 */
581
f0fba2ad 582static int cs4270_soc_suspend(struct snd_soc_codec *codec, pm_message_t mesg)
15b5bdae 583{
b2c812e2 584 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
ffbfd336 585 int reg, ret;
15b5bdae 586
ffbfd336
DM
587 reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
588 if (reg < 0)
589 return reg;
590
591 ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
592 if (ret < 0)
593 return ret;
594
595 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
596 cs4270->supplies);
597
598 return 0;
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DM
599}
600
f0fba2ad 601static int cs4270_soc_resume(struct snd_soc_codec *codec)
15b5bdae 602{
b2c812e2 603 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
5e7c0344
DM
604 int reg;
605
ffbfd336
DM
606 regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
607 cs4270->supplies);
608
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DM
609 /* In case the device was put to hard reset during sleep, we need to
610 * wait 500ns here before any I2C communication. */
611 ndelay(500);
612
613 /* first restore the entire register cache ... */
d66b8537 614 snd_soc_cache_sync(codec);
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DM
615
616 /* ... then disable the power-down bits */
617 reg = snd_soc_read(codec, CS4270_PWRCTL);
618 reg &= ~CS4270_PWRCTL_PDN_ALL;
619
620 return snd_soc_write(codec, CS4270_PWRCTL, reg);
621}
622#else
15b5bdae
DM
623#define cs4270_soc_suspend NULL
624#define cs4270_soc_resume NULL
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DM
625#endif /* CONFIG_PM */
626
f0fba2ad 627/*
b6f7d7c8 628 * ASoC codec driver structure
f0fba2ad 629 */
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TT
630static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
631 .probe = cs4270_probe,
632 .remove = cs4270_remove,
633 .suspend = cs4270_soc_suspend,
634 .resume = cs4270_soc_resume,
635 .volatile_register = cs4270_reg_is_volatile,
636 .readable_register = cs4270_reg_is_readable,
637 .reg_cache_size = CS4270_LASTREG + 1,
638 .reg_word_size = sizeof(u8),
639 .reg_cache_default = cs4270_default_reg_cache,
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LG
640};
641
642/**
643 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
644 * @i2c_client: the I2C client object
645 * @id: the I2C device ID (ignored)
646 *
647 * This function is called whenever the I2C subsystem finds a device that
648 * matches the device ID given via a prior call to i2c_add_driver().
649 */
650static int cs4270_i2c_probe(struct i2c_client *i2c_client,
651 const struct i2c_device_id *id)
652{
653 struct cs4270_private *cs4270;
654 int ret;
655
656 /* Verify that we have a CS4270 */
657
658 ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
659 if (ret < 0) {
660 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
661 i2c_client->addr);
662 return ret;
663 }
664 /* The top four bits of the chip ID should be 1100. */
665 if ((ret & 0xF0) != 0xC0) {
666 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
667 i2c_client->addr);
668 return -ENODEV;
669 }
670
671 dev_info(&i2c_client->dev, "found device at i2c address %X\n",
672 i2c_client->addr);
673 dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
674
675 cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL);
676 if (!cs4270) {
677 dev_err(&i2c_client->dev, "could not allocate codec\n");
678 return -ENOMEM;
679 }
680
681 i2c_set_clientdata(i2c_client, cs4270);
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682 cs4270->control_type = SND_SOC_I2C;
683
684 ret = snd_soc_register_codec(&i2c_client->dev,
685 &soc_codec_device_cs4270, &cs4270_dai, 1);
686 if (ret < 0)
687 kfree(cs4270);
688 return ret;
689}
690
691/**
692 * cs4270_i2c_remove - remove an I2C device
693 * @i2c_client: the I2C client object
694 *
695 * This function is the counterpart to cs4270_i2c_probe().
696 */
697static int cs4270_i2c_remove(struct i2c_client *i2c_client)
698{
699 snd_soc_unregister_codec(&i2c_client->dev);
700 kfree(i2c_get_clientdata(i2c_client));
701 return 0;
702}
703
704/*
705 * cs4270_id - I2C device IDs supported by this driver
706 */
79a54ea1 707static const struct i2c_device_id cs4270_id[] = {
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708 {"cs4270", 0},
709 {}
710};
711MODULE_DEVICE_TABLE(i2c, cs4270_id);
712
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713/*
714 * cs4270_i2c_driver - I2C device identification
715 *
716 * This structure tells the I2C subsystem how to identify and support a
717 * given I2C device type.
718 */
ff637d38
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719static struct i2c_driver cs4270_i2c_driver = {
720 .driver = {
f0fba2ad 721 .name = "cs4270-codec",
ff637d38
TT
722 .owner = THIS_MODULE,
723 },
724 .id_table = cs4270_id,
725 .probe = cs4270_i2c_probe,
0db4d070 726 .remove = cs4270_i2c_remove,
ff637d38 727};
b0c813ce 728
c9b3a40f 729static int __init cs4270_init(void)
64089b84 730{
04eb093c 731 return i2c_add_driver(&cs4270_i2c_driver);
64089b84
MB
732}
733module_init(cs4270_init);
734
735static void __exit cs4270_exit(void)
736{
04eb093c 737 i2c_del_driver(&cs4270_i2c_driver);
64089b84
MB
738}
739module_exit(cs4270_exit);
740
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741MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
742MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
743MODULE_LICENSE("GPL");