[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / soc / codecs / ak4642.c

/*
 * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
 *
 * Copyright (C) 2009 Renesas Solutions Corp.
 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
 *
 * Based on wm8731.c by Richard Purdie
 * Based on ak4535.c by Richard Purdie
 * Based on wm8753.c by Liam Girdwood
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/* ** CAUTION **
 *
 * This is very simple driver.
 * It can use headphone output / stereo input only
 *
 * AK4642 is tested.
 * AK4643 is tested.
 * AK4648 is tested.
 */

#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#define PW_MGMT1	0x00
#define PW_MGMT2	0x01
#define SG_SL1		0x02
#define SG_SL2		0x03
#define MD_CTL1		0x04
#define MD_CTL2		0x05
#define TIMER		0x06
#define ALC_CTL1	0x07
#define ALC_CTL2	0x08
#define L_IVC		0x09
#define L_DVC		0x0a
#define ALC_CTL3	0x0b
#define R_IVC		0x0c
#define R_DVC		0x0d
#define MD_CTL3		0x0e
#define MD_CTL4		0x0f
#define PW_MGMT3	0x10
#define DF_S		0x11
#define FIL3_0		0x12
#define FIL3_1		0x13
#define FIL3_2		0x14
#define FIL3_3		0x15
#define EQ_0		0x16
#define EQ_1		0x17
#define EQ_2		0x18
#define EQ_3		0x19
#define EQ_4		0x1a
#define EQ_5		0x1b
#define FIL1_0		0x1c
#define FIL1_1		0x1d
#define FIL1_2		0x1e
#define FIL1_3		0x1f
#define PW_MGMT4	0x20
#define MD_CTL5		0x21
#define LO_MS		0x22
#define HP_MS		0x23
#define SPK_MS		0x24

/* PW_MGMT1*/
#define PMVCM		(1 << 6) /* VCOM Power Management */
#define PMMIN		(1 << 5) /* MIN Input Power Management */
#define PMDAC		(1 << 2) /* DAC Power Management */
#define PMADL		(1 << 0) /* MIC Amp Lch and ADC Lch Power Management */

/* PW_MGMT2 */
#define HPMTN		(1 << 6)
#define PMHPL		(1 << 5)
#define PMHPR		(1 << 4)
#define MS		(1 << 3) /* master/slave select */
#define MCKO		(1 << 1)
#define PMPLL		(1 << 0)

#define PMHP_MASK	(PMHPL | PMHPR)
#define PMHP		PMHP_MASK

/* PW_MGMT3 */
#define PMADR		(1 << 0) /* MIC L / ADC R Power Management */

/* SG_SL1 */
#define MINS		(1 << 6) /* Switch from MIN to Speaker */
#define DACL		(1 << 4) /* Switch from DAC to Stereo or Receiver */
#define PMMP		(1 << 2) /* MPWR pin Power Management */
#define MGAIN0		(1 << 0) /* MIC amp gain*/

/* TIMER */
#define ZTM(param)	((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
#define WTM(param)	(((param & 0x4) << 4) | ((param & 0x3) << 2))

/* ALC_CTL1 */
#define ALC		(1 << 5) /* ALC Enable */
#define LMTH0		(1 << 0) /* ALC Limiter / Recovery Level */

/* MD_CTL1 */
#define PLL3		(1 << 7)
#define PLL2		(1 << 6)
#define PLL1		(1 << 5)
#define PLL0		(1 << 4)
#define PLL_MASK	(PLL3 | PLL2 | PLL1 | PLL0)

#define BCKO_MASK	(1 << 3)
#define BCKO_64		BCKO_MASK

#define DIF_MASK	(3 << 0)
#define DSP		(0 << 0)
#define RIGHT_J		(1 << 0)
#define LEFT_J		(2 << 0)
#define I2S		(3 << 0)

/* MD_CTL2 */
#define FS0		(1 << 0)
#define FS1		(1 << 1)
#define FS2		(1 << 2)
#define FS3		(1 << 5)
#define FS_MASK		(FS0 | FS1 | FS2 | FS3)

/* MD_CTL3 */
#define BST1		(1 << 3)

/* MD_CTL4 */
#define DACH		(1 << 0)

/*
 * Playback Volume (table 39)
 *
 * max : 0x00 : +12.0 dB
 *       ( 0.5 dB step )
 * min : 0xFE : -115.0 dB
 * mute: 0xFF
 */
static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);

static const struct snd_kcontrol_new ak4642_snd_controls[] = {

	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
			 0, 0xFF, 1, out_tlv),

	SOC_SINGLE("Headphone Switch", PW_MGMT2, 6, 1, 0),
};

static const struct snd_kcontrol_new ak4642_hpout_mixer_controls[] = {
	SOC_DAPM_SINGLE("DACH", MD_CTL4, 0, 1, 0),
};

static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
	SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
};

static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {

	/* Outputs */
	SND_SOC_DAPM_OUTPUT("HPOUTL"),
	SND_SOC_DAPM_OUTPUT("HPOUTR"),
	SND_SOC_DAPM_OUTPUT("LINEOUT"),

	SND_SOC_DAPM_MIXER("HPOUTL Mixer", PW_MGMT2, 5, 0,
			   &ak4642_hpout_mixer_controls[0],
			   ARRAY_SIZE(ak4642_hpout_mixer_controls)),

	SND_SOC_DAPM_MIXER("HPOUTR Mixer", PW_MGMT2, 4, 0,
			   &ak4642_hpout_mixer_controls[0],
			   ARRAY_SIZE(ak4642_hpout_mixer_controls)),

	SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
			   &ak4642_lout_mixer_controls[0],
			   ARRAY_SIZE(ak4642_lout_mixer_controls)),

	/* DAC */
	SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
};

static const struct snd_soc_dapm_route ak4642_intercon[] = {

	/* Outputs */
	{"HPOUTL", NULL, "HPOUTL Mixer"},
	{"HPOUTR", NULL, "HPOUTR Mixer"},
	{"LINEOUT", NULL, "LINEOUT Mixer"},

	{"HPOUTL Mixer", "DACH", "DAC"},
	{"HPOUTR Mixer", "DACH", "DAC"},
	{"LINEOUT Mixer", "DACL", "DAC"},
};

/* codec private data */
struct ak4642_priv {
	unsigned int sysclk;
	enum snd_soc_control_type control_type;
};

/*
 * ak4642 register cache
 */
static const u8 ak4642_reg[] = {
	0x00, 0x00, 0x01, 0x00,
	0x02, 0x00, 0x00, 0x00,
	0xe1, 0xe1, 0x18, 0x00,
	0xe1, 0x18, 0x11, 0x08,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00,
};

static const u8 ak4648_reg[] = {
	0x00, 0x00, 0x01, 0x00,
	0x02, 0x00, 0x00, 0x00,
	0xe1, 0xe1, 0x18, 0x00,
	0xe1, 0x18, 0x11, 0xb8,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x00, 0x00, 0x00,
	0x00, 0x88, 0x88, 0x08,
};

static int ak4642_dai_startup(struct snd_pcm_substream *substream,
			      struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
		/*
		 * start headphone output
		 *
		 * PLL, Master Mode
		 * Audio I/F Format :MSB justified (ADC & DAC)
		 * Bass Boost Level : Middle
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p97.
		 */
		snd_soc_write(codec, L_IVC, 0x91); /* volume */
		snd_soc_write(codec, R_IVC, 0x91); /* volume */
	} else {
		/*
		 * start stereo input
		 *
		 * PLL Master Mode
		 * Audio I/F Format:MSB justified (ADC & DAC)
		 * Pre MIC AMP:+20dB
		 * MIC Power On
		 * ALC setting:Refer to Table 35
		 * ALC bit=“1”
		 *
		 * This operation came from example code of
		 * "ASAHI KASEI AK4642" (japanese) manual p94.
		 */
		snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
		snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
		snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
		snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
		snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
	}

	return 0;
}

static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
			       struct snd_soc_dai *dai)
{
	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	struct snd_soc_codec *codec = dai->codec;

	if (is_play) {
	} else {
		/* stop stereo input */
		snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
		snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
		snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
	}
}

static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	int clk_id, unsigned int freq, int dir)
{
	struct snd_soc_codec *codec = codec_dai->codec;
	u8 pll;

	switch (freq) {
	case 11289600:
		pll = PLL2;
		break;
	case 12288000:
		pll = PLL2 | PLL0;
		break;
	case 12000000:
		pll = PLL2 | PLL1;
		break;
	case 24000000:
		pll = PLL2 | PLL1 | PLL0;
		break;
	case 13500000:
		pll = PLL3 | PLL2;
		break;
	case 27000000:
		pll = PLL3 | PLL2 | PLL0;
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);

	return 0;
}

static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 data;
	u8 bcko;

	data = MCKO | PMPLL; /* use MCKO */
	bcko = 0;

	/* set master/slave audio interface */
	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBM_CFM:
		data |= MS;
		bcko = BCKO_64;
		break;
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}
	snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);

	/* format type */
	data = 0;
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_LEFT_J:
		data = LEFT_J;
		break;
	case SND_SOC_DAIFMT_I2S:
		data = I2S;
		break;
	/* FIXME
	 * Please add RIGHT_J / DSP support here
	 */
	default:
		return -EINVAL;
		break;
	}
	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);

	return 0;
}

static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
				struct snd_pcm_hw_params *params,
				struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	u8 rate;

	switch (params_rate(params)) {
	case 7350:
		rate = FS2;
		break;
	case 8000:
		rate = 0;
		break;
	case 11025:
		rate = FS2 | FS0;
		break;
	case 12000:
		rate = FS0;
		break;
	case 14700:
		rate = FS2 | FS1;
		break;
	case 16000:
		rate = FS1;
		break;
	case 22050:
		rate = FS2 | FS1 | FS0;
		break;
	case 24000:
		rate = FS1 | FS0;
		break;
	case 29400:
		rate = FS3 | FS2 | FS1;
		break;
	case 32000:
		rate = FS3 | FS1;
		break;
	case 44100:
		rate = FS3 | FS2 | FS1 | FS0;
		break;
	case 48000:
		rate = FS3 | FS1 | FS0;
		break;
	default:
		return -EINVAL;
		break;
	}
	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);

	return 0;
}

static int ak4642_set_bias_level(struct snd_soc_codec *codec,
				 enum snd_soc_bias_level level)
{
	switch (level) {
	case SND_SOC_BIAS_OFF:
		snd_soc_write(codec, PW_MGMT1, 0x00);
		break;
	default:
		snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
		break;
	}
	codec->dapm.bias_level = level;

	return 0;
}

static const struct snd_soc_dai_ops ak4642_dai_ops = {
	.startup	= ak4642_dai_startup,
	.shutdown	= ak4642_dai_shutdown,
	.set_sysclk	= ak4642_dai_set_sysclk,
	.set_fmt	= ak4642_dai_set_fmt,
	.hw_params	= ak4642_dai_hw_params,
};

static struct snd_soc_dai_driver ak4642_dai = {
	.name = "ak4642-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.capture = {
		.stream_name = "Capture",
		.channels_min = 1,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_48000,
		.formats = SNDRV_PCM_FMTBIT_S16_LE },
	.ops = &ak4642_dai_ops,
	.symmetric_rates = 1,
};

static int ak4642_resume(struct snd_soc_codec *codec)
{
	snd_soc_cache_sync(codec);
	return 0;
}


static int ak4642_probe(struct snd_soc_codec *codec)
{
	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
	int ret;

	ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
	if (ret < 0) {
		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
		return ret;
	}

	snd_soc_add_codec_controls(codec, ak4642_snd_controls,
			     ARRAY_SIZE(ak4642_snd_controls));

	ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

	return 0;
}

static int ak4642_remove(struct snd_soc_codec *codec)
{
	ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
	return 0;
}

static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
	.probe			= ak4642_probe,
	.remove			= ak4642_remove,
	.resume			= ak4642_resume,
	.set_bias_level		= ak4642_set_bias_level,
	.reg_cache_default	= ak4642_reg,			/* ak4642 reg */
	.reg_cache_size		= ARRAY_SIZE(ak4642_reg),	/* ak4642 reg */
	.reg_word_size		= sizeof(u8),
	.dapm_widgets		= ak4642_dapm_widgets,
	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
	.dapm_routes		= ak4642_intercon,
	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
};

static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
	.probe			= ak4642_probe,
	.remove			= ak4642_remove,
	.resume			= ak4642_resume,
	.set_bias_level		= ak4642_set_bias_level,
	.reg_cache_default	= ak4648_reg,			/* ak4648 reg */
	.reg_cache_size		= ARRAY_SIZE(ak4648_reg),	/* ak4648 reg */
	.reg_word_size		= sizeof(u8),
	.dapm_widgets		= ak4642_dapm_widgets,
	.num_dapm_widgets	= ARRAY_SIZE(ak4642_dapm_widgets),
	.dapm_routes		= ak4642_intercon,
	.num_dapm_routes	= ARRAY_SIZE(ak4642_intercon),
};

#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
				      const struct i2c_device_id *id)
{
	struct ak4642_priv *ak4642;
	int ret;

	ak4642 = devm_kzalloc(&i2c->dev, sizeof(struct ak4642_priv),
			      GFP_KERNEL);
	if (!ak4642)
		return -ENOMEM;

	i2c_set_clientdata(i2c, ak4642);
	ak4642->control_type = SND_SOC_I2C;

	ret =  snd_soc_register_codec(&i2c->dev,
				(struct snd_soc_codec_driver *)id->driver_data,
				&ak4642_dai, 1);
	return ret;
}

static __devexit int ak4642_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	return 0;
}

static const struct i2c_device_id ak4642_i2c_id[] = {
	{ "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	{ "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	{ "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);

static struct i2c_driver ak4642_i2c_driver = {
	.driver = {
		.name = "ak4642-codec",
		.owner = THIS_MODULE,
	},
	.probe		= ak4642_i2c_probe,
	.remove		= __devexit_p(ak4642_i2c_remove),
	.id_table	= ak4642_i2c_id,
};
#endif

static int __init ak4642_modinit(void)
{
	int ret = 0;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	ret = i2c_add_driver(&ak4642_i2c_driver);
#endif
	return ret;

}
module_init(ak4642_modinit);

static void __exit ak4642_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
	i2c_del_driver(&ak4642_i2c_driver);
#endif

}
module_exit(ak4642_exit);

MODULE_DESCRIPTION("Soc AK4642 driver");
MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
a3a83d9a KM	1	/*
	2	* ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
	3	*
	4	* Copyright (C) 2009 Renesas Solutions Corp.
	5	* Kuninori Morimoto <morimoto.kuninori@renesas.com>
	6	*
	7	* Based on wm8731.c by Richard Purdie
	8	* Based on ak4535.c by Richard Purdie
	9	* Based on wm8753.c by Liam Girdwood
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
	16	/* CAUTION
	17	*
	18	* This is very simple driver.
	19	* It can use headphone output / stereo input only
	20	*
20211391	21	* AK4642 is tested.
a3a83d9a	22	* AK4643 is tested.
a9317e8b	23	* AK4648 is tested.
a3a83d9a KM	24	*/
a3a83d9a KM	25
a3a83d9a	26	#include <linux/delay.h>
a3a83d9a	27	#include <linux/i2c.h>
5a0e3ad6	28	#include <linux/slab.h>
da155d5b	29	#include <linux/module.h>
ce6120cc	30	#include <sound/soc.h>
a3a83d9a	31	#include <sound/initval.h>
a300de3c	32	#include <sound/tlv.h>
a3a83d9a	33
a3a83d9a KM	34	#define PW_MGMT1 0x00
	35	#define PW_MGMT2 0x01
	36	#define SG_SL1 0x02
	37	#define SG_SL2 0x03
	38	#define MD_CTL1 0x04
	39	#define MD_CTL2 0x05
	40	#define TIMER 0x06
	41	#define ALC_CTL1 0x07
	42	#define ALC_CTL2 0x08
	43	#define L_IVC 0x09
	44	#define L_DVC 0x0a
	45	#define ALC_CTL3 0x0b
	46	#define R_IVC 0x0c
	47	#define R_DVC 0x0d
	48	#define MD_CTL3 0x0e
	49	#define MD_CTL4 0x0f
	50	#define PW_MGMT3 0x10
	51	#define DF_S 0x11
	52	#define FIL3_0 0x12
	53	#define FIL3_1 0x13
	54	#define FIL3_2 0x14
	55	#define FIL3_3 0x15
	56	#define EQ_0 0x16
	57	#define EQ_1 0x17
	58	#define EQ_2 0x18
	59	#define EQ_3 0x19
	60	#define EQ_4 0x1a
	61	#define EQ_5 0x1b
	62	#define FIL1_0 0x1c
	63	#define FIL1_1 0x1d
	64	#define FIL1_2 0x1e
	65	#define FIL1_3 0x1f
	66	#define PW_MGMT4 0x20
	67	#define MD_CTL5 0x21
	68	#define LO_MS 0x22
	69	#define HP_MS 0x23
	70	#define SPK_MS 0x24
	71
a3471239 KM	72	/* PW_MGMT1*/
	73	#define PMVCM (1 << 6) /* VCOM Power Management */
	74	#define PMMIN (1 << 5) /* MIN Input Power Management */
	75	#define PMDAC (1 << 2) /* DAC Power Management */
	76	#define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
	77
0643ce8f KM	78	/* PW_MGMT2 */
	79	#define HPMTN (1 << 6)
	80	#define PMHPL (1 << 5)
	81	#define PMHPR (1 << 4)
	82	#define MS (1 << 3) /* master/slave select */
	83	#define MCKO (1 << 1)
	84	#define PMPLL (1 << 0)
	85
	86	#define PMHP_MASK (PMHPL \| PMHPR)
	87	#define PMHP PMHP_MASK
	88
a3471239 KM	89	/* PW_MGMT3 */
	90	#define PMADR (1 << 0) /* MIC L / ADC R Power Management */
	91
	92	/* SG_SL1 */
	93	#define MINS (1 << 6) /* Switch from MIN to Speaker */
	94	#define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
	95	#define PMMP (1 << 2) /* MPWR pin Power Management */
	96	#define MGAIN0 (1 << 0) /* MIC amp gain*/
	97
	98	/* TIMER */
	99	#define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
	100	#define WTM(param) (((param & 0x4) << 4) \| ((param & 0x3) << 2))
	101
	102	/* ALC_CTL1 */
	103	#define ALC (1 << 5) /* ALC Enable */
	104	#define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
	105
4b6316b4 KM	106	/* MD_CTL1 */
	107	#define PLL3 (1 << 7)
	108	#define PLL2 (1 << 6)
	109	#define PLL1 (1 << 5)
	110	#define PLL0 (1 << 4)
	111	#define PLL_MASK (PLL3 \| PLL2 \| PLL1 \| PLL0)
	112
0643ce8f KM	113	#define BCKO_MASK (1 << 3)
	114	#define BCKO_64 BCKO_MASK
	115
cb9c130a KM	116	#define DIF_MASK (3 << 0)
	117	#define DSP (0 << 0)
	118	#define RIGHT_J (1 << 0)
	119	#define LEFT_J (2 << 0)
	120	#define I2S (3 << 0)
	121
1ad747ca KM	122	/* MD_CTL2 */
	123	#define FS0 (1 << 0)
	124	#define FS1 (1 << 1)
	125	#define FS2 (1 << 2)
	126	#define FS3 (1 << 5)
	127	#define FS_MASK (FS0 \| FS1 \| FS2 \| FS3)
	128
a3471239 KM	129	/* MD_CTL3 */
	130	#define BST1 (1 << 3)
	131
	132	/* MD_CTL4 */
	133	#define DACH (1 << 0)
a3a83d9a	134
a300de3c KM	135	/*
	136	* Playback Volume (table 39)
	137	*
	138	* max : 0x00 : +12.0 dB
	139	* ( 0.5 dB step )
	140	* min : 0xFE : -115.0 dB
	141	* mute: 0xFF
	142	*/
	143	static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);
	144
	145	static const struct snd_kcontrol_new ak4642_snd_controls[] = {
	146
	147	SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
	148	0, 0xFF, 1, out_tlv),
3c703526 KM	149
3c703526 KM	150	SOC_SINGLE("Headphone Switch", PW_MGMT2, 6, 1, 0),
a300de3c KM	151	};
a300de3c KM	152
24747dae KM	153	static const struct snd_kcontrol_new ak4642_hpout_mixer_controls[] = {
	154	SOC_DAPM_SINGLE("DACH", MD_CTL4, 0, 1, 0),
	155	};
	156
e8c83dbf KM	157	static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
	158	SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
	159	};
	160
24747dae KM	161	static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
	162
	163	/* Outputs */
	164	SND_SOC_DAPM_OUTPUT("HPOUTL"),
	165	SND_SOC_DAPM_OUTPUT("HPOUTR"),
e8c83dbf	166	SND_SOC_DAPM_OUTPUT("LINEOUT"),
24747dae KM	167
	168	SND_SOC_DAPM_MIXER("HPOUTL Mixer", PW_MGMT2, 5, 0,
	169	&ak4642_hpout_mixer_controls[0],
	170	ARRAY_SIZE(ak4642_hpout_mixer_controls)),
	171
	172	SND_SOC_DAPM_MIXER("HPOUTR Mixer", PW_MGMT2, 4, 0,
	173	&ak4642_hpout_mixer_controls[0],
	174	ARRAY_SIZE(ak4642_hpout_mixer_controls)),
	175
e8c83dbf KM	176	SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
	177	&ak4642_lout_mixer_controls[0],
	178	ARRAY_SIZE(ak4642_lout_mixer_controls)),
	179
24747dae KM	180	/* DAC */
	181	SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
	182	};
	183
	184	static const struct snd_soc_dapm_route ak4642_intercon[] = {
	185
	186	/* Outputs */
	187	{"HPOUTL", NULL, "HPOUTL Mixer"},
	188	{"HPOUTR", NULL, "HPOUTR Mixer"},
e8c83dbf	189	{"LINEOUT", NULL, "LINEOUT Mixer"},
24747dae KM	190
	191	{"HPOUTL Mixer", "DACH", "DAC"},
	192	{"HPOUTR Mixer", "DACH", "DAC"},
e8c83dbf	193	{"LINEOUT Mixer", "DACL", "DAC"},
24747dae	194	};
a300de3c	195
a3a83d9a KM	196	/* codec private data */
a3a83d9a KM	197	struct ak4642_priv {
f0fba2ad LG	198	unsigned int sysclk;
f0fba2ad LG	199	enum snd_soc_control_type control_type;
a3a83d9a KM	200	};
a3a83d9a KM	201
a3a83d9a KM	202	/*
	203	* ak4642 register cache
	204	*/
a9317e8b	205	static const u8 ak4642_reg[] = {
19b115e5 KM	206	0x00, 0x00, 0x01, 0x00,
	207	0x02, 0x00, 0x00, 0x00,
	208	0xe1, 0xe1, 0x18, 0x00,
	209	0xe1, 0x18, 0x11, 0x08,
	210	0x00, 0x00, 0x00, 0x00,
	211	0x00, 0x00, 0x00, 0x00,
	212	0x00, 0x00, 0x00, 0x00,
	213	0x00, 0x00, 0x00, 0x00,
	214	0x00, 0x00, 0x00, 0x00,
	215	0x00,
a3a83d9a KM	216	};
a3a83d9a KM	217
a9317e8b KM	218	static const u8 ak4648_reg[] = {
	219	0x00, 0x00, 0x01, 0x00,
	220	0x02, 0x00, 0x00, 0x00,
	221	0xe1, 0xe1, 0x18, 0x00,
	222	0xe1, 0x18, 0x11, 0xb8,
	223	0x00, 0x00, 0x00, 0x00,
	224	0x00, 0x00, 0x00, 0x00,
	225	0x00, 0x00, 0x00, 0x00,
	226	0x00, 0x00, 0x00, 0x00,
	227	0x00, 0x00, 0x00, 0x00,
	228	0x00, 0x88, 0x88, 0x08,
	229	};
	230
a3a83d9a KM	231	static int ak4642_dai_startup(struct snd_pcm_substream *substream,
	232	struct snd_soc_dai *dai)
	233	{
	234	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	235	struct snd_soc_codec *codec = dai->codec;
	236
	237	if (is_play) {
	238	/*
	239	* start headphone output
	240	*
	241	* PLL, Master Mode
	242	* Audio I/F Format :MSB justified (ADC & DAC)
a3a83d9a KM	243	* Bass Boost Level : Middle
	244	*
	245	* This operation came from example code of
	246	* "ASAHI KASEI AK4642" (japanese) manual p97.
a3a83d9a	247	*/
b91470bb AL	248	snd_soc_write(codec, L_IVC, 0x91); /* volume */
b91470bb AL	249	snd_soc_write(codec, R_IVC, 0x91); /* volume */
a3a83d9a KM	250	} else {
	251	/*
	252	* start stereo input
	253	*
	254	* PLL Master Mode
	255	* Audio I/F Format:MSB justified (ADC & DAC)
a3a83d9a KM	256	* Pre MIC AMP:+20dB
	257	* MIC Power On
	258	* ALC setting:Refer to Table 35
	259	* ALC bit=“1”
	260	*
	261	* This operation came from example code of
	262	* "ASAHI KASEI AK4642" (japanese) manual p94.
	263	*/
b91470bb AL	264	snd_soc_write(codec, SG_SL1, PMMP \| MGAIN0);
	265	snd_soc_write(codec, TIMER, ZTM(0x3) \| WTM(0x3));
	266	snd_soc_write(codec, ALC_CTL1, ALC \| LMTH0);
ed2dd7da	267	snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
a3471239	268	snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
a3a83d9a KM	269	}
	270
	271	return 0;
	272	}
	273
	274	static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
	275	struct snd_soc_dai *dai)
	276	{
	277	int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
	278	struct snd_soc_codec *codec = dai->codec;
	279
	280	if (is_play) {
a3a83d9a KM	281	} else {
a3a83d9a KM	282	/* stop stereo input */
a3471239 KM	283	snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
	284	snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
	285	snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
a3a83d9a KM	286	}
	287	}
	288
	289	static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
	290	int clk_id, unsigned int freq, int dir)
	291	{
	292	struct snd_soc_codec *codec = codec_dai->codec;
4b6316b4 KM	293	u8 pll;
	294
	295	switch (freq) {
	296	case 11289600:
	297	pll = PLL2;
	298	break;
	299	case 12288000:
	300	pll = PLL2 \| PLL0;
	301	break;
	302	case 12000000:
	303	pll = PLL2 \| PLL1;
	304	break;
	305	case 24000000:
	306	pll = PLL2 \| PLL1 \| PLL0;
	307	break;
	308	case 13500000:
	309	pll = PLL3 \| PLL2;
	310	break;
	311	case 27000000:
	312	pll = PLL3 \| PLL2 \| PLL0;
	313	break;
	314	default:
	315	return -EINVAL;
	316	}
	317	snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
a3a83d9a	318
a3a83d9a KM	319	return 0;
	320	}
	321
0643ce8f KM	322	static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
	323	{
	324	struct snd_soc_codec *codec = dai->codec;
	325	u8 data;
	326	u8 bcko;
	327
	328	data = MCKO \| PMPLL; /* use MCKO */
	329	bcko = 0;
	330
	331	/* set master/slave audio interface */
	332	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	333	case SND_SOC_DAIFMT_CBM_CFM:
	334	data \|= MS;
	335	bcko = BCKO_64;
	336	break;
	337	case SND_SOC_DAIFMT_CBS_CFS:
	338	break;
	339	default:
	340	return -EINVAL;
	341	}
bd7fdbca	342	snd_soc_update_bits(codec, PW_MGMT2, MS \| MCKO \| PMPLL, data);
0643ce8f KM	343	snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
0643ce8f KM	344
cb9c130a KM	345	/* format type */
	346	data = 0;
	347	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	348	case SND_SOC_DAIFMT_LEFT_J:
	349	data = LEFT_J;
	350	break;
	351	case SND_SOC_DAIFMT_I2S:
	352	data = I2S;
	353	break;
	354	/* FIXME
	355	* Please add RIGHT_J / DSP support here
	356	*/
	357	default:
	358	return -EINVAL;
	359	break;
	360	}
	361	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
	362
0643ce8f KM	363	return 0;
	364	}
	365
1ad747ca KM	366	static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
	367	struct snd_pcm_hw_params *params,
	368	struct snd_soc_dai *dai)
	369	{
	370	struct snd_soc_codec *codec = dai->codec;
	371	u8 rate;
	372
	373	switch (params_rate(params)) {
	374	case 7350:
	375	rate = FS2;
	376	break;
	377	case 8000:
	378	rate = 0;
	379	break;
	380	case 11025:
	381	rate = FS2 \| FS0;
	382	break;
	383	case 12000:
	384	rate = FS0;
	385	break;
	386	case 14700:
	387	rate = FS2 \| FS1;
	388	break;
	389	case 16000:
	390	rate = FS1;
	391	break;
	392	case 22050:
	393	rate = FS2 \| FS1 \| FS0;
	394	break;
	395	case 24000:
	396	rate = FS1 \| FS0;
	397	break;
	398	case 29400:
	399	rate = FS3 \| FS2 \| FS1;
	400	break;
	401	case 32000:
	402	rate = FS3 \| FS1;
	403	break;
	404	case 44100:
	405	rate = FS3 \| FS2 \| FS1 \| FS0;
	406	break;
	407	case 48000:
	408	rate = FS3 \| FS1 \| FS0;
	409	break;
	410	default:
	411	return -EINVAL;
	412	break;
	413	}
	414	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
a3a83d9a	415
a3a83d9a KM	416	return 0;
	417	}
	418
ed2dd7da KM	419	static int ak4642_set_bias_level(struct snd_soc_codec *codec,
	420	enum snd_soc_bias_level level)
	421	{
	422	switch (level) {
	423	case SND_SOC_BIAS_OFF:
	424	snd_soc_write(codec, PW_MGMT1, 0x00);
	425	break;
	426	default:
	427	snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
	428	break;
	429	}
	430	codec->dapm.bias_level = level;
	431
	432	return 0;
	433	}
	434
85e7652d	435	static const struct snd_soc_dai_ops ak4642_dai_ops = {
a3a83d9a KM	436	.startup = ak4642_dai_startup,
	437	.shutdown = ak4642_dai_shutdown,
	438	.set_sysclk = ak4642_dai_set_sysclk,
0643ce8f	439	.set_fmt = ak4642_dai_set_fmt,
1ad747ca	440	.hw_params = ak4642_dai_hw_params,
a3a83d9a KM	441	};
a3a83d9a KM	442
f0fba2ad LG	443	static struct snd_soc_dai_driver ak4642_dai = {
f0fba2ad LG	444	.name = "ak4642-hifi",
a3a83d9a KM	445	.playback = {
	446	.stream_name = "Playback",
	447	.channels_min = 1,
	448	.channels_max = 2,
	449	.rates = SNDRV_PCM_RATE_8000_48000,
	450	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	451	.capture = {
	452	.stream_name = "Capture",
	453	.channels_min = 1,
	454	.channels_max = 2,
	455	.rates = SNDRV_PCM_RATE_8000_48000,
	456	.formats = SNDRV_PCM_FMTBIT_S16_LE },
	457	.ops = &ak4642_dai_ops,
1ad747ca	458	.symmetric_rates = 1,
a3a83d9a	459	};
a3a83d9a	460
f0fba2ad	461	static int ak4642_resume(struct snd_soc_codec *codec)
a3a83d9a	462	{
b91470bb	463	snd_soc_cache_sync(codec);
a3a83d9a KM	464	return 0;
	465	}
	466
f0fba2ad LG	467
f0fba2ad LG	468	static int ak4642_probe(struct snd_soc_codec *codec)
a3a83d9a	469	{
f0fba2ad	470	struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
b91470bb	471	int ret;
a3a83d9a	472
b91470bb AL	473	ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
	474	if (ret < 0) {
	475	dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
	476	return ret;
	477	}
a3a83d9a	478
022658be	479	snd_soc_add_codec_controls(codec, ak4642_snd_controls,
73bb379f	480	ARRAY_SIZE(ak4642_snd_controls));
a3a83d9a	481
ed2dd7da KM	482	ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
	483
	484	return 0;
	485	}
	486
	487	static int ak4642_remove(struct snd_soc_codec *codec)
	488	{
	489	ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
f0fba2ad	490	return 0;
a3a83d9a KM	491	}
a3a83d9a KM	492
f0fba2ad	493	static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
0ce75aa4	494	.probe = ak4642_probe,
ed2dd7da	495	.remove = ak4642_remove,
0ce75aa4	496	.resume = ak4642_resume,
ed2dd7da	497	.set_bias_level = ak4642_set_bias_level,
a9317e8b KM	498	.reg_cache_default = ak4642_reg, /* ak4642 reg */
	499	.reg_cache_size = ARRAY_SIZE(ak4642_reg), /* ak4642 reg */
	500	.reg_word_size = sizeof(u8),
	501	.dapm_widgets = ak4642_dapm_widgets,
	502	.num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
	503	.dapm_routes = ak4642_intercon,
	504	.num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
	505	};
	506
	507	static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
	508	.probe = ak4642_probe,
	509	.remove = ak4642_remove,
	510	.resume = ak4642_resume,
	511	.set_bias_level = ak4642_set_bias_level,
	512	.reg_cache_default = ak4648_reg, /* ak4648 reg */
	513	.reg_cache_size = ARRAY_SIZE(ak4648_reg), /* ak4648 reg */
0ce75aa4	514	.reg_word_size = sizeof(u8),
24747dae KM	515	.dapm_widgets = ak4642_dapm_widgets,
	516	.num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
	517	.dapm_routes = ak4642_intercon,
	518	.num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
f0fba2ad LG	519	};
f0fba2ad LG	520
a3a83d9a	521	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
f0fba2ad LG	522	static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
f0fba2ad LG	523	const struct i2c_device_id *id)
a3a83d9a KM	524	{
a3a83d9a KM	525	struct ak4642_priv *ak4642;
a3a83d9a KM	526	int ret;
a3a83d9a KM	527
2ff49eea AL	528	ak4642 = devm_kzalloc(&i2c->dev, sizeof(struct ak4642_priv),
2ff49eea AL	529	GFP_KERNEL);
0ce75aa4	530	if (!ak4642)
a3a83d9a KM	531	return -ENOMEM;
a3a83d9a KM	532
a3a83d9a	533	i2c_set_clientdata(i2c, ak4642);
f0fba2ad	534	ak4642->control_type = SND_SOC_I2C;
a3a83d9a	535
f0fba2ad	536	ret = snd_soc_register_codec(&i2c->dev,
a9317e8b KM	537	(struct snd_soc_codec_driver *)id->driver_data,
a9317e8b KM	538	&ak4642_dai, 1);
a3a83d9a KM	539	return ret;
	540	}
	541
f0fba2ad	542	static __devexit int ak4642_i2c_remove(struct i2c_client *client)
a3a83d9a	543	{
f0fba2ad	544	snd_soc_unregister_codec(&client->dev);
a3a83d9a KM	545	return 0;
	546	}
	547
	548	static const struct i2c_device_id ak4642_i2c_id[] = {
a9317e8b KM	549	{ "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	550	{ "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
	551	{ "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
a3a83d9a KM	552	{ }
	553	};
	554	MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
	555
	556	static struct i2c_driver ak4642_i2c_driver = {
	557	.driver = {
f0fba2ad	558	.name = "ak4642-codec",
a3a83d9a KM	559	.owner = THIS_MODULE,
a3a83d9a KM	560	},
0ce75aa4 KM	561	.probe = ak4642_i2c_probe,
	562	.remove = __devexit_p(ak4642_i2c_remove),
	563	.id_table = ak4642_i2c_id,
a3a83d9a	564	};
a3a83d9a KM	565	#endif
a3a83d9a KM	566
a3a83d9a KM	567	static int __init ak4642_modinit(void)
a3a83d9a KM	568	{
1cf86f6f	569	int ret = 0;
a3a83d9a KM	570	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	571	ret = i2c_add_driver(&ak4642_i2c_driver);
	572	#endif
	573	return ret;
	574
	575	}
	576	module_init(ak4642_modinit);
	577
	578	static void __exit ak4642_exit(void)
	579	{
	580	#if defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)
	581	i2c_del_driver(&ak4642_i2c_driver);
	582	#endif
	583
	584	}
	585	module_exit(ak4642_exit);
	586
	587	MODULE_DESCRIPTION("Soc AK4642 driver");
	588	MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
	589	MODULE_LICENSE("GPL");