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Null pointer deref with hrtimer_try_to_cancel()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / hda / patch_sigmatel.c
CommitLineData
2f2f4251
M		 1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
403d1944 7 * Matt Porter <mporter@embeddedalley.com>
2f2f4251
M		 8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
2f2f4251
M		 27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
c7d4b2fa 32#include <sound/asoundef.h>
2f2f4251
M		 33#include "hda_codec.h"
34#include "hda_local.h"
3c9a3203 35#include "hda_patch.h"
1cd2224c 36#include "hda_beep.h"
2f2f4251 37
4e55096e 38#define NUM_CONTROL_ALLOC 32
c39555d6
MR		 39
40#define STAC_VREF_EVENT 0x00
41#define STAC_INSERT_EVENT 0x10
a64135a2
MR		 42#define STAC_PWR_EVENT 0x20
43#define STAC_HP_EVENT 0x30
4e55096e 44
f5fcc13c
TI		 45enum {
46 STAC_REF,
bf277785 47 STAC_9200_OQO,
dfe495d0
TI		 48 STAC_9200_DELL_D21,
49 STAC_9200_DELL_D22,
50 STAC_9200_DELL_D23,
51 STAC_9200_DELL_M21,
52 STAC_9200_DELL_M22,
53 STAC_9200_DELL_M23,
54 STAC_9200_DELL_M24,
55 STAC_9200_DELL_M25,
56 STAC_9200_DELL_M26,
57 STAC_9200_DELL_M27,
1194b5b7 58 STAC_9200_GATEWAY,
117f257d 59 STAC_9200_PANASONIC,
f5fcc13c
TI		 60 STAC_9200_MODELS
61};
62
63enum {
64 STAC_9205_REF,
dfe495d0 65 STAC_9205_DELL_M42,
ae0a8ed8
TD		 66 STAC_9205_DELL_M43,
67 STAC_9205_DELL_M44,
f5fcc13c
TI		 68 STAC_9205_MODELS
69};
70
e1f0d669 71enum {
9e43f0de 72 STAC_92HD73XX_NO_JD, /* no jack-detection */
e1f0d669 73 STAC_92HD73XX_REF,
661cd8fb
TI		 74 STAC_DELL_M6_AMIC,
75 STAC_DELL_M6_DMIC,
76 STAC_DELL_M6_BOTH,
6b3ab21e 77 STAC_DELL_EQ,
e1f0d669
MR		 78 STAC_92HD73XX_MODELS
79};
80
d0513fc6
MR		 81enum {
82 STAC_92HD83XXX_REF,
83 STAC_92HD83XXX_MODELS
84};
85
e035b841
MR		 86enum {
87 STAC_92HD71BXX_REF,
a7662640
MR		 88 STAC_DELL_M4_1,
89 STAC_DELL_M4_2,
3a7abfd2 90 STAC_DELL_M4_3,
6a14f585 91 STAC_HP_M4,
e035b841
MR		 92 STAC_92HD71BXX_MODELS
93};
94
8e21c34c
TD		 95enum {
96 STAC_925x_REF,
97 STAC_M2_2,
98 STAC_MA6,
2c11f955 99 STAC_PA6,
8e21c34c
TD		 100 STAC_925x_MODELS
101};
102
f5fcc13c
TI		 103enum {
104 STAC_D945_REF,
105 STAC_D945GTP3,
106 STAC_D945GTP5,
5d5d3bc3
IZ		 107 STAC_INTEL_MAC_V1,
108 STAC_INTEL_MAC_V2,
109 STAC_INTEL_MAC_V3,
110 STAC_INTEL_MAC_V4,
111 STAC_INTEL_MAC_V5,
536319af
NB		 112 STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
113 * is given, one of the above models will be
114 * chosen according to the subsystem id. */
dfe495d0 115 /* for backward compatibility */
f5fcc13c 116 STAC_MACMINI,
3fc24d85 117 STAC_MACBOOK,
6f0778d8
NB		 118 STAC_MACBOOK_PRO_V1,
119 STAC_MACBOOK_PRO_V2,
f16928fb 120 STAC_IMAC_INTEL,
0dae0f83 121 STAC_IMAC_INTEL_20,
8c650087 122 STAC_ECS_202,
dfe495d0
TI		 123 STAC_922X_DELL_D81,
124 STAC_922X_DELL_D82,
125 STAC_922X_DELL_M81,
126 STAC_922X_DELL_M82,
f5fcc13c
TI		 127 STAC_922X_MODELS
128};
129
130enum {
e28d8322 131 STAC_D965_REF_NO_JD, /* no jack-detection */
f5fcc13c
TI		 132 STAC_D965_REF,
133 STAC_D965_3ST,
134 STAC_D965_5ST,
4ff076e5 135 STAC_DELL_3ST,
8e9068b1 136 STAC_DELL_BIOS,
f5fcc13c
TI		 137 STAC_927X_MODELS
138};
403d1944 139
2f2f4251 140struct sigmatel_spec {
c8b6bf9b 141 struct snd_kcontrol_new *mixers[4];
c7d4b2fa
M		 142 unsigned int num_mixers;
143
403d1944 144 int board_config;
0253fdcd 145 unsigned int eapd_switch: 1;
c7d4b2fa 146 unsigned int surr_switch: 1;
403d1944
MP		 147 unsigned int line_switch: 1;
148 unsigned int mic_switch: 1;
3cc08dc6 149 unsigned int alt_switch: 1;
82bc955f 150 unsigned int hp_detect: 1;
00ef50c2 151 unsigned int spdif_mute: 1;
c7d4b2fa 152
4fe5195c 153 /* gpio lines */
0fc9dec4 154 unsigned int eapd_mask;
4fe5195c
MR		 155 unsigned int gpio_mask;
156 unsigned int gpio_dir;
157 unsigned int gpio_data;
158 unsigned int gpio_mute;
159
8daaaa97
MR		 160 /* stream */
161 unsigned int stream_delay;
162
4fe5195c 163 /* analog loopback */
e1f0d669
MR		 164 unsigned char aloopback_mask;
165 unsigned char aloopback_shift;
8259980e 166
a64135a2
MR		 167 /* power management */
168 unsigned int num_pwrs;
d0513fc6 169 unsigned int *pwr_mapping;
a64135a2 170 hda_nid_t *pwr_nids;
b76c850f 171 hda_nid_t *dac_list;
a64135a2 172
2f2f4251 173 /* playback */
b22b4821 174 struct hda_input_mux *mono_mux;
89385035 175 struct hda_input_mux *amp_mux;
b22b4821 176 unsigned int cur_mmux;
2f2f4251 177 struct hda_multi_out multiout;
3cc08dc6 178 hda_nid_t dac_nids[5];
2f2f4251
M		 179
180 /* capture */
181 hda_nid_t *adc_nids;
2f2f4251 182 unsigned int num_adcs;
dabbed6f
M		 183 hda_nid_t *mux_nids;
184 unsigned int num_muxes;
8b65727b
MP		 185 hda_nid_t *dmic_nids;
186 unsigned int num_dmics;
e1f0d669 187 hda_nid_t *dmux_nids;
1697055e 188 unsigned int num_dmuxes;
d9737751
MR		 189 hda_nid_t *smux_nids;
190 unsigned int num_smuxes;
65973632 191 const char **spdif_labels;
d9737751 192
dabbed6f 193 hda_nid_t dig_in_nid;
b22b4821 194 hda_nid_t mono_nid;
1cd2224c
MR		 195 hda_nid_t anabeep_nid;
196 hda_nid_t digbeep_nid;
2f2f4251 197
2f2f4251
M		 198 /* pin widgets */
199 hda_nid_t *pin_nids;
200 unsigned int num_pins;
2f2f4251 201 unsigned int *pin_configs;
11b44bbd 202 unsigned int *bios_pin_configs;
2f2f4251
M		 203
204 /* codec specific stuff */
205 struct hda_verb *init;
c8b6bf9b 206 struct snd_kcontrol_new *mixer;
2f2f4251
M		 207
208 /* capture source */
8b65727b 209 struct hda_input_mux *dinput_mux;
e1f0d669 210 unsigned int cur_dmux[2];
c7d4b2fa 211 struct hda_input_mux *input_mux;
3cc08dc6 212 unsigned int cur_mux[3];
d9737751
MR		 213 struct hda_input_mux *sinput_mux;
214 unsigned int cur_smux[2];
2a9c7816
MR		 215 unsigned int cur_amux;
216 hda_nid_t *amp_nids;
217 unsigned int num_amps;
8daaaa97 218 unsigned int powerdown_adcs;
2f2f4251 219
403d1944
MP		 220 /* i/o switches */
221 unsigned int io_switch[2];
0fb87bb4 222 unsigned int clfe_swap;
d7a89436 223 unsigned int hp_switch; /* NID of HP as line-out */
5f10c4a9 224 unsigned int aloopback;
2f2f4251 225
c7d4b2fa
M		 226 struct hda_pcm pcm_rec[2]; /* PCM information */
227
228 /* dynamic controls and input_mux */
229 struct auto_pin_cfg autocfg;
230 unsigned int num_kctl_alloc, num_kctl_used;
c8b6bf9b 231 struct snd_kcontrol_new *kctl_alloc;
8b65727b 232 struct hda_input_mux private_dimux;
c7d4b2fa 233 struct hda_input_mux private_imux;
d9737751 234 struct hda_input_mux private_smux;
89385035 235 struct hda_input_mux private_amp_mux;
b22b4821 236 struct hda_input_mux private_mono_mux;
2f2f4251
M		 237};
238
239static hda_nid_t stac9200_adc_nids[1] = {
240 0x03,
241};
242
243static hda_nid_t stac9200_mux_nids[1] = {
244 0x0c,
245};
246
247static hda_nid_t stac9200_dac_nids[1] = {
248 0x02,
249};
250
a64135a2
MR		 251static hda_nid_t stac92hd73xx_pwr_nids[8] = {
252 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
253 0x0f, 0x10, 0x11
254};
255
0ffa9807
MR		 256static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
257 0x26, 0,
258};
259
e1f0d669
MR		 260static hda_nid_t stac92hd73xx_adc_nids[2] = {
261 0x1a, 0x1b
262};
263
2a9c7816
MR		 264#define DELL_M6_AMP 2
265static hda_nid_t stac92hd73xx_amp_nids[3] = {
266 0x0b, 0x0c, 0x0e
89385035
MR		 267};
268
e1f0d669
MR		 269#define STAC92HD73XX_NUM_DMICS 2
270static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
271 0x13, 0x14, 0
272};
273
274#define STAC92HD73_DAC_COUNT 5
275static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
276 0x15, 0x16, 0x17, 0x18, 0x19,
277};
278
279static hda_nid_t stac92hd73xx_mux_nids[4] = {
280 0x28, 0x29, 0x2a, 0x2b,
281};
282
283static hda_nid_t stac92hd73xx_dmux_nids[2] = {
284 0x20, 0x21,
285};
286
d9737751
MR		 287static hda_nid_t stac92hd73xx_smux_nids[2] = {
288 0x22, 0x23,
289};
290
d0513fc6
MR		 291#define STAC92HD83XXX_NUM_DMICS 2
292static hda_nid_t stac92hd83xxx_dmic_nids[STAC92HD83XXX_NUM_DMICS + 1] = {
293 0x11, 0x12, 0
294};
295
296#define STAC92HD81_DAC_COUNT 2
297#define STAC92HD83_DAC_COUNT 3
298static hda_nid_t stac92hd83xxx_dac_nids[STAC92HD73_DAC_COUNT] = {
299 0x13, 0x14, 0x22,
300};
301
302static hda_nid_t stac92hd83xxx_dmux_nids[2] = {
303 0x17, 0x18,
304};
305
306static hda_nid_t stac92hd83xxx_adc_nids[2] = {
307 0x15, 0x16,
308};
309
310static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
311 0xa, 0xb, 0xd, 0xe,
312};
313
0ffa9807
MR		 314static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
315 0x1e, 0,
316};
317
d0513fc6
MR		 318static unsigned int stac92hd83xxx_pwr_mapping[4] = {
319 0x03, 0x0c, 0x10, 0x40,
320};
321
a64135a2
MR		 322static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
323 0x0a, 0x0d, 0x0f
324};
325
e035b841
MR		 326static hda_nid_t stac92hd71bxx_adc_nids[2] = {
327 0x12, 0x13,
328};
329
330static hda_nid_t stac92hd71bxx_mux_nids[2] = {
331 0x1a, 0x1b
332};
333
4b33c767
MR		 334static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
335 0x1c, 0x1d,
e1f0d669
MR		 336};
337
d9737751
MR		 338static hda_nid_t stac92hd71bxx_smux_nids[2] = {
339 0x24, 0x25,
340};
341
aea7bb0a 342static hda_nid_t stac92hd71bxx_dac_nids[1] = {
e035b841
MR		 343 0x10, /*0x11, */
344};
345
346#define STAC92HD71BXX_NUM_DMICS 2
347static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
348 0x18, 0x19, 0
349};
350
0ffa9807
MR		 351static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
352 0x22, 0
353};
354
8e21c34c
TD		 355static hda_nid_t stac925x_adc_nids[1] = {
356 0x03,
357};
358
359static hda_nid_t stac925x_mux_nids[1] = {
360 0x0f,
361};
362
363static hda_nid_t stac925x_dac_nids[1] = {
364 0x02,
365};
366
f6e9852a
TI		 367#define STAC925X_NUM_DMICS 1
368static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
369 0x15, 0
2c11f955
TD		 370};
371
1697055e
TI		 372static hda_nid_t stac925x_dmux_nids[1] = {
373 0x14,
374};
375
2f2f4251
M		 376static hda_nid_t stac922x_adc_nids[2] = {
377 0x06, 0x07,
378};
379
380static hda_nid_t stac922x_mux_nids[2] = {
381 0x12, 0x13,
382};
383
3cc08dc6
MP		 384static hda_nid_t stac927x_adc_nids[3] = {
385 0x07, 0x08, 0x09
386};
387
388static hda_nid_t stac927x_mux_nids[3] = {
389 0x15, 0x16, 0x17
390};
391
d9737751
MR		 392static hda_nid_t stac927x_smux_nids[1] = {
393 0x21,
394};
395
b76c850f
MR		 396static hda_nid_t stac927x_dac_nids[6] = {
397 0x02, 0x03, 0x04, 0x05, 0x06, 0
398};
399
e1f0d669
MR		 400static hda_nid_t stac927x_dmux_nids[1] = {
401 0x1b,
402};
403
7f16859a
MR		 404#define STAC927X_NUM_DMICS 2
405static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
406 0x13, 0x14, 0
407};
408
65973632
MR		 409static const char *stac927x_spdif_labels[5] = {
410 "Digital Playback", "ADAT", "Analog Mux 1",
411 "Analog Mux 2", "Analog Mux 3"
412};
413
f3302a59
MP		 414static hda_nid_t stac9205_adc_nids[2] = {
415 0x12, 0x13
416};
417
418static hda_nid_t stac9205_mux_nids[2] = {
419 0x19, 0x1a
420};
421
e1f0d669 422static hda_nid_t stac9205_dmux_nids[1] = {
1697055e 423 0x1d,
e1f0d669
MR		 424};
425
d9737751
MR		 426static hda_nid_t stac9205_smux_nids[1] = {
427 0x21,
428};
429
f6e9852a
TI		 430#define STAC9205_NUM_DMICS 2
431static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
432 0x17, 0x18, 0
8b65727b
MP		 433};
434
c7d4b2fa 435static hda_nid_t stac9200_pin_nids[8] = {
93ed1503
TD		 436 0x08, 0x09, 0x0d, 0x0e,
437 0x0f, 0x10, 0x11, 0x12,
2f2f4251
M		 438};
439
8e21c34c
TD		 440static hda_nid_t stac925x_pin_nids[8] = {
441 0x07, 0x08, 0x0a, 0x0b,
442 0x0c, 0x0d, 0x10, 0x11,
443};
444
2f2f4251
M		 445static hda_nid_t stac922x_pin_nids[10] = {
446 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
447 0x0f, 0x10, 0x11, 0x15, 0x1b,
448};
449
a7662640 450static hda_nid_t stac92hd73xx_pin_nids[13] = {
e1f0d669
MR		 451 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
452 0x0f, 0x10, 0x11, 0x12, 0x13,
d9737751 453 0x14, 0x22, 0x23
e1f0d669
MR		 454};
455
d0513fc6
MR		 456static hda_nid_t stac92hd83xxx_pin_nids[14] = {
457 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
458 0x0f, 0x10, 0x11, 0x12, 0x13,
459 0x1d, 0x1e, 0x1f, 0x20
460};
0ffa9807 461static hda_nid_t stac92hd71bxx_pin_nids[11] = {
e035b841
MR		 462 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
463 0x0f, 0x14, 0x18, 0x19, 0x1e,
0ffa9807 464 0x1f,
e035b841
MR		 465};
466
3cc08dc6
MP		 467static hda_nid_t stac927x_pin_nids[14] = {
468 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
469 0x0f, 0x10, 0x11, 0x12, 0x13,
470 0x14, 0x21, 0x22, 0x23,
471};
472
f3302a59
MP		 473static hda_nid_t stac9205_pin_nids[12] = {
474 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
475 0x0f, 0x14, 0x16, 0x17, 0x18,
476 0x21, 0x22,
f3302a59
MP		 477};
478
89385035
MR		 479#define stac92xx_amp_volume_info snd_hda_mixer_amp_volume_info
480
481static int stac92xx_amp_volume_get(struct snd_kcontrol *kcontrol,
482 struct snd_ctl_elem_value *ucontrol)
483{
484 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
485 struct sigmatel_spec *spec = codec->spec;
486 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
487
488 kcontrol->private_value ^= get_amp_nid(kcontrol);
489 kcontrol->private_value |= nid;
490
491 return snd_hda_mixer_amp_volume_get(kcontrol, ucontrol);
492}
493
494static int stac92xx_amp_volume_put(struct snd_kcontrol *kcontrol,
495 struct snd_ctl_elem_value *ucontrol)
496{
497 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
498 struct sigmatel_spec *spec = codec->spec;
499 hda_nid_t nid = spec->amp_nids[spec->cur_amux];
500
501 kcontrol->private_value ^= get_amp_nid(kcontrol);
502 kcontrol->private_value |= nid;
503
504 return snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
505}
506
8b65727b
MP		 507static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
508 struct snd_ctl_elem_info *uinfo)
509{
510 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
511 struct sigmatel_spec *spec = codec->spec;
512 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
513}
514
515static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol)
517{
518 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
519 struct sigmatel_spec *spec = codec->spec;
e1f0d669 520 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b 521
e1f0d669 522 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
8b65727b
MP		 523 return 0;
524}
525
526static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_value *ucontrol)
528{
529 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
530 struct sigmatel_spec *spec = codec->spec;
e1f0d669 531 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
8b65727b
MP		 532
533 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
e1f0d669 534 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
8b65727b
MP		 535}
536
d9737751
MR		 537static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
538 struct snd_ctl_elem_info *uinfo)
539{
540 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
541 struct sigmatel_spec *spec = codec->spec;
542 return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
543}
544
545static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
549 struct sigmatel_spec *spec = codec->spec;
550 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
551
552 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
553 return 0;
554}
555
556static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
557 struct snd_ctl_elem_value *ucontrol)
558{
559 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
560 struct sigmatel_spec *spec = codec->spec;
00ef50c2 561 struct hda_input_mux *smux = &spec->private_smux;
d9737751 562 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
00ef50c2
MR		 563 int err, val;
564 hda_nid_t nid;
d9737751 565
00ef50c2 566 err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
d9737751 567 spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
00ef50c2
MR		 568 if (err < 0)
569 return err;
570
571 if (spec->spdif_mute) {
572 if (smux_idx == 0)
573 nid = spec->multiout.dig_out_nid;
574 else
575 nid = codec->slave_dig_outs[smux_idx - 1];
576 if (spec->cur_smux[smux_idx] == smux->num_items - 1)
577 val = AMP_OUT_MUTE;
00ef50c2 578 else
c1e99bd9 579 val = AMP_OUT_UNMUTE;
00ef50c2
MR		 580 /* un/mute SPDIF out */
581 snd_hda_codec_write_cache(codec, nid, 0,
582 AC_VERB_SET_AMP_GAIN_MUTE, val);
583 }
584 return 0;
d9737751
MR		 585}
586
c8b6bf9b 587static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2f2f4251
M		 588{
589 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
590 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa 591 return snd_hda_input_mux_info(spec->input_mux, uinfo);
2f2f4251
M		 592}
593
c8b6bf9b 594static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 595{
596 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
597 struct sigmatel_spec *spec = codec->spec;
598 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
599
600 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
601 return 0;
602}
603
c8b6bf9b 604static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2f2f4251
M		 605{
606 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
607 struct sigmatel_spec *spec = codec->spec;
608 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
609
c7d4b2fa 610 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
2f2f4251
M		 611 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
612}
613
b22b4821
MR		 614static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_info *uinfo)
616{
617 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
618 struct sigmatel_spec *spec = codec->spec;
619 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
620}
621
622static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
625 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
626 struct sigmatel_spec *spec = codec->spec;
627
628 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
629 return 0;
630}
631
632static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
633 struct snd_ctl_elem_value *ucontrol)
634{
635 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
636 struct sigmatel_spec *spec = codec->spec;
637
638 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
639 spec->mono_nid, &spec->cur_mmux);
640}
641
89385035
MR		 642static int stac92xx_amp_mux_enum_info(struct snd_kcontrol *kcontrol,
643 struct snd_ctl_elem_info *uinfo)
644{
645 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
646 struct sigmatel_spec *spec = codec->spec;
647 return snd_hda_input_mux_info(spec->amp_mux, uinfo);
648}
649
650static int stac92xx_amp_mux_enum_get(struct snd_kcontrol *kcontrol,
651 struct snd_ctl_elem_value *ucontrol)
652{
653 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
654 struct sigmatel_spec *spec = codec->spec;
655
656 ucontrol->value.enumerated.item[0] = spec->cur_amux;
657 return 0;
658}
659
660static int stac92xx_amp_mux_enum_put(struct snd_kcontrol *kcontrol,
661 struct snd_ctl_elem_value *ucontrol)
662{
663 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
664 struct sigmatel_spec *spec = codec->spec;
665 struct snd_kcontrol *ctl =
666 snd_hda_find_mixer_ctl(codec, "Amp Capture Volume");
667 if (!ctl)
668 return -EINVAL;
669
670 snd_ctl_notify(codec->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
671 SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
672
673 return snd_hda_input_mux_put(codec, spec->amp_mux, ucontrol,
674 0, &spec->cur_amux);
675}
676
5f10c4a9
ML		 677#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
678
679static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
680 struct snd_ctl_elem_value *ucontrol)
681{
682 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
e1f0d669 683 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9
ML		 684 struct sigmatel_spec *spec = codec->spec;
685
e1f0d669
MR		 686 ucontrol->value.integer.value[0] = !!(spec->aloopback &
687 (spec->aloopback_mask << idx));
5f10c4a9
ML		 688 return 0;
689}
690
691static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
692 struct snd_ctl_elem_value *ucontrol)
693{
694 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
695 struct sigmatel_spec *spec = codec->spec;
e1f0d669 696 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
5f10c4a9 697 unsigned int dac_mode;
e1f0d669 698 unsigned int val, idx_val;
5f10c4a9 699
e1f0d669
MR		 700 idx_val = spec->aloopback_mask << idx;
701 if (ucontrol->value.integer.value[0])
702 val = spec->aloopback | idx_val;
703 else
704 val = spec->aloopback & ~idx_val;
68ea7b2f 705 if (spec->aloopback == val)
5f10c4a9
ML		 706 return 0;
707
68ea7b2f 708 spec->aloopback = val;
5f10c4a9 709
e1f0d669
MR		 710 /* Only return the bits defined by the shift value of the
711 * first two bytes of the mask
712 */
5f10c4a9 713 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
e1f0d669
MR		 714 kcontrol->private_value & 0xFFFF, 0x0);
715 dac_mode >>= spec->aloopback_shift;
5f10c4a9 716
e1f0d669 717 if (spec->aloopback & idx_val) {
5f10c4a9 718 snd_hda_power_up(codec);
e1f0d669 719 dac_mode |= idx_val;
5f10c4a9
ML		 720 } else {
721 snd_hda_power_down(codec);
e1f0d669 722 dac_mode &= ~idx_val;
5f10c4a9
ML		 723 }
724
725 snd_hda_codec_write_cache(codec, codec->afg, 0,
726 kcontrol->private_value >> 16, dac_mode);
727
728 return 1;
729}
730
c7d4b2fa 731static struct hda_verb stac9200_core_init[] = {
2f2f4251 732 /* set dac0mux for dac converter */
c7d4b2fa 733 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
2f2f4251
M		 734 {}
735};
736
1194b5b7
TI		 737static struct hda_verb stac9200_eapd_init[] = {
738 /* set dac0mux for dac converter */
739 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
740 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
741 {}
742};
743
e1f0d669
MR		 744static struct hda_verb stac92hd73xx_6ch_core_init[] = {
745 /* set master volume and direct control */
746 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
747 /* setup audio connections */
748 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
749 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
750 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
751 /* setup adcs to point to mixer */
752 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
753 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 754 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
755 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
756 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
757 /* setup import muxs */
758 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
759 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
760 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
761 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
762 {}
763};
764
d654a660
MR		 765static struct hda_verb dell_eq_core_init[] = {
766 /* set master volume to max value without distortion
767 * and direct control */
768 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
769 /* setup audio connections */
770 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
f7cf0a7c
MR		 771 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x02},
772 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x01},
d654a660
MR		 773 /* setup adcs to point to mixer */
774 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
775 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
776 /* setup import muxs */
777 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
778 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
779 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
780 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
781 {}
782};
783
52fe0f9d 784static struct hda_verb dell_m6_core_init[] = {
6b3ab21e 785 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
52fe0f9d 786 /* setup audio connections */
7747ecce
MR		 787 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
788 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
52fe0f9d
MR		 789 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
790 /* setup adcs to point to mixer */
791 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
792 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
793 /* setup import muxs */
794 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
795 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
796 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
797 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
798 {}
799};
800
e1f0d669
MR		 801static struct hda_verb stac92hd73xx_8ch_core_init[] = {
802 /* set master volume and direct control */
803 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
804 /* setup audio connections */
805 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
806 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
807 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
808 /* connect hp ports to dac3 */
809 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
810 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
811 /* setup adcs to point to mixer */
812 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
813 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 814 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
815 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
816 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
817 /* setup import muxs */
818 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
819 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
820 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
821 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
822 {}
823};
824
825static struct hda_verb stac92hd73xx_10ch_core_init[] = {
826 /* set master volume and direct control */
827 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
828 /* setup audio connections */
829 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
830 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
831 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
832 /* dac3 is connected to import3 mux */
833 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
834 /* connect hp ports to dac4 */
835 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
836 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
837 /* setup adcs to point to mixer */
838 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
839 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
e1f0d669
MR		 840 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
841 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
842 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
843 /* setup import muxs */
844 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
845 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
846 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
847 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
848 {}
849};
850
d0513fc6
MR		 851static struct hda_verb stac92hd83xxx_core_init[] = {
852 /* start of config #1 */
853 { 0xe, AC_VERB_SET_CONNECT_SEL, 0x3},
854
855 /* start of config #2 */
856 { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
857 { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
858 { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
859
860 /* power state controls amps */
861 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
862};
863
e035b841 864static struct hda_verb stac92hd71bxx_core_init[] = {
541eee87
MR		 865 /* set master volume and direct control */
866 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
867 /* connect headphone jack to dac1 */
868 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
541eee87
MR		 869 /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
870 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
871 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
872 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
541eee87
MR		 873};
874
4b33c767 875#define HD_DISABLE_PORTF 2
541eee87 876static struct hda_verb stac92hd71bxx_analog_core_init[] = {
aafc4412
MR		 877 /* start of config #1 */
878
879 /* connect port 0f to audio mixer */
880 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
aafc4412
MR		 881 /* unmute right and left channels for node 0x0f */
882 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
883 /* start of config #2 */
884
e035b841
MR		 885 /* set master volume and direct control */
886 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
887 /* connect headphone jack to dac1 */
888 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
aafc4412 889 /* unmute right and left channels for nodes 0x0a, 0xd */
e035b841
MR		 890 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
891 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
e035b841
MR		 892 {}
893};
894
8e21c34c
TD		 895static struct hda_verb stac925x_core_init[] = {
896 /* set dac0mux for dac converter */
897 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
898 {}
899};
900
c7d4b2fa 901static struct hda_verb stac922x_core_init[] = {
2f2f4251 902 /* set master volume and direct control */
c7d4b2fa 903 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
2f2f4251
M		 904 {}
905};
906
93ed1503 907static struct hda_verb d965_core_init[] = {
19039bd0 908 /* set master volume and direct control */
93ed1503 909 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
19039bd0
TI		 910 /* unmute node 0x1b */
911 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
912 /* select node 0x03 as DAC */
913 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
914 {}
915};
916
3cc08dc6
MP		 917static struct hda_verb stac927x_core_init[] = {
918 /* set master volume and direct control */
919 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1cd2224c
MR		 920 /* enable analog pc beep path */
921 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
3cc08dc6
MP		 922 {}
923};
924
f3302a59
MP		 925static struct hda_verb stac9205_core_init[] = {
926 /* set master volume and direct control */
927 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
d0513fc6
MR		 928 /* enable analog pc beep path */
929 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
f3302a59
MP		 930 {}
931};
932
b22b4821
MR		 933#define STAC_MONO_MUX \
934 { \
935 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
936 .name = "Mono Mux", \
937 .count = 1, \
938 .info = stac92xx_mono_mux_enum_info, \
939 .get = stac92xx_mono_mux_enum_get, \
940 .put = stac92xx_mono_mux_enum_put, \
941 }
942
89385035
MR		 943#define STAC_AMP_MUX \
944 { \
945 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
946 .name = "Amp Selector Capture Switch", \
947 .count = 1, \
948 .info = stac92xx_amp_mux_enum_info, \
949 .get = stac92xx_amp_mux_enum_get, \
950 .put = stac92xx_amp_mux_enum_put, \
951 }
952
953#define STAC_AMP_VOL(xname, nid, chs, idx, dir) \
954 { \
955 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
956 .name = xname, \
957 .index = 0, \
958 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
959 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
960 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
961 .info = stac92xx_amp_volume_info, \
962 .get = stac92xx_amp_volume_get, \
963 .put = stac92xx_amp_volume_put, \
964 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
965 .private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
966 }
967
9e05b7a3 968#define STAC_INPUT_SOURCE(cnt) \
ca7c5a8b
ML		 969 { \
970 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
971 .name = "Input Source", \
9e05b7a3 972 .count = cnt, \
ca7c5a8b
ML		 973 .info = stac92xx_mux_enum_info, \
974 .get = stac92xx_mux_enum_get, \
975 .put = stac92xx_mux_enum_put, \
976 }
977
e1f0d669 978#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
5f10c4a9
ML		 979 { \
980 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
981 .name = "Analog Loopback", \
e1f0d669 982 .count = cnt, \
5f10c4a9
ML		 983 .info = stac92xx_aloopback_info, \
984 .get = stac92xx_aloopback_get, \
985 .put = stac92xx_aloopback_put, \
986 .private_value = verb_read | (verb_write << 16), \
987 }
988
c8b6bf9b 989static struct snd_kcontrol_new stac9200_mixer[] = {
2f2f4251
M		 990 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
991 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
9e05b7a3 992 STAC_INPUT_SOURCE(1),
2f2f4251
M		 993 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
994 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
2f2f4251
M		 995 { } /* end */
996};
997
2a9c7816 998#define DELL_M6_MIXER 6
e1f0d669 999static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
2a9c7816 1000 /* start of config #1 */
e1f0d669
MR		 1001 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1002 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1003
e1f0d669
MR		 1004 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1005 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1006
2a9c7816
MR		 1007 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1008 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1009
1010 /* start of config #2 */
1011 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1012 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1013
e1f0d669
MR		 1014 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1015 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1016
2a9c7816
MR		 1017 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
1018
1019 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1020 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1021
1022 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1023 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1024
e1f0d669
MR		 1025 { } /* end */
1026};
1027
1028static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
e1f0d669
MR		 1029 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
1030
e1f0d669
MR		 1031 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1032 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1033
1034 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1035 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1036
1037 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1038 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1039
1040 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1041 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1042
1043 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1044 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1045
1046 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1047 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1048
1049 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1050 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1051 { } /* end */
1052};
1053
1054static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
e1f0d669
MR		 1055 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
1056
e1f0d669
MR		 1057 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
1058 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
1059
1060 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
1061 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
1062
1063 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
1064 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
1065
1066 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
1067 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
1068
1069 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
1070 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
1071
1072 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
1073 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
1074
1075 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
1076 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
1077 { } /* end */
1078};
1079
d0513fc6
MR		 1080
1081static struct snd_kcontrol_new stac92hd83xxx_mixer[] = {
1082 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_OUTPUT),
1083 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_OUTPUT),
1084
1085 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_OUTPUT),
1086 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_OUTPUT),
1087
1088 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x1b, 0, HDA_INPUT),
1089 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x1b, 0, HDA_INPUT),
1090
1091 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x1b, 0x1, HDA_INPUT),
1092 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x1b, 0x1, HDA_INPUT),
1093
1094 HDA_CODEC_VOLUME("Front Mic Capture Volume", 0x1b, 0x2, HDA_INPUT),
1095 HDA_CODEC_MUTE("Front Mic Capture Switch", 0x1b, 0x2, HDA_INPUT),
1096
1097 HDA_CODEC_VOLUME("Line In Capture Volume", 0x1b, 0x3, HDA_INPUT),
1098 HDA_CODEC_MUTE("Line In Capture Switch", 0x1b, 0x3, HDA_INPUT),
1099
1100 /*
1101 HDA_CODEC_VOLUME("Mic Capture Volume", 0x1b, 0x4, HDA_INPUT),
1102 HDA_CODEC_MUTE("Mic Capture Switch", 0x1b 0x4, HDA_INPUT),
1103 */
1104 { } /* end */
1105};
1106
541eee87 1107static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
e035b841 1108 STAC_INPUT_SOURCE(2),
4b33c767 1109 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
e035b841 1110
9b35947f
MR		 1111 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1112 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
9b35947f
MR		 1113
1114 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1115 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1cd2224c
MR		 1116 /* analog pc-beep replaced with digital beep support */
1117 /*
f7c5dda2
MR		 1118 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
1119 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
1cd2224c 1120 */
f7c5dda2 1121
687cb98e
MR		 1122 HDA_CODEC_MUTE("Import0 Mux Capture Switch", 0x17, 0x0, HDA_INPUT),
1123 HDA_CODEC_VOLUME("Import0 Mux Capture Volume", 0x17, 0x0, HDA_INPUT),
4b33c767 1124
687cb98e
MR		 1125 HDA_CODEC_MUTE("Import1 Mux Capture Switch", 0x17, 0x1, HDA_INPUT),
1126 HDA_CODEC_VOLUME("Import1 Mux Capture Volume", 0x17, 0x1, HDA_INPUT),
4b33c767
MR		 1127
1128 HDA_CODEC_MUTE("DAC0 Capture Switch", 0x17, 0x3, HDA_INPUT),
1129 HDA_CODEC_VOLUME("DAC0 Capture Volume", 0x17, 0x3, HDA_INPUT),
1130
1131 HDA_CODEC_MUTE("DAC1 Capture Switch", 0x17, 0x4, HDA_INPUT),
1132 HDA_CODEC_VOLUME("DAC1 Capture Volume", 0x17, 0x4, HDA_INPUT),
e035b841
MR		 1133 { } /* end */
1134};
1135
541eee87 1136static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
541eee87
MR		 1137 STAC_INPUT_SOURCE(2),
1138 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
1139
541eee87
MR		 1140 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
1141 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
541eee87
MR		 1142
1143 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
1144 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
541eee87
MR		 1145 { } /* end */
1146};
1147
8e21c34c 1148static struct snd_kcontrol_new stac925x_mixer[] = {
9e05b7a3 1149 STAC_INPUT_SOURCE(1),
8e21c34c 1150 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
587755f1 1151 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
8e21c34c
TD		 1152 { } /* end */
1153};
1154
9e05b7a3 1155static struct snd_kcontrol_new stac9205_mixer[] = {
9e05b7a3 1156 STAC_INPUT_SOURCE(2),
e1f0d669 1157 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
9e05b7a3
ML		 1158
1159 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
1160 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1161
1162 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
1163 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
2f2f4251
M		 1164 { } /* end */
1165};
1166
19039bd0 1167/* This needs to be generated dynamically based on sequence */
9e05b7a3
ML		 1168static struct snd_kcontrol_new stac922x_mixer[] = {
1169 STAC_INPUT_SOURCE(2),
9e05b7a3
ML		 1170 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
1171 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
9e05b7a3
ML		 1172
1173 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
1174 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
19039bd0
TI		 1175 { } /* end */
1176};
1177
9e05b7a3 1178
d1d985f0 1179static struct snd_kcontrol_new stac927x_mixer[] = {
9e05b7a3 1180 STAC_INPUT_SOURCE(3),
e1f0d669 1181 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
3cc08dc6 1182
9e05b7a3
ML		 1183 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
1184 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1185
1186 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
1187 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
9e05b7a3
ML		 1188
1189 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
1190 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
f3302a59
MP		 1191 { } /* end */
1192};
1193
1697055e
TI		 1194static struct snd_kcontrol_new stac_dmux_mixer = {
1195 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1196 .name = "Digital Input Source",
1197 /* count set later */
1198 .info = stac92xx_dmux_enum_info,
1199 .get = stac92xx_dmux_enum_get,
1200 .put = stac92xx_dmux_enum_put,
1201};
1202
d9737751
MR		 1203static struct snd_kcontrol_new stac_smux_mixer = {
1204 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
e3487970 1205 .name = "IEC958 Playback Source",
d9737751
MR		 1206 /* count set later */
1207 .info = stac92xx_smux_enum_info,
1208 .get = stac92xx_smux_enum_get,
1209 .put = stac92xx_smux_enum_put,
1210};
1211
2134ea4f
TI		 1212static const char *slave_vols[] = {
1213 "Front Playback Volume",
1214 "Surround Playback Volume",
1215 "Center Playback Volume",
1216 "LFE Playback Volume",
1217 "Side Playback Volume",
1218 "Headphone Playback Volume",
1219 "Headphone Playback Volume",
1220 "Speaker Playback Volume",
1221 "External Speaker Playback Volume",
1222 "Speaker2 Playback Volume",
1223 NULL
1224};
1225
1226static const char *slave_sws[] = {
1227 "Front Playback Switch",
1228 "Surround Playback Switch",
1229 "Center Playback Switch",
1230 "LFE Playback Switch",
1231 "Side Playback Switch",
1232 "Headphone Playback Switch",
1233 "Headphone Playback Switch",
1234 "Speaker Playback Switch",
1235 "External Speaker Playback Switch",
1236 "Speaker2 Playback Switch",
edb54a55 1237 "IEC958 Playback Switch",
2134ea4f
TI		 1238 NULL
1239};
1240
2f2f4251
M		 1241static int stac92xx_build_controls(struct hda_codec *codec)
1242{
1243 struct sigmatel_spec *spec = codec->spec;
1244 int err;
c7d4b2fa 1245 int i;
2f2f4251
M		 1246
1247 err = snd_hda_add_new_ctls(codec, spec->mixer);
1248 if (err < 0)
1249 return err;
c7d4b2fa
M		 1250
1251 for (i = 0; i < spec->num_mixers; i++) {
1252 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
1253 if (err < 0)
1254 return err;
1255 }
1697055e
TI		 1256 if (spec->num_dmuxes > 0) {
1257 stac_dmux_mixer.count = spec->num_dmuxes;
1258 err = snd_ctl_add(codec->bus->card,
1259 snd_ctl_new1(&stac_dmux_mixer, codec));
1260 if (err < 0)
1261 return err;
1262 }
d9737751 1263 if (spec->num_smuxes > 0) {
00ef50c2
MR		 1264 int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
1265 struct hda_input_mux *smux = &spec->private_smux;
1266 /* check for mute support on SPDIF out */
1267 if (wcaps & AC_WCAP_OUT_AMP) {
1268 smux->items[smux->num_items].label = "Off";
1269 smux->items[smux->num_items].index = 0;
1270 smux->num_items++;
1271 spec->spdif_mute = 1;
1272 }
d9737751
MR		 1273 stac_smux_mixer.count = spec->num_smuxes;
1274 err = snd_ctl_add(codec->bus->card,
1275 snd_ctl_new1(&stac_smux_mixer, codec));
1276 if (err < 0)
1277 return err;
1278 }
c7d4b2fa 1279
dabbed6f
M		 1280 if (spec->multiout.dig_out_nid) {
1281 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
1282 if (err < 0)
1283 return err;
9a08160b
TI		 1284 err = snd_hda_create_spdif_share_sw(codec,
1285 &spec->multiout);
1286 if (err < 0)
1287 return err;
1288 spec->multiout.share_spdif = 1;
dabbed6f 1289 }
da74ae3e 1290 if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
dabbed6f
M		 1291 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
1292 if (err < 0)
1293 return err;
1294 }
2134ea4f
TI		 1295
1296 /* if we have no master control, let's create it */
1297 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
1c82ed1b 1298 unsigned int vmaster_tlv[4];
2134ea4f 1299 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
1c82ed1b 1300 HDA_OUTPUT, vmaster_tlv);
2134ea4f 1301 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
1c82ed1b 1302 vmaster_tlv, slave_vols);
2134ea4f
TI		 1303 if (err < 0)
1304 return err;
1305 }
1306 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
1307 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
1308 NULL, slave_sws);
1309 if (err < 0)
1310 return err;
1311 }
1312
dabbed6f 1313 return 0;
2f2f4251
M		 1314}
1315
403d1944 1316static unsigned int ref9200_pin_configs[8] = {
dabbed6f 1317 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
2f2f4251
M		 1318 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1319};
1320
dfe495d0
TI		 1321/*
1322 STAC 9200 pin configs for
1323 102801A8
1324 102801DE
1325 102801E8
1326*/
1327static unsigned int dell9200_d21_pin_configs[8] = {
af6c016e
TI		 1328 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1329 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
dfe495d0
TI		 1330};
1331
1332/*
1333 STAC 9200 pin configs for
1334 102801C0
1335 102801C1
1336*/
1337static unsigned int dell9200_d22_pin_configs[8] = {
af6c016e
TI		 1338 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1339 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1340};
1341
1342/*
1343 STAC 9200 pin configs for
1344 102801C4 (Dell Dimension E310)
1345 102801C5
1346 102801C7
1347 102801D9
1348 102801DA
1349 102801E3
1350*/
1351static unsigned int dell9200_d23_pin_configs[8] = {
af6c016e
TI		 1352 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1353 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
dfe495d0
TI		 1354};
1355
1356
1357/*
1358 STAC 9200-32 pin configs for
1359 102801B5 (Dell Inspiron 630m)
1360 102801D8 (Dell Inspiron 640m)
1361*/
1362static unsigned int dell9200_m21_pin_configs[8] = {
af6c016e
TI		 1363 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1364 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1365};
1366
1367/*
1368 STAC 9200-32 pin configs for
1369 102801C2 (Dell Latitude D620)
1370 102801C8
1371 102801CC (Dell Latitude D820)
1372 102801D4
1373 102801D6
1374*/
1375static unsigned int dell9200_m22_pin_configs[8] = {
af6c016e
TI		 1376 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1377 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
dfe495d0
TI		 1378};
1379
1380/*
1381 STAC 9200-32 pin configs for
1382 102801CE (Dell XPS M1710)
1383 102801CF (Dell Precision M90)
1384*/
1385static unsigned int dell9200_m23_pin_configs[8] = {
1386 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1387 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1388};
1389
1390/*
1391 STAC 9200-32 pin configs for
1392 102801C9
1393 102801CA
1394 102801CB (Dell Latitude 120L)
1395 102801D3
1396*/
1397static unsigned int dell9200_m24_pin_configs[8] = {
af6c016e
TI		 1398 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1399 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1400};
1401
1402/*
1403 STAC 9200-32 pin configs for
1404 102801BD (Dell Inspiron E1505n)
1405 102801EE
1406 102801EF
1407*/
1408static unsigned int dell9200_m25_pin_configs[8] = {
af6c016e
TI		 1409 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1410 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
dfe495d0
TI		 1411};
1412
1413/*
1414 STAC 9200-32 pin configs for
1415 102801F5 (Dell Inspiron 1501)
1416 102801F6
1417*/
1418static unsigned int dell9200_m26_pin_configs[8] = {
af6c016e
TI		 1419 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1420 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
dfe495d0
TI		 1421};
1422
1423/*
1424 STAC 9200-32
1425 102801CD (Dell Inspiron E1705/9400)
1426*/
1427static unsigned int dell9200_m27_pin_configs[8] = {
af6c016e
TI		 1428 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1429 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
dfe495d0
TI		 1430};
1431
bf277785
TD		 1432static unsigned int oqo9200_pin_configs[8] = {
1433 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1434 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1435};
1436
dfe495d0 1437
f5fcc13c
TI		 1438static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1439 [STAC_REF] = ref9200_pin_configs,
bf277785 1440 [STAC_9200_OQO] = oqo9200_pin_configs,
dfe495d0
TI		 1441 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1442 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1443 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1444 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1445 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1446 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1447 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1448 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1449 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1450 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
117f257d 1451 [STAC_9200_PANASONIC] = ref9200_pin_configs,
403d1944
MP		 1452};
1453
f5fcc13c
TI		 1454static const char *stac9200_models[STAC_9200_MODELS] = {
1455 [STAC_REF] = "ref",
bf277785 1456 [STAC_9200_OQO] = "oqo",
dfe495d0
TI		 1457 [STAC_9200_DELL_D21] = "dell-d21",
1458 [STAC_9200_DELL_D22] = "dell-d22",
1459 [STAC_9200_DELL_D23] = "dell-d23",
1460 [STAC_9200_DELL_M21] = "dell-m21",
1461 [STAC_9200_DELL_M22] = "dell-m22",
1462 [STAC_9200_DELL_M23] = "dell-m23",
1463 [STAC_9200_DELL_M24] = "dell-m24",
1464 [STAC_9200_DELL_M25] = "dell-m25",
1465 [STAC_9200_DELL_M26] = "dell-m26",
1466 [STAC_9200_DELL_M27] = "dell-m27",
1194b5b7 1467 [STAC_9200_GATEWAY] = "gateway",
117f257d 1468 [STAC_9200_PANASONIC] = "panasonic",
f5fcc13c
TI		 1469};
1470
1471static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1472 /* SigmaTel reference board */
1473 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1474 "DFI LanParty", STAC_REF),
e7377071 1475 /* Dell laptops have BIOS problem */
dfe495d0
TI		 1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1477 "unknown Dell", STAC_9200_DELL_D21),
f5fcc13c 1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
dfe495d0
TI		 1479 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1481 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1483 "unknown Dell", STAC_9200_DELL_D22),
1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1485 "unknown Dell", STAC_9200_DELL_D22),
f5fcc13c 1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
dfe495d0
TI		 1487 "Dell Latitude D620", STAC_9200_DELL_M22),
1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1489 "unknown Dell", STAC_9200_DELL_D23),
1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1491 "unknown Dell", STAC_9200_DELL_D23),
1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1493 "unknown Dell", STAC_9200_DELL_M22),
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1495 "unknown Dell", STAC_9200_DELL_M24),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1497 "unknown Dell", STAC_9200_DELL_M24),
f5fcc13c 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
dfe495d0 1499 "Dell Latitude 120L", STAC_9200_DELL_M24),
877b866d 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
dfe495d0 1501 "Dell Latitude D820", STAC_9200_DELL_M22),
46f02ca3 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
dfe495d0 1503 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
46f02ca3 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
dfe495d0 1505 "Dell XPS M1710", STAC_9200_DELL_M23),
f0f96745 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
dfe495d0
TI		 1507 "Dell Precision M90", STAC_9200_DELL_M23),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1509 "unknown Dell", STAC_9200_DELL_M22),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1511 "unknown Dell", STAC_9200_DELL_M22),
8286c53e 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
dfe495d0 1513 "unknown Dell", STAC_9200_DELL_M22),
49c605db 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
dfe495d0
TI		 1515 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1517 "unknown Dell", STAC_9200_DELL_D23),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1519 "unknown Dell", STAC_9200_DELL_D23),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1521 "unknown Dell", STAC_9200_DELL_D21),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1523 "unknown Dell", STAC_9200_DELL_D23),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1525 "unknown Dell", STAC_9200_DELL_D21),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1527 "unknown Dell", STAC_9200_DELL_M25),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1529 "unknown Dell", STAC_9200_DELL_M25),
49c605db 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
dfe495d0
TI		 1531 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1533 "unknown Dell", STAC_9200_DELL_M26),
49c605db 1534 /* Panasonic */
117f257d 1535 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1194b5b7
TI		 1536 /* Gateway machines needs EAPD to be set on resume */
1537 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1538 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1539 STAC_9200_GATEWAY),
1540 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1541 STAC_9200_GATEWAY),
bf277785
TD		 1542 /* OQO Mobile */
1543 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
403d1944
MP		 1544 {} /* terminator */
1545};
1546
8e21c34c
TD		 1547static unsigned int ref925x_pin_configs[8] = {
1548 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
09a99959 1549 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
8e21c34c
TD		 1550};
1551
1552static unsigned int stac925x_MA6_pin_configs[8] = {
1553 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1554 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1555};
1556
2c11f955
TD		 1557static unsigned int stac925x_PA6_pin_configs[8] = {
1558 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1559 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1560};
1561
8e21c34c 1562static unsigned int stac925xM2_2_pin_configs[8] = {
7353e14d
SL		 1563 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1564 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
8e21c34c
TD		 1565};
1566
1567static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1568 [STAC_REF] = ref925x_pin_configs,
1569 [STAC_M2_2] = stac925xM2_2_pin_configs,
1570 [STAC_MA6] = stac925x_MA6_pin_configs,
2c11f955 1571 [STAC_PA6] = stac925x_PA6_pin_configs,
8e21c34c
TD		 1572};
1573
1574static const char *stac925x_models[STAC_925x_MODELS] = {
1575 [STAC_REF] = "ref",
1576 [STAC_M2_2] = "m2-2",
1577 [STAC_MA6] = "m6",
2c11f955 1578 [STAC_PA6] = "pa6",
8e21c34c
TD		 1579};
1580
1581static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1582 /* SigmaTel reference board */
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
2c11f955 1584 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
8e21c34c
TD		 1585 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1586 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1587 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
2c11f955 1588 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
8e21c34c
TD		 1589 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1590 {} /* terminator */
1591};
1592
a7662640 1593static unsigned int ref92hd73xx_pin_configs[13] = {
e1f0d669
MR		 1594 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1595 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1596 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
a7662640
MR		 1597 0x01452050,
1598};
1599
1600static unsigned int dell_m6_pin_configs[13] = {
1601 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
7c2ba97b 1602 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1603 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1604 0x4f0000f0,
e1f0d669
MR		 1605};
1606
1607static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
a7662640 1608 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
661cd8fb
TI		 1609 [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
1610 [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
1611 [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
6b3ab21e 1612 [STAC_DELL_EQ] = dell_m6_pin_configs,
e1f0d669
MR		 1613};
1614
1615static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
9e43f0de 1616 [STAC_92HD73XX_NO_JD] = "no-jd",
e1f0d669 1617 [STAC_92HD73XX_REF] = "ref",
661cd8fb
TI		 1618 [STAC_DELL_M6_AMIC] = "dell-m6-amic",
1619 [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
1620 [STAC_DELL_M6_BOTH] = "dell-m6",
6b3ab21e 1621 [STAC_DELL_EQ] = "dell-eq",
e1f0d669
MR		 1622};
1623
1624static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1625 /* SigmaTel reference board */
1626 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
a7662640
MR		 1627 "DFI LanParty", STAC_92HD73XX_REF),
1628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
661cd8fb 1629 "Dell Studio 1535", STAC_DELL_M6_DMIC),
a7662640 1630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
661cd8fb 1631 "unknown Dell", STAC_DELL_M6_DMIC),
a7662640 1632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
661cd8fb 1633 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1634 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
661cd8fb 1635 "unknown Dell", STAC_DELL_M6_BOTH),
a7662640 1636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
661cd8fb 1637 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1638 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
661cd8fb 1639 "unknown Dell", STAC_DELL_M6_AMIC),
a7662640 1640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
661cd8fb
TI		 1641 "unknown Dell", STAC_DELL_M6_DMIC),
1642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1643 "unknown Dell", STAC_DELL_M6_DMIC),
b0fc5e04 1644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
661cd8fb 1645 "Dell Studio 1537", STAC_DELL_M6_DMIC),
fa620e97
JS		 1646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1647 "Dell Studio 17", STAC_DELL_M6_DMIC),
e1f0d669
MR		 1648 {} /* terminator */
1649};
1650
d0513fc6
MR		 1651static unsigned int ref92hd83xxx_pin_configs[14] = {
1652 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
1653 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
1654 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
1655 0x01451160, 0x98560170,
1656};
1657
1658static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
1659 [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
1660};
1661
1662static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
1663 [STAC_92HD83XXX_REF] = "ref",
1664};
1665
1666static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
1667 /* SigmaTel reference board */
1668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1669 "DFI LanParty", STAC_92HD71BXX_REF),
1670};
1671
0ffa9807 1672static unsigned int ref92hd71bxx_pin_configs[11] = {
e035b841 1673 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
4b33c767 1674 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
0ffa9807 1675 0x90a000f0, 0x01452050, 0x01452050,
e035b841
MR		 1676};
1677
0ffa9807 1678static unsigned int dell_m4_1_pin_configs[11] = {
a7662640 1679 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
07bcb316 1680 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
0ffa9807 1681 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
a7662640
MR		 1682};
1683
0ffa9807 1684static unsigned int dell_m4_2_pin_configs[11] = {
a7662640
MR		 1685 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1686 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
0ffa9807 1687 0x40f000f0, 0x044413b0, 0x044413b0,
a7662640
MR		 1688};
1689
3a7abfd2
MR		 1690static unsigned int dell_m4_3_pin_configs[11] = {
1691 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1692 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
1693 0x40f000f0, 0x044413b0, 0x044413b0,
1694};
1695
e035b841
MR		 1696static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1697 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
a7662640
MR		 1698 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1699 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
3a7abfd2 1700 [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
6a14f585 1701 [STAC_HP_M4] = NULL,
e035b841
MR		 1702};
1703
1704static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1705 [STAC_92HD71BXX_REF] = "ref",
a7662640
MR		 1706 [STAC_DELL_M4_1] = "dell-m4-1",
1707 [STAC_DELL_M4_2] = "dell-m4-2",
3a7abfd2 1708 [STAC_DELL_M4_3] = "dell-m4-3",
6a14f585 1709 [STAC_HP_M4] = "hp-m4",
e035b841
MR		 1710};
1711
1712static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1713 /* SigmaTel reference board */
1714 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1715 "DFI LanParty", STAC_92HD71BXX_REF),
80bf2724
TI		 1716 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
1717 "HP dv5", STAC_HP_M4),
1718 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
1719 "HP dv7", STAC_HP_M4),
9a9e2359
MR		 1720 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
1721 "unknown HP", STAC_HP_M4),
a7662640
MR		 1722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1723 "unknown Dell", STAC_DELL_M4_1),
1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1725 "unknown Dell", STAC_DELL_M4_1),
1726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1727 "unknown Dell", STAC_DELL_M4_1),
1728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1729 "unknown Dell", STAC_DELL_M4_1),
1730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1731 "unknown Dell", STAC_DELL_M4_1),
1732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1733 "unknown Dell", STAC_DELL_M4_1),
1734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1735 "unknown Dell", STAC_DELL_M4_1),
1736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1737 "unknown Dell", STAC_DELL_M4_2),
1738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1739 "unknown Dell", STAC_DELL_M4_2),
1740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1741 "unknown Dell", STAC_DELL_M4_2),
1742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1743 "unknown Dell", STAC_DELL_M4_2),
3a7abfd2
MR		 1744 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
1745 "unknown Dell", STAC_DELL_M4_3),
e035b841
MR		 1746 {} /* terminator */
1747};
1748
403d1944
MP		 1749static unsigned int ref922x_pin_configs[10] = {
1750 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1751 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
2f2f4251
M		 1752 0x40000100, 0x40000100,
1753};
1754
dfe495d0
TI		 1755/*
1756 STAC 922X pin configs for
1757 102801A7
1758 102801AB
1759 102801A9
1760 102801D1
1761 102801D2
1762*/
1763static unsigned int dell_922x_d81_pin_configs[10] = {
1764 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1765 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1766 0x01813122, 0x400001f2,
1767};
1768
1769/*
1770 STAC 922X pin configs for
1771 102801AC
1772 102801D0
1773*/
1774static unsigned int dell_922x_d82_pin_configs[10] = {
1775 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1776 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1777 0x01813122, 0x400001f1,
1778};
1779
1780/*
1781 STAC 922X pin configs for
1782 102801BF
1783*/
1784static unsigned int dell_922x_m81_pin_configs[10] = {
1785 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1786 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1787 0x40C003f1, 0x405003f0,
1788};
1789
1790/*
1791 STAC 9221 A1 pin configs for
1792 102801D7 (Dell XPS M1210)
1793*/
1794static unsigned int dell_922x_m82_pin_configs[10] = {
7f9310c1
JZ		 1795 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1796 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
dfe495d0
TI		 1797 0x508003f3, 0x405003f4,
1798};
1799
403d1944 1800static unsigned int d945gtp3_pin_configs[10] = {
869264c4 1801 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
403d1944
MP		 1802 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1803 0x02a19120, 0x40000100,
1804};
1805
1806static unsigned int d945gtp5_pin_configs[10] = {
869264c4
MP		 1807 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1808 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
403d1944
MP		 1809 0x02a19320, 0x40000100,
1810};
1811
5d5d3bc3
IZ		 1812static unsigned int intel_mac_v1_pin_configs[10] = {
1813 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1814 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1815 0x400000fc, 0x400000fb,
1816};
1817
1818static unsigned int intel_mac_v2_pin_configs[10] = {
1819 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1820 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1821 0x400000fc, 0x400000fb,
6f0778d8
NB		 1822};
1823
5d5d3bc3
IZ		 1824static unsigned int intel_mac_v3_pin_configs[10] = {
1825 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1826 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
3fc24d85
TI		 1827 0x400000fc, 0x400000fb,
1828};
1829
5d5d3bc3
IZ		 1830static unsigned int intel_mac_v4_pin_configs[10] = {
1831 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1832 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
f16928fb
SF		 1833 0x400000fc, 0x400000fb,
1834};
1835
5d5d3bc3
IZ		 1836static unsigned int intel_mac_v5_pin_configs[10] = {
1837 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1838 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1839 0x400000fc, 0x400000fb,
0dae0f83
TI		 1840};
1841
8c650087
MCC		 1842static unsigned int ecs202_pin_configs[10] = {
1843 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010,
1844 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1,
1845 0x9037012e, 0x40e000f2,
1846};
76c08828 1847
19039bd0 1848static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
f5fcc13c 1849 [STAC_D945_REF] = ref922x_pin_configs,
19039bd0
TI		 1850 [STAC_D945GTP3] = d945gtp3_pin_configs,
1851 [STAC_D945GTP5] = d945gtp5_pin_configs,
5d5d3bc3
IZ		 1852 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1853 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1854 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1855 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1856 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
536319af 1857 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
dfe495d0 1858 /* for backward compatibility */
5d5d3bc3
IZ		 1859 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1860 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1861 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1862 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1863 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1864 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
8c650087 1865 [STAC_ECS_202] = ecs202_pin_configs,
dfe495d0
TI		 1866 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1867 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1868 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1869 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
403d1944
MP		 1870};
1871
f5fcc13c
TI		 1872static const char *stac922x_models[STAC_922X_MODELS] = {
1873 [STAC_D945_REF] = "ref",
1874 [STAC_D945GTP5] = "5stack",
1875 [STAC_D945GTP3] = "3stack",
5d5d3bc3
IZ		 1876 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1877 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1878 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1879 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1880 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
536319af 1881 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
dfe495d0 1882 /* for backward compatibility */
f5fcc13c 1883 [STAC_MACMINI] = "macmini",
3fc24d85 1884 [STAC_MACBOOK] = "macbook",
6f0778d8
NB		 1885 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1886 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
f16928fb 1887 [STAC_IMAC_INTEL] = "imac-intel",
0dae0f83 1888 [STAC_IMAC_INTEL_20] = "imac-intel-20",
8c650087 1889 [STAC_ECS_202] = "ecs202",
dfe495d0
TI		 1890 [STAC_922X_DELL_D81] = "dell-d81",
1891 [STAC_922X_DELL_D82] = "dell-d82",
1892 [STAC_922X_DELL_M81] = "dell-m81",
1893 [STAC_922X_DELL_M82] = "dell-m82",
f5fcc13c
TI		 1894};
1895
1896static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1897 /* SigmaTel reference board */
1898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1899 "DFI LanParty", STAC_D945_REF),
1900 /* Intel 945G based systems */
1901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1902 "Intel D945G", STAC_D945GTP3),
1903 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1904 "Intel D945G", STAC_D945GTP3),
1905 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1906 "Intel D945G", STAC_D945GTP3),
1907 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1908 "Intel D945G", STAC_D945GTP3),
1909 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1910 "Intel D945G", STAC_D945GTP3),
1911 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1912 "Intel D945G", STAC_D945GTP3),
1913 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1914 "Intel D945G", STAC_D945GTP3),
1915 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1916 "Intel D945G", STAC_D945GTP3),
1917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1918 "Intel D945G", STAC_D945GTP3),
1919 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1920 "Intel D945G", STAC_D945GTP3),
1921 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1922 "Intel D945G", STAC_D945GTP3),
1923 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1924 "Intel D945G", STAC_D945GTP3),
1925 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1926 "Intel D945G", STAC_D945GTP3),
1927 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1928 "Intel D945G", STAC_D945GTP3),
1929 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1930 "Intel D945G", STAC_D945GTP3),
1931 /* Intel D945G 5-stack systems */
1932 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1933 "Intel D945G", STAC_D945GTP5),
1934 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1935 "Intel D945G", STAC_D945GTP5),
1936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1937 "Intel D945G", STAC_D945GTP5),
1938 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1939 "Intel D945G", STAC_D945GTP5),
1940 /* Intel 945P based systems */
1941 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1942 "Intel D945P", STAC_D945GTP3),
1943 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1944 "Intel D945P", STAC_D945GTP3),
1945 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1946 "Intel D945P", STAC_D945GTP3),
1947 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1948 "Intel D945P", STAC_D945GTP3),
1949 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1950 "Intel D945P", STAC_D945GTP3),
1951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1952 "Intel D945P", STAC_D945GTP5),
1953 /* other systems */
536319af 1954 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
f5fcc13c 1955 SND_PCI_QUIRK(0x8384, 0x7680,
536319af 1956 "Mac", STAC_INTEL_MAC_AUTO),
dfe495d0
TI		 1957 /* Dell systems */
1958 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1959 "unknown Dell", STAC_922X_DELL_D81),
1960 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1961 "unknown Dell", STAC_922X_DELL_D81),
1962 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1963 "unknown Dell", STAC_922X_DELL_D81),
1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1965 "unknown Dell", STAC_922X_DELL_D82),
1966 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1967 "unknown Dell", STAC_922X_DELL_M81),
1968 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1969 "unknown Dell", STAC_922X_DELL_D82),
1970 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1971 "unknown Dell", STAC_922X_DELL_D81),
1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1973 "unknown Dell", STAC_922X_DELL_D81),
1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1975 "Dell XPS M1210", STAC_922X_DELL_M82),
8c650087
MCC		 1976 /* ECS/PC Chips boards */
1977 SND_PCI_QUIRK(0x1019, 0x2144,
1978 "ECS/PC chips", STAC_ECS_202),
1979 SND_PCI_QUIRK(0x1019, 0x2608,
1980 "ECS/PC chips", STAC_ECS_202),
1981 SND_PCI_QUIRK(0x1019, 0x2633,
1982 "ECS/PC chips P17G/1333", STAC_ECS_202),
1983 SND_PCI_QUIRK(0x1019, 0x2811,
1984 "ECS/PC chips", STAC_ECS_202),
1985 SND_PCI_QUIRK(0x1019, 0x2812,
1986 "ECS/PC chips", STAC_ECS_202),
1987 SND_PCI_QUIRK(0x1019, 0x2813,
1988 "ECS/PC chips", STAC_ECS_202),
1989 SND_PCI_QUIRK(0x1019, 0x2814,
1990 "ECS/PC chips", STAC_ECS_202),
1991 SND_PCI_QUIRK(0x1019, 0x2815,
1992 "ECS/PC chips", STAC_ECS_202),
1993 SND_PCI_QUIRK(0x1019, 0x2816,
1994 "ECS/PC chips", STAC_ECS_202),
1995 SND_PCI_QUIRK(0x1019, 0x2817,
1996 "ECS/PC chips", STAC_ECS_202),
1997 SND_PCI_QUIRK(0x1019, 0x2818,
1998 "ECS/PC chips", STAC_ECS_202),
1999 SND_PCI_QUIRK(0x1019, 0x2819,
2000 "ECS/PC chips", STAC_ECS_202),
2001 SND_PCI_QUIRK(0x1019, 0x2820,
2002 "ECS/PC chips", STAC_ECS_202),
403d1944
MP		 2003 {} /* terminator */
2004};
2005
3cc08dc6 2006static unsigned int ref927x_pin_configs[14] = {
93ed1503
TD		 2007 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2008 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
2009 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
2010 0x01c42190, 0x40000100,
3cc08dc6
MP		 2011};
2012
93ed1503 2013static unsigned int d965_3st_pin_configs[14] = {
81d3dbde
TD		 2014 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
2015 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
2016 0x40000100, 0x40000100, 0x40000100, 0x40000100,
2017 0x40000100, 0x40000100
2018};
2019
93ed1503
TD		 2020static unsigned int d965_5st_pin_configs[14] = {
2021 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
2022 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
2023 0x40000100, 0x40000100, 0x40000100, 0x01442070,
2024 0x40000100, 0x40000100
2025};
2026
4ff076e5
TD		 2027static unsigned int dell_3st_pin_configs[14] = {
2028 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
2029 0x01111212, 0x01116211, 0x01813050, 0x01112214,
8e9068b1 2030 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
4ff076e5
TD		 2031 0x40c003fc, 0x40000100
2032};
2033
93ed1503 2034static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
e28d8322 2035 [STAC_D965_REF_NO_JD] = ref927x_pin_configs,
8e9068b1
MR		 2036 [STAC_D965_REF] = ref927x_pin_configs,
2037 [STAC_D965_3ST] = d965_3st_pin_configs,
2038 [STAC_D965_5ST] = d965_5st_pin_configs,
2039 [STAC_DELL_3ST] = dell_3st_pin_configs,
2040 [STAC_DELL_BIOS] = NULL,
3cc08dc6
MP		 2041};
2042
f5fcc13c 2043static const char *stac927x_models[STAC_927X_MODELS] = {
e28d8322 2044 [STAC_D965_REF_NO_JD] = "ref-no-jd",
8e9068b1
MR		 2045 [STAC_D965_REF] = "ref",
2046 [STAC_D965_3ST] = "3stack",
2047 [STAC_D965_5ST] = "5stack",
2048 [STAC_DELL_3ST] = "dell-3stack",
2049 [STAC_DELL_BIOS] = "dell-bios",
f5fcc13c
TI		 2050};
2051
2052static struct snd_pci_quirk stac927x_cfg_tbl[] = {
2053 /* SigmaTel reference board */
2054 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2055 "DFI LanParty", STAC_D965_REF),
81d3dbde 2056 /* Intel 946 based systems */
f5fcc13c
TI		 2057 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
2058 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
93ed1503 2059 /* 965 based 3 stack systems */
f5fcc13c
TI		 2060 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
2061 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
2062 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
2063 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
2064 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
2065 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
2066 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
2067 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
2068 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
2069 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
2070 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
2071 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
2072 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
2073 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
2074 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
2075 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
4ff076e5 2076 /* Dell 3 stack systems */
8e9068b1 2077 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
dfe495d0 2078 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
4ff076e5
TD		 2079 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
8e9068b1 2081 /* Dell 3 stack systems with verb table in BIOS */
2f32d909
MR		 2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
8e9068b1 2084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
24918b61 2085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
8e9068b1
MR		 2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
2089 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
93ed1503 2090 /* 965 based 5 stack systems */
f5fcc13c
TI		 2091 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
2093 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
2098 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
2099 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
3cc08dc6
MP		 2100 {} /* terminator */
2101};
2102
f3302a59
MP		 2103static unsigned int ref9205_pin_configs[12] = {
2104 0x40000100, 0x40000100, 0x01016011, 0x01014010,
09a99959 2105 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
8b65727b 2106 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
f3302a59
MP		 2107};
2108
dfe495d0
TI		 2109/*
2110 STAC 9205 pin configs for
2111 102801F1
2112 102801F2
2113 102801FC
2114 102801FD
2115 10280204
2116 1028021F
3fa2ef74 2117 10280228 (Dell Vostro 1500)
dfe495d0
TI		 2118*/
2119static unsigned int dell_9205_m42_pin_configs[12] = {
2120 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
2121 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
2122 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
2123};
2124
2125/*
2126 STAC 9205 pin configs for
2127 102801F9
2128 102801FA
2129 102801FE
2130 102801FF (Dell Precision M4300)
2131 10280206
2132 10280200
2133 10280201
2134*/
2135static unsigned int dell_9205_m43_pin_configs[12] = {
ae0a8ed8
TD		 2136 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
2137 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
2138 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
2139};
2140
dfe495d0 2141static unsigned int dell_9205_m44_pin_configs[12] = {
ae0a8ed8
TD		 2142 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
2143 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
2144 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
2145};
2146
f5fcc13c 2147static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
ae0a8ed8 2148 [STAC_9205_REF] = ref9205_pin_configs,
dfe495d0
TI		 2149 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
2150 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
2151 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
f3302a59
MP		 2152};
2153
f5fcc13c
TI		 2154static const char *stac9205_models[STAC_9205_MODELS] = {
2155 [STAC_9205_REF] = "ref",
dfe495d0 2156 [STAC_9205_DELL_M42] = "dell-m42",
ae0a8ed8
TD		 2157 [STAC_9205_DELL_M43] = "dell-m43",
2158 [STAC_9205_DELL_M44] = "dell-m44",
f5fcc13c
TI		 2159};
2160
2161static struct snd_pci_quirk stac9205_cfg_tbl[] = {
2162 /* SigmaTel reference board */
2163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2164 "DFI LanParty", STAC_9205_REF),
dfe495d0
TI		 2165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
2166 "unknown Dell", STAC_9205_DELL_M42),
2167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
2168 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8 2169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
b44ef2f1 2170 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
2172 "Dell Precision", STAC_9205_DELL_M43),
2173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
2174 "Dell Precision", STAC_9205_DELL_M43),
dfe495d0
TI		 2175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
2176 "unknown Dell", STAC_9205_DELL_M42),
2177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
2178 "unknown Dell", STAC_9205_DELL_M42),
ae0a8ed8
TD		 2179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
2180 "Dell Precision", STAC_9205_DELL_M43),
2181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
dfe495d0 2182 "Dell Precision M4300", STAC_9205_DELL_M43),
dfe495d0
TI		 2183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
2184 "unknown Dell", STAC_9205_DELL_M42),
4549915c
TI		 2185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
2186 "Dell Precision", STAC_9205_DELL_M43),
2187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
2188 "Dell Precision", STAC_9205_DELL_M43),
2189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
2190 "Dell Precision", STAC_9205_DELL_M43),
ae0a8ed8
TD		 2191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
2192 "Dell Inspiron", STAC_9205_DELL_M44),
3fa2ef74
MR		 2193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
2194 "Dell Vostro 1500", STAC_9205_DELL_M42),
f3302a59
MP		 2195 {} /* terminator */
2196};
2197
11b44bbd
RF		 2198static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
2199{
2200 int i;
2201 struct sigmatel_spec *spec = codec->spec;
2202
2203 if (! spec->bios_pin_configs) {
2204 spec->bios_pin_configs = kcalloc(spec->num_pins,
2205 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
2206 if (! spec->bios_pin_configs)
2207 return -ENOMEM;
2208 }
2209
2210 for (i = 0; i < spec->num_pins; i++) {
2211 hda_nid_t nid = spec->pin_nids[i];
2212 unsigned int pin_cfg;
2213
2214 pin_cfg = snd_hda_codec_read(codec, nid, 0,
2215 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
2216 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
2217 nid, pin_cfg);
2218 spec->bios_pin_configs[i] = pin_cfg;
2219 }
2220
2221 return 0;
2222}
2223
87d48363
MR		 2224static void stac92xx_set_config_reg(struct hda_codec *codec,
2225 hda_nid_t pin_nid, unsigned int pin_config)
2226{
2227 int i;
2228 snd_hda_codec_write(codec, pin_nid, 0,
2229 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
2230 pin_config & 0x000000ff);
2231 snd_hda_codec_write(codec, pin_nid, 0,
2232 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
2233 (pin_config & 0x0000ff00) >> 8);
2234 snd_hda_codec_write(codec, pin_nid, 0,
2235 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
2236 (pin_config & 0x00ff0000) >> 16);
2237 snd_hda_codec_write(codec, pin_nid, 0,
2238 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
2239 pin_config >> 24);
2240 i = snd_hda_codec_read(codec, pin_nid, 0,
2241 AC_VERB_GET_CONFIG_DEFAULT,
2242 0x00);
2243 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
2244 pin_nid, i);
2245}
2246
2f2f4251
M		 2247static void stac92xx_set_config_regs(struct hda_codec *codec)
2248{
2249 int i;
2250 struct sigmatel_spec *spec = codec->spec;
2f2f4251 2251
87d48363
MR		 2252 if (!spec->pin_configs)
2253 return;
11b44bbd 2254
87d48363
MR		 2255 for (i = 0; i < spec->num_pins; i++)
2256 stac92xx_set_config_reg(codec, spec->pin_nids[i],
2257 spec->pin_configs[i]);
2f2f4251 2258}
2f2f4251 2259
dabbed6f 2260/*
c7d4b2fa 2261 * Analog playback callbacks
dabbed6f 2262 */
c7d4b2fa
M		 2263static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
2264 struct hda_codec *codec,
c8b6bf9b 2265 struct snd_pcm_substream *substream)
2f2f4251 2266{
dabbed6f 2267 struct sigmatel_spec *spec = codec->spec;
8daaaa97
MR		 2268 if (spec->stream_delay)
2269 msleep(spec->stream_delay);
9a08160b
TI		 2270 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
2271 hinfo);
2f2f4251
M		 2272}
2273
2f2f4251
M		 2274static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2275 struct hda_codec *codec,
2276 unsigned int stream_tag,
2277 unsigned int format,
c8b6bf9b 2278 struct snd_pcm_substream *substream)
2f2f4251
M		 2279{
2280 struct sigmatel_spec *spec = codec->spec;
403d1944 2281 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
2f2f4251
M		 2282}
2283
2284static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
2285 struct hda_codec *codec,
c8b6bf9b 2286 struct snd_pcm_substream *substream)
2f2f4251
M		 2287{
2288 struct sigmatel_spec *spec = codec->spec;
2289 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
2290}
2291
dabbed6f
M		 2292/*
2293 * Digital playback callbacks
2294 */
2295static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
2296 struct hda_codec *codec,
c8b6bf9b 2297 struct snd_pcm_substream *substream)
dabbed6f
M		 2298{
2299 struct sigmatel_spec *spec = codec->spec;
2300 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2301}
2302
2303static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
2304 struct hda_codec *codec,
c8b6bf9b 2305 struct snd_pcm_substream *substream)
dabbed6f
M		 2306{
2307 struct sigmatel_spec *spec = codec->spec;
2308 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2309}
2310
6b97eb45
TI		 2311static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2312 struct hda_codec *codec,
2313 unsigned int stream_tag,
2314 unsigned int format,
2315 struct snd_pcm_substream *substream)
2316{
2317 struct sigmatel_spec *spec = codec->spec;
2318 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2319 stream_tag, format, substream);
2320}
2321
dabbed6f 2322
2f2f4251
M		 2323/*
2324 * Analog capture callbacks
2325 */
2326static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
2327 struct hda_codec *codec,
2328 unsigned int stream_tag,
2329 unsigned int format,
c8b6bf9b 2330 struct snd_pcm_substream *substream)
2f2f4251
M		 2331{
2332 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2333 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2334
8daaaa97
MR		 2335 if (spec->powerdown_adcs) {
2336 msleep(40);
2337 snd_hda_codec_write_cache(codec, nid, 0,
2338 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
2339 }
2340 snd_hda_codec_setup_stream(codec, nid, stream_tag, 0, format);
2f2f4251
M		 2341 return 0;
2342}
2343
2344static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
2345 struct hda_codec *codec,
c8b6bf9b 2346 struct snd_pcm_substream *substream)
2f2f4251
M		 2347{
2348 struct sigmatel_spec *spec = codec->spec;
8daaaa97 2349 hda_nid_t nid = spec->adc_nids[substream->number];
2f2f4251 2350
8daaaa97
MR		 2351 snd_hda_codec_cleanup_stream(codec, nid);
2352 if (spec->powerdown_adcs)
2353 snd_hda_codec_write_cache(codec, nid, 0,
2354 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
2f2f4251
M		 2355 return 0;
2356}
2357
dabbed6f
M		 2358static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
2359 .substreams = 1,
2360 .channels_min = 2,
2361 .channels_max = 2,
2362 /* NID is set in stac92xx_build_pcms */
2363 .ops = {
2364 .open = stac92xx_dig_playback_pcm_open,
6b97eb45
TI		 2365 .close = stac92xx_dig_playback_pcm_close,
2366 .prepare = stac92xx_dig_playback_pcm_prepare
dabbed6f
M		 2367 },
2368};
2369
2370static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
2371 .substreams = 1,
2372 .channels_min = 2,
2373 .channels_max = 2,
2374 /* NID is set in stac92xx_build_pcms */
2375};
2376
2f2f4251
M		 2377static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
2378 .substreams = 1,
2379 .channels_min = 2,
c7d4b2fa 2380 .channels_max = 8,
2f2f4251
M		 2381 .nid = 0x02, /* NID to query formats and rates */
2382 .ops = {
2383 .open = stac92xx_playback_pcm_open,
2384 .prepare = stac92xx_playback_pcm_prepare,
2385 .cleanup = stac92xx_playback_pcm_cleanup
2386 },
2387};
2388
3cc08dc6
MP		 2389static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
2390 .substreams = 1,
2391 .channels_min = 2,
2392 .channels_max = 2,
2393 .nid = 0x06, /* NID to query formats and rates */
2394 .ops = {
2395 .open = stac92xx_playback_pcm_open,
2396 .prepare = stac92xx_playback_pcm_prepare,
2397 .cleanup = stac92xx_playback_pcm_cleanup
2398 },
2399};
2400
2f2f4251 2401static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
2f2f4251
M		 2402 .channels_min = 2,
2403 .channels_max = 2,
9e05b7a3 2404 /* NID + .substreams is set in stac92xx_build_pcms */
2f2f4251
M		 2405 .ops = {
2406 .prepare = stac92xx_capture_pcm_prepare,
2407 .cleanup = stac92xx_capture_pcm_cleanup
2408 },
2409};
2410
2411static int stac92xx_build_pcms(struct hda_codec *codec)
2412{
2413 struct sigmatel_spec *spec = codec->spec;
2414 struct hda_pcm *info = spec->pcm_rec;
2415
2416 codec->num_pcms = 1;
2417 codec->pcm_info = info;
2418
c7d4b2fa 2419 info->name = "STAC92xx Analog";
2f2f4251 2420 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2f2f4251 2421 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
3cc08dc6 2422 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
9e05b7a3 2423 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
3cc08dc6
MP		 2424
2425 if (spec->alt_switch) {
2426 codec->num_pcms++;
2427 info++;
2428 info->name = "STAC92xx Analog Alt";
2429 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2430 }
2f2f4251 2431
dabbed6f
M		 2432 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2433 codec->num_pcms++;
2434 info++;
2435 info->name = "STAC92xx Digital";
7ba72ba1 2436 info->pcm_type = HDA_PCM_TYPE_SPDIF;
dabbed6f
M		 2437 if (spec->multiout.dig_out_nid) {
2438 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2439 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2440 }
2441 if (spec->dig_in_nid) {
2442 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2443 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2444 }
2445 }
2446
2f2f4251
M		 2447 return 0;
2448}
2449
c960a03b
TI		 2450static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2451{
2452 unsigned int pincap = snd_hda_param_read(codec, nid,
2453 AC_PAR_PIN_CAP);
2454 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2455 if (pincap & AC_PINCAP_VREF_100)
2456 return AC_PINCTL_VREF_100;
2457 if (pincap & AC_PINCAP_VREF_80)
2458 return AC_PINCTL_VREF_80;
2459 if (pincap & AC_PINCAP_VREF_50)
2460 return AC_PINCTL_VREF_50;
2461 if (pincap & AC_PINCAP_VREF_GRD)
2462 return AC_PINCTL_VREF_GRD;
2463 return 0;
2464}
2465
403d1944
MP		 2466static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2467
2468{
82beb8fd
TI		 2469 snd_hda_codec_write_cache(codec, nid, 0,
2470 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
403d1944
MP		 2471}
2472
7c2ba97b
MR		 2473#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2474
2475static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2476 struct snd_ctl_elem_value *ucontrol)
2477{
2478 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2479 struct sigmatel_spec *spec = codec->spec;
2480
d7a89436 2481 ucontrol->value.integer.value[0] = !!spec->hp_switch;
7c2ba97b
MR		 2482 return 0;
2483}
2484
2485static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2486 struct snd_ctl_elem_value *ucontrol)
2487{
2488 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2489 struct sigmatel_spec *spec = codec->spec;
d7a89436
TI		 2490 int nid = kcontrol->private_value;
2491
2492 spec->hp_switch = ucontrol->value.integer.value[0] ? nid : 0;
7c2ba97b
MR		 2493
2494 /* check to be sure that the ports are upto date with
2495 * switch changes
2496 */
2497 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2498
2499 return 1;
2500}
2501
a5ce8890 2502#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
403d1944
MP		 2503
2504static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2505{
2506 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2507 struct sigmatel_spec *spec = codec->spec;
2508 int io_idx = kcontrol-> private_value & 0xff;
2509
2510 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2511 return 0;
2512}
2513
2514static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2515{
2516 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2517 struct sigmatel_spec *spec = codec->spec;
2518 hda_nid_t nid = kcontrol->private_value >> 8;
2519 int io_idx = kcontrol-> private_value & 0xff;
68ea7b2f 2520 unsigned short val = !!ucontrol->value.integer.value[0];
403d1944
MP		 2521
2522 spec->io_switch[io_idx] = val;
2523
2524 if (val)
2525 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
c960a03b
TI		 2526 else {
2527 unsigned int pinctl = AC_PINCTL_IN_EN;
2528 if (io_idx) /* set VREF for mic */
2529 pinctl |= stac92xx_get_vref(codec, nid);
2530 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2531 }
40c1d308
JZ		 2532
2533 /* check the auto-mute again: we need to mute/unmute the speaker
2534 * appropriately according to the pin direction
2535 */
2536 if (spec->hp_detect)
2537 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2538
403d1944
MP		 2539 return 1;
2540}
2541
0fb87bb4
ML		 2542#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2543
2544static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2545 struct snd_ctl_elem_value *ucontrol)
2546{
2547 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2548 struct sigmatel_spec *spec = codec->spec;
2549
2550 ucontrol->value.integer.value[0] = spec->clfe_swap;
2551 return 0;
2552}
2553
2554static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2555 struct snd_ctl_elem_value *ucontrol)
2556{
2557 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2558 struct sigmatel_spec *spec = codec->spec;
2559 hda_nid_t nid = kcontrol->private_value & 0xff;
68ea7b2f 2560 unsigned int val = !!ucontrol->value.integer.value[0];
0fb87bb4 2561
68ea7b2f 2562 if (spec->clfe_swap == val)
0fb87bb4
ML		 2563 return 0;
2564
68ea7b2f 2565 spec->clfe_swap = val;
0fb87bb4
ML		 2566
2567 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2568 spec->clfe_swap ? 0x4 : 0x0);
2569
2570 return 1;
2571}
2572
7c2ba97b
MR		 2573#define STAC_CODEC_HP_SWITCH(xname) \
2574 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2575 .name = xname, \
2576 .index = 0, \
2577 .info = stac92xx_hp_switch_info, \
2578 .get = stac92xx_hp_switch_get, \
2579 .put = stac92xx_hp_switch_put, \
2580 }
2581
403d1944
MP		 2582#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2583 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2584 .name = xname, \
2585 .index = 0, \
2586 .info = stac92xx_io_switch_info, \
2587 .get = stac92xx_io_switch_get, \
2588 .put = stac92xx_io_switch_put, \
2589 .private_value = xpval, \
2590 }
2591
0fb87bb4
ML		 2592#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2593 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2594 .name = xname, \
2595 .index = 0, \
2596 .info = stac92xx_clfe_switch_info, \
2597 .get = stac92xx_clfe_switch_get, \
2598 .put = stac92xx_clfe_switch_put, \
2599 .private_value = xpval, \
2600 }
403d1944 2601
c7d4b2fa
M		 2602enum {
2603 STAC_CTL_WIDGET_VOL,
2604 STAC_CTL_WIDGET_MUTE,
09a99959 2605 STAC_CTL_WIDGET_MONO_MUX,
89385035
MR		 2606 STAC_CTL_WIDGET_AMP_MUX,
2607 STAC_CTL_WIDGET_AMP_VOL,
7c2ba97b 2608 STAC_CTL_WIDGET_HP_SWITCH,
403d1944 2609 STAC_CTL_WIDGET_IO_SWITCH,
0fb87bb4 2610 STAC_CTL_WIDGET_CLFE_SWITCH
c7d4b2fa
M		 2611};
2612
c8b6bf9b 2613static struct snd_kcontrol_new stac92xx_control_templates[] = {
c7d4b2fa
M		 2614 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2615 HDA_CODEC_MUTE(NULL, 0, 0, 0),
09a99959 2616 STAC_MONO_MUX,
89385035
MR		 2617 STAC_AMP_MUX,
2618 STAC_AMP_VOL(NULL, 0, 0, 0, 0),
7c2ba97b 2619 STAC_CODEC_HP_SWITCH(NULL),
403d1944 2620 STAC_CODEC_IO_SWITCH(NULL, 0),
0fb87bb4 2621 STAC_CODEC_CLFE_SWITCH(NULL, 0),
c7d4b2fa
M		 2622};
2623
2624/* add dynamic controls */
4d4e9bb3
TI		 2625static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
2626 struct snd_kcontrol_new *ktemp,
2627 int idx, const char *name,
2628 unsigned long val)
c7d4b2fa 2629{
c8b6bf9b 2630 struct snd_kcontrol_new *knew;
c7d4b2fa
M		 2631
2632 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2633 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2634
2635 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
2636 if (! knew)
2637 return -ENOMEM;
2638 if (spec->kctl_alloc) {
2639 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2640 kfree(spec->kctl_alloc);
2641 }
2642 spec->kctl_alloc = knew;
2643 spec->num_kctl_alloc = num;
2644 }
2645
2646 knew = &spec->kctl_alloc[spec->num_kctl_used];
4d4e9bb3 2647 *knew = *ktemp;
4682eee0 2648 knew->index = idx;
82fe0c58 2649 knew->name = kstrdup(name, GFP_KERNEL);
4d4e9bb3 2650 if (!knew->name)
c7d4b2fa
M		 2651 return -ENOMEM;
2652 knew->private_value = val;
2653 spec->num_kctl_used++;
2654 return 0;
2655}
2656
4d4e9bb3
TI		 2657static inline int stac92xx_add_control_idx(struct sigmatel_spec *spec,
2658 int type, int idx, const char *name,
2659 unsigned long val)
2660{
2661 return stac92xx_add_control_temp(spec,
2662 &stac92xx_control_templates[type],
2663 idx, name, val);
2664}
2665
4682eee0
MR		 2666
2667/* add dynamic controls */
4d4e9bb3
TI		 2668static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type,
2669 const char *name, unsigned long val)
4682eee0
MR		 2670{
2671 return stac92xx_add_control_idx(spec, type, 0, name, val);
2672}
2673
403d1944
MP		 2674/* flag inputs as additional dynamic lineouts */
2675static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2676{
2677 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2678 unsigned int wcaps, wtype;
2679 int i, num_dacs = 0;
2680
2681 /* use the wcaps cache to count all DACs available for line-outs */
2682 for (i = 0; i < codec->num_nodes; i++) {
2683 wcaps = codec->wcaps[i];
2684 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
8e9068b1 2685
7b043899
SL		 2686 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2687 num_dacs++;
2688 }
403d1944 2689
7b043899
SL		 2690 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2691
403d1944
MP		 2692 switch (cfg->line_outs) {
2693 case 3:
2694 /* add line-in as side */
7b043899 2695 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
c480f79b
TI		 2696 cfg->line_out_pins[cfg->line_outs] =
2697 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2698 spec->line_switch = 1;
2699 cfg->line_outs++;
2700 }
2701 break;
2702 case 2:
2703 /* add line-in as clfe and mic as side */
7b043899 2704 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
c480f79b
TI		 2705 cfg->line_out_pins[cfg->line_outs] =
2706 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2707 spec->line_switch = 1;
2708 cfg->line_outs++;
2709 }
7b043899 2710 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
c480f79b
TI		 2711 cfg->line_out_pins[cfg->line_outs] =
2712 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2713 spec->mic_switch = 1;
2714 cfg->line_outs++;
2715 }
2716 break;
2717 case 1:
2718 /* add line-in as surr and mic as clfe */
7b043899 2719 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
c480f79b
TI		 2720 cfg->line_out_pins[cfg->line_outs] =
2721 cfg->input_pins[AUTO_PIN_LINE];
403d1944
MP		 2722 spec->line_switch = 1;
2723 cfg->line_outs++;
2724 }
7b043899 2725 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
c480f79b
TI		 2726 cfg->line_out_pins[cfg->line_outs] =
2727 cfg->input_pins[AUTO_PIN_MIC];
403d1944
MP		 2728 spec->mic_switch = 1;
2729 cfg->line_outs++;
2730 }
2731 break;
2732 }
2733
2734 return 0;
2735}
2736
7b043899
SL		 2737
2738static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2739{
2740 int i;
2741
2742 for (i = 0; i < spec->multiout.num_dacs; i++) {
2743 if (spec->multiout.dac_nids[i] == nid)
2744 return 1;
2745 }
2746
2747 return 0;
2748}
2749
3cc08dc6 2750/*
7b043899
SL		 2751 * Fill in the dac_nids table from the parsed pin configuration
2752 * This function only works when every pin in line_out_pins[]
2753 * contains atleast one DAC in its connection list. Some 92xx
2754 * codecs are not connected directly to a DAC, such as the 9200
2755 * and 9202/925x. For those, dac_nids[] must be hard-coded.
3cc08dc6 2756 */
19039bd0 2757static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
df802952 2758 struct auto_pin_cfg *cfg)
c7d4b2fa
M		 2759{
2760 struct sigmatel_spec *spec = codec->spec;
7b043899
SL		 2761 int i, j, conn_len = 0;
2762 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2763 unsigned int wcaps, wtype;
2764
c7d4b2fa
M		 2765 for (i = 0; i < cfg->line_outs; i++) {
2766 nid = cfg->line_out_pins[i];
7b043899
SL		 2767 conn_len = snd_hda_get_connections(codec, nid, conn,
2768 HDA_MAX_CONNECTIONS);
2769 for (j = 0; j < conn_len; j++) {
2770 wcaps = snd_hda_param_read(codec, conn[j],
2771 AC_PAR_AUDIO_WIDGET_CAP);
2772 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
7b043899
SL		 2773 if (wtype != AC_WID_AUD_OUT ||
2774 (wcaps & AC_WCAP_DIGITAL))
2775 continue;
2776 /* conn[j] is a DAC routed to this line-out */
2777 if (!is_in_dac_nids(spec, conn[j]))
2778 break;
2779 }
2780
2781 if (j == conn_len) {
df802952
TI		 2782 if (spec->multiout.num_dacs > 0) {
2783 /* we have already working output pins,
2784 * so let's drop the broken ones again
2785 */
2786 cfg->line_outs = spec->multiout.num_dacs;
2787 break;
2788 }
7b043899
SL		 2789 /* error out, no available DAC found */
2790 snd_printk(KERN_ERR
2791 "%s: No available DAC for pin 0x%x\n",
2792 __func__, nid);
2793 return -ENODEV;
2794 }
2795
2796 spec->multiout.dac_nids[i] = conn[j];
2797 spec->multiout.num_dacs++;
2798 if (conn_len > 1) {
2799 /* select this DAC in the pin's input mux */
82beb8fd
TI		 2800 snd_hda_codec_write_cache(codec, nid, 0,
2801 AC_VERB_SET_CONNECT_SEL, j);
c7d4b2fa 2802
7b043899
SL		 2803 }
2804 }
c7d4b2fa 2805
7b043899
SL		 2806 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2807 spec->multiout.num_dacs,
2808 spec->multiout.dac_nids[0],
2809 spec->multiout.dac_nids[1],
2810 spec->multiout.dac_nids[2],
2811 spec->multiout.dac_nids[3],
2812 spec->multiout.dac_nids[4]);
c7d4b2fa
M		 2813 return 0;
2814}
2815
eb06ed8f
TI		 2816/* create volume control/switch for the given prefx type */
2817static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2818{
2819 char name[32];
2820 int err;
2821
2822 sprintf(name, "%s Playback Volume", pfx);
2823 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2824 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2825 if (err < 0)
2826 return err;
2827 sprintf(name, "%s Playback Switch", pfx);
2828 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2829 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2830 if (err < 0)
2831 return err;
2832 return 0;
2833}
2834
ae0afd81
MR		 2835static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2836{
2837 if (!spec->multiout.hp_nid)
2838 spec->multiout.hp_nid = nid;
2839 else if (spec->multiout.num_dacs > 4) {
2840 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2841 return 1;
2842 } else {
2843 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2844 spec->multiout.num_dacs++;
2845 }
2846 return 0;
2847}
2848
2849static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2850{
2851 if (is_in_dac_nids(spec, nid))
2852 return 1;
2853 if (spec->multiout.hp_nid == nid)
2854 return 1;
2855 return 0;
2856}
2857
c7d4b2fa 2858/* add playback controls from the parsed DAC table */
0fb87bb4 2859static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
19039bd0 2860 const struct auto_pin_cfg *cfg)
c7d4b2fa 2861{
19039bd0
TI		 2862 static const char *chname[4] = {
2863 "Front", "Surround", NULL /*CLFE*/, "Side"
2864 };
d21995e3 2865 hda_nid_t nid = 0;
c7d4b2fa
M		 2866 int i, err;
2867
0fb87bb4 2868 struct sigmatel_spec *spec = codec->spec;
b5895dc8 2869 unsigned int wid_caps, pincap;
0fb87bb4
ML		 2870
2871
40ac8c4f 2872 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
403d1944 2873 if (!spec->multiout.dac_nids[i])
c7d4b2fa
M		 2874 continue;
2875
2876 nid = spec->multiout.dac_nids[i];
2877
2878 if (i == 2) {
2879 /* Center/LFE */
eb06ed8f
TI		 2880 err = create_controls(spec, "Center", nid, 1);
2881 if (err < 0)
c7d4b2fa 2882 return err;
eb06ed8f
TI		 2883 err = create_controls(spec, "LFE", nid, 2);
2884 if (err < 0)
c7d4b2fa 2885 return err;
0fb87bb4
ML		 2886
2887 wid_caps = get_wcaps(codec, nid);
2888
2889 if (wid_caps & AC_WCAP_LR_SWAP) {
2890 err = stac92xx_add_control(spec,
2891 STAC_CTL_WIDGET_CLFE_SWITCH,
2892 "Swap Center/LFE Playback Switch", nid);
2893
2894 if (err < 0)
2895 return err;
2896 }
2897
c7d4b2fa 2898 } else {
eb06ed8f
TI		 2899 err = create_controls(spec, chname[i], nid, 3);
2900 if (err < 0)
c7d4b2fa
M		 2901 return err;
2902 }
2903 }
2904
fedb7569 2905 if ((spec->multiout.num_dacs - cfg->line_outs) > 0 &&
8f55c1e5 2906 cfg->hp_outs == 1 && !spec->multiout.hp_nid)
fedb7569
MR		 2907 spec->multiout.hp_nid = nid;
2908
95026623 2909 if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
7c2ba97b
MR		 2910 err = stac92xx_add_control(spec,
2911 STAC_CTL_WIDGET_HP_SWITCH,
d7a89436
TI		 2912 "Headphone as Line Out Switch",
2913 cfg->hp_pins[cfg->hp_outs - 1]);
7c2ba97b
MR		 2914 if (err < 0)
2915 return err;
2916 }
2917
b5895dc8
MR		 2918 if (spec->line_switch) {
2919 nid = cfg->input_pins[AUTO_PIN_LINE];
2920 pincap = snd_hda_param_read(codec, nid,
2921 AC_PAR_PIN_CAP);
2922 if (pincap & AC_PINCAP_OUT) {
2923 err = stac92xx_add_control(spec,
2924 STAC_CTL_WIDGET_IO_SWITCH,
2925 "Line In as Output Switch", nid << 8);
2926 if (err < 0)
2927 return err;
2928 }
2929 }
403d1944 2930
b5895dc8 2931 if (spec->mic_switch) {
cace16f1 2932 unsigned int def_conf;
ae0afd81
MR		 2933 unsigned int mic_pin = AUTO_PIN_MIC;
2934again:
2935 nid = cfg->input_pins[mic_pin];
cace16f1
MR		 2936 def_conf = snd_hda_codec_read(codec, nid, 0,
2937 AC_VERB_GET_CONFIG_DEFAULT, 0);
cace16f1
MR		 2938 /* some laptops have an internal analog microphone
2939 * which can't be used as a output */
2940 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2941 pincap = snd_hda_param_read(codec, nid,
2942 AC_PAR_PIN_CAP);
2943 if (pincap & AC_PINCAP_OUT) {
2944 err = stac92xx_add_control(spec,
2945 STAC_CTL_WIDGET_IO_SWITCH,
2946 "Mic as Output Switch", (nid << 8) | 1);
ae0afd81
MR		 2947 nid = snd_hda_codec_read(codec, nid, 0,
2948 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2949 if (!check_in_dac_nids(spec, nid))
2950 add_spec_dacs(spec, nid);
cace16f1
MR		 2951 if (err < 0)
2952 return err;
2953 }
ae0afd81
MR		 2954 } else if (mic_pin == AUTO_PIN_MIC) {
2955 mic_pin = AUTO_PIN_FRONT_MIC;
2956 goto again;
b5895dc8
MR		 2957 }
2958 }
403d1944 2959
c7d4b2fa
M		 2960 return 0;
2961}
2962
eb06ed8f
TI		 2963/* add playback controls for Speaker and HP outputs */
2964static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2965 struct auto_pin_cfg *cfg)
2966{
2967 struct sigmatel_spec *spec = codec->spec;
2968 hda_nid_t nid;
2969 int i, old_num_dacs, err;
2970
2971 old_num_dacs = spec->multiout.num_dacs;
2972 for (i = 0; i < cfg->hp_outs; i++) {
2973 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2974 if (wid_caps & AC_WCAP_UNSOL_CAP)
2975 spec->hp_detect = 1;
2976 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2977 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2978 if (check_in_dac_nids(spec, nid))
2979 nid = 0;
2980 if (! nid)
c7d4b2fa 2981 continue;
eb06ed8f
TI		 2982 add_spec_dacs(spec, nid);
2983 }
2984 for (i = 0; i < cfg->speaker_outs; i++) {
7b043899 2985 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
eb06ed8f
TI		 2986 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2987 if (check_in_dac_nids(spec, nid))
2988 nid = 0;
eb06ed8f
TI		 2989 if (! nid)
2990 continue;
2991 add_spec_dacs(spec, nid);
c7d4b2fa 2992 }
1b290a51
MR		 2993 for (i = 0; i < cfg->line_outs; i++) {
2994 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2995 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2996 if (check_in_dac_nids(spec, nid))
2997 nid = 0;
2998 if (! nid)
2999 continue;
3000 add_spec_dacs(spec, nid);
3001 }
eb06ed8f
TI		 3002 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
3003 static const char *pfxs[] = {
3004 "Speaker", "External Speaker", "Speaker2",
3005 };
3006 err = create_controls(spec, pfxs[i - old_num_dacs],
3007 spec->multiout.dac_nids[i], 3);
3008 if (err < 0)
3009 return err;
3010 }
3011 if (spec->multiout.hp_nid) {
2626a263
TI		 3012 err = create_controls(spec, "Headphone",
3013 spec->multiout.hp_nid, 3);
eb06ed8f
TI		 3014 if (err < 0)
3015 return err;
3016 }
c7d4b2fa
M		 3017
3018 return 0;
3019}
3020
b22b4821 3021/* labels for mono mux outputs */
d0513fc6
MR		 3022static const char *stac92xx_mono_labels[4] = {
3023 "DAC0", "DAC1", "Mixer", "DAC2"
b22b4821
MR		 3024};
3025
3026/* create mono mux for mono out on capable codecs */
3027static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
3028{
3029 struct sigmatel_spec *spec = codec->spec;
3030 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
3031 int i, num_cons;
3032 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
3033
3034 num_cons = snd_hda_get_connections(codec,
3035 spec->mono_nid,
3036 con_lst,
3037 HDA_MAX_NUM_INPUTS);
3038 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
3039 return -EINVAL;
3040
3041 for (i = 0; i < num_cons; i++) {
3042 mono_mux->items[mono_mux->num_items].label =
3043 stac92xx_mono_labels[i];
3044 mono_mux->items[mono_mux->num_items].index = i;
3045 mono_mux->num_items++;
3046 }
09a99959
MR		 3047
3048 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
3049 "Mono Mux", spec->mono_nid);
b22b4821
MR		 3050}
3051
89385035
MR		 3052/* labels for amp mux outputs */
3053static const char *stac92xx_amp_labels[3] = {
4b33c767 3054 "Front Microphone", "Microphone", "Line In",
89385035
MR		 3055};
3056
3057/* create amp out controls mux on capable codecs */
3058static int stac92xx_auto_create_amp_output_ctls(struct hda_codec *codec)
3059{
3060 struct sigmatel_spec *spec = codec->spec;
3061 struct hda_input_mux *amp_mux = &spec->private_amp_mux;
3062 int i, err;
3063
2a9c7816 3064 for (i = 0; i < spec->num_amps; i++) {
89385035
MR		 3065 amp_mux->items[amp_mux->num_items].label =
3066 stac92xx_amp_labels[i];
3067 amp_mux->items[amp_mux->num_items].index = i;
3068 amp_mux->num_items++;
3069 }
3070
2a9c7816
MR		 3071 if (spec->num_amps > 1) {
3072 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_MUX,
3073 "Amp Selector Capture Switch", 0);
3074 if (err < 0)
3075 return err;
3076 }
89385035
MR		 3077 return stac92xx_add_control(spec, STAC_CTL_WIDGET_AMP_VOL,
3078 "Amp Capture Volume",
3079 HDA_COMPOSE_AMP_VAL(spec->amp_nids[0], 3, 0, HDA_INPUT));
3080}
3081
3082
1cd2224c
MR		 3083/* create PC beep volume controls */
3084static int stac92xx_auto_create_beep_ctls(struct hda_codec *codec,
3085 hda_nid_t nid)
3086{
3087 struct sigmatel_spec *spec = codec->spec;
3088 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3089 int err;
3090
3091 /* check for mute support for the the amp */
3092 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
3093 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3094 "PC Beep Playback Switch",
3095 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3096 if (err < 0)
3097 return err;
3098 }
3099
3100 /* check to see if there is volume support for the amp */
3101 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3102 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
3103 "PC Beep Playback Volume",
3104 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT));
3105 if (err < 0)
3106 return err;
3107 }
3108 return 0;
3109}
3110
4d4e9bb3
TI		 3111#ifdef CONFIG_SND_HDA_INPUT_BEEP
3112#define stac92xx_dig_beep_switch_info snd_ctl_boolean_mono_info
3113
3114static int stac92xx_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
3115 struct snd_ctl_elem_value *ucontrol)
3116{
3117 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3118 ucontrol->value.integer.value[0] = codec->beep->enabled;
3119 return 0;
3120}
3121
3122static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
3123 struct snd_ctl_elem_value *ucontrol)
3124{
3125 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3126 int enabled = !!ucontrol->value.integer.value[0];
3127 if (codec->beep->enabled != enabled) {
3128 codec->beep->enabled = enabled;
3129 return 1;
3130 }
3131 return 0;
3132}
3133
3134static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = {
3135 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3136 .info = stac92xx_dig_beep_switch_info,
3137 .get = stac92xx_dig_beep_switch_get,
3138 .put = stac92xx_dig_beep_switch_put,
3139};
3140
3141static int stac92xx_beep_switch_ctl(struct hda_codec *codec)
3142{
3143 return stac92xx_add_control_temp(codec->spec, &stac92xx_dig_beep_ctrl,
3144 0, "PC Beep Playback Switch", 0);
3145}
3146#endif
3147
4682eee0
MR		 3148static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec)
3149{
3150 struct sigmatel_spec *spec = codec->spec;
3151 int wcaps, nid, i, err = 0;
3152
3153 for (i = 0; i < spec->num_muxes; i++) {
3154 nid = spec->mux_nids[i];
3155 wcaps = get_wcaps(codec, nid);
3156
3157 if (wcaps & AC_WCAP_OUT_AMP) {
3158 err = stac92xx_add_control_idx(spec,
3159 STAC_CTL_WIDGET_VOL, i, "Mux Capture Volume",
3160 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
3161 if (err < 0)
3162 return err;
3163 }
3164 }
3165 return 0;
3166};
3167
d9737751 3168static const char *stac92xx_spdif_labels[3] = {
65973632 3169 "Digital Playback", "Analog Mux 1", "Analog Mux 2",
d9737751
MR		 3170};
3171
3172static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec)
3173{
3174 struct sigmatel_spec *spec = codec->spec;
3175 struct hda_input_mux *spdif_mux = &spec->private_smux;
65973632 3176 const char **labels = spec->spdif_labels;
d9737751 3177 int i, num_cons;
65973632 3178 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
d9737751
MR		 3179
3180 num_cons = snd_hda_get_connections(codec,
3181 spec->smux_nids[0],
3182 con_lst,
3183 HDA_MAX_NUM_INPUTS);
65973632 3184 if (!num_cons)
d9737751
MR		 3185 return -EINVAL;
3186
65973632
MR		 3187 if (!labels)
3188 labels = stac92xx_spdif_labels;
3189
d9737751 3190 for (i = 0; i < num_cons; i++) {
65973632 3191 spdif_mux->items[spdif_mux->num_items].label = labels[i];
d9737751
MR		 3192 spdif_mux->items[spdif_mux->num_items].index = i;
3193 spdif_mux->num_items++;
3194 }
3195
3196 return 0;
3197}
3198
8b65727b 3199/* labels for dmic mux inputs */
ddc2cec4 3200static const char *stac92xx_dmic_labels[5] = {
8b65727b
MP		 3201 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
3202 "Digital Mic 3", "Digital Mic 4"
3203};
3204
3205/* create playback/capture controls for input pins on dmic capable codecs */
3206static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
3207 const struct auto_pin_cfg *cfg)
3208{
3209 struct sigmatel_spec *spec = codec->spec;
3210 struct hda_input_mux *dimux = &spec->private_dimux;
3211 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
0678accd
MR		 3212 int err, i, j;
3213 char name[32];
8b65727b
MP		 3214
3215 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
3216 dimux->items[dimux->num_items].index = 0;
3217 dimux->num_items++;
3218
3219 for (i = 0; i < spec->num_dmics; i++) {
0678accd 3220 hda_nid_t nid;
8b65727b
MP		 3221 int index;
3222 int num_cons;
0678accd 3223 unsigned int wcaps;
8b65727b
MP		 3224 unsigned int def_conf;
3225
3226 def_conf = snd_hda_codec_read(codec,
3227 spec->dmic_nids[i],
3228 0,
3229 AC_VERB_GET_CONFIG_DEFAULT,
3230 0);
3231 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
3232 continue;
3233
0678accd 3234 nid = spec->dmic_nids[i];
8b65727b 3235 num_cons = snd_hda_get_connections(codec,
e1f0d669 3236 spec->dmux_nids[0],
8b65727b
MP		 3237 con_lst,
3238 HDA_MAX_NUM_INPUTS);
3239 for (j = 0; j < num_cons; j++)
0678accd 3240 if (con_lst[j] == nid) {
8b65727b
MP		 3241 index = j;
3242 goto found;
3243 }
3244 continue;
3245found:
d0513fc6
MR		 3246 wcaps = get_wcaps(codec, nid) &
3247 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
0678accd 3248
d0513fc6 3249 if (wcaps) {
0678accd
MR		 3250 sprintf(name, "%s Capture Volume",
3251 stac92xx_dmic_labels[dimux->num_items]);
3252
3253 err = stac92xx_add_control(spec,
3254 STAC_CTL_WIDGET_VOL,
3255 name,
d0513fc6
MR		 3256 HDA_COMPOSE_AMP_VAL(nid, 3, 0,
3257 (wcaps & AC_WCAP_OUT_AMP) ?
3258 HDA_OUTPUT : HDA_INPUT));
0678accd
MR		 3259 if (err < 0)
3260 return err;
3261 }
3262
8b65727b
MP		 3263 dimux->items[dimux->num_items].label =
3264 stac92xx_dmic_labels[dimux->num_items];
3265 dimux->items[dimux->num_items].index = index;
3266 dimux->num_items++;
3267 }
3268
3269 return 0;
3270}
3271
c7d4b2fa
M		 3272/* create playback/capture controls for input pins */
3273static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
3274{
3275 struct sigmatel_spec *spec = codec->spec;
c7d4b2fa
M		 3276 struct hda_input_mux *imux = &spec->private_imux;
3277 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
3278 int i, j, k;
3279
3280 for (i = 0; i < AUTO_PIN_LAST; i++) {
314634bc
TI		 3281 int index;
3282
3283 if (!cfg->input_pins[i])
3284 continue;
3285 index = -1;
3286 for (j = 0; j < spec->num_muxes; j++) {
3287 int num_cons;
3288 num_cons = snd_hda_get_connections(codec,
3289 spec->mux_nids[j],
3290 con_lst,
3291 HDA_MAX_NUM_INPUTS);
3292 for (k = 0; k < num_cons; k++)
3293 if (con_lst[k] == cfg->input_pins[i]) {
3294 index = k;
3295 goto found;
3296 }
c7d4b2fa 3297 }
314634bc
TI		 3298 continue;
3299 found:
3300 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
3301 imux->items[imux->num_items].index = index;
3302 imux->num_items++;
c7d4b2fa
M		 3303 }
3304
7b043899 3305 if (imux->num_items) {
62fe78e9
SR		 3306 /*
3307 * Set the current input for the muxes.
3308 * The STAC9221 has two input muxes with identical source
3309 * NID lists. Hopefully this won't get confused.
3310 */
3311 for (i = 0; i < spec->num_muxes; i++) {
82beb8fd
TI		 3312 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
3313 AC_VERB_SET_CONNECT_SEL,
3314 imux->items[0].index);
62fe78e9
SR		 3315 }
3316 }
3317
c7d4b2fa
M		 3318 return 0;
3319}
3320
c7d4b2fa
M		 3321static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
3322{
3323 struct sigmatel_spec *spec = codec->spec;
3324 int i;
3325
3326 for (i = 0; i < spec->autocfg.line_outs; i++) {
3327 hda_nid_t nid = spec->autocfg.line_out_pins[i];
3328 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3329 }
3330}
3331
3332static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
3333{
3334 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3335 int i;
c7d4b2fa 3336
eb06ed8f
TI		 3337 for (i = 0; i < spec->autocfg.hp_outs; i++) {
3338 hda_nid_t pin;
3339 pin = spec->autocfg.hp_pins[i];
3340 if (pin) /* connect to front */
3341 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
3342 }
3343 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
3344 hda_nid_t pin;
3345 pin = spec->autocfg.speaker_pins[i];
3346 if (pin) /* connect to front */
3347 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
3348 }
c7d4b2fa
M		 3349}
3350
3cc08dc6 3351static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
c7d4b2fa
M		 3352{
3353 struct sigmatel_spec *spec = codec->spec;
3354 int err;
bcecd9bd 3355 int hp_speaker_swap = 0;
c7d4b2fa 3356
8b65727b
MP		 3357 if ((err = snd_hda_parse_pin_def_config(codec,
3358 &spec->autocfg,
3359 spec->dmic_nids)) < 0)
c7d4b2fa 3360 return err;
82bc955f 3361 if (! spec->autocfg.line_outs)
869264c4 3362 return 0; /* can't find valid pin config */
19039bd0 3363
bcecd9bd
JZ		 3364 /* If we have no real line-out pin and multiple hp-outs, HPs should
3365 * be set up as multi-channel outputs.
3366 */
3367 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
3368 spec->autocfg.hp_outs > 1) {
3369 /* Copy hp_outs to line_outs, backup line_outs in
3370 * speaker_outs so that the following routines can handle
3371 * HP pins as primary outputs.
3372 */
3373 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
3374 sizeof(spec->autocfg.line_out_pins));
3375 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
3376 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
3377 sizeof(spec->autocfg.hp_pins));
3378 spec->autocfg.line_outs = spec->autocfg.hp_outs;
3379 hp_speaker_swap = 1;
3380 }
09a99959 3381 if (spec->autocfg.mono_out_pin) {
d0513fc6
MR		 3382 int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
3383 (AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
09a99959
MR		 3384 u32 caps = query_amp_caps(codec,
3385 spec->autocfg.mono_out_pin, dir);
3386 hda_nid_t conn_list[1];
3387
3388 /* get the mixer node and then the mono mux if it exists */
3389 if (snd_hda_get_connections(codec,
3390 spec->autocfg.mono_out_pin, conn_list, 1) &&
3391 snd_hda_get_connections(codec, conn_list[0],
3392 conn_list, 1)) {
3393
3394 int wcaps = get_wcaps(codec, conn_list[0]);
3395 int wid_type = (wcaps & AC_WCAP_TYPE)
3396 >> AC_WCAP_TYPE_SHIFT;
3397 /* LR swap check, some stac925x have a mux that
3398 * changes the DACs output path instead of the
3399 * mono-mux path.
3400 */
3401 if (wid_type == AC_WID_AUD_SEL &&
3402 !(wcaps & AC_WCAP_LR_SWAP))
3403 spec->mono_nid = conn_list[0];
3404 }
d0513fc6
MR		 3405 if (dir) {
3406 hda_nid_t nid = spec->autocfg.mono_out_pin;
3407
3408 /* most mono outs have a least a mute/unmute switch */
3409 dir = (dir & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
3410 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
3411 "Mono Playback Switch",
3412 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
09a99959
MR		 3413 if (err < 0)
3414 return err;
d0513fc6
MR		 3415 /* check for volume support for the amp */
3416 if ((caps & AC_AMPCAP_NUM_STEPS)
3417 >> AC_AMPCAP_NUM_STEPS_SHIFT) {
3418 err = stac92xx_add_control(spec,
3419 STAC_CTL_WIDGET_VOL,
3420 "Mono Playback Volume",
3421 HDA_COMPOSE_AMP_VAL(nid, 1, 0, dir));
3422 if (err < 0)
3423 return err;
3424 }
09a99959
MR		 3425 }
3426
3427 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
3428 AC_PINCTL_OUT_EN);
3429 }
bcecd9bd 3430
403d1944
MP		 3431 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
3432 return err;
19039bd0
TI		 3433 if (spec->multiout.num_dacs == 0)
3434 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
3435 return err;
c7d4b2fa 3436
0fb87bb4
ML		 3437 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
3438
3439 if (err < 0)
3440 return err;
3441
1cd2224c
MR		 3442 /* setup analog beep controls */
3443 if (spec->anabeep_nid > 0) {
3444 err = stac92xx_auto_create_beep_ctls(codec,
3445 spec->anabeep_nid);
3446 if (err < 0)
3447 return err;
3448 }
3449
3450 /* setup digital beep controls and input device */
3451#ifdef CONFIG_SND_HDA_INPUT_BEEP
3452 if (spec->digbeep_nid > 0) {
3453 hda_nid_t nid = spec->digbeep_nid;
4d4e9bb3 3454 unsigned int caps;
1cd2224c
MR		 3455
3456 err = stac92xx_auto_create_beep_ctls(codec, nid);
3457 if (err < 0)
3458 return err;
3459 err = snd_hda_attach_beep_device(codec, nid);
3460 if (err < 0)
3461 return err;
4d4e9bb3
TI		 3462 /* if no beep switch is available, make its own one */
3463 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3464 if (codec->beep &&
3465 !((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT)) {
3466 err = stac92xx_beep_switch_ctl(codec);
3467 if (err < 0)
3468 return err;
3469 }
1cd2224c
MR		 3470 }
3471#endif
3472
bcecd9bd
JZ		 3473 if (hp_speaker_swap == 1) {
3474 /* Restore the hp_outs and line_outs */
3475 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
3476 sizeof(spec->autocfg.line_out_pins));
3477 spec->autocfg.hp_outs = spec->autocfg.line_outs;
3478 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
3479 sizeof(spec->autocfg.speaker_pins));
3480 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
3481 memset(spec->autocfg.speaker_pins, 0,
3482 sizeof(spec->autocfg.speaker_pins));
3483 spec->autocfg.speaker_outs = 0;
3484 }
3485
0fb87bb4
ML		 3486 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
3487
3488 if (err < 0)
3489 return err;
3490
3491 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
3492
3493 if (err < 0)
c7d4b2fa
M		 3494 return err;
3495
b22b4821
MR		 3496 if (spec->mono_nid > 0) {
3497 err = stac92xx_auto_create_mono_output_ctls(codec);
3498 if (err < 0)
3499 return err;
3500 }
2a9c7816 3501 if (spec->num_amps > 0) {
89385035
MR		 3502 err = stac92xx_auto_create_amp_output_ctls(codec);
3503 if (err < 0)
3504 return err;
3505 }
2a9c7816 3506 if (spec->num_dmics > 0 && !spec->dinput_mux)
8b65727b
MP		 3507 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
3508 &spec->autocfg)) < 0)
3509 return err;
4682eee0
MR		 3510 if (spec->num_muxes > 0) {
3511 err = stac92xx_auto_create_mux_input_ctls(codec);
3512 if (err < 0)
3513 return err;
3514 }
d9737751
MR		 3515 if (spec->num_smuxes > 0) {
3516 err = stac92xx_auto_create_spdif_mux_ctls(codec);
3517 if (err < 0)
3518 return err;
3519 }
8b65727b 3520
c7d4b2fa 3521 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
403d1944 3522 if (spec->multiout.max_channels > 2)
c7d4b2fa 3523 spec->surr_switch = 1;
c7d4b2fa 3524
82bc955f 3525 if (spec->autocfg.dig_out_pin)
3cc08dc6 3526 spec->multiout.dig_out_nid = dig_out;
d0513fc6 3527 if (dig_in && spec->autocfg.dig_in_pin)
3cc08dc6 3528 spec->dig_in_nid = dig_in;
c7d4b2fa
M		 3529
3530 if (spec->kctl_alloc)
3531 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3532
3533 spec->input_mux = &spec->private_imux;
2a9c7816 3534 spec->dinput_mux = &spec->private_dimux;
d9737751 3535 spec->sinput_mux = &spec->private_smux;
b22b4821 3536 spec->mono_mux = &spec->private_mono_mux;
89385035 3537 spec->amp_mux = &spec->private_amp_mux;
c7d4b2fa
M		 3538 return 1;
3539}
3540
82bc955f
TI		 3541/* add playback controls for HP output */
3542static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
3543 struct auto_pin_cfg *cfg)
3544{
3545 struct sigmatel_spec *spec = codec->spec;
eb06ed8f 3546 hda_nid_t pin = cfg->hp_pins[0];
82bc955f
TI		 3547 unsigned int wid_caps;
3548
3549 if (! pin)
3550 return 0;
3551
3552 wid_caps = get_wcaps(codec, pin);
505cb341 3553 if (wid_caps & AC_WCAP_UNSOL_CAP)
82bc955f 3554 spec->hp_detect = 1;
82bc955f
TI		 3555
3556 return 0;
3557}
3558
160ea0dc
RF		 3559/* add playback controls for LFE output */
3560static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
3561 struct auto_pin_cfg *cfg)
3562{
3563 struct sigmatel_spec *spec = codec->spec;
3564 int err;
3565 hda_nid_t lfe_pin = 0x0;
3566 int i;
3567
3568 /*
3569 * search speaker outs and line outs for a mono speaker pin
3570 * with an amp. If one is found, add LFE controls
3571 * for it.
3572 */
3573 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
3574 hda_nid_t pin = spec->autocfg.speaker_pins[i];
64ed0dfd 3575 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3576 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3577 if (wcaps == AC_WCAP_OUT_AMP)
3578 /* found a mono speaker with an amp, must be lfe */
3579 lfe_pin = pin;
3580 }
3581
3582 /* if speaker_outs is 0, then speakers may be in line_outs */
3583 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
3584 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
3585 hda_nid_t pin = spec->autocfg.line_out_pins[i];
64ed0dfd 3586 unsigned int defcfg;
8b551785 3587 defcfg = snd_hda_codec_read(codec, pin, 0,
160ea0dc
RF		 3588 AC_VERB_GET_CONFIG_DEFAULT,
3589 0x00);
8b551785 3590 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
64ed0dfd 3591 unsigned int wcaps = get_wcaps(codec, pin);
160ea0dc
RF		 3592 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
3593 if (wcaps == AC_WCAP_OUT_AMP)
3594 /* found a mono speaker with an amp,
3595 must be lfe */
3596 lfe_pin = pin;
3597 }
3598 }
3599 }
3600
3601 if (lfe_pin) {
eb06ed8f 3602 err = create_controls(spec, "LFE", lfe_pin, 1);
160ea0dc
RF		 3603 if (err < 0)
3604 return err;
3605 }
3606
3607 return 0;
3608}
3609
c7d4b2fa
M		 3610static int stac9200_parse_auto_config(struct hda_codec *codec)
3611{
3612 struct sigmatel_spec *spec = codec->spec;
3613 int err;
3614
df694daa 3615 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
c7d4b2fa
M		 3616 return err;
3617
3618 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
3619 return err;
3620
82bc955f
TI		 3621 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
3622 return err;
3623
160ea0dc
RF		 3624 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
3625 return err;
3626
355a0ec4
TI		 3627 if (spec->num_muxes > 0) {
3628 err = stac92xx_auto_create_mux_input_ctls(codec);
3629 if (err < 0)
3630 return err;
3631 }
3632
82bc955f 3633 if (spec->autocfg.dig_out_pin)
c7d4b2fa 3634 spec->multiout.dig_out_nid = 0x05;
82bc955f 3635 if (spec->autocfg.dig_in_pin)
c7d4b2fa 3636 spec->dig_in_nid = 0x04;
c7d4b2fa
M		 3637
3638 if (spec->kctl_alloc)
3639 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
3640
3641 spec->input_mux = &spec->private_imux;
8b65727b 3642 spec->dinput_mux = &spec->private_dimux;
c7d4b2fa
M		 3643
3644 return 1;
3645}
3646
62fe78e9
SR		 3647/*
3648 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
3649 * funky external mute control using GPIO pins.
3650 */
3651
76e1ddfb 3652static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
4fe5195c 3653 unsigned int dir_mask, unsigned int data)
62fe78e9
SR		 3654{
3655 unsigned int gpiostate, gpiomask, gpiodir;
3656
3657 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3658 AC_VERB_GET_GPIO_DATA, 0);
4fe5195c 3659 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
62fe78e9
SR		 3660
3661 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3662 AC_VERB_GET_GPIO_MASK, 0);
76e1ddfb 3663 gpiomask |= mask;
62fe78e9
SR		 3664
3665 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3666 AC_VERB_GET_GPIO_DIRECTION, 0);
4fe5195c 3667 gpiodir |= dir_mask;
62fe78e9 3668
76e1ddfb 3669 /* Configure GPIOx as CMOS */
62fe78e9
SR		 3670 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3671
3672 snd_hda_codec_write(codec, codec->afg, 0,
3673 AC_VERB_SET_GPIO_MASK, gpiomask);
76e1ddfb
TI		 3674 snd_hda_codec_read(codec, codec->afg, 0,
3675 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
62fe78e9
SR		 3676
3677 msleep(1);
3678
76e1ddfb
TI		 3679 snd_hda_codec_read(codec, codec->afg, 0,
3680 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
62fe78e9
SR		 3681}
3682
314634bc
TI		 3683static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3684 unsigned int event)
3685{
3686 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
dc81bed1
TI		 3687 snd_hda_codec_write_cache(codec, nid, 0,
3688 AC_VERB_SET_UNSOLICITED_ENABLE,
3689 (AC_USRSP_EN | event));
314634bc
TI		 3690}
3691
a64135a2
MR		 3692static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3693{
3694 int i;
3695 for (i = 0; i < cfg->hp_outs; i++)
3696 if (cfg->hp_pins[i] == nid)
3697 return 1; /* nid is a HP-Out */
3698
3699 return 0; /* nid is not a HP-Out */
3700};
3701
b76c850f
MR		 3702static void stac92xx_power_down(struct hda_codec *codec)
3703{
3704 struct sigmatel_spec *spec = codec->spec;
3705
3706 /* power down inactive DACs */
3707 hda_nid_t *dac;
3708 for (dac = spec->dac_list; *dac; dac++)
4451089e
MR		 3709 if (!is_in_dac_nids(spec, *dac) &&
3710 spec->multiout.hp_nid != *dac)
b76c850f
MR		 3711 snd_hda_codec_write_cache(codec, *dac, 0,
3712 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3713}
3714
f73d3585
TI		 3715static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3716 int enable);
3717
c7d4b2fa
M		 3718static int stac92xx_init(struct hda_codec *codec)
3719{
3720 struct sigmatel_spec *spec = codec->spec;
82bc955f 3721 struct auto_pin_cfg *cfg = &spec->autocfg;
f73d3585 3722 unsigned int gpio;
82bc955f 3723 int i;
c7d4b2fa 3724
c7d4b2fa
M		 3725 snd_hda_sequence_write(codec, spec->init);
3726
8daaaa97
MR		 3727 /* power down adcs initially */
3728 if (spec->powerdown_adcs)
3729 for (i = 0; i < spec->num_adcs; i++)
3730 snd_hda_codec_write_cache(codec,
3731 spec->adc_nids[i], 0,
3732 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
f73d3585
TI		 3733
3734 /* set up GPIO */
3735 gpio = spec->gpio_data;
3736 /* turn on EAPD statically when spec->eapd_switch isn't set.
3737 * otherwise, unsol event will turn it on/off dynamically
3738 */
3739 if (!spec->eapd_switch)
3740 gpio |= spec->eapd_mask;
3741 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3742
82bc955f
TI		 3743 /* set up pins */
3744 if (spec->hp_detect) {
505cb341 3745 /* Enable unsolicited responses on the HP widget */
eb06ed8f 3746 for (i = 0; i < cfg->hp_outs; i++)
314634bc
TI		 3747 enable_pin_detect(codec, cfg->hp_pins[i],
3748 STAC_HP_EVENT);
0a07acaf
TI		 3749 /* force to enable the first line-out; the others are set up
3750 * in unsol_event
3751 */
3752 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3753 AC_PINCTL_OUT_EN);
eb995a8c 3754 stac92xx_auto_init_hp_out(codec);
82bc955f
TI		 3755 /* fake event to set up pins */
3756 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3757 } else {
3758 stac92xx_auto_init_multi_out(codec);
3759 stac92xx_auto_init_hp_out(codec);
3760 }
3761 for (i = 0; i < AUTO_PIN_LAST; i++) {
c960a03b
TI		 3762 hda_nid_t nid = cfg->input_pins[i];
3763 if (nid) {
4f1e6bc3
TI		 3764 unsigned int pinctl;
3765 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC) {
3766 /* for mic pins, force to initialize */
3767 pinctl = stac92xx_get_vref(codec, nid);
3768 } else {
3769 pinctl = snd_hda_codec_read(codec, nid, 0,
3770 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3771 /* if PINCTL already set then skip */
3772 if (pinctl & AC_PINCTL_IN_EN)
3773 continue;
3774 }
3775 pinctl |= AC_PINCTL_IN_EN;
c960a03b
TI		 3776 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3777 }
82bc955f 3778 }
a64135a2
MR		 3779 for (i = 0; i < spec->num_dmics; i++)
3780 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3781 AC_PINCTL_IN_EN);
f73d3585
TI		 3782 if (cfg->dig_out_pin)
3783 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3784 AC_PINCTL_OUT_EN);
3785 if (cfg->dig_in_pin)
3786 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3787 AC_PINCTL_IN_EN);
a64135a2 3788 for (i = 0; i < spec->num_pwrs; i++) {
f73d3585
TI		 3789 hda_nid_t nid = spec->pwr_nids[i];
3790 int pinctl, def_conf;
3791 int event = STAC_PWR_EVENT;
3792
3793 if (is_nid_hp_pin(cfg, nid) && spec->hp_detect)
3794 continue; /* already has an unsol event */
3795
3796 pinctl = snd_hda_codec_read(codec, nid, 0,
3797 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
a64135a2
MR		 3798 /* outputs are only ports capable of power management
3799 * any attempts on powering down a input port cause the
3800 * referenced VREF to act quirky.
3801 */
3802 if (pinctl & AC_PINCTL_IN_EN)
3803 continue;
f73d3585
TI		 3804 def_conf = snd_hda_codec_read(codec, nid, 0,
3805 AC_VERB_GET_CONFIG_DEFAULT, 0);
3806 def_conf = get_defcfg_connect(def_conf);
aafc4412
MR		 3807 /* skip any ports that don't have jacks since presence
3808 * detection is useless */
f73d3585
TI		 3809 if (def_conf != AC_JACK_PORT_COMPLEX) {
3810 if (def_conf != AC_JACK_PORT_NONE)
3811 stac_toggle_power_map(codec, nid, 1);
bce6c2b5 3812 continue;
f73d3585 3813 }
a64135a2
MR		 3814 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3815 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3816 }
b76c850f
MR		 3817 if (spec->dac_list)
3818 stac92xx_power_down(codec);
c7d4b2fa
M		 3819 return 0;
3820}
3821
2f2f4251
M		 3822static void stac92xx_free(struct hda_codec *codec)
3823{
c7d4b2fa
M		 3824 struct sigmatel_spec *spec = codec->spec;
3825 int i;
3826
3827 if (! spec)
3828 return;
3829
3830 if (spec->kctl_alloc) {
3831 for (i = 0; i < spec->num_kctl_used; i++)
3832 kfree(spec->kctl_alloc[i].name);
3833 kfree(spec->kctl_alloc);
3834 }
3835
11b44bbd
RF		 3836 if (spec->bios_pin_configs)
3837 kfree(spec->bios_pin_configs);
3838
c7d4b2fa 3839 kfree(spec);
1cd2224c 3840 snd_hda_detach_beep_device(codec);
2f2f4251
M		 3841}
3842
4e55096e
M		 3843static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3844 unsigned int flag)
3845{
3846 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3847 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
7b043899 3848
f9acba43
TI		 3849 if (pin_ctl & AC_PINCTL_IN_EN) {
3850 /*
3851 * we need to check the current set-up direction of
3852 * shared input pins since they can be switched via
3853 * "xxx as Output" mixer switch
3854 */
3855 struct sigmatel_spec *spec = codec->spec;
3856 struct auto_pin_cfg *cfg = &spec->autocfg;
3857 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3858 spec->line_switch) ||
3859 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3860 spec->mic_switch))
3861 return;
3862 }
3863
7b043899
SL		 3864 /* if setting pin direction bits, clear the current
3865 direction bits first */
3866 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3867 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3868
82beb8fd 3869 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3870 AC_VERB_SET_PIN_WIDGET_CONTROL,
3871 pin_ctl | flag);
3872}
3873
3874static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3875 unsigned int flag)
3876{
3877 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3878 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
82beb8fd 3879 snd_hda_codec_write_cache(codec, nid, 0,
4e55096e
M		 3880 AC_VERB_SET_PIN_WIDGET_CONTROL,
3881 pin_ctl & ~flag);
3882}
3883
40c1d308 3884static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
314634bc
TI		 3885{
3886 if (!nid)
3887 return 0;
3888 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
40c1d308
JZ		 3889 & (1 << 31)) {
3890 unsigned int pinctl;
3891 pinctl = snd_hda_codec_read(codec, nid, 0,
3892 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3893 if (pinctl & AC_PINCTL_IN_EN)
3894 return 0; /* mic- or line-input */
3895 else
3896 return 1; /* HP-output */
3897 }
314634bc
TI		 3898 return 0;
3899}
3900
d7a89436
TI		 3901/* return non-zero if the hp-pin of the given array index isn't
3902 * a jack-detection target
3903 */
3904static int no_hp_sensing(struct sigmatel_spec *spec, int i)
3905{
3906 struct auto_pin_cfg *cfg = &spec->autocfg;
3907
3908 /* ignore sensing of shared line and mic jacks */
3909 if (spec->line_switch &&
3910 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_LINE])
3911 return 1;
3912 if (spec->mic_switch &&
3913 cfg->hp_pins[i] == cfg->input_pins[AUTO_PIN_MIC])
3914 return 1;
3915 /* ignore if the pin is set as line-out */
3916 if (cfg->hp_pins[i] == spec->hp_switch)
3917 return 1;
3918 return 0;
3919}
3920
314634bc 3921static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
4e55096e
M		 3922{
3923 struct sigmatel_spec *spec = codec->spec;
3924 struct auto_pin_cfg *cfg = &spec->autocfg;
3925 int i, presence;
3926
eb06ed8f 3927 presence = 0;
4fe5195c
MR		 3928 if (spec->gpio_mute)
3929 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3930 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3931
eb06ed8f 3932 for (i = 0; i < cfg->hp_outs; i++) {
314634bc
TI		 3933 if (presence)
3934 break;
d7a89436
TI		 3935 if (no_hp_sensing(spec, i))
3936 continue;
4fe5195c 3937 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
eb06ed8f 3938 }
4e55096e
M		 3939
3940 if (presence) {
d7a89436 3941 /* disable lineouts */
7c2ba97b 3942 if (spec->hp_switch)
d7a89436
TI		 3943 stac92xx_reset_pinctl(codec, spec->hp_switch,
3944 AC_PINCTL_OUT_EN);
4e55096e
M		 3945 for (i = 0; i < cfg->line_outs; i++)
3946 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3947 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3948 for (i = 0; i < cfg->speaker_outs; i++)
3949 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3950 AC_PINCTL_OUT_EN);
0253fdcd 3951 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3952 stac_gpio_set(codec, spec->gpio_mask,
3953 spec->gpio_dir, spec->gpio_data &
3954 ~spec->eapd_mask);
4e55096e 3955 } else {
d7a89436 3956 /* enable lineouts */
7c2ba97b 3957 if (spec->hp_switch)
d7a89436
TI		 3958 stac92xx_set_pinctl(codec, spec->hp_switch,
3959 AC_PINCTL_OUT_EN);
4e55096e
M		 3960 for (i = 0; i < cfg->line_outs; i++)
3961 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3962 AC_PINCTL_OUT_EN);
eb06ed8f
TI		 3963 for (i = 0; i < cfg->speaker_outs; i++)
3964 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3965 AC_PINCTL_OUT_EN);
0253fdcd 3966 if (spec->eapd_mask && spec->eapd_switch)
0fc9dec4
MR		 3967 stac_gpio_set(codec, spec->gpio_mask,
3968 spec->gpio_dir, spec->gpio_data |
3969 spec->eapd_mask);
4e55096e 3970 }
d7a89436
TI		 3971 /* toggle hp outs */
3972 for (i = 0; i < cfg->hp_outs; i++) {
3973 unsigned int val = AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN;
3974 if (no_hp_sensing(spec, i))
3975 continue;
3976 if (presence)
3977 stac92xx_set_pinctl(codec, cfg->hp_pins[i], val);
3978 else
3979 stac92xx_reset_pinctl(codec, cfg->hp_pins[i], val);
3980 }
4e55096e
M		 3981}
3982
f73d3585
TI		 3983static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
3984 int enable)
a64135a2
MR		 3985{
3986 struct sigmatel_spec *spec = codec->spec;
f73d3585
TI		 3987 unsigned int idx, val;
3988
3989 for (idx = 0; idx < spec->num_pwrs; idx++) {
3990 if (spec->pwr_nids[idx] == nid)
3991 break;
3992 }
3993 if (idx >= spec->num_pwrs)
3994 return;
d0513fc6
MR		 3995
3996 /* several codecs have two power down bits */
3997 if (spec->pwr_mapping)
3998 idx = spec->pwr_mapping[idx];
3999 else
4000 idx = 1 << idx;
a64135a2 4001
f73d3585
TI		 4002 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0) & 0xff;
4003 if (enable)
a64135a2
MR		 4004 val &= ~idx;
4005 else
4006 val |= idx;
4007
4008 /* power down unused output ports */
4009 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
f73d3585
TI		 4010}
4011
4012static void stac92xx_pin_sense(struct hda_codec *codec, hda_nid_t nid)
4013{
4014 stac_toggle_power_map(codec, nid, get_hp_pin_presence(codec, nid));
4015}
a64135a2 4016
314634bc
TI		 4017static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
4018{
a64135a2
MR		 4019 struct sigmatel_spec *spec = codec->spec;
4020 int idx = res >> 26 & 0x0f;
4021
72474be6 4022 switch ((res >> 26) & 0x70) {
314634bc
TI		 4023 case STAC_HP_EVENT:
4024 stac92xx_hp_detect(codec, res);
a64135a2
MR		 4025 /* fallthru */
4026 case STAC_PWR_EVENT:
4027 if (spec->num_pwrs > 0)
4028 stac92xx_pin_sense(codec, idx);
72474be6
MR		 4029 break;
4030 case STAC_VREF_EVENT: {
4031 int data = snd_hda_codec_read(codec, codec->afg, 0,
4032 AC_VERB_GET_GPIO_DATA, 0);
4033 /* toggle VREF state based on GPIOx status */
4034 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
4035 !!(data & (1 << idx)));
4036 break;
4037 }
314634bc
TI		 4038 }
4039}
4040
cb53c626 4041#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4042static int stac92xx_resume(struct hda_codec *codec)
4043{
dc81bed1
TI		 4044 struct sigmatel_spec *spec = codec->spec;
4045
11b44bbd 4046 stac92xx_set_config_regs(codec);
dc81bed1 4047 snd_hda_sequence_write(codec, spec->init);
4fe5195c
MR		 4048 stac_gpio_set(codec, spec->gpio_mask,
4049 spec->gpio_dir, spec->gpio_data);
82beb8fd
TI		 4050 snd_hda_codec_resume_amp(codec);
4051 snd_hda_codec_resume_cache(codec);
b76c850f
MR		 4052 /* power down inactive DACs */
4053 if (spec->dac_list)
4054 stac92xx_power_down(codec);
dc81bed1
TI		 4055 /* invoke unsolicited event to reset the HP state */
4056 if (spec->hp_detect)
4057 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
ff6fdc37
M		 4058 return 0;
4059}
4060#endif
4061
2f2f4251
M		 4062static struct hda_codec_ops stac92xx_patch_ops = {
4063 .build_controls = stac92xx_build_controls,
4064 .build_pcms = stac92xx_build_pcms,
4065 .init = stac92xx_init,
4066 .free = stac92xx_free,
4e55096e 4067 .unsol_event = stac92xx_unsol_event,
cb53c626 4068#ifdef SND_HDA_NEEDS_RESUME
ff6fdc37
M		 4069 .resume = stac92xx_resume,
4070#endif
2f2f4251
M		 4071};
4072
4073static int patch_stac9200(struct hda_codec *codec)
4074{
4075 struct sigmatel_spec *spec;
c7d4b2fa 4076 int err;
2f2f4251 4077
e560d8d8 4078 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4079 if (spec == NULL)
4080 return -ENOMEM;
4081
4082 codec->spec = spec;
a4eed138 4083 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
11b44bbd 4084 spec->pin_nids = stac9200_pin_nids;
f5fcc13c
TI		 4085 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
4086 stac9200_models,
4087 stac9200_cfg_tbl);
11b44bbd
RF		 4088 if (spec->board_config < 0) {
4089 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
4090 err = stac92xx_save_bios_config_regs(codec);
4091 if (err < 0) {
4092 stac92xx_free(codec);
4093 return err;
4094 }
4095 spec->pin_configs = spec->bios_pin_configs;
4096 } else {
403d1944
MP		 4097 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
4098 stac92xx_set_config_regs(codec);
4099 }
2f2f4251
M		 4100
4101 spec->multiout.max_channels = 2;
4102 spec->multiout.num_dacs = 1;
4103 spec->multiout.dac_nids = stac9200_dac_nids;
4104 spec->adc_nids = stac9200_adc_nids;
4105 spec->mux_nids = stac9200_mux_nids;
dabbed6f 4106 spec->num_muxes = 1;
8b65727b 4107 spec->num_dmics = 0;
9e05b7a3 4108 spec->num_adcs = 1;
a64135a2 4109 spec->num_pwrs = 0;
c7d4b2fa 4110
bf277785
TD		 4111 if (spec->board_config == STAC_9200_GATEWAY ||
4112 spec->board_config == STAC_9200_OQO)
1194b5b7
TI		 4113 spec->init = stac9200_eapd_init;
4114 else
4115 spec->init = stac9200_core_init;
2f2f4251 4116 spec->mixer = stac9200_mixer;
c7d4b2fa 4117
117f257d
TI		 4118 if (spec->board_config == STAC_9200_PANASONIC) {
4119 spec->gpio_mask = spec->gpio_dir = 0x09;
4120 spec->gpio_data = 0x00;
4121 }
4122
c7d4b2fa
M		 4123 err = stac9200_parse_auto_config(codec);
4124 if (err < 0) {
4125 stac92xx_free(codec);
4126 return err;
4127 }
2f2f4251
M		 4128
4129 codec->patch_ops = stac92xx_patch_ops;
4130
4131 return 0;
4132}
4133
8e21c34c
TD		 4134static int patch_stac925x(struct hda_codec *codec)
4135{
4136 struct sigmatel_spec *spec;
4137 int err;
4138
4139 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4140 if (spec == NULL)
4141 return -ENOMEM;
4142
4143 codec->spec = spec;
a4eed138 4144 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
8e21c34c
TD		 4145 spec->pin_nids = stac925x_pin_nids;
4146 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
4147 stac925x_models,
4148 stac925x_cfg_tbl);
9e507abd 4149 again:
8e21c34c 4150 if (spec->board_config < 0) {
2c11f955
TD		 4151 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
4152 "using BIOS defaults\n");
8e21c34c
TD		 4153 err = stac92xx_save_bios_config_regs(codec);
4154 if (err < 0) {
4155 stac92xx_free(codec);
4156 return err;
4157 }
4158 spec->pin_configs = spec->bios_pin_configs;
4159 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
4160 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
4161 stac92xx_set_config_regs(codec);
4162 }
4163
4164 spec->multiout.max_channels = 2;
4165 spec->multiout.num_dacs = 1;
4166 spec->multiout.dac_nids = stac925x_dac_nids;
4167 spec->adc_nids = stac925x_adc_nids;
4168 spec->mux_nids = stac925x_mux_nids;
4169 spec->num_muxes = 1;
9e05b7a3 4170 spec->num_adcs = 1;
a64135a2 4171 spec->num_pwrs = 0;
2c11f955
TD		 4172 switch (codec->vendor_id) {
4173 case 0x83847632: /* STAC9202 */
4174 case 0x83847633: /* STAC9202D */
4175 case 0x83847636: /* STAC9251 */
4176 case 0x83847637: /* STAC9251D */
f6e9852a 4177 spec->num_dmics = STAC925X_NUM_DMICS;
2c11f955 4178 spec->dmic_nids = stac925x_dmic_nids;
1697055e
TI		 4179 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
4180 spec->dmux_nids = stac925x_dmux_nids;
2c11f955
TD		 4181 break;
4182 default:
4183 spec->num_dmics = 0;
4184 break;
4185 }
8e21c34c
TD		 4186
4187 spec->init = stac925x_core_init;
4188 spec->mixer = stac925x_mixer;
4189
4190 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
9e507abd
TI		 4191 if (!err) {
4192 if (spec->board_config < 0) {
4193 printk(KERN_WARNING "hda_codec: No auto-config is "
4194 "available, default to model=ref\n");
4195 spec->board_config = STAC_925x_REF;
4196 goto again;
4197 }
4198 err = -EINVAL;
4199 }
8e21c34c
TD		 4200 if (err < 0) {
4201 stac92xx_free(codec);
4202 return err;
4203 }
4204
4205 codec->patch_ops = stac92xx_patch_ops;
4206
4207 return 0;
4208}
4209
e1f0d669
MR		 4210static struct hda_input_mux stac92hd73xx_dmux = {
4211 .num_items = 4,
4212 .items = {
4213 { "Analog Inputs", 0x0b },
e1f0d669
MR		 4214 { "Digital Mic 1", 0x09 },
4215 { "Digital Mic 2", 0x0a },
2a9c7816 4216 { "CD", 0x08 },
e1f0d669
MR		 4217 }
4218};
4219
4220static int patch_stac92hd73xx(struct hda_codec *codec)
4221{
4222 struct sigmatel_spec *spec;
4223 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
4224 int err = 0;
4225
4226 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4227 if (spec == NULL)
4228 return -ENOMEM;
4229
4230 codec->spec = spec;
e99d32b3 4231 codec->slave_dig_outs = stac92hd73xx_slave_dig_outs;
e1f0d669
MR		 4232 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
4233 spec->pin_nids = stac92hd73xx_pin_nids;
4234 spec->board_config = snd_hda_check_board_config(codec,
4235 STAC_92HD73XX_MODELS,
4236 stac92hd73xx_models,
4237 stac92hd73xx_cfg_tbl);
4238again:
4239 if (spec->board_config < 0) {
4240 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4241 " STAC92HD73XX, using BIOS defaults\n");
4242 err = stac92xx_save_bios_config_regs(codec);
4243 if (err < 0) {
4244 stac92xx_free(codec);
4245 return err;
4246 }
4247 spec->pin_configs = spec->bios_pin_configs;
4248 } else {
4249 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
4250 stac92xx_set_config_regs(codec);
4251 }
4252
4253 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
4254 conn, STAC92HD73_DAC_COUNT + 2) - 1;
4255
4256 if (spec->multiout.num_dacs < 0) {
4257 printk(KERN_WARNING "hda_codec: Could not determine "
4258 "number of channels defaulting to DAC count\n");
4259 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
4260 }
4261
4262 switch (spec->multiout.num_dacs) {
4263 case 0x3: /* 6 Channel */
85f13b67 4264 spec->multiout.hp_nid = 0x17;
e1f0d669
MR		 4265 spec->mixer = stac92hd73xx_6ch_mixer;
4266 spec->init = stac92hd73xx_6ch_core_init;
4267 break;
4268 case 0x4: /* 8 Channel */
85f13b67 4269 spec->multiout.hp_nid = 0x18;
e1f0d669
MR		 4270 spec->mixer = stac92hd73xx_8ch_mixer;
4271 spec->init = stac92hd73xx_8ch_core_init;
4272 break;
4273 case 0x5: /* 10 Channel */
85f13b67 4274 spec->multiout.hp_nid = 0x19;
e1f0d669
MR		 4275 spec->mixer = stac92hd73xx_10ch_mixer;
4276 spec->init = stac92hd73xx_10ch_core_init;
4277 };
4278
4279 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
4280 spec->aloopback_mask = 0x01;
4281 spec->aloopback_shift = 8;
4282
1cd2224c 4283 spec->digbeep_nid = 0x1c;
e1f0d669
MR		 4284 spec->mux_nids = stac92hd73xx_mux_nids;
4285 spec->adc_nids = stac92hd73xx_adc_nids;
4286 spec->dmic_nids = stac92hd73xx_dmic_nids;
4287 spec->dmux_nids = stac92hd73xx_dmux_nids;
d9737751 4288 spec->smux_nids = stac92hd73xx_smux_nids;
89385035 4289 spec->amp_nids = stac92hd73xx_amp_nids;
2a9c7816 4290 spec->num_amps = ARRAY_SIZE(stac92hd73xx_amp_nids);
e1f0d669
MR		 4291
4292 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
4293 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
1697055e 4294 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
2a9c7816
MR		 4295 memcpy(&spec->private_dimux, &stac92hd73xx_dmux,
4296 sizeof(stac92hd73xx_dmux));
4297
a7662640 4298 switch (spec->board_config) {
6b3ab21e 4299 case STAC_DELL_EQ:
d654a660 4300 spec->init = dell_eq_core_init;
6b3ab21e 4301 /* fallthru */
661cd8fb
TI		 4302 case STAC_DELL_M6_AMIC:
4303 case STAC_DELL_M6_DMIC:
4304 case STAC_DELL_M6_BOTH:
2a9c7816 4305 spec->num_smuxes = 0;
2a9c7816
MR		 4306 spec->mixer = &stac92hd73xx_6ch_mixer[DELL_M6_MIXER];
4307 spec->amp_nids = &stac92hd73xx_amp_nids[DELL_M6_AMP];
0253fdcd 4308 spec->eapd_switch = 0;
2a9c7816 4309 spec->num_amps = 1;
8f55c1e5 4310 spec->multiout.hp_nid = 0; /* dual HPs */
6b3ab21e
MR		 4311
4312 if (!spec->init)
4313 spec->init = dell_m6_core_init;
661cd8fb
TI		 4314 switch (spec->board_config) {
4315 case STAC_DELL_M6_AMIC: /* Analog Mics */
a7662640
MR		 4316 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4317 spec->num_dmics = 0;
2a9c7816 4318 spec->private_dimux.num_items = 1;
a7662640 4319 break;
661cd8fb 4320 case STAC_DELL_M6_DMIC: /* Digital Mics */
a7662640
MR		 4321 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4322 spec->num_dmics = 1;
2a9c7816 4323 spec->private_dimux.num_items = 2;
a7662640 4324 break;
661cd8fb 4325 case STAC_DELL_M6_BOTH: /* Both */
a7662640
MR		 4326 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
4327 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
4328 spec->num_dmics = 1;
2a9c7816 4329 spec->private_dimux.num_items = 2;
a7662640
MR		 4330 break;
4331 }
4332 break;
4333 default:
4334 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
2a9c7816 4335 spec->num_smuxes = ARRAY_SIZE(stac92hd73xx_smux_nids);
0253fdcd 4336 spec->eapd_switch = 1;
a7662640 4337 }
b2c4f4d7
MR		 4338 if (spec->board_config > STAC_92HD73XX_REF) {
4339 /* GPIO0 High = Enable EAPD */
4340 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4341 spec->gpio_data = 0x01;
4342 }
2a9c7816 4343 spec->dinput_mux = &spec->private_dimux;
a7662640 4344
a64135a2
MR		 4345 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4346 spec->pwr_nids = stac92hd73xx_pwr_nids;
4347
d9737751 4348 err = stac92xx_parse_auto_config(codec, 0x25, 0x27);
e1f0d669
MR		 4349
4350 if (!err) {
4351 if (spec->board_config < 0) {
4352 printk(KERN_WARNING "hda_codec: No auto-config is "
4353 "available, default to model=ref\n");
4354 spec->board_config = STAC_92HD73XX_REF;
4355 goto again;
4356 }
4357 err = -EINVAL;
4358 }
4359
4360 if (err < 0) {
4361 stac92xx_free(codec);
4362 return err;
4363 }
4364
9e43f0de
TI		 4365 if (spec->board_config == STAC_92HD73XX_NO_JD)
4366 spec->hp_detect = 0;
4367
e1f0d669
MR		 4368 codec->patch_ops = stac92xx_patch_ops;
4369
4370 return 0;
4371}
4372
d0513fc6
MR		 4373static struct hda_input_mux stac92hd83xxx_dmux = {
4374 .num_items = 3,
4375 .items = {
4376 { "Analog Inputs", 0x03 },
4377 { "Digital Mic 1", 0x04 },
4378 { "Digital Mic 2", 0x05 },
4379 }
4380};
4381
4382static int patch_stac92hd83xxx(struct hda_codec *codec)
4383{
4384 struct sigmatel_spec *spec;
4385 int err;
4386
4387 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4388 if (spec == NULL)
4389 return -ENOMEM;
4390
4391 codec->spec = spec;
0ffa9807 4392 codec->slave_dig_outs = stac92hd83xxx_slave_dig_outs;
d0513fc6
MR		 4393 spec->mono_nid = 0x19;
4394 spec->digbeep_nid = 0x21;
4395 spec->dmic_nids = stac92hd83xxx_dmic_nids;
4396 spec->dmux_nids = stac92hd83xxx_dmux_nids;
4397 spec->adc_nids = stac92hd83xxx_adc_nids;
4398 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4399 spec->pwr_mapping = stac92hd83xxx_pwr_mapping;
4400 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4401 spec->multiout.dac_nids = stac92hd83xxx_dac_nids;
4402
4403 spec->init = stac92hd83xxx_core_init;
4404 switch (codec->vendor_id) {
4405 case 0x111d7605:
4406 spec->multiout.num_dacs = STAC92HD81_DAC_COUNT;
4407 break;
4408 default:
4409 spec->num_pwrs--;
4410 spec->init++; /* switch to config #2 */
4411 spec->multiout.num_dacs = STAC92HD83_DAC_COUNT;
4412 }
4413
4414 spec->mixer = stac92hd83xxx_mixer;
4415 spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
4416 spec->num_dmuxes = ARRAY_SIZE(stac92hd83xxx_dmux_nids);
4417 spec->num_adcs = ARRAY_SIZE(stac92hd83xxx_adc_nids);
4418 spec->num_dmics = STAC92HD83XXX_NUM_DMICS;
4419 spec->dinput_mux = &stac92hd83xxx_dmux;
4420 spec->pin_nids = stac92hd83xxx_pin_nids;
4421 spec->board_config = snd_hda_check_board_config(codec,
4422 STAC_92HD83XXX_MODELS,
4423 stac92hd83xxx_models,
4424 stac92hd83xxx_cfg_tbl);
4425again:
4426 if (spec->board_config < 0) {
4427 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4428 " STAC92HD83XXX, using BIOS defaults\n");
4429 err = stac92xx_save_bios_config_regs(codec);
4430 if (err < 0) {
4431 stac92xx_free(codec);
4432 return err;
4433 }
4434 spec->pin_configs = spec->bios_pin_configs;
4435 } else {
4436 spec->pin_configs = stac92hd83xxx_brd_tbl[spec->board_config];
4437 stac92xx_set_config_regs(codec);
4438 }
4439
4440 err = stac92xx_parse_auto_config(codec, 0x1d, 0);
4441 if (!err) {
4442 if (spec->board_config < 0) {
4443 printk(KERN_WARNING "hda_codec: No auto-config is "
4444 "available, default to model=ref\n");
4445 spec->board_config = STAC_92HD83XXX_REF;
4446 goto again;
4447 }
4448 err = -EINVAL;
4449 }
4450
4451 if (err < 0) {
4452 stac92xx_free(codec);
4453 return err;
4454 }
4455
4456 codec->patch_ops = stac92xx_patch_ops;
4457
4458 return 0;
4459}
4460
8daaaa97
MR		 4461#ifdef SND_HDA_NEEDS_RESUME
4462static void stac92hd71xx_set_power_state(struct hda_codec *codec, int pwr)
4463{
4464 struct sigmatel_spec *spec = codec->spec;
4465 int i;
4466 snd_hda_codec_write_cache(codec, codec->afg, 0,
4467 AC_VERB_SET_POWER_STATE, pwr);
4468
4469 msleep(1);
4470 for (i = 0; i < spec->num_adcs; i++) {
4471 snd_hda_codec_write_cache(codec,
4472 spec->adc_nids[i], 0,
4473 AC_VERB_SET_POWER_STATE, pwr);
4474 }
4475};
4476
4477static int stac92hd71xx_resume(struct hda_codec *codec)
4478{
4479 stac92hd71xx_set_power_state(codec, AC_PWRST_D0);
4480 return stac92xx_resume(codec);
4481}
4482
4483static int stac92hd71xx_suspend(struct hda_codec *codec, pm_message_t state)
4484{
0253fdcd
MR		 4485 struct sigmatel_spec *spec = codec->spec;
4486
8daaaa97 4487 stac92hd71xx_set_power_state(codec, AC_PWRST_D3);
0253fdcd
MR		 4488 if (spec->eapd_mask)
4489 stac_gpio_set(codec, spec->gpio_mask,
4490 spec->gpio_dir, spec->gpio_data &
4491 ~spec->eapd_mask);
8daaaa97
MR		 4492 return 0;
4493};
4494
4495#endif
4496
4497static struct hda_codec_ops stac92hd71bxx_patch_ops = {
4498 .build_controls = stac92xx_build_controls,
4499 .build_pcms = stac92xx_build_pcms,
4500 .init = stac92xx_init,
4501 .free = stac92xx_free,
4502 .unsol_event = stac92xx_unsol_event,
4503#ifdef SND_HDA_NEEDS_RESUME
4504 .resume = stac92hd71xx_resume,
4505 .suspend = stac92hd71xx_suspend,
4506#endif
4507};
d0513fc6 4508
4b33c767
MR		 4509static struct hda_input_mux stac92hd71bxx_dmux = {
4510 .num_items = 4,
4511 .items = {
4512 { "Analog Inputs", 0x00 },
4513 { "Mixer", 0x01 },
4514 { "Digital Mic 1", 0x02 },
4515 { "Digital Mic 2", 0x03 },
4516 }
4517};
4518
e035b841
MR		 4519static int patch_stac92hd71bxx(struct hda_codec *codec)
4520{
4521 struct sigmatel_spec *spec;
4522 int err = 0;
4523
4524 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4525 if (spec == NULL)
4526 return -ENOMEM;
4527
4528 codec->spec = spec;
8daaaa97 4529 codec->patch_ops = stac92xx_patch_ops;
e035b841 4530 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
aafc4412 4531 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
e035b841 4532 spec->pin_nids = stac92hd71bxx_pin_nids;
4b33c767
MR		 4533 memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
4534 sizeof(stac92hd71bxx_dmux));
e035b841
MR		 4535 spec->board_config = snd_hda_check_board_config(codec,
4536 STAC_92HD71BXX_MODELS,
4537 stac92hd71bxx_models,
4538 stac92hd71bxx_cfg_tbl);
4539again:
4540 if (spec->board_config < 0) {
4541 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4542 " STAC92HD71BXX, using BIOS defaults\n");
4543 err = stac92xx_save_bios_config_regs(codec);
4544 if (err < 0) {
4545 stac92xx_free(codec);
4546 return err;
4547 }
4548 spec->pin_configs = spec->bios_pin_configs;
4549 } else {
4550 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
4551 stac92xx_set_config_regs(codec);
4552 }
4553
41c3b648
TI		 4554 if (spec->board_config > STAC_92HD71BXX_REF) {
4555 /* GPIO0 = EAPD */
4556 spec->gpio_mask = 0x01;
4557 spec->gpio_dir = 0x01;
4558 spec->gpio_data = 0x01;
4559 }
4560
541eee87
MR		 4561 switch (codec->vendor_id) {
4562 case 0x111d76b6: /* 4 Port without Analog Mixer */
4563 case 0x111d76b7:
4564 case 0x111d76b4: /* 6 Port without Analog Mixer */
4565 case 0x111d76b5:
4566 spec->mixer = stac92hd71bxx_mixer;
4567 spec->init = stac92hd71bxx_core_init;
0ffa9807 4568 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87 4569 break;
aafc4412 4570 case 0x111d7608: /* 5 Port with Analog Mixer */
8e5f262b
TI		 4571 switch (spec->board_config) {
4572 case STAC_HP_M4:
72474be6 4573 /* Enable VREF power saving on GPIO1 detect */
c5d08bb5 4574 snd_hda_codec_write_cache(codec, codec->afg, 0,
72474be6
MR		 4575 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
4576 snd_hda_codec_write_cache(codec, codec->afg, 0,
4577 AC_VERB_SET_UNSOLICITED_ENABLE,
4578 (AC_USRSP_EN | STAC_VREF_EVENT | 0x01));
4579 spec->gpio_mask |= 0x02;
4580 break;
4581 }
8daaaa97
MR		 4582 if ((codec->revision_id & 0xf) == 0 ||
4583 (codec->revision_id & 0xf) == 1) {
4584#ifdef SND_HDA_NEEDS_RESUME
4585 codec->patch_ops = stac92hd71bxx_patch_ops;
4586#endif
4587 spec->stream_delay = 40; /* 40 milliseconds */
4588 }
4589
aafc4412
MR		 4590 /* no output amps */
4591 spec->num_pwrs = 0;
4592 spec->mixer = stac92hd71bxx_analog_mixer;
4b33c767 4593 spec->dinput_mux = &spec->private_dimux;
aafc4412
MR		 4594
4595 /* disable VSW */
4596 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
4597 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
4598 break;
4599 case 0x111d7603: /* 6 Port with Analog Mixer */
8daaaa97
MR		 4600 if ((codec->revision_id & 0xf) == 1) {
4601#ifdef SND_HDA_NEEDS_RESUME
4602 codec->patch_ops = stac92hd71bxx_patch_ops;
4603#endif
4604 spec->stream_delay = 40; /* 40 milliseconds */
4605 }
4606
aafc4412
MR		 4607 /* no output amps */
4608 spec->num_pwrs = 0;
4609 /* fallthru */
541eee87 4610 default:
4b33c767 4611 spec->dinput_mux = &spec->private_dimux;
541eee87
MR		 4612 spec->mixer = stac92hd71bxx_analog_mixer;
4613 spec->init = stac92hd71bxx_analog_core_init;
0ffa9807 4614 codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
541eee87
MR		 4615 }
4616
4b33c767 4617 spec->aloopback_mask = 0x50;
541eee87
MR		 4618 spec->aloopback_shift = 0;
4619
8daaaa97 4620 spec->powerdown_adcs = 1;
1cd2224c 4621 spec->digbeep_nid = 0x26;
e035b841
MR		 4622 spec->mux_nids = stac92hd71bxx_mux_nids;
4623 spec->adc_nids = stac92hd71bxx_adc_nids;
4624 spec->dmic_nids = stac92hd71bxx_dmic_nids;
e1f0d669 4625 spec->dmux_nids = stac92hd71bxx_dmux_nids;
d9737751 4626 spec->smux_nids = stac92hd71bxx_smux_nids;
aafc4412 4627 spec->pwr_nids = stac92hd71bxx_pwr_nids;
e035b841
MR		 4628
4629 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
4630 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
e035b841 4631
6a14f585
MR		 4632 switch (spec->board_config) {
4633 case STAC_HP_M4:
6a14f585 4634 /* enable internal microphone */
b9aea715
MR		 4635 stac92xx_set_config_reg(codec, 0x0e, 0x01813040);
4636 stac92xx_auto_set_pinctl(codec, 0x0e,
4637 AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
3a7abfd2
MR		 4638 /* fallthru */
4639 case STAC_DELL_M4_2:
4640 spec->num_dmics = 0;
4641 spec->num_smuxes = 0;
4642 spec->num_dmuxes = 0;
4643 break;
4644 case STAC_DELL_M4_1:
4645 case STAC_DELL_M4_3:
4646 spec->num_dmics = 1;
4647 spec->num_smuxes = 0;
4648 spec->num_dmuxes = 0;
6a14f585
MR		 4649 break;
4650 default:
4651 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
4652 spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
4653 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
4654 };
4655
aea7bb0a 4656 spec->multiout.num_dacs = 1;
e035b841
MR		 4657 spec->multiout.hp_nid = 0x11;
4658 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
4b33c767
MR		 4659 if (spec->dinput_mux)
4660 spec->private_dimux.num_items +=
4661 spec->num_dmics -
4662 (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
e035b841
MR		 4663
4664 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
4665 if (!err) {
4666 if (spec->board_config < 0) {
4667 printk(KERN_WARNING "hda_codec: No auto-config is "
4668 "available, default to model=ref\n");
4669 spec->board_config = STAC_92HD71BXX_REF;
4670 goto again;
4671 }
4672 err = -EINVAL;
4673 }
4674
4675 if (err < 0) {
4676 stac92xx_free(codec);
4677 return err;
4678 }
4679
e035b841
MR		 4680 return 0;
4681};
4682
2f2f4251
M		 4683static int patch_stac922x(struct hda_codec *codec)
4684{
4685 struct sigmatel_spec *spec;
c7d4b2fa 4686 int err;
2f2f4251 4687
e560d8d8 4688 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2f2f4251
M		 4689 if (spec == NULL)
4690 return -ENOMEM;
4691
4692 codec->spec = spec;
a4eed138 4693 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
11b44bbd 4694 spec->pin_nids = stac922x_pin_nids;
f5fcc13c
TI		 4695 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
4696 stac922x_models,
4697 stac922x_cfg_tbl);
536319af 4698 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
4fe5195c
MR		 4699 spec->gpio_mask = spec->gpio_dir = 0x03;
4700 spec->gpio_data = 0x03;
3fc24d85
TI		 4701 /* Intel Macs have all same PCI SSID, so we need to check
4702 * codec SSID to distinguish the exact models
4703 */
6f0778d8 4704 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3fc24d85 4705 switch (codec->subsystem_id) {
5d5d3bc3
IZ		 4706
4707 case 0x106b0800:
4708 spec->board_config = STAC_INTEL_MAC_V1;
c45e20eb 4709 break;
5d5d3bc3
IZ		 4710 case 0x106b0600:
4711 case 0x106b0700:
4712 spec->board_config = STAC_INTEL_MAC_V2;
6f0778d8 4713 break;
5d5d3bc3
IZ		 4714 case 0x106b0e00:
4715 case 0x106b0f00:
4716 case 0x106b1600:
4717 case 0x106b1700:
4718 case 0x106b0200:
4719 case 0x106b1e00:
4720 spec->board_config = STAC_INTEL_MAC_V3;
3fc24d85 4721 break;
5d5d3bc3
IZ		 4722 case 0x106b1a00:
4723 case 0x00000100:
4724 spec->board_config = STAC_INTEL_MAC_V4;
f16928fb 4725 break;
5d5d3bc3
IZ		 4726 case 0x106b0a00:
4727 case 0x106b2200:
4728 spec->board_config = STAC_INTEL_MAC_V5;
0dae0f83 4729 break;
536319af
NB		 4730 default:
4731 spec->board_config = STAC_INTEL_MAC_V3;
4732 break;
3fc24d85
TI		 4733 }
4734 }
4735
9e507abd 4736 again:
11b44bbd
RF		 4737 if (spec->board_config < 0) {
4738 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
4739 "using BIOS defaults\n");
4740 err = stac92xx_save_bios_config_regs(codec);
4741 if (err < 0) {
4742 stac92xx_free(codec);
4743 return err;
4744 }
4745 spec->pin_configs = spec->bios_pin_configs;
4746 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
403d1944
MP		 4747 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
4748 stac92xx_set_config_regs(codec);
4749 }
2f2f4251 4750
c7d4b2fa
M		 4751 spec->adc_nids = stac922x_adc_nids;
4752 spec->mux_nids = stac922x_mux_nids;
2549413e 4753 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
9e05b7a3 4754 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
8b65727b 4755 spec->num_dmics = 0;
a64135a2 4756 spec->num_pwrs = 0;
c7d4b2fa
M		 4757
4758 spec->init = stac922x_core_init;
2f2f4251 4759 spec->mixer = stac922x_mixer;
c7d4b2fa
M		 4760
4761 spec->multiout.dac_nids = spec->dac_nids;
19039bd0 4762
3cc08dc6 4763 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
9e507abd
TI		 4764 if (!err) {
4765 if (spec->board_config < 0) {
4766 printk(KERN_WARNING "hda_codec: No auto-config is "
4767 "available, default to model=ref\n");
4768 spec->board_config = STAC_D945_REF;
4769 goto again;
4770 }
4771 err = -EINVAL;
4772 }
3cc08dc6
MP		 4773 if (err < 0) {
4774 stac92xx_free(codec);
4775 return err;
4776 }
4777
4778 codec->patch_ops = stac92xx_patch_ops;
4779
807a4636
TI		 4780 /* Fix Mux capture level; max to 2 */
4781 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4782 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4783 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4784 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4785 (0 << AC_AMPCAP_MUTE_SHIFT));
4786
3cc08dc6
MP		 4787 return 0;
4788}
4789
4790static int patch_stac927x(struct hda_codec *codec)
4791{
4792 struct sigmatel_spec *spec;
4793 int err;
4794
4795 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4796 if (spec == NULL)
4797 return -ENOMEM;
4798
4799 codec->spec = spec;
a4eed138 4800 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
11b44bbd 4801 spec->pin_nids = stac927x_pin_nids;
f5fcc13c
TI		 4802 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
4803 stac927x_models,
4804 stac927x_cfg_tbl);
9e507abd 4805 again:
8e9068b1
MR		 4806 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
4807 if (spec->board_config < 0)
4808 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
4809 "STAC927x, using BIOS defaults\n");
11b44bbd
RF		 4810 err = stac92xx_save_bios_config_regs(codec);
4811 if (err < 0) {
4812 stac92xx_free(codec);
4813 return err;
4814 }
4815 spec->pin_configs = spec->bios_pin_configs;
8e9068b1 4816 } else {
3cc08dc6
MP		 4817 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
4818 stac92xx_set_config_regs(codec);
4819 }
4820
1cd2224c 4821 spec->digbeep_nid = 0x23;
8e9068b1
MR		 4822 spec->adc_nids = stac927x_adc_nids;
4823 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
4824 spec->mux_nids = stac927x_mux_nids;
4825 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
d9737751
MR		 4826 spec->smux_nids = stac927x_smux_nids;
4827 spec->num_smuxes = ARRAY_SIZE(stac927x_smux_nids);
65973632 4828 spec->spdif_labels = stac927x_spdif_labels;
b76c850f 4829 spec->dac_list = stac927x_dac_nids;
8e9068b1
MR		 4830 spec->multiout.dac_nids = spec->dac_nids;
4831
81d3dbde 4832 switch (spec->board_config) {
93ed1503 4833 case STAC_D965_3ST:
93ed1503 4834 case STAC_D965_5ST:
8e9068b1 4835 /* GPIO0 High = Enable EAPD */
0fc9dec4 4836 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
4fe5195c 4837 spec->gpio_data = 0x01;
8e9068b1
MR		 4838 spec->num_dmics = 0;
4839
93ed1503 4840 spec->init = d965_core_init;
9e05b7a3 4841 spec->mixer = stac927x_mixer;
81d3dbde 4842 break;
8e9068b1 4843 case STAC_DELL_BIOS:
780c8be4
MR		 4844 switch (codec->subsystem_id) {
4845 case 0x10280209:
4846 case 0x1028022e:
4847 /* correct the device field to SPDIF out */
4848 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
4849 break;
4850 };
03d7ca17
MR		 4851 /* configure the analog microphone on some laptops */
4852 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
2f32d909 4853 /* correct the front output jack as a hp out */
7989fba9 4854 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
c481fca3
MR		 4855 /* correct the front input jack as a mic */
4856 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
4857 /* fallthru */
8e9068b1
MR		 4858 case STAC_DELL_3ST:
4859 /* GPIO2 High = Enable EAPD */
0fc9dec4 4860 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
4fe5195c 4861 spec->gpio_data = 0x04;
7f16859a
MR		 4862 spec->dmic_nids = stac927x_dmic_nids;
4863 spec->num_dmics = STAC927X_NUM_DMICS;
f1f208d0 4864
8e9068b1
MR		 4865 spec->init = d965_core_init;
4866 spec->mixer = stac927x_mixer;
4867 spec->dmux_nids = stac927x_dmux_nids;
1697055e 4868 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
7f16859a
MR		 4869 break;
4870 default:
b2c4f4d7
MR		 4871 if (spec->board_config > STAC_D965_REF) {
4872 /* GPIO0 High = Enable EAPD */
4873 spec->eapd_mask = spec->gpio_mask = 0x01;
4874 spec->gpio_dir = spec->gpio_data = 0x01;
4875 }
8e9068b1
MR		 4876 spec->num_dmics = 0;
4877
4878 spec->init = stac927x_core_init;
4879 spec->mixer = stac927x_mixer;
7f16859a
MR		 4880 }
4881
a64135a2 4882 spec->num_pwrs = 0;
e1f0d669
MR		 4883 spec->aloopback_mask = 0x40;
4884 spec->aloopback_shift = 0;
0253fdcd 4885 spec->eapd_switch = 1;
8e9068b1 4886
3cc08dc6 4887 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
9e507abd
TI		 4888 if (!err) {
4889 if (spec->board_config < 0) {
4890 printk(KERN_WARNING "hda_codec: No auto-config is "
4891 "available, default to model=ref\n");
4892 spec->board_config = STAC_D965_REF;
4893 goto again;
4894 }
4895 err = -EINVAL;
4896 }
c7d4b2fa
M		 4897 if (err < 0) {
4898 stac92xx_free(codec);
4899 return err;
4900 }
2f2f4251
M		 4901
4902 codec->patch_ops = stac92xx_patch_ops;
4903
52987656
TI		 4904 /*
4905 * !!FIXME!!
4906 * The STAC927x seem to require fairly long delays for certain
4907 * command sequences. With too short delays (even if the answer
4908 * is set to RIRB properly), it results in the silence output
4909 * on some hardwares like Dell.
4910 *
4911 * The below flag enables the longer delay (see get_response
4912 * in hda_intel.c).
4913 */
4914 codec->bus->needs_damn_long_delay = 1;
4915
e28d8322
TI		 4916 /* no jack detecion for ref-no-jd model */
4917 if (spec->board_config == STAC_D965_REF_NO_JD)
4918 spec->hp_detect = 0;
4919
2f2f4251
M		 4920 return 0;
4921}
4922
f3302a59
MP		 4923static int patch_stac9205(struct hda_codec *codec)
4924{
4925 struct sigmatel_spec *spec;
8259980e 4926 int err;
f3302a59
MP		 4927
4928 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4929 if (spec == NULL)
4930 return -ENOMEM;
4931
4932 codec->spec = spec;
a4eed138 4933 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
11b44bbd 4934 spec->pin_nids = stac9205_pin_nids;
f5fcc13c
TI		 4935 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
4936 stac9205_models,
4937 stac9205_cfg_tbl);
9e507abd 4938 again:
11b44bbd
RF		 4939 if (spec->board_config < 0) {
4940 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
4941 err = stac92xx_save_bios_config_regs(codec);
4942 if (err < 0) {
4943 stac92xx_free(codec);
4944 return err;
4945 }
4946 spec->pin_configs = spec->bios_pin_configs;
4947 } else {
f3302a59
MP		 4948 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
4949 stac92xx_set_config_regs(codec);
4950 }
4951
1cd2224c 4952 spec->digbeep_nid = 0x23;
f3302a59 4953 spec->adc_nids = stac9205_adc_nids;
9e05b7a3 4954 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
f3302a59 4955 spec->mux_nids = stac9205_mux_nids;
2549413e 4956 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
d9737751
MR		 4957 spec->smux_nids = stac9205_smux_nids;
4958 spec->num_smuxes = ARRAY_SIZE(stac9205_smux_nids);
8b65727b 4959 spec->dmic_nids = stac9205_dmic_nids;
f6e9852a 4960 spec->num_dmics = STAC9205_NUM_DMICS;
e1f0d669 4961 spec->dmux_nids = stac9205_dmux_nids;
1697055e 4962 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
a64135a2 4963 spec->num_pwrs = 0;
f3302a59
MP		 4964
4965 spec->init = stac9205_core_init;
4966 spec->mixer = stac9205_mixer;
4967
e1f0d669
MR		 4968 spec->aloopback_mask = 0x40;
4969 spec->aloopback_shift = 0;
0253fdcd 4970 spec->eapd_switch = 1;
f3302a59 4971 spec->multiout.dac_nids = spec->dac_nids;
87d48363 4972
ae0a8ed8 4973 switch (spec->board_config){
ae0a8ed8 4974 case STAC_9205_DELL_M43:
87d48363
MR		 4975 /* Enable SPDIF in/out */
4976 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4977 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4978
4fe5195c 4979 /* Enable unsol response for GPIO4/Dock HP connection */
c5d08bb5 4980 snd_hda_codec_write_cache(codec, codec->afg, 0,
4fe5195c
MR		 4981 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4982 snd_hda_codec_write_cache(codec, codec->afg, 0,
4983 AC_VERB_SET_UNSOLICITED_ENABLE,
4984 (AC_USRSP_EN | STAC_HP_EVENT));
4985
4986 spec->gpio_dir = 0x0b;
0fc9dec4 4987 spec->eapd_mask = 0x01;
4fe5195c
MR		 4988 spec->gpio_mask = 0x1b;
4989 spec->gpio_mute = 0x10;
e2e7d624 4990 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4fe5195c 4991 * GPIO3 Low = DRM
87d48363 4992 */
4fe5195c 4993 spec->gpio_data = 0x01;
ae0a8ed8 4994 break;
b2c4f4d7
MR		 4995 case STAC_9205_REF:
4996 /* SPDIF-In enabled */
4997 break;
ae0a8ed8
TD		 4998 default:
4999 /* GPIO0 High = EAPD */
0fc9dec4 5000 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4fe5195c 5001 spec->gpio_data = 0x01;
ae0a8ed8
TD		 5002 break;
5003 }
33382403 5004
f3302a59 5005 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
9e507abd
TI		 5006 if (!err) {
5007 if (spec->board_config < 0) {
5008 printk(KERN_WARNING "hda_codec: No auto-config is "
5009 "available, default to model=ref\n");
5010 spec->board_config = STAC_9205_REF;
5011 goto again;
5012 }
5013 err = -EINVAL;
5014 }
f3302a59
MP		 5015 if (err < 0) {
5016 stac92xx_free(codec);
5017 return err;
5018 }
5019
5020 codec->patch_ops = stac92xx_patch_ops;
5021
5022 return 0;
5023}
5024
db064e50 5025/*
6d859065 5026 * STAC9872 hack
db064e50
TI		 5027 */
5028
99ccc560 5029/* static config for Sony VAIO FE550G and Sony VAIO AR */
db064e50
TI		 5030static hda_nid_t vaio_dacs[] = { 0x2 };
5031#define VAIO_HP_DAC 0x5
5032static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
5033static hda_nid_t vaio_mux_nids[] = { 0x15 };
5034
5035static struct hda_input_mux vaio_mux = {
a3a2f429 5036 .num_items = 3,
db064e50 5037 .items = {
d773781c 5038 /* { "HP", 0x0 }, */
1624cb9a
TI		 5039 { "Mic Jack", 0x1 },
5040 { "Internal Mic", 0x2 },
db064e50
TI		 5041 { "PCM", 0x3 },
5042 }
5043};
5044
5045static struct hda_verb vaio_init[] = {
5046 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
72e7b0dd 5047 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
db064e50
TI		 5048 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5049 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5050 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5051 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5052 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
db064e50
TI		 5053 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5054 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5055 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5056 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5057 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5058 {}
5059};
5060
6d859065
GM		 5061static struct hda_verb vaio_ar_init[] = {
5062 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
5063 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
5064 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
5065 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
5066/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
5067 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
1624cb9a 5068 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
6d859065
GM		 5069 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
5070 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
5071/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
5072 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
5073 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
5074 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
5075 {}
5076};
5077
db064e50 5078/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5079static struct hda_bind_ctls vaio_bind_master_vol = {
5080 .ops = &snd_hda_bind_vol,
5081 .values = {
5082 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5083 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5084 0
5085 },
5086};
db064e50
TI		 5087
5088/* bind volumes of both NID 0x02 and 0x05 */
cca3b371
TI		 5089static struct hda_bind_ctls vaio_bind_master_sw = {
5090 .ops = &snd_hda_bind_sw,
5091 .values = {
5092 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
5093 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
5094 0,
5095 },
5096};
db064e50
TI		 5097
5098static struct snd_kcontrol_new vaio_mixer[] = {
cca3b371
TI		 5099 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5100 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
db064e50
TI		 5101 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5102 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5103 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5104 {
5105 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5106 .name = "Capture Source",
5107 .count = 1,
5108 .info = stac92xx_mux_enum_info,
5109 .get = stac92xx_mux_enum_get,
5110 .put = stac92xx_mux_enum_put,
5111 },
5112 {}
5113};
5114
6d859065 5115static struct snd_kcontrol_new vaio_ar_mixer[] = {
cca3b371
TI		 5116 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
5117 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
6d859065
GM		 5118 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
5119 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
5120 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
5121 /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
5122 HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
5123 {
5124 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
5125 .name = "Capture Source",
5126 .count = 1,
5127 .info = stac92xx_mux_enum_info,
5128 .get = stac92xx_mux_enum_get,
5129 .put = stac92xx_mux_enum_put,
5130 },
5131 {}
5132};
5133
5134static struct hda_codec_ops stac9872_patch_ops = {
db064e50
TI		 5135 .build_controls = stac92xx_build_controls,
5136 .build_pcms = stac92xx_build_pcms,
5137 .init = stac92xx_init,
5138 .free = stac92xx_free,
cb53c626 5139#ifdef SND_HDA_NEEDS_RESUME
db064e50
TI		 5140 .resume = stac92xx_resume,
5141#endif
5142};
5143
72e7b0dd
TI		 5144static int stac9872_vaio_init(struct hda_codec *codec)
5145{
5146 int err;
5147
5148 err = stac92xx_init(codec);
5149 if (err < 0)
5150 return err;
5151 if (codec->patch_ops.unsol_event)
5152 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
5153 return 0;
5154}
5155
5156static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
5157{
40c1d308 5158 if (get_hp_pin_presence(codec, 0x0a)) {
72e7b0dd
TI		 5159 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5160 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5161 } else {
5162 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
5163 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
5164 }
5165}
5166
5167static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
5168{
5169 switch (res >> 26) {
5170 case STAC_HP_EVENT:
5171 stac9872_vaio_hp_detect(codec, res);
5172 break;
5173 }
5174}
5175
5176static struct hda_codec_ops stac9872_vaio_patch_ops = {
5177 .build_controls = stac92xx_build_controls,
5178 .build_pcms = stac92xx_build_pcms,
5179 .init = stac9872_vaio_init,
5180 .free = stac92xx_free,
5181 .unsol_event = stac9872_vaio_unsol_event,
5182#ifdef CONFIG_PM
5183 .resume = stac92xx_resume,
5184#endif
5185};
5186
6d859065
GM		 5187enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
5188 CXD9872RD_VAIO,
5189 /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
5190 STAC9872AK_VAIO,
5191 /* Unknown. id=0x83847661 and subsys=0x104D1200. */
5192 STAC9872K_VAIO,
5193 /* AR Series. id=0x83847664 and subsys=104D1300 */
f5fcc13c
TI		 5194 CXD9872AKD_VAIO,
5195 STAC_9872_MODELS,
5196};
5197
5198static const char *stac9872_models[STAC_9872_MODELS] = {
5199 [CXD9872RD_VAIO] = "vaio",
5200 [CXD9872AKD_VAIO] = "vaio-ar",
5201};
5202
5203static struct snd_pci_quirk stac9872_cfg_tbl[] = {
5204 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
5205 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
5206 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
68e22543 5207 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
db064e50
TI		 5208 {}
5209};
5210
6d859065 5211static int patch_stac9872(struct hda_codec *codec)
db064e50
TI		 5212{
5213 struct sigmatel_spec *spec;
5214 int board_config;
5215
f5fcc13c
TI		 5216 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
5217 stac9872_models,
5218 stac9872_cfg_tbl);
db064e50
TI		 5219 if (board_config < 0)
5220 /* unknown config, let generic-parser do its job... */
5221 return snd_hda_parse_generic_codec(codec);
5222
5223 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
5224 if (spec == NULL)
5225 return -ENOMEM;
5226
5227 codec->spec = spec;
5228 switch (board_config) {
6d859065
GM		 5229 case CXD9872RD_VAIO:
5230 case STAC9872AK_VAIO:
5231 case STAC9872K_VAIO:
db064e50
TI		 5232 spec->mixer = vaio_mixer;
5233 spec->init = vaio_init;
5234 spec->multiout.max_channels = 2;
5235 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5236 spec->multiout.dac_nids = vaio_dacs;
5237 spec->multiout.hp_nid = VAIO_HP_DAC;
5238 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
5239 spec->adc_nids = vaio_adcs;
a64135a2 5240 spec->num_pwrs = 0;
db064e50
TI		 5241 spec->input_mux = &vaio_mux;
5242 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5243 codec->patch_ops = stac9872_vaio_patch_ops;
db064e50 5244 break;
6d859065
GM		 5245
5246 case CXD9872AKD_VAIO:
5247 spec->mixer = vaio_ar_mixer;
5248 spec->init = vaio_ar_init;
5249 spec->multiout.max_channels = 2;
5250 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
5251 spec->multiout.dac_nids = vaio_dacs;
5252 spec->multiout.hp_nid = VAIO_HP_DAC;
5253 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
a64135a2 5254 spec->num_pwrs = 0;
6d859065
GM		 5255 spec->adc_nids = vaio_adcs;
5256 spec->input_mux = &vaio_mux;
5257 spec->mux_nids = vaio_mux_nids;
72e7b0dd 5258 codec->patch_ops = stac9872_patch_ops;
6d859065 5259 break;
db064e50
TI		 5260 }
5261
db064e50
TI		 5262 return 0;
5263}
5264
5265
2f2f4251
M		 5266/*
5267 * patch entries
5268 */
5269struct hda_codec_preset snd_hda_preset_sigmatel[] = {
5270 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
5271 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
5272 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
5273 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
5274 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
5275 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
5276 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
22a27c7f
MP		 5277 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
5278 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
5279 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
5280 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
5281 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
5282 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
3cc08dc6
MP		 5283 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
5284 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
5285 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
5286 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
5287 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
5288 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
5289 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
5290 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
5291 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
5292 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
8e21c34c
TD		 5293 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
5294 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
5295 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
5296 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
5297 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
5298 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
7bd3c0f7
TI		 5299 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
5300 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
6d859065
GM		 5301 /* The following does not take into account .id=0x83847661 when subsys =
5302 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5303 * currently not fully supported.
5304 */
5305 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
5306 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
5307 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
f3302a59
MP		 5308 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
5309 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
5310 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
5311 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
5312 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
5313 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
5314 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
5315 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
aafc4412 5316 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
d0513fc6
MR		 5317 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
5318 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
aafc4412 5319 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
541eee87
MR		 5320 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5321 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
e1f0d669 5322 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
541eee87
MR		 5323 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5324 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5325 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5326 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5327 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5328 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5329 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5330 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
2f2f4251
M		 5331 {} /* terminator */
5332};
kernel source for telekom puls (alcatel/mediatek)