ALSA: intelhdmi - add channel mapping for typical configurations
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / hda / hda_codec.h
CommitLineData
1da177e4
LT
1/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#ifndef __SOUND_HDA_CODEC_H
22#define __SOUND_HDA_CODEC_H
23
24#include <sound/info.h>
25#include <sound/control.h>
26#include <sound/pcm.h>
2807314d 27#include <sound/hwdep.h>
1da177e4 28
cb53c626
TI
29#if defined(CONFIG_PM) || defined(CONFIG_SND_HDA_POWER_SAVE)
30#define SND_HDA_NEEDS_RESUME /* resume control code is required */
31#endif
32
1da177e4
LT
33/*
34 * nodes
35 */
36#define AC_NODE_ROOT 0x00
37
38/*
39 * function group types
40 */
41enum {
42 AC_GRP_AUDIO_FUNCTION = 0x01,
43 AC_GRP_MODEM_FUNCTION = 0x02,
44};
45
46/*
47 * widget types
48 */
49enum {
50 AC_WID_AUD_OUT, /* Audio Out */
51 AC_WID_AUD_IN, /* Audio In */
52 AC_WID_AUD_MIX, /* Audio Mixer */
53 AC_WID_AUD_SEL, /* Audio Selector */
54 AC_WID_PIN, /* Pin Complex */
55 AC_WID_POWER, /* Power */
56 AC_WID_VOL_KNB, /* Volume Knob */
57 AC_WID_BEEP, /* Beep Generator */
58 AC_WID_VENDOR = 0x0f /* Vendor specific */
59};
60
61/*
62 * GET verbs
63 */
64#define AC_VERB_GET_STREAM_FORMAT 0x0a00
65#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
66#define AC_VERB_GET_PROC_COEF 0x0c00
67#define AC_VERB_GET_COEF_INDEX 0x0d00
68#define AC_VERB_PARAMETERS 0x0f00
69#define AC_VERB_GET_CONNECT_SEL 0x0f01
70#define AC_VERB_GET_CONNECT_LIST 0x0f02
71#define AC_VERB_GET_PROC_STATE 0x0f03
72#define AC_VERB_GET_SDI_SELECT 0x0f04
73#define AC_VERB_GET_POWER_STATE 0x0f05
74#define AC_VERB_GET_CONV 0x0f06
75#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
76#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
77#define AC_VERB_GET_PIN_SENSE 0x0f09
78#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
79#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
3982d17e 80#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
a1855d80 81#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
1da177e4
LT
82#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
83/* f10-f1a: GPIO */
16ded525
TI
84#define AC_VERB_GET_GPIO_DATA 0x0f15
85#define AC_VERB_GET_GPIO_MASK 0x0f16
86#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
797760ab 87#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
3982d17e 88#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
797760ab 89#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
1da177e4 90#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
86284e45
TI
91/* f20: AFG/MFG */
92#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
955d2488
TI
93#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
94#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
95#define AC_VERB_GET_HDMI_ELDD 0x0f2f
96#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
97#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
98#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
99#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
100#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
1da177e4
LT
101
102/*
103 * SET verbs
104 */
105#define AC_VERB_SET_STREAM_FORMAT 0x200
106#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
107#define AC_VERB_SET_PROC_COEF 0x400
108#define AC_VERB_SET_COEF_INDEX 0x500
109#define AC_VERB_SET_CONNECT_SEL 0x701
110#define AC_VERB_SET_PROC_STATE 0x703
111#define AC_VERB_SET_SDI_SELECT 0x704
112#define AC_VERB_SET_POWER_STATE 0x705
113#define AC_VERB_SET_CHANNEL_STREAMID 0x706
114#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
115#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
116#define AC_VERB_SET_PIN_SENSE 0x709
117#define AC_VERB_SET_BEEP_CONTROL 0x70a
a2a20939 118#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
1da177e4
LT
119#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
120#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
121#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
16ded525
TI
122#define AC_VERB_SET_GPIO_DATA 0x715
123#define AC_VERB_SET_GPIO_MASK 0x716
124#define AC_VERB_SET_GPIO_DIRECTION 0x717
797760ab 125#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
3982d17e 126#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
797760ab 127#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
1da177e4
LT
128#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
129#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
130#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
131#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
d0513fc6 132#define AC_VERB_SET_EAPD 0x788
1da177e4 133#define AC_VERB_SET_CODEC_RESET 0x7ff
955d2488
TI
134#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
135#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
136#define AC_VERB_SET_HDMI_DIP_DATA 0x731
137#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
138#define AC_VERB_SET_HDMI_CP_CTRL 0x733
139#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
1da177e4
LT
140
141/*
142 * Parameter IDs
143 */
144#define AC_PAR_VENDOR_ID 0x00
145#define AC_PAR_SUBSYSTEM_ID 0x01
146#define AC_PAR_REV_ID 0x02
147#define AC_PAR_NODE_COUNT 0x04
148#define AC_PAR_FUNCTION_TYPE 0x05
149#define AC_PAR_AUDIO_FG_CAP 0x08
150#define AC_PAR_AUDIO_WIDGET_CAP 0x09
151#define AC_PAR_PCM 0x0a
152#define AC_PAR_STREAM 0x0b
153#define AC_PAR_PIN_CAP 0x0c
154#define AC_PAR_AMP_IN_CAP 0x0d
155#define AC_PAR_CONNLIST_LEN 0x0e
156#define AC_PAR_POWER_STATE 0x0f
157#define AC_PAR_PROC_CAP 0x10
158#define AC_PAR_GPIO_CAP 0x11
159#define AC_PAR_AMP_OUT_CAP 0x12
e1716139 160#define AC_PAR_VOL_KNB_CAP 0x13
955d2488 161#define AC_PAR_HDMI_LPCM_CAP 0x20
1da177e4
LT
162
163/*
164 * AC_VERB_PARAMETERS results (32bit)
165 */
166
167/* Function Group Type */
168#define AC_FGT_TYPE (0xff<<0)
169#define AC_FGT_TYPE_SHIFT 0
170#define AC_FGT_UNSOL_CAP (1<<8)
171
172/* Audio Function Group Capabilities */
173#define AC_AFG_OUT_DELAY (0xf<<0)
174#define AC_AFG_IN_DELAY (0xf<<8)
175#define AC_AFG_BEEP_GEN (1<<16)
176
177/* Audio Widget Capabilities */
178#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
179#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
180#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
181#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
182#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
183#define AC_WCAP_STRIPE (1<<5) /* stripe */
184#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
185#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
186#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
187#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
188#define AC_WCAP_POWER (1<<10) /* power control */
189#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
955d2488
TI
190#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
191#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
1da177e4
LT
192#define AC_WCAP_DELAY (0xf<<16)
193#define AC_WCAP_DELAY_SHIFT 16
194#define AC_WCAP_TYPE (0xf<<20)
195#define AC_WCAP_TYPE_SHIFT 20
196
197/* supported PCM rates and bits */
198#define AC_SUPPCM_RATES (0xfff << 0)
199#define AC_SUPPCM_BITS_8 (1<<16)
200#define AC_SUPPCM_BITS_16 (1<<17)
201#define AC_SUPPCM_BITS_20 (1<<18)
202#define AC_SUPPCM_BITS_24 (1<<19)
203#define AC_SUPPCM_BITS_32 (1<<20)
204
205/* supported PCM stream format */
206#define AC_SUPFMT_PCM (1<<0)
207#define AC_SUPFMT_FLOAT32 (1<<1)
208#define AC_SUPFMT_AC3 (1<<2)
209
797760ab
AP
210/* GP I/O count */
211#define AC_GPIO_IO_COUNT (0xff<<0)
212#define AC_GPIO_O_COUNT (0xff<<8)
213#define AC_GPIO_O_COUNT_SHIFT 8
214#define AC_GPIO_I_COUNT (0xff<<16)
215#define AC_GPIO_I_COUNT_SHIFT 16
216#define AC_GPIO_UNSOLICITED (1<<30)
217#define AC_GPIO_WAKE (1<<31)
218
219/* Converter stream, channel */
220#define AC_CONV_CHANNEL (0xf<<0)
221#define AC_CONV_STREAM (0xf<<4)
222#define AC_CONV_STREAM_SHIFT 4
223
224/* Input converter SDI select */
225#define AC_SDI_SELECT (0xf<<0)
226
955d2488 227/* Unsolicited response control */
797760ab
AP
228#define AC_UNSOL_TAG (0x3f<<0)
229#define AC_UNSOL_ENABLED (1<<7)
955d2488
TI
230#define AC_USRSP_EN AC_UNSOL_ENABLED
231
232/* Unsolicited responses */
233#define AC_UNSOL_RES_TAG (0x3f<<26)
234#define AC_UNSOL_RES_TAG_SHIFT 26
235#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
236#define AC_UNSOL_RES_SUBTAG_SHIFT 21
237#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
238#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
239#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
240#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
797760ab 241
1da177e4
LT
242/* Pin widget capabilies */
243#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
244#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
245#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
246#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
247#define AC_PINCAP_OUT (1<<4) /* output capable */
248#define AC_PINCAP_IN (1<<5) /* input capable */
249#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
3982d17e
AP
250/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
251 * but is marked reserved in the Intel HDA specification.
252 */
253#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
955d2488
TI
254/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
255 * in HD-audio specification
256 */
257#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
728765b3
WF
258#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
259 * coexist with AC_PINCAP_HDMI
260 */
1a12de1e 261#define AC_PINCAP_VREF (0x37<<8)
1da177e4
LT
262#define AC_PINCAP_VREF_SHIFT 8
263#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
b923528e 264#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
1a12de1e
M
265/* Vref status (used in pin cap) */
266#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
267#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
268#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
269#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
270#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
1da177e4
LT
271
272/* Amplifier capabilities */
273#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
274#define AC_AMPCAP_OFFSET_SHIFT 0
275#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
276#define AC_AMPCAP_NUM_STEPS_SHIFT 8
d01ce99f
TI
277#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
278 * in 0.25dB
279 */
1da177e4
LT
280#define AC_AMPCAP_STEP_SIZE_SHIFT 16
281#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
282#define AC_AMPCAP_MUTE_SHIFT 31
283
284/* Connection list */
285#define AC_CLIST_LENGTH (0x7f<<0)
286#define AC_CLIST_LONG (1<<7)
287
288/* Supported power status */
289#define AC_PWRST_D0SUP (1<<0)
290#define AC_PWRST_D1SUP (1<<1)
291#define AC_PWRST_D2SUP (1<<2)
292#define AC_PWRST_D3SUP (1<<3)
83d605fd
WF
293#define AC_PWRST_D3COLDSUP (1<<4)
294#define AC_PWRST_S3D3COLDSUP (1<<29)
295#define AC_PWRST_CLKSTOP (1<<30)
296#define AC_PWRST_EPSS (1U<<31)
1da177e4 297
54d17403 298/* Power state values */
797760ab
AP
299#define AC_PWRST_SETTING (0xf<<0)
300#define AC_PWRST_ACTUAL (0xf<<4)
301#define AC_PWRST_ACTUAL_SHIFT 4
54d17403
TI
302#define AC_PWRST_D0 0x00
303#define AC_PWRST_D1 0x01
304#define AC_PWRST_D2 0x02
305#define AC_PWRST_D3 0x03
306
1da177e4
LT
307/* Processing capabilies */
308#define AC_PCAP_BENIGN (1<<0)
309#define AC_PCAP_NUM_COEF (0xff<<8)
797760ab 310#define AC_PCAP_NUM_COEF_SHIFT 8
1da177e4
LT
311
312/* Volume knobs capabilities */
313#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
38fcaf8e 314#define AC_KNBCAP_DELTA (1<<7)
1da177e4 315
955d2488
TI
316/* HDMI LPCM capabilities */
317#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
318#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
319#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
320#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
321#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
322#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
323#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
324#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
325#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
326#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
327#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
328#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
329#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
330#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
331
1da177e4
LT
332/*
333 * Control Parameters
334 */
335
336/* Amp gain/mute */
d427c77e 337#define AC_AMP_MUTE (1<<7)
1da177e4
LT
338#define AC_AMP_GAIN (0x7f)
339#define AC_AMP_GET_INDEX (0xf<<0)
340
341#define AC_AMP_GET_LEFT (1<<13)
342#define AC_AMP_GET_RIGHT (0<<13)
343#define AC_AMP_GET_OUTPUT (1<<15)
344#define AC_AMP_GET_INPUT (0<<15)
345
346#define AC_AMP_SET_INDEX (0xf<<8)
347#define AC_AMP_SET_INDEX_SHIFT 8
348#define AC_AMP_SET_RIGHT (1<<12)
349#define AC_AMP_SET_LEFT (1<<13)
350#define AC_AMP_SET_INPUT (1<<14)
351#define AC_AMP_SET_OUTPUT (1<<15)
352
353/* DIGITAL1 bits */
354#define AC_DIG1_ENABLE (1<<0)
355#define AC_DIG1_V (1<<1)
356#define AC_DIG1_VCFG (1<<2)
357#define AC_DIG1_EMPHASIS (1<<3)
358#define AC_DIG1_COPYRIGHT (1<<4)
359#define AC_DIG1_NONAUDIO (1<<5)
360#define AC_DIG1_PROFESSIONAL (1<<6)
361#define AC_DIG1_LEVEL (1<<7)
362
797760ab
AP
363/* DIGITAL2 bits */
364#define AC_DIG2_CC (0x7f<<0)
365
1da177e4
LT
366/* Pin widget control - 8bit */
367#define AC_PINCTL_VREFEN (0x7<<0)
98f759a6
TI
368#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
369#define AC_PINCTL_VREF_50 1 /* 50% */
370#define AC_PINCTL_VREF_GRD 2 /* ground */
371#define AC_PINCTL_VREF_80 4 /* 80% */
372#define AC_PINCTL_VREF_100 5 /* 100% */
1da177e4
LT
373#define AC_PINCTL_IN_EN (1<<5)
374#define AC_PINCTL_OUT_EN (1<<6)
375#define AC_PINCTL_HP_EN (1<<7)
376
797760ab
AP
377/* Pin sense - 32bit */
378#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
379#define AC_PINSENSE_PRESENCE (1<<31)
955d2488 380#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
797760ab
AP
381
382/* EAPD/BTL enable - 32bit */
383#define AC_EAPDBTL_BALANCED (1<<0)
384#define AC_EAPDBTL_EAPD (1<<1)
385#define AC_EAPDBTL_LR_SWAP (1<<2)
386
955d2488
TI
387/* HDMI ELD data */
388#define AC_ELDD_ELD_VALID (1<<31)
389#define AC_ELDD_ELD_DATA 0xff
390
391/* HDMI DIP size */
392#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
393#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
394
395/* HDMI DIP index */
396#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
397#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
398
399/* HDMI DIP xmit (transmit) control */
400#define AC_DIPXMIT_MASK (0x3<<6)
401#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
402#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
403#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
404
405/* HDMI content protection (CP) control */
406#define AC_CPCTRL_CES (1<<9) /* current encryption state */
407#define AC_CPCTRL_READY (1<<8) /* ready bit */
408#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
409#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
410
411/* Converter channel <-> HDMI slot mapping */
412#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
413#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
414
1da177e4
LT
415/* configuration default - 32bit */
416#define AC_DEFCFG_SEQUENCE (0xf<<0)
417#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
d21b37ea 418#define AC_DEFCFG_ASSOC_SHIFT 4
1da177e4 419#define AC_DEFCFG_MISC (0xf<<8)
d21b37ea 420#define AC_DEFCFG_MISC_SHIFT 8
797760ab 421#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
1da177e4
LT
422#define AC_DEFCFG_COLOR (0xf<<12)
423#define AC_DEFCFG_COLOR_SHIFT 12
424#define AC_DEFCFG_CONN_TYPE (0xf<<16)
425#define AC_DEFCFG_CONN_TYPE_SHIFT 16
426#define AC_DEFCFG_DEVICE (0xf<<20)
427#define AC_DEFCFG_DEVICE_SHIFT 20
428#define AC_DEFCFG_LOCATION (0x3f<<24)
429#define AC_DEFCFG_LOCATION_SHIFT 24
430#define AC_DEFCFG_PORT_CONN (0x3<<30)
431#define AC_DEFCFG_PORT_CONN_SHIFT 30
432
433/* device device types (0x0-0xf) */
434enum {
435 AC_JACK_LINE_OUT,
436 AC_JACK_SPEAKER,
437 AC_JACK_HP_OUT,
438 AC_JACK_CD,
439 AC_JACK_SPDIF_OUT,
440 AC_JACK_DIG_OTHER_OUT,
441 AC_JACK_MODEM_LINE_SIDE,
442 AC_JACK_MODEM_HAND_SIDE,
443 AC_JACK_LINE_IN,
444 AC_JACK_AUX,
445 AC_JACK_MIC_IN,
446 AC_JACK_TELEPHONY,
447 AC_JACK_SPDIF_IN,
448 AC_JACK_DIG_OTHER_IN,
449 AC_JACK_OTHER = 0xf,
450};
451
452/* jack connection types (0x0-0xf) */
453enum {
454 AC_JACK_CONN_UNKNOWN,
455 AC_JACK_CONN_1_8,
456 AC_JACK_CONN_1_4,
457 AC_JACK_CONN_ATAPI,
458 AC_JACK_CONN_RCA,
459 AC_JACK_CONN_OPTICAL,
460 AC_JACK_CONN_OTHER_DIGITAL,
461 AC_JACK_CONN_OTHER_ANALOG,
462 AC_JACK_CONN_DIN,
463 AC_JACK_CONN_XLR,
464 AC_JACK_CONN_RJ11,
465 AC_JACK_CONN_COMB,
466 AC_JACK_CONN_OTHER = 0xf,
467};
468
469/* jack colors (0x0-0xf) */
470enum {
471 AC_JACK_COLOR_UNKNOWN,
472 AC_JACK_COLOR_BLACK,
473 AC_JACK_COLOR_GREY,
474 AC_JACK_COLOR_BLUE,
475 AC_JACK_COLOR_GREEN,
476 AC_JACK_COLOR_RED,
477 AC_JACK_COLOR_ORANGE,
478 AC_JACK_COLOR_YELLOW,
479 AC_JACK_COLOR_PURPLE,
480 AC_JACK_COLOR_PINK,
481 AC_JACK_COLOR_WHITE = 0xe,
482 AC_JACK_COLOR_OTHER,
483};
484
485/* Jack location (0x0-0x3f) */
486/* common case */
487enum {
488 AC_JACK_LOC_NONE,
489 AC_JACK_LOC_REAR,
490 AC_JACK_LOC_FRONT,
491 AC_JACK_LOC_LEFT,
492 AC_JACK_LOC_RIGHT,
493 AC_JACK_LOC_TOP,
494 AC_JACK_LOC_BOTTOM,
495};
496/* bits 4-5 */
497enum {
498 AC_JACK_LOC_EXTERNAL = 0x00,
499 AC_JACK_LOC_INTERNAL = 0x10,
500 AC_JACK_LOC_SEPARATE = 0x20,
501 AC_JACK_LOC_OTHER = 0x30,
502};
503enum {
504 /* external on primary chasis */
505 AC_JACK_LOC_REAR_PANEL = 0x07,
506 AC_JACK_LOC_DRIVE_BAY,
507 /* internal */
508 AC_JACK_LOC_RISER = 0x17,
509 AC_JACK_LOC_HDMI,
510 AC_JACK_LOC_ATAPI,
511 /* others */
512 AC_JACK_LOC_MOBILE_IN = 0x37,
513 AC_JACK_LOC_MOBILE_OUT,
514};
515
516/* Port connectivity (0-3) */
517enum {
518 AC_JACK_PORT_COMPLEX,
519 AC_JACK_PORT_NONE,
520 AC_JACK_PORT_FIXED,
521 AC_JACK_PORT_BOTH,
522};
523
524/* max. connections to a widget */
54d17403 525#define HDA_MAX_CONNECTIONS 32
1da177e4
LT
526
527/* max. codec address */
528#define HDA_MAX_CODEC_ADDRESS 0x0f
529
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530/*
531 * generic arrays
532 */
533struct snd_array {
534 unsigned int used;
535 unsigned int alloced;
536 unsigned int elem_size;
537 unsigned int alloc_align;
538 void *list;
539};
540
541void *snd_array_new(struct snd_array *array);
542void snd_array_free(struct snd_array *array);
543static inline void snd_array_init(struct snd_array *array, unsigned int size,
544 unsigned int align)
545{
546 array->elem_size = size;
547 array->alloc_align = align;
548}
549
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550static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
551{
552 return array->list + idx * array->elem_size;
553}
554
555static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
556{
557 return (unsigned long)(ptr - array->list) / array->elem_size;
558}
559
1da177e4
LT
560/*
561 * Structures
562 */
563
564struct hda_bus;
1cd2224c 565struct hda_beep;
1da177e4
LT
566struct hda_codec;
567struct hda_pcm;
568struct hda_pcm_stream;
569struct hda_bus_unsolicited;
570
571/* NID type */
572typedef u16 hda_nid_t;
573
574/* bus operators */
575struct hda_bus_ops {
576 /* send a single command */
33fa35ed 577 int (*command)(struct hda_bus *bus, unsigned int cmd);
1da177e4 578 /* get a response from the last command */
deadff16 579 unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
1da177e4
LT
580 /* free the private data */
581 void (*private_free)(struct hda_bus *);
176d5335 582 /* attach a PCM stream */
33fa35ed
TI
583 int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
584 struct hda_pcm *pcm);
8dd78330
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585 /* reset bus for retry verb */
586 void (*bus_reset)(struct hda_bus *bus);
cb53c626 587#ifdef CONFIG_SND_HDA_POWER_SAVE
561de31a 588 /* notify power-up/down from codec to controller */
33fa35ed 589 void (*pm_notify)(struct hda_bus *bus);
cb53c626 590#endif
1da177e4
LT
591};
592
593/* template to pass to the bus constructor */
594struct hda_bus_template {
595 void *private_data;
596 struct pci_dev *pci;
597 const char *modelname;
fee2fba3 598 int *power_save;
1da177e4
LT
599 struct hda_bus_ops ops;
600};
601
602/*
603 * codec bus
604 *
605 * each controller needs to creata a hda_bus to assign the accessor.
606 * A hda_bus contains several codecs in the list codec_list.
607 */
608struct hda_bus {
c8b6bf9b 609 struct snd_card *card;
1da177e4
LT
610
611 /* copied from template */
612 void *private_data;
613 struct pci_dev *pci;
614 const char *modelname;
fee2fba3 615 int *power_save;
1da177e4
LT
616 struct hda_bus_ops ops;
617
618 /* codec linked list */
619 struct list_head codec_list;
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620 /* link caddr -> codec */
621 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
1da177e4 622
62932df8 623 struct mutex cmd_mutex;
1da177e4
LT
624
625 /* unsolicited event queue */
626 struct hda_bus_unsolicited *unsol;
e8c0ee5d 627 char workq_name[16];
6acaed38 628 struct workqueue_struct *workq; /* common workqueue for codecs */
1da177e4 629
529bd6c4
TI
630 /* assigned PCMs */
631 DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
632
52987656
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633 /* misc op flags */
634 unsigned int needs_damn_long_delay :1;
b20f3b83
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635 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
636 unsigned int sync_write:1; /* sync after verb write */
637 /* status for codec/controller */
b94d3539 638 unsigned int shutdown :1; /* being unloaded */
b613291f 639 unsigned int rirb_error:1; /* error in codec communication */
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640 unsigned int response_reset:1; /* controller was reset */
641 unsigned int in_reset:1; /* during reset operation */
1da177e4
LT
642};
643
644/*
645 * codec preset
646 *
647 * Known codecs have the patch to build and set up the controls/PCMs
648 * better than the generic parser.
649 */
650struct hda_codec_preset {
651 unsigned int id;
652 unsigned int mask;
653 unsigned int subs;
654 unsigned int subs_mask;
655 unsigned int rev;
ca7cfae9 656 hda_nid_t afg, mfg;
1da177e4
LT
657 const char *name;
658 int (*patch)(struct hda_codec *codec);
659};
660
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661struct hda_codec_preset_list {
662 const struct hda_codec_preset *preset;
663 struct module *owner;
664 struct list_head list;
665};
666
667/* initial hook */
668int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
669int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
670
1da177e4
LT
671/* ops set by the preset patch */
672struct hda_codec_ops {
673 int (*build_controls)(struct hda_codec *codec);
674 int (*build_pcms)(struct hda_codec *codec);
675 int (*init)(struct hda_codec *codec);
676 void (*free)(struct hda_codec *codec);
677 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
cb53c626 678#ifdef SND_HDA_NEEDS_RESUME
1da177e4
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679 int (*suspend)(struct hda_codec *codec, pm_message_t state);
680 int (*resume)(struct hda_codec *codec);
681#endif
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682#ifdef CONFIG_SND_HDA_POWER_SAVE
683 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
684#endif
fb8d1a34 685 void (*reboot_notify)(struct hda_codec *codec);
1da177e4
LT
686};
687
688/* record for amp information cache */
01751f54 689struct hda_cache_head {
1da177e4 690 u32 key; /* hash key */
01751f54
TI
691 u16 val; /* assigned value */
692 u16 next; /* next link; -1 = terminal */
693};
694
695struct hda_amp_info {
696 struct hda_cache_head head;
1da177e4 697 u32 amp_caps; /* amp capabilities */
7f0e2f8b 698 u16 vol[2]; /* current volume & mute */
01751f54
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699};
700
701struct hda_cache_rec {
702 u16 hash[64]; /* hash table for index */
603c4019 703 struct snd_array buf; /* record entries */
1da177e4
LT
704};
705
706/* PCM callbacks */
707struct hda_pcm_ops {
708 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 709 struct snd_pcm_substream *substream);
1da177e4 710 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 711 struct snd_pcm_substream *substream);
1da177e4
LT
712 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
713 unsigned int stream_tag, unsigned int format,
c8b6bf9b 714 struct snd_pcm_substream *substream);
1da177e4 715 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
c8b6bf9b 716 struct snd_pcm_substream *substream);
1da177e4
LT
717};
718
719/* PCM information for each substream */
720struct hda_pcm_stream {
d01ce99f 721 unsigned int substreams; /* number of substreams, 0 = not exist*/
1da177e4
LT
722 unsigned int channels_min; /* min. number of channels */
723 unsigned int channels_max; /* max. number of channels */
724 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
725 u32 rates; /* supported rates */
726 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
727 unsigned int maxbps; /* supported max. bit per sample */
728 struct hda_pcm_ops ops;
729};
730
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731/* PCM types */
732enum {
733 HDA_PCM_TYPE_AUDIO,
734 HDA_PCM_TYPE_SPDIF,
735 HDA_PCM_TYPE_HDMI,
736 HDA_PCM_TYPE_MODEM,
737 HDA_PCM_NTYPES
738};
739
1da177e4
LT
740/* for PCM creation */
741struct hda_pcm {
742 char *name;
743 struct hda_pcm_stream stream[2];
7ba72ba1 744 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
176d5335
TI
745 int device; /* device number to assign */
746 struct snd_pcm *pcm; /* assigned PCM instance */
1da177e4
LT
747};
748
749/* codec information */
750struct hda_codec {
751 struct hda_bus *bus;
752 unsigned int addr; /* codec addr*/
753 struct list_head list; /* list point */
754
755 hda_nid_t afg; /* AFG node id */
673b683a 756 hda_nid_t mfg; /* MFG node id */
1da177e4
LT
757
758 /* ids */
234b4346 759 u32 function_id;
1da177e4
LT
760 u32 vendor_id;
761 u32 subsystem_id;
762 u32 revision_id;
763
764 /* detected preset */
765 const struct hda_codec_preset *preset;
1289e9e8 766 struct module *owner;
812a2cca
TI
767 const char *vendor_name; /* codec vendor name */
768 const char *chip_name; /* codec chip name */
f44ac837 769 const char *modelname; /* model name for preset */
1da177e4
LT
770
771 /* set by patch */
772 struct hda_codec_ops patch_ops;
773
1da177e4
LT
774 /* PCM to create, set by patch_ops.build_pcms callback */
775 unsigned int num_pcms;
776 struct hda_pcm *pcm_info;
777
778 /* codec specific info */
779 void *spec;
780
1cd2224c
MR
781 /* beep device */
782 struct hda_beep *beep;
2dca0bba 783 unsigned int beep_mode;
1cd2224c 784
54d17403
TI
785 /* widget capabilities cache */
786 unsigned int num_nodes;
787 hda_nid_t start_nid;
788 u32 *wcaps;
789
d13bd412
TI
790 struct snd_array mixers; /* list of assigned mixer elements */
791
01751f54 792 struct hda_cache_rec amp_cache; /* cache for amp access */
b3ac5636 793 struct hda_cache_rec cmd_cache; /* cache for other commands */
1da177e4 794
62932df8 795 struct mutex spdif_mutex;
5a9e02e9 796 struct mutex control_mutex;
1da177e4
LT
797 unsigned int spdif_status; /* IEC958 status bits */
798 unsigned short spdif_ctls; /* SPDIF control bits */
799 unsigned int spdif_in_enable; /* SPDIF input enable? */
de51ca12 800 hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
3be14149 801 struct snd_array init_pins; /* initial (BIOS) pin configurations */
346ff70f 802 struct snd_array driver_pins; /* pin configs set by codec parser */
2807314d 803
11aeff08 804#ifdef CONFIG_SND_HDA_HWDEP
2807314d 805 struct snd_hwdep *hwdep; /* assigned hwdep device */
11aeff08 806 struct snd_array init_verbs; /* additional init verbs */
1e1be432 807 struct snd_array hints; /* additional hints */
346ff70f 808 struct snd_array user_pins; /* default pin configs to override */
11aeff08 809#endif
cb53c626 810
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TI
811 /* misc flags */
812 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
813 * status change
814 * (e.g. Realtek codecs)
815 */
9421f954
TI
816 unsigned int pin_amp_workaround:1; /* pin out-amp takes index
817 * (e.g. Conexant codecs)
818 */
cb53c626 819#ifdef CONFIG_SND_HDA_POWER_SAVE
a221e287
TI
820 unsigned int power_on :1; /* current (global) power-state */
821 unsigned int power_transition :1; /* power-state in transition */
cb53c626
TI
822 int power_count; /* current (global) power refcount */
823 struct delayed_work power_work; /* delayed task for powerdown */
a2f6309e
TI
824 unsigned long power_on_acct;
825 unsigned long power_off_acct;
826 unsigned long power_jiffies;
cb53c626 827#endif
daead538
TI
828
829 /* codec-specific additional proc output */
830 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
831 struct hda_codec *codec, hda_nid_t nid);
1da177e4
LT
832};
833
834/* direction */
835enum {
836 HDA_INPUT, HDA_OUTPUT
837};
838
839
840/*
841 * constructors
842 */
c8b6bf9b 843int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
1da177e4
LT
844 struct hda_bus **busp);
845int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
a1e21c90
TI
846 struct hda_codec **codecp);
847int snd_hda_codec_configure(struct hda_codec *codec);
1da177e4
LT
848
849/*
850 * low level functions
851 */
d01ce99f
TI
852unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
853 int direct,
1da177e4
LT
854 unsigned int verb, unsigned int parm);
855int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
856 unsigned int verb, unsigned int parm);
d01ce99f
TI
857#define snd_hda_param_read(codec, nid, param) \
858 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
859int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
860 hda_nid_t *start_id);
861int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
862 hda_nid_t *conn_list, int max_conns);
1da177e4
LT
863
864struct hda_verb {
865 hda_nid_t nid;
866 u32 verb;
867 u32 param;
868};
869
d01ce99f
TI
870void snd_hda_sequence_write(struct hda_codec *codec,
871 const struct hda_verb *seq);
1da177e4
LT
872
873/* unsolicited event */
874int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
875
b3ac5636 876/* cached write */
cb53c626 877#ifdef SND_HDA_NEEDS_RESUME
b3ac5636
TI
878int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
879 int direct, unsigned int verb, unsigned int parm);
880void snd_hda_sequence_write_cache(struct hda_codec *codec,
881 const struct hda_verb *seq);
882void snd_hda_codec_resume_cache(struct hda_codec *codec);
82beb8fd
TI
883#else
884#define snd_hda_codec_write_cache snd_hda_codec_write
885#define snd_hda_sequence_write_cache snd_hda_sequence_write
886#endif
b3ac5636 887
3be14149
TI
888/* the struct for codec->pin_configs */
889struct hda_pincfg {
890 hda_nid_t nid;
891 unsigned int cfg;
892};
893
894unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
895int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
896 unsigned int cfg);
897int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
898 hda_nid_t nid, unsigned int cfg); /* for hwdep */
899
1da177e4
LT
900/*
901 * Mixer
902 */
903int snd_hda_build_controls(struct hda_bus *bus);
6c1f45ea 904int snd_hda_codec_build_controls(struct hda_codec *codec);
1da177e4
LT
905
906/*
907 * PCM
908 */
909int snd_hda_build_pcms(struct hda_bus *bus);
529bd6c4 910int snd_hda_codec_build_pcms(struct hda_codec *codec);
d01ce99f
TI
911void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
912 u32 stream_tag,
1da177e4 913 int channel_id, int format);
888afa15 914void snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid);
d01ce99f
TI
915unsigned int snd_hda_calc_stream_format(unsigned int rate,
916 unsigned int channels,
917 unsigned int format,
918 unsigned int maxbps);
1da177e4
LT
919int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
920 unsigned int format);
921
922/*
923 * Misc
924 */
925void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
fb8d1a34 926void snd_hda_bus_reboot_notify(struct hda_bus *bus);
1da177e4
LT
927
928/*
929 * power management
930 */
931#ifdef CONFIG_PM
8dd78330 932int snd_hda_suspend(struct hda_bus *bus);
1da177e4
LT
933int snd_hda_resume(struct hda_bus *bus);
934#endif
935
50a9f790
MR
936/*
937 * get widget information
938 */
939const char *snd_hda_get_jack_connectivity(u32 cfg);
940const char *snd_hda_get_jack_type(u32 cfg);
941const char *snd_hda_get_jack_location(u32 cfg);
942
cb53c626
TI
943/*
944 * power saving
945 */
946#ifdef CONFIG_SND_HDA_POWER_SAVE
947void snd_hda_power_up(struct hda_codec *codec);
948void snd_hda_power_down(struct hda_codec *codec);
d804ad92 949#define snd_hda_codec_needs_resume(codec) codec->power_count
a2f6309e 950void snd_hda_update_power_acct(struct hda_codec *codec);
cb53c626
TI
951#else
952static inline void snd_hda_power_up(struct hda_codec *codec) {}
953static inline void snd_hda_power_down(struct hda_codec *codec) {}
d804ad92 954#define snd_hda_codec_needs_resume(codec) 1
cb53c626
TI
955#endif
956
4ea6fbc8
TI
957#ifdef CONFIG_SND_HDA_PATCH_LOADER
958/*
959 * patch firmware
960 */
961int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
962#endif
963
ff7a3267
TI
964/*
965 * Codec modularization
966 */
967
968/* Export symbols only for communication with codec drivers;
969 * When built in kernel, all HD-audio drivers are supposed to be statically
970 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
971 * exported unless it's built as a module.
972 */
973#ifdef MODULE
974#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
975#else
976#define EXPORT_SYMBOL_HDA(sym)
977#endif
978
1da177e4 979#endif /* __SOUND_HDA_CODEC_H */