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[ALSA] Add support for the CS5535 Audio device
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / fm801.c
CommitLineData
1da177e4
LT		 1/*
2 * The driver for the ForteMedia FM801 based soundcards
3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <sound/driver.h>
23#include <linux/delay.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/slab.h>
28#include <linux/moduleparam.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/ac97_codec.h>
32#include <sound/mpu401.h>
33#include <sound/opl3.h>
34#include <sound/initval.h>
35
36#include <asm/io.h>
37
38#if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
39#include <sound/tea575x-tuner.h>
40#define TEA575X_RADIO 1
41#endif
42
43MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
44MODULE_DESCRIPTION("ForteMedia FM801");
45MODULE_LICENSE("GPL");
46MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
47 "{Genius,SoundMaker Live 5.1}}");
48
49static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
50static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
51static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
52/*
53 * Enable TEA575x tuner
54 * 1 = MediaForte 256-PCS
55 * 2 = MediaForte 256-PCPR
56 * 3 = MediaForte 64-PCR
57 * High 16-bits are video (radio) device number + 1
58 */
59static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 };
60
61module_param_array(index, int, NULL, 0444);
62MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
63module_param_array(id, charp, NULL, 0444);
64MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
65module_param_array(enable, bool, NULL, 0444);
66MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
67module_param_array(tea575x_tuner, int, NULL, 0444);
68MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
69
70/*
71 * Direct registers
72 */
73
74#define FM801_REG(chip, reg) (chip->port + FM801_##reg)
75
76#define FM801_PCM_VOL 0x00 /* PCM Output Volume */
77#define FM801_FM_VOL 0x02 /* FM Output Volume */
78#define FM801_I2S_VOL 0x04 /* I2S Volume */
79#define FM801_REC_SRC 0x06 /* Record Source */
80#define FM801_PLY_CTRL 0x08 /* Playback Control */
81#define FM801_PLY_COUNT 0x0a /* Playback Count */
82#define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
83#define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
84#define FM801_CAP_CTRL 0x14 /* Capture Control */
85#define FM801_CAP_COUNT 0x16 /* Capture Count */
86#define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
87#define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
88#define FM801_CODEC_CTRL 0x22 /* Codec Control */
89#define FM801_I2S_MODE 0x24 /* I2S Mode Control */
90#define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
91#define FM801_I2C_CTRL 0x29 /* I2C Control */
92#define FM801_AC97_CMD 0x2a /* AC'97 Command */
93#define FM801_AC97_DATA 0x2c /* AC'97 Data */
94#define FM801_MPU401_DATA 0x30 /* MPU401 Data */
95#define FM801_MPU401_CMD 0x31 /* MPU401 Command */
96#define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
97#define FM801_GEN_CTRL 0x54 /* General Control */
98#define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
99#define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
100#define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
101#define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
102#define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
103#define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
104#define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
105
106#define FM801_AC97_ADDR_SHIFT 10
107
108/* playback and record control register bits */
109#define FM801_BUF1_LAST (1<<1)
110#define FM801_BUF2_LAST (1<<2)
111#define FM801_START (1<<5)
112#define FM801_PAUSE (1<<6)
113#define FM801_IMMED_STOP (1<<7)
114#define FM801_RATE_SHIFT 8
115#define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
116#define FM801_CHANNELS_4 (1<<12) /* playback only */
117#define FM801_CHANNELS_6 (2<<12) /* playback only */
118#define FM801_CHANNELS_6MS (3<<12) /* playback only */
119#define FM801_CHANNELS_MASK (3<<12)
120#define FM801_16BIT (1<<14)
121#define FM801_STEREO (1<<15)
122
123/* IRQ status bits */
124#define FM801_IRQ_PLAYBACK (1<<8)
125#define FM801_IRQ_CAPTURE (1<<9)
126#define FM801_IRQ_VOLUME (1<<14)
127#define FM801_IRQ_MPU (1<<15)
128
129/* GPIO control register */
130#define FM801_GPIO_GP0 (1<<0) /* read/write */
131#define FM801_GPIO_GP1 (1<<1)
132#define FM801_GPIO_GP2 (1<<2)
133#define FM801_GPIO_GP3 (1<<3)
134#define FM801_GPIO_GP(x) (1<<(0+(x)))
135#define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
136#define FM801_GPIO_GD1 (1<<9)
137#define FM801_GPIO_GD2 (1<<10)
138#define FM801_GPIO_GD3 (1<<11)
139#define FM801_GPIO_GD(x) (1<<(8+(x)))
140#define FM801_GPIO_GS0 (1<<12) /* function select: */
141#define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
142#define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
143#define FM801_GPIO_GS3 (1<<15)
144#define FM801_GPIO_GS(x) (1<<(12+(x)))
145
146/*
147
148 */
149
150typedef struct _snd_fm801 fm801_t;
151
152struct _snd_fm801 {
153 int irq;
154
155 unsigned long port; /* I/O port number */
156 unsigned int multichannel: 1, /* multichannel support */
157 secondary: 1; /* secondary codec */
158 unsigned char secondary_addr; /* address of the secondary codec */
159
160 unsigned short ply_ctrl; /* playback control */
161 unsigned short cap_ctrl; /* capture control */
162
163 unsigned long ply_buffer;
164 unsigned int ply_buf;
165 unsigned int ply_count;
166 unsigned int ply_size;
167 unsigned int ply_pos;
168
169 unsigned long cap_buffer;
170 unsigned int cap_buf;
171 unsigned int cap_count;
172 unsigned int cap_size;
173 unsigned int cap_pos;
174
175 ac97_bus_t *ac97_bus;
176 ac97_t *ac97;
177 ac97_t *ac97_sec;
178
179 struct pci_dev *pci;
180 snd_card_t *card;
181 snd_pcm_t *pcm;
182 snd_rawmidi_t *rmidi;
183 snd_pcm_substream_t *playback_substream;
184 snd_pcm_substream_t *capture_substream;
185 unsigned int p_dma_size;
186 unsigned int c_dma_size;
187
188 spinlock_t reg_lock;
189 snd_info_entry_t *proc_entry;
190
191#ifdef TEA575X_RADIO
192 tea575x_t tea;
193#endif
194};
195
196static struct pci_device_id snd_fm801_ids[] = {
197 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
26be8659 198 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
1da177e4
LT		 199 { 0, }
200};
201
202MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
203
204/*
205 * common I/O routines
206 */
207
208static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg,
209 unsigned short mask, unsigned short value)
210{
211 int change;
212 unsigned long flags;
213 unsigned short old, new;
214
215 spin_lock_irqsave(&chip->reg_lock, flags);
216 old = inw(chip->port + reg);
217 new = (old & ~mask) | value;
218 change = old != new;
219 if (change)
220 outw(new, chip->port + reg);
221 spin_unlock_irqrestore(&chip->reg_lock, flags);
222 return change;
223}
224
225static void snd_fm801_codec_write(ac97_t *ac97,
226 unsigned short reg,
227 unsigned short val)
228{
229 fm801_t *chip = ac97->private_data;
230 int idx;
231
232 /*
233 * Wait until the codec interface is not ready..
234 */
235 for (idx = 0; idx < 100; idx++) {
236 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
237 goto ok1;
238 udelay(10);
239 }
99b359ba 240 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
1da177e4
LT		 241 return;
242
243 ok1:
244 /* write data and address */
245 outw(val, FM801_REG(chip, AC97_DATA));
246 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
247 /*
248 * Wait until the write command is not completed..
249 */
250 for (idx = 0; idx < 1000; idx++) {
251 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
252 return;
253 udelay(10);
254 }
99b359ba 255 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
1da177e4
LT		 256}
257
258static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg)
259{
260 fm801_t *chip = ac97->private_data;
261 int idx;
262
263 /*
264 * Wait until the codec interface is not ready..
265 */
266 for (idx = 0; idx < 100; idx++) {
267 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
268 goto ok1;
269 udelay(10);
270 }
99b359ba 271 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
1da177e4
LT		 272 return 0;
273
274 ok1:
275 /* read command */
276 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD));
277 for (idx = 0; idx < 100; idx++) {
278 if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
279 goto ok2;
280 udelay(10);
281 }
99b359ba 282 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
1da177e4
LT		 283 return 0;
284
285 ok2:
286 for (idx = 0; idx < 1000; idx++) {
287 if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8))
288 goto ok3;
289 udelay(10);
290 }
99b359ba 291 snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num);
1da177e4
LT		 292 return 0;
293
294 ok3:
295 return inw(FM801_REG(chip, AC97_DATA));
296}
297
298static unsigned int rates[] = {
299 5500, 8000, 9600, 11025,
300 16000, 19200, 22050, 32000,
301 38400, 44100, 48000
302};
303
304static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
305 .count = ARRAY_SIZE(rates),
306 .list = rates,
307 .mask = 0,
308};
309
310static unsigned int channels[] = {
311 2, 4, 6
312};
313
314#define CHANNELS sizeof(channels) / sizeof(channels[0])
315
316static snd_pcm_hw_constraint_list_t hw_constraints_channels = {
317 .count = CHANNELS,
318 .list = channels,
319 .mask = 0,
320};
321
322/*
323 * Sample rate routines
324 */
325
326static unsigned short snd_fm801_rate_bits(unsigned int rate)
327{
328 unsigned int idx;
329
330 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
331 if (rates[idx] == rate)
332 return idx;
333 snd_BUG();
334 return ARRAY_SIZE(rates) - 1;
335}
336
337/*
338 * PCM part
339 */
340
341static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream,
342 int cmd)
343{
344 fm801_t *chip = snd_pcm_substream_chip(substream);
345
346 spin_lock(&chip->reg_lock);
347 switch (cmd) {
348 case SNDRV_PCM_TRIGGER_START:
349 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
350 FM801_BUF2_LAST |
351 FM801_PAUSE);
352 chip->ply_ctrl |= FM801_START |
353 FM801_IMMED_STOP;
354 break;
355 case SNDRV_PCM_TRIGGER_STOP:
356 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
357 break;
358 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
359 chip->ply_ctrl |= FM801_PAUSE;
360 break;
361 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
362 chip->ply_ctrl &= ~FM801_PAUSE;
363 break;
364 default:
365 spin_unlock(&chip->reg_lock);
366 snd_BUG();
367 return -EINVAL;
368 }
369 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
370 spin_unlock(&chip->reg_lock);
371 return 0;
372}
373
374static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream,
375 int cmd)
376{
377 fm801_t *chip = snd_pcm_substream_chip(substream);
378
379 spin_lock(&chip->reg_lock);
380 switch (cmd) {
381 case SNDRV_PCM_TRIGGER_START:
382 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
383 FM801_BUF2_LAST |
384 FM801_PAUSE);
385 chip->cap_ctrl |= FM801_START |
386 FM801_IMMED_STOP;
387 break;
388 case SNDRV_PCM_TRIGGER_STOP:
389 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
390 break;
391 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
392 chip->cap_ctrl |= FM801_PAUSE;
393 break;
394 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
395 chip->cap_ctrl &= ~FM801_PAUSE;
396 break;
397 default:
398 spin_unlock(&chip->reg_lock);
399 snd_BUG();
400 return -EINVAL;
401 }
402 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
403 spin_unlock(&chip->reg_lock);
404 return 0;
405}
406
407static int snd_fm801_hw_params(snd_pcm_substream_t * substream,
408 snd_pcm_hw_params_t * hw_params)
409{
410 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
411}
412
413static int snd_fm801_hw_free(snd_pcm_substream_t * substream)
414{
415 return snd_pcm_lib_free_pages(substream);
416}
417
418static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream)
419{
420 fm801_t *chip = snd_pcm_substream_chip(substream);
421 snd_pcm_runtime_t *runtime = substream->runtime;
422
423 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
424 chip->ply_count = snd_pcm_lib_period_bytes(substream);
425 spin_lock_irq(&chip->reg_lock);
426 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
427 FM801_STEREO | FM801_RATE_MASK |
428 FM801_CHANNELS_MASK);
429 if (snd_pcm_format_width(runtime->format) == 16)
430 chip->ply_ctrl |= FM801_16BIT;
431 if (runtime->channels > 1) {
432 chip->ply_ctrl |= FM801_STEREO;
433 if (runtime->channels == 4)
434 chip->ply_ctrl |= FM801_CHANNELS_4;
435 else if (runtime->channels == 6)
436 chip->ply_ctrl |= FM801_CHANNELS_6;
437 }
438 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
439 chip->ply_buf = 0;
440 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
441 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
442 chip->ply_buffer = runtime->dma_addr;
443 chip->ply_pos = 0;
444 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
445 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
446 spin_unlock_irq(&chip->reg_lock);
447 return 0;
448}
449
450static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream)
451{
452 fm801_t *chip = snd_pcm_substream_chip(substream);
453 snd_pcm_runtime_t *runtime = substream->runtime;
454
455 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
456 chip->cap_count = snd_pcm_lib_period_bytes(substream);
457 spin_lock_irq(&chip->reg_lock);
458 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
459 FM801_STEREO | FM801_RATE_MASK);
460 if (snd_pcm_format_width(runtime->format) == 16)
461 chip->cap_ctrl |= FM801_16BIT;
462 if (runtime->channels > 1)
463 chip->cap_ctrl |= FM801_STEREO;
464 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
465 chip->cap_buf = 0;
466 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
467 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
468 chip->cap_buffer = runtime->dma_addr;
469 chip->cap_pos = 0;
470 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
471 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
472 spin_unlock_irq(&chip->reg_lock);
473 return 0;
474}
475
476static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream)
477{
478 fm801_t *chip = snd_pcm_substream_chip(substream);
479 size_t ptr;
480
481 if (!(chip->ply_ctrl & FM801_START))
482 return 0;
483 spin_lock(&chip->reg_lock);
484 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
485 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
486 ptr += chip->ply_count;
487 ptr %= chip->ply_size;
488 }
489 spin_unlock(&chip->reg_lock);
490 return bytes_to_frames(substream->runtime, ptr);
491}
492
493static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream)
494{
495 fm801_t *chip = snd_pcm_substream_chip(substream);
496 size_t ptr;
497
498 if (!(chip->cap_ctrl & FM801_START))
499 return 0;
500 spin_lock(&chip->reg_lock);
501 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
502 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
503 ptr += chip->cap_count;
504 ptr %= chip->cap_size;
505 }
506 spin_unlock(&chip->reg_lock);
507 return bytes_to_frames(substream->runtime, ptr);
508}
509
510static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
511{
512 fm801_t *chip = dev_id;
513 unsigned short status;
514 unsigned int tmp;
515
516 status = inw(FM801_REG(chip, IRQ_STATUS));
517 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
518 if (! status)
519 return IRQ_NONE;
520 /* ack first */
521 outw(status, FM801_REG(chip, IRQ_STATUS));
522 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
523 spin_lock(&chip->reg_lock);
524 chip->ply_buf++;
525 chip->ply_pos += chip->ply_count;
526 chip->ply_pos %= chip->ply_size;
527 tmp = chip->ply_pos + chip->ply_count;
528 tmp %= chip->ply_size;
529 outl(chip->ply_buffer + tmp,
530 (chip->ply_buf & 1) ?
531 FM801_REG(chip, PLY_BUF1) :
532 FM801_REG(chip, PLY_BUF2));
533 spin_unlock(&chip->reg_lock);
534 snd_pcm_period_elapsed(chip->playback_substream);
535 }
536 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
537 spin_lock(&chip->reg_lock);
538 chip->cap_buf++;
539 chip->cap_pos += chip->cap_count;
540 chip->cap_pos %= chip->cap_size;
541 tmp = chip->cap_pos + chip->cap_count;
542 tmp %= chip->cap_size;
543 outl(chip->cap_buffer + tmp,
544 (chip->cap_buf & 1) ?
545 FM801_REG(chip, CAP_BUF1) :
546 FM801_REG(chip, CAP_BUF2));
547 spin_unlock(&chip->reg_lock);
548 snd_pcm_period_elapsed(chip->capture_substream);
549 }
550 if (chip->rmidi && (status & FM801_IRQ_MPU))
551 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
552 if (status & FM801_IRQ_VOLUME)
553 ;/* TODO */
554
555 return IRQ_HANDLED;
556}
557
558static snd_pcm_hardware_t snd_fm801_playback =
559{
560 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
561 SNDRV_PCM_INFO_BLOCK_TRANSFER |
562 SNDRV_PCM_INFO_PAUSE |
563 SNDRV_PCM_INFO_MMAP_VALID),
564 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
565 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
566 .rate_min = 5500,
567 .rate_max = 48000,
568 .channels_min = 1,
569 .channels_max = 2,
570 .buffer_bytes_max = (128*1024),
571 .period_bytes_min = 64,
572 .period_bytes_max = (128*1024),
573 .periods_min = 1,
574 .periods_max = 1024,
575 .fifo_size = 0,
576};
577
578static snd_pcm_hardware_t snd_fm801_capture =
579{
580 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
581 SNDRV_PCM_INFO_BLOCK_TRANSFER |
582 SNDRV_PCM_INFO_PAUSE |
583 SNDRV_PCM_INFO_MMAP_VALID),
584 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
585 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
586 .rate_min = 5500,
587 .rate_max = 48000,
588 .channels_min = 1,
589 .channels_max = 2,
590 .buffer_bytes_max = (128*1024),
591 .period_bytes_min = 64,
592 .period_bytes_max = (128*1024),
593 .periods_min = 1,
594 .periods_max = 1024,
595 .fifo_size = 0,
596};
597
598static int snd_fm801_playback_open(snd_pcm_substream_t * substream)
599{
600 fm801_t *chip = snd_pcm_substream_chip(substream);
601 snd_pcm_runtime_t *runtime = substream->runtime;
602 int err;
603
604 chip->playback_substream = substream;
605 runtime->hw = snd_fm801_playback;
606 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
607 if (chip->multichannel) {
608 runtime->hw.channels_max = 6;
609 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
610 }
611 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
612 return err;
613 return 0;
614}
615
616static int snd_fm801_capture_open(snd_pcm_substream_t * substream)
617{
618 fm801_t *chip = snd_pcm_substream_chip(substream);
619 snd_pcm_runtime_t *runtime = substream->runtime;
620 int err;
621
622 chip->capture_substream = substream;
623 runtime->hw = snd_fm801_capture;
624 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
625 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
626 return err;
627 return 0;
628}
629
630static int snd_fm801_playback_close(snd_pcm_substream_t * substream)
631{
632 fm801_t *chip = snd_pcm_substream_chip(substream);
633
634 chip->playback_substream = NULL;
635 return 0;
636}
637
638static int snd_fm801_capture_close(snd_pcm_substream_t * substream)
639{
640 fm801_t *chip = snd_pcm_substream_chip(substream);
641
642 chip->capture_substream = NULL;
643 return 0;
644}
645
646static snd_pcm_ops_t snd_fm801_playback_ops = {
647 .open = snd_fm801_playback_open,
648 .close = snd_fm801_playback_close,
649 .ioctl = snd_pcm_lib_ioctl,
650 .hw_params = snd_fm801_hw_params,
651 .hw_free = snd_fm801_hw_free,
652 .prepare = snd_fm801_playback_prepare,
653 .trigger = snd_fm801_playback_trigger,
654 .pointer = snd_fm801_playback_pointer,
655};
656
657static snd_pcm_ops_t snd_fm801_capture_ops = {
658 .open = snd_fm801_capture_open,
659 .close = snd_fm801_capture_close,
660 .ioctl = snd_pcm_lib_ioctl,
661 .hw_params = snd_fm801_hw_params,
662 .hw_free = snd_fm801_hw_free,
663 .prepare = snd_fm801_capture_prepare,
664 .trigger = snd_fm801_capture_trigger,
665 .pointer = snd_fm801_capture_pointer,
666};
667
1da177e4
LT		 668static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm)
669{
670 snd_pcm_t *pcm;
671 int err;
672
673 if (rpcm)
674 *rpcm = NULL;
675 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
676 return err;
677
678 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
679 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
680
681 pcm->private_data = chip;
1da177e4
LT		 682 pcm->info_flags = 0;
683 strcpy(pcm->name, "FM801");
684 chip->pcm = pcm;
685
686 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
687 snd_dma_pci_data(chip->pci),
688 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
689
690 if (rpcm)
691 *rpcm = pcm;
692 return 0;
693}
694
695/*
696 * TEA5757 radio
697 */
698
699#ifdef TEA575X_RADIO
700
701/* 256PCS GPIO numbers */
702#define TEA_256PCS_DATA 1
703#define TEA_256PCS_WRITE_ENABLE 2 /* inverted */
704#define TEA_256PCS_BUS_CLOCK 3
705
706static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val)
707{
708 fm801_t *chip = tea->private_data;
709 unsigned short reg;
710 int i = 25;
711
712 spin_lock_irq(&chip->reg_lock);
713 reg = inw(FM801_REG(chip, GPIO_CTRL));
714 /* use GPIO lines and set write enable bit */
715 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
716 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
717 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
718 /* all of lines are in the write direction */
719 /* clear data and clock lines */
720 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
721 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
722 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
723 FM801_GPIO_GP(TEA_256PCS_DATA) |
724 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
725 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
726 outw(reg, FM801_REG(chip, GPIO_CTRL));
727 udelay(1);
728
729 while (i--) {
730 if (val & (1 << i))
731 reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
732 else
733 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
734 outw(reg, FM801_REG(chip, GPIO_CTRL));
735 udelay(1);
736 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
737 outw(reg, FM801_REG(chip, GPIO_CTRL));
738 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
739 outw(reg, FM801_REG(chip, GPIO_CTRL));
740 udelay(1);
741 }
742
743 /* and reset the write enable bit */
744 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
745 FM801_GPIO_GP(TEA_256PCS_DATA);
746 outw(reg, FM801_REG(chip, GPIO_CTRL));
747 spin_unlock_irq(&chip->reg_lock);
748}
749
750static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea)
751{
752 fm801_t *chip = tea->private_data;
753 unsigned short reg;
754 unsigned int val = 0;
755 int i;
756
757 spin_lock_irq(&chip->reg_lock);
758 reg = inw(FM801_REG(chip, GPIO_CTRL));
759 /* use GPIO lines, set data direction to input */
760 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
761 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
762 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
763 FM801_GPIO_GD(TEA_256PCS_DATA) |
764 FM801_GPIO_GP(TEA_256PCS_DATA) |
765 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
766 /* all of lines are in the write direction, except data */
767 /* clear data, write enable and clock lines */
768 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
769 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
770 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
771
772 for (i = 0; i < 24; i++) {
773 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
774 outw(reg, FM801_REG(chip, GPIO_CTRL));
775 udelay(1);
776 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
777 outw(reg, FM801_REG(chip, GPIO_CTRL));
778 udelay(1);
779 val <<= 1;
780 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
781 val |= 1;
782 }
783
784 spin_unlock_irq(&chip->reg_lock);
785
786 return val;
787}
788
789/* 256PCPR GPIO numbers */
790#define TEA_256PCPR_BUS_CLOCK 0
791#define TEA_256PCPR_DATA 1
792#define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */
793
794static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val)
795{
796 fm801_t *chip = tea->private_data;
797 unsigned short reg;
798 int i = 25;
799
800 spin_lock_irq(&chip->reg_lock);
801 reg = inw(FM801_REG(chip, GPIO_CTRL));
802 /* use GPIO lines and set write enable bit */
803 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
804 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
805 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
806 /* all of lines are in the write direction */
807 /* clear data and clock lines */
808 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
809 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
810 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
811 FM801_GPIO_GP(TEA_256PCPR_DATA) |
812 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
813 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
814 outw(reg, FM801_REG(chip, GPIO_CTRL));
815 udelay(1);
816
817 while (i--) {
818 if (val & (1 << i))
819 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
820 else
821 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
822 outw(reg, FM801_REG(chip, GPIO_CTRL));
823 udelay(1);
824 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
825 outw(reg, FM801_REG(chip, GPIO_CTRL));
826 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
827 outw(reg, FM801_REG(chip, GPIO_CTRL));
828 udelay(1);
829 }
830
831 /* and reset the write enable bit */
832 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
833 FM801_GPIO_GP(TEA_256PCPR_DATA);
834 outw(reg, FM801_REG(chip, GPIO_CTRL));
835 spin_unlock_irq(&chip->reg_lock);
836}
837
838static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea)
839{
840 fm801_t *chip = tea->private_data;
841 unsigned short reg;
842 unsigned int val = 0;
843 int i;
844
845 spin_lock_irq(&chip->reg_lock);
846 reg = inw(FM801_REG(chip, GPIO_CTRL));
847 /* use GPIO lines, set data direction to input */
848 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
849 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
850 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
851 FM801_GPIO_GD(TEA_256PCPR_DATA) |
852 FM801_GPIO_GP(TEA_256PCPR_DATA) |
853 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
854 /* all of lines are in the write direction, except data */
855 /* clear data, write enable and clock lines */
856 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
857 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
858 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
859
860 for (i = 0; i < 24; i++) {
861 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
862 outw(reg, FM801_REG(chip, GPIO_CTRL));
863 udelay(1);
864 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
865 outw(reg, FM801_REG(chip, GPIO_CTRL));
866 udelay(1);
867 val <<= 1;
868 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
869 val |= 1;
870 }
871
872 spin_unlock_irq(&chip->reg_lock);
873
874 return val;
875}
876
877/* 64PCR GPIO numbers */
878#define TEA_64PCR_BUS_CLOCK 0
879#define TEA_64PCR_WRITE_ENABLE 1 /* inverted */
880#define TEA_64PCR_DATA 2
881
882static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val)
883{
884 fm801_t *chip = tea->private_data;
885 unsigned short reg;
886 int i = 25;
887
888 spin_lock_irq(&chip->reg_lock);
889 reg = inw(FM801_REG(chip, GPIO_CTRL));
890 /* use GPIO lines and set write enable bit */
891 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
892 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
893 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
894 /* all of lines are in the write direction */
895 /* clear data and clock lines */
896 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
897 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
898 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
899 FM801_GPIO_GP(TEA_64PCR_DATA) |
900 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
901 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
902 outw(reg, FM801_REG(chip, GPIO_CTRL));
903 udelay(1);
904
905 while (i--) {
906 if (val & (1 << i))
907 reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
908 else
909 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
910 outw(reg, FM801_REG(chip, GPIO_CTRL));
911 udelay(1);
912 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
913 outw(reg, FM801_REG(chip, GPIO_CTRL));
914 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
915 outw(reg, FM801_REG(chip, GPIO_CTRL));
916 udelay(1);
917 }
918
919 /* and reset the write enable bit */
920 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
921 FM801_GPIO_GP(TEA_64PCR_DATA);
922 outw(reg, FM801_REG(chip, GPIO_CTRL));
923 spin_unlock_irq(&chip->reg_lock);
924}
925
926static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea)
927{
928 fm801_t *chip = tea->private_data;
929 unsigned short reg;
930 unsigned int val = 0;
931 int i;
932
933 spin_lock_irq(&chip->reg_lock);
934 reg = inw(FM801_REG(chip, GPIO_CTRL));
935 /* use GPIO lines, set data direction to input */
936 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
937 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
938 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
939 FM801_GPIO_GD(TEA_64PCR_DATA) |
940 FM801_GPIO_GP(TEA_64PCR_DATA) |
941 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
942 /* all of lines are in the write direction, except data */
943 /* clear data, write enable and clock lines */
944 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
945 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
946 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
947
948 for (i = 0; i < 24; i++) {
949 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
950 outw(reg, FM801_REG(chip, GPIO_CTRL));
951 udelay(1);
952 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
953 outw(reg, FM801_REG(chip, GPIO_CTRL));
954 udelay(1);
955 val <<= 1;
956 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
957 val |= 1;
958 }
959
960 spin_unlock_irq(&chip->reg_lock);
961
962 return val;
963}
964
965static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
966 {
967 /* 1 = MediaForte 256-PCS */
968 .write = snd_fm801_tea575x_256pcs_write,
969 .read = snd_fm801_tea575x_256pcs_read,
970 },
971 {
972 /* 2 = MediaForte 256-PCPR */
973 .write = snd_fm801_tea575x_256pcpr_write,
974 .read = snd_fm801_tea575x_256pcpr_read,
975 },
976 {
977 /* 3 = MediaForte 64-PCR */
978 .write = snd_fm801_tea575x_64pcr_write,
979 .read = snd_fm801_tea575x_64pcr_read,
980 }
981};
982#endif
983
984/*
985 * Mixer routines
986 */
987
988#define FM801_SINGLE(xname, reg, shift, mask, invert) \
989{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
990 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
991 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
992
993static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
994{
995 int mask = (kcontrol->private_value >> 16) & 0xff;
996
997 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
998 uinfo->count = 1;
999 uinfo->value.integer.min = 0;
1000 uinfo->value.integer.max = mask;
1001 return 0;
1002}
1003
1004static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1005{
1006 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1007 int reg = kcontrol->private_value & 0xff;
1008 int shift = (kcontrol->private_value >> 8) & 0xff;
1009 int mask = (kcontrol->private_value >> 16) & 0xff;
1010 int invert = (kcontrol->private_value >> 24) & 0xff;
1011
1012 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1013 if (invert)
1014 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1015 return 0;
1016}
1017
1018static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1019{
1020 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1021 int reg = kcontrol->private_value & 0xff;
1022 int shift = (kcontrol->private_value >> 8) & 0xff;
1023 int mask = (kcontrol->private_value >> 16) & 0xff;
1024 int invert = (kcontrol->private_value >> 24) & 0xff;
1025 unsigned short val;
1026
1027 val = (ucontrol->value.integer.value[0] & mask);
1028 if (invert)
1029 val = mask - val;
1030 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1031}
1032
1033#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1034{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
1035 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1036 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1037
1038static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1039{
1040 int mask = (kcontrol->private_value >> 16) & 0xff;
1041
1042 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1043 uinfo->count = 2;
1044 uinfo->value.integer.min = 0;
1045 uinfo->value.integer.max = mask;
1046 return 0;
1047}
1048
1049static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1050{
1051 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1052 int reg = kcontrol->private_value & 0xff;
1053 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1054 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1055 int mask = (kcontrol->private_value >> 16) & 0xff;
1056 int invert = (kcontrol->private_value >> 24) & 0xff;
1057
1058 spin_lock_irq(&chip->reg_lock);
1059 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1060 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1061 spin_unlock_irq(&chip->reg_lock);
1062 if (invert) {
1063 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1064 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1065 }
1066 return 0;
1067}
1068
1069static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1070{
1071 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1072 int reg = kcontrol->private_value & 0xff;
1073 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1074 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1075 int mask = (kcontrol->private_value >> 16) & 0xff;
1076 int invert = (kcontrol->private_value >> 24) & 0xff;
1077 unsigned short val1, val2;
1078
1079 val1 = ucontrol->value.integer.value[0] & mask;
1080 val2 = ucontrol->value.integer.value[1] & mask;
1081 if (invert) {
1082 val1 = mask - val1;
1083 val2 = mask - val2;
1084 }
1085 return snd_fm801_update_bits(chip, reg,
1086 (mask << shift_left) | (mask << shift_right),
1087 (val1 << shift_left ) | (val2 << shift_right));
1088}
1089
1090static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1091{
1092 static char *texts[5] = {
1093 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1094 };
1095
1096 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1097 uinfo->count = 1;
1098 uinfo->value.enumerated.items = 5;
1099 if (uinfo->value.enumerated.item > 4)
1100 uinfo->value.enumerated.item = 4;
1101 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1102 return 0;
1103}
1104
1105static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1106{
1107 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1108 unsigned short val;
1109
1110 val = inw(FM801_REG(chip, REC_SRC)) & 7;
1111 if (val > 4)
1112 val = 4;
1113 ucontrol->value.enumerated.item[0] = val;
1114 return 0;
1115}
1116
1117static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1118{
1119 fm801_t *chip = snd_kcontrol_chip(kcontrol);
1120 unsigned short val;
1121
1122 if ((val = ucontrol->value.enumerated.item[0]) > 4)
1123 return -EINVAL;
1124 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1125}
1126
1127#define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t))
1128
1129static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = {
1130FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
1131FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1132FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
1133FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1134FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
1135FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1136{
1137 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1138 .name = "Digital Capture Source",
1139 .info = snd_fm801_info_mux,
1140 .get = snd_fm801_get_mux,
1141 .put = snd_fm801_put_mux,
1142}
1143};
1144
1145#define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t))
1146
1147static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = {
1148FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1149FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
10e8d78a
CL		 1150FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1151FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1152FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1153FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1da177e4
LT		 1154};
1155
1156static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus)
1157{
1158 fm801_t *chip = bus->private_data;
1159 chip->ac97_bus = NULL;
1160}
1161
1162static void snd_fm801_mixer_free_ac97(ac97_t *ac97)
1163{
1164 fm801_t *chip = ac97->private_data;
1165 if (ac97->num == 0) {
1166 chip->ac97 = NULL;
1167 } else {
1168 chip->ac97_sec = NULL;
1169 }
1170}
1171
1172static int __devinit snd_fm801_mixer(fm801_t *chip)
1173{
1174 ac97_template_t ac97;
1175 unsigned int i;
1176 int err;
1177 static ac97_bus_ops_t ops = {
1178 .write = snd_fm801_codec_write,
1179 .read = snd_fm801_codec_read,
1180 };
1181
1182 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1183 return err;
1184 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1185
1186 memset(&ac97, 0, sizeof(ac97));
1187 ac97.private_data = chip;
1188 ac97.private_free = snd_fm801_mixer_free_ac97;
1189 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1190 return err;
1191 if (chip->secondary) {
1192 ac97.num = 1;
1193 ac97.addr = chip->secondary_addr;
1194 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1195 return err;
1196 }
1197 for (i = 0; i < FM801_CONTROLS; i++)
1198 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1199 if (chip->multichannel) {
1200 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1201 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1202 }
1203 return 0;
1204}
1205
1206/*
1207 * initialization routines
1208 */
1209
1210static int snd_fm801_free(fm801_t *chip)
1211{
1212 unsigned short cmdw;
1213
1214 if (chip->irq < 0)
1215 goto __end_hw;
1216
1217 /* interrupt setup - mask everything */
1218 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1219 cmdw |= 0x00c3;
1220 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1221
1222 __end_hw:
1223#ifdef TEA575X_RADIO
1224 snd_tea575x_exit(&chip->tea);
1225#endif
1226 if (chip->irq >= 0)
1227 free_irq(chip->irq, (void *)chip);
1228 pci_release_regions(chip->pci);
1229 pci_disable_device(chip->pci);
1230
1231 kfree(chip);
1232 return 0;
1233}
1234
1235static int snd_fm801_dev_free(snd_device_t *device)
1236{
1237 fm801_t *chip = device->device_data;
1238 return snd_fm801_free(chip);
1239}
1240
1241static int __devinit snd_fm801_create(snd_card_t * card,
1242 struct pci_dev * pci,
1243 int tea575x_tuner,
1244 fm801_t ** rchip)
1245{
1246 fm801_t *chip;
1247 unsigned char rev, id;
1248 unsigned short cmdw;
1249 unsigned long timeout;
1250 int err;
1251 static snd_device_ops_t ops = {
1252 .dev_free = snd_fm801_dev_free,
1253 };
1254
1255 *rchip = NULL;
1256 if ((err = pci_enable_device(pci)) < 0)
1257 return err;
e560d8d8 1258 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1259 if (chip == NULL) {
1260 pci_disable_device(pci);
1261 return -ENOMEM;
1262 }
1263 spin_lock_init(&chip->reg_lock);
1264 chip->card = card;
1265 chip->pci = pci;
1266 chip->irq = -1;
1267 if ((err = pci_request_regions(pci, "FM801")) < 0) {
1268 kfree(chip);
1269 pci_disable_device(pci);
1270 return err;
1271 }
1272 chip->port = pci_resource_start(pci, 0);
1273 if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) {
99b359ba 1274 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq);
1da177e4
LT		 1275 snd_fm801_free(chip);
1276 return -EBUSY;
1277 }
1278 chip->irq = pci->irq;
1279 pci_set_master(pci);
1280
1281 pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
1282 if (rev >= 0xb1) /* FM801-AU */
1283 chip->multichannel = 1;
1284
1285 /* codec cold reset + AC'97 warm reset */
1286 outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL));
1287 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
1288 udelay(100);
1289 outw(0, FM801_REG(chip, CODEC_CTRL));
1290
1291 timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
1292
1293 outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1294 udelay(5);
1295 do {
1296 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1297 goto __ac97_secondary;
8433a509 1298 schedule_timeout_uninterruptible(1);
1da177e4 1299 } while (time_after(timeout, jiffies));
99b359ba 1300 snd_printk(KERN_ERR "Primary AC'97 codec not found\n");
1da177e4
LT		 1301 snd_fm801_free(chip);
1302 return -EIO;
1303
1304 __ac97_secondary:
1305 if (!chip->multichannel) /* lookup is not required */
1306 goto __ac97_ok;
1307 for (id = 3; id > 0; id--) { /* my card has the secondary codec */
1308 /* at address #3, so the loop is inverted */
1309
1310 timeout = jiffies + HZ / 20;
1311
1312 outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD));
1313 udelay(5);
1314 do {
1315 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) {
1316 cmdw = inw(FM801_REG(chip, AC97_DATA));
1317 if (cmdw != 0xffff && cmdw != 0) {
1318 chip->secondary = 1;
1319 chip->secondary_addr = id;
1320 goto __ac97_ok;
1321 }
1322 }
8433a509 1323 schedule_timeout_uninterruptible(1);
1da177e4
LT		 1324 } while (time_after(timeout, jiffies));
1325 }
1326
1327 /* the recovery phase, it seems that probing for non-existing codec might */
1328 /* cause timeout problems */
1329 timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
1330
1331 outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
1332 udelay(5);
1333 do {
1334 if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
1335 goto __ac97_ok;
8433a509 1336 schedule_timeout_uninterruptible(1);
1da177e4 1337 } while (time_after(timeout, jiffies));
99b359ba 1338 snd_printk(KERN_ERR "Primary AC'97 codec not responding\n");
1da177e4
LT		 1339 snd_fm801_free(chip);
1340 return -EIO;
1341
1342 __ac97_ok:
1343
1344 /* init volume */
1345 outw(0x0808, FM801_REG(chip, PCM_VOL));
1346 outw(0x9f1f, FM801_REG(chip, FM_VOL));
1347 outw(0x8808, FM801_REG(chip, I2S_VOL));
1348
1349 /* I2S control - I2S mode */
1350 outw(0x0003, FM801_REG(chip, I2S_MODE));
1351
1352 /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
1353 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1354 cmdw &= ~0x0083;
1355 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1356
1357 /* interrupt clear */
1358 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1359
1360 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1361 snd_fm801_free(chip);
1362 return err;
1363 }
1364
1365 snd_card_set_dev(card, &pci->dev);
1366
1367#ifdef TEA575X_RADIO
1368 if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
1369 chip->tea.dev_nr = tea575x_tuner >> 16;
1370 chip->tea.card = card;
1371 chip->tea.freq_fixup = 10700;
1372 chip->tea.private_data = chip;
1373 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
1374 snd_tea575x_init(&chip->tea);
1375 }
1376#endif
1377
1378 *rchip = chip;
1379 return 0;
1380}
1381
1382static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1383 const struct pci_device_id *pci_id)
1384{
1385 static int dev;
1386 snd_card_t *card;
1387 fm801_t *chip;
1388 opl3_t *opl3;
1389 int err;
1390
1391 if (dev >= SNDRV_CARDS)
1392 return -ENODEV;
1393 if (!enable[dev]) {
1394 dev++;
1395 return -ENOENT;
1396 }
1397
1398 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1399 if (card == NULL)
1400 return -ENOMEM;
1401 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1402 snd_card_free(card);
1403 return err;
1404 }
1405
1406 strcpy(card->driver, "FM801");
1407 strcpy(card->shortname, "ForteMedia FM801-");
1408 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1409 sprintf(card->longname, "%s at 0x%lx, irq %i",
1410 card->shortname, chip->port, chip->irq);
1411
1412 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1413 snd_card_free(card);
1414 return err;
1415 }
1416 if ((err = snd_fm801_mixer(chip)) < 0) {
1417 snd_card_free(card);
1418 return err;
1419 }
1420 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1421 FM801_REG(chip, MPU401_DATA), 1,
1422 chip->irq, 0, &chip->rmidi)) < 0) {
1423 snd_card_free(card);
1424 return err;
1425 }
1426 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1427 FM801_REG(chip, OPL3_BANK1),
1428 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1429 snd_card_free(card);
1430 return err;
1431 }
1432 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1433 snd_card_free(card);
1434 return err;
1435 }
1436
1437 if ((err = snd_card_register(card)) < 0) {
1438 snd_card_free(card);
1439 return err;
1440 }
1441 pci_set_drvdata(pci, card);
1442 dev++;
1443 return 0;
1444}
1445
1446static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1447{
1448 snd_card_free(pci_get_drvdata(pci));
1449 pci_set_drvdata(pci, NULL);
1450}
1451
1452static struct pci_driver driver = {
1453 .name = "FM801",
1454 .id_table = snd_fm801_ids,
1455 .probe = snd_card_fm801_probe,
1456 .remove = __devexit_p(snd_card_fm801_remove),
1457};
1458
1459static int __init alsa_card_fm801_init(void)
1460{
01d25d46 1461 return pci_register_driver(&driver);
1da177e4
LT		 1462}
1463
1464static void __exit alsa_card_fm801_exit(void)
1465{
1466 pci_unregister_driver(&driver);
1467}
1468
1469module_init(alsa_card_fm801_init)
1470module_exit(alsa_card_fm801_exit)
kernel source for telekom puls (alcatel/mediatek)