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[ALSA] Audiophile 192: Fix ad converter initialization
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / pci / es1938.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
c1017a4c 4 * Jaroslav Kysela <perex@perex.cz>,
1da177e4
LT		 5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
1da177e4
LT		 50#include <linux/init.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/slab.h>
54#include <linux/gameport.h>
55#include <linux/moduleparam.h>
56#include <linux/delay.h>
910638ae 57#include <linux/dma-mapping.h>
1da177e4
LT		 58#include <sound/core.h>
59#include <sound/control.h>
60#include <sound/pcm.h>
61#include <sound/opl3.h>
62#include <sound/mpu401.h>
63#include <sound/initval.h>
0b593972 64#include <sound/tlv.h>
1da177e4
LT		 65
66#include <asm/io.h>
67
68MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
69MODULE_DESCRIPTION("ESS Solo-1");
70MODULE_LICENSE("GPL");
71MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
72 "{ESS,ES1946},"
73 "{ESS,ES1969},"
74 "{TerraTec,128i PCI}}");
75
76#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
77#define SUPPORT_JOYSTICK 1
78#endif
79
1da177e4
LT		 80static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
81static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
82static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
83
84module_param_array(index, int, NULL, 0444);
85MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
86module_param_array(id, charp, NULL, 0444);
87MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
88module_param_array(enable, bool, NULL, 0444);
89MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
90
91#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
92
93#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
94
95#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
96
97#define SL_PCI_LEGACYCONTROL 0x40
98#define SL_PCI_CONFIG 0x50
99#define SL_PCI_DDMACONTROL 0x60
100
101#define ESSIO_REG_AUDIO2DMAADDR 0
102#define ESSIO_REG_AUDIO2DMACOUNT 4
103#define ESSIO_REG_AUDIO2MODE 6
104#define ESSIO_REG_IRQCONTROL 7
105
106#define ESSDM_REG_DMAADDR 0x00
107#define ESSDM_REG_DMACOUNT 0x04
108#define ESSDM_REG_DMACOMMAND 0x08
109#define ESSDM_REG_DMASTATUS 0x08
110#define ESSDM_REG_DMAMODE 0x0b
111#define ESSDM_REG_DMACLEAR 0x0d
112#define ESSDM_REG_DMAMASK 0x0f
113
114#define ESSSB_REG_FMLOWADDR 0x00
115#define ESSSB_REG_FMHIGHADDR 0x02
116#define ESSSB_REG_MIXERADDR 0x04
117#define ESSSB_REG_MIXERDATA 0x05
118
119#define ESSSB_IREG_AUDIO1 0x14
120#define ESSSB_IREG_MICMIX 0x1a
121#define ESSSB_IREG_RECSRC 0x1c
122#define ESSSB_IREG_MASTER 0x32
123#define ESSSB_IREG_FM 0x36
124#define ESSSB_IREG_AUXACD 0x38
125#define ESSSB_IREG_AUXB 0x3a
126#define ESSSB_IREG_PCSPEAKER 0x3c
127#define ESSSB_IREG_LINE 0x3e
128#define ESSSB_IREG_SPATCONTROL 0x50
129#define ESSSB_IREG_SPATLEVEL 0x52
130#define ESSSB_IREG_MASTER_LEFT 0x60
131#define ESSSB_IREG_MASTER_RIGHT 0x62
132#define ESSSB_IREG_MPU401CONTROL 0x64
133#define ESSSB_IREG_MICMIXRECORD 0x68
134#define ESSSB_IREG_AUDIO2RECORD 0x69
135#define ESSSB_IREG_AUXACDRECORD 0x6a
136#define ESSSB_IREG_FMRECORD 0x6b
137#define ESSSB_IREG_AUXBRECORD 0x6c
138#define ESSSB_IREG_MONO 0x6d
139#define ESSSB_IREG_LINERECORD 0x6e
140#define ESSSB_IREG_MONORECORD 0x6f
141#define ESSSB_IREG_AUDIO2SAMPLE 0x70
142#define ESSSB_IREG_AUDIO2MODE 0x71
143#define ESSSB_IREG_AUDIO2FILTER 0x72
144#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
145#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
146#define ESSSB_IREG_AUDIO2CONTROL1 0x78
147#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
148#define ESSSB_IREG_AUDIO2 0x7c
149
150#define ESSSB_REG_RESET 0x06
151
152#define ESSSB_REG_READDATA 0x0a
153#define ESSSB_REG_WRITEDATA 0x0c
154#define ESSSB_REG_READSTATUS 0x0c
155
156#define ESSSB_REG_STATUS 0x0e
157
158#define ESS_CMD_EXTSAMPLERATE 0xa1
159#define ESS_CMD_FILTERDIV 0xa2
160#define ESS_CMD_DMACNTRELOADL 0xa4
161#define ESS_CMD_DMACNTRELOADH 0xa5
162#define ESS_CMD_ANALOGCONTROL 0xa8
163#define ESS_CMD_IRQCONTROL 0xb1
164#define ESS_CMD_DRQCONTROL 0xb2
165#define ESS_CMD_RECLEVEL 0xb4
166#define ESS_CMD_SETFORMAT 0xb6
167#define ESS_CMD_SETFORMAT2 0xb7
168#define ESS_CMD_DMACONTROL 0xb8
169#define ESS_CMD_DMATYPE 0xb9
170#define ESS_CMD_OFFSETLEFT 0xba
171#define ESS_CMD_OFFSETRIGHT 0xbb
172#define ESS_CMD_READREG 0xc0
173#define ESS_CMD_ENABLEEXT 0xc6
174#define ESS_CMD_PAUSEDMA 0xd0
175#define ESS_CMD_ENABLEAUDIO1 0xd1
176#define ESS_CMD_STOPAUDIO1 0xd3
177#define ESS_CMD_AUDIO1STATUS 0xd8
178#define ESS_CMD_CONTDMA 0xd4
179#define ESS_CMD_TESTIRQ 0xf2
180
181#define ESS_RECSRC_MIC 0
182#define ESS_RECSRC_AUXACD 2
183#define ESS_RECSRC_AUXB 5
184#define ESS_RECSRC_LINE 6
185#define ESS_RECSRC_NONE 7
186
187#define DAC1 0x01
188#define ADC1 0x02
189#define DAC2 0x04
190
191/*
192
193 */
194
1da177e4
LT		 195#define SAVED_REG_SIZE 32 /* max. number of registers to save */
196
e571f594 197struct es1938 {
1da177e4
LT		 198 int irq;
199
200 unsigned long io_port;
201 unsigned long sb_port;
202 unsigned long vc_port;
203 unsigned long mpu_port;
204 unsigned long game_port;
205 unsigned long ddma_port;
206
207 unsigned char irqmask;
208 unsigned char revision;
209
e571f594
TI		 210 struct snd_kcontrol *hw_volume;
211 struct snd_kcontrol *hw_switch;
212 struct snd_kcontrol *master_volume;
213 struct snd_kcontrol *master_switch;
1da177e4
LT		 214
215 struct pci_dev *pci;
e571f594
TI		 216 struct snd_card *card;
217 struct snd_pcm *pcm;
218 struct snd_pcm_substream *capture_substream;
219 struct snd_pcm_substream *playback1_substream;
220 struct snd_pcm_substream *playback2_substream;
221 struct snd_rawmidi *rmidi;
1da177e4
LT		 222
223 unsigned int dma1_size;
224 unsigned int dma2_size;
225 unsigned int dma1_start;
226 unsigned int dma2_start;
227 unsigned int dma1_shift;
228 unsigned int dma2_shift;
19e2e3c3 229 unsigned int last_capture_dmaaddr;
1da177e4
LT		 230 unsigned int active;
231
232 spinlock_t reg_lock;
233 spinlock_t mixer_lock;
e571f594 234 struct snd_info_entry *proc_entry;
1da177e4
LT		 235
236#ifdef SUPPORT_JOYSTICK
237 struct gameport *gameport;
238#endif
239#ifdef CONFIG_PM
240 unsigned char saved_regs[SAVED_REG_SIZE];
241#endif
242};
243
7d12e780 244static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
1da177e4 245
f40b6890 246static struct pci_device_id snd_es1938_ids[] = {
1da177e4
LT		 247 { 0x125d, 0x1969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Solo-1 */
248 { 0, }
249};
250
251MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
252
253#define RESET_LOOP_TIMEOUT 0x10000
254#define WRITE_LOOP_TIMEOUT 0x10000
255#define GET_LOOP_TIMEOUT 0x01000
256
257#undef REG_DEBUG
258/* -----------------------------------------------------------------
259 * Write to a mixer register
260 * -----------------------------------------------------------------*/
e571f594 261static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 262{
263 unsigned long flags;
264 spin_lock_irqsave(&chip->mixer_lock, flags);
265 outb(reg, SLSB_REG(chip, MIXERADDR));
266 outb(val, SLSB_REG(chip, MIXERDATA));
267 spin_unlock_irqrestore(&chip->mixer_lock, flags);
268#ifdef REG_DEBUG
99b359ba 269 snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, val);
1da177e4
LT		 270#endif
271}
272
273/* -----------------------------------------------------------------
274 * Read from a mixer register
275 * -----------------------------------------------------------------*/
e571f594 276static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 277{
278 int data;
279 unsigned long flags;
280 spin_lock_irqsave(&chip->mixer_lock, flags);
281 outb(reg, SLSB_REG(chip, MIXERADDR));
282 data = inb(SLSB_REG(chip, MIXERDATA));
283 spin_unlock_irqrestore(&chip->mixer_lock, flags);
284#ifdef REG_DEBUG
99b359ba 285 snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data);
1da177e4
LT		 286#endif
287 return data;
288}
289
290/* -----------------------------------------------------------------
291 * Write to some bits of a mixer register (return old value)
292 * -----------------------------------------------------------------*/
e571f594
TI		 293static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
294 unsigned char mask, unsigned char val)
1da177e4
LT		 295{
296 unsigned long flags;
297 unsigned char old, new, oval;
298 spin_lock_irqsave(&chip->mixer_lock, flags);
299 outb(reg, SLSB_REG(chip, MIXERADDR));
300 old = inb(SLSB_REG(chip, MIXERDATA));
301 oval = old & mask;
302 if (val != oval) {
303 new = (old & ~mask) | (val & mask);
304 outb(new, SLSB_REG(chip, MIXERDATA));
305#ifdef REG_DEBUG
99b359ba
TI		 306 snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n",
307 reg, old, new);
1da177e4
LT		 308#endif
309 }
310 spin_unlock_irqrestore(&chip->mixer_lock, flags);
311 return oval;
312}
313
314/* -----------------------------------------------------------------
315 * Write command to Controller Registers
316 * -----------------------------------------------------------------*/
e571f594 317static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
1da177e4
LT		 318{
319 int i;
320 unsigned char v;
321 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
322 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
323 outb(cmd, SLSB_REG(chip, WRITEDATA));
324 return;
325 }
326 }
99b359ba 327 printk(KERN_ERR "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
1da177e4
LT		 328}
329
330/* -----------------------------------------------------------------
331 * Read the Read Data Buffer
332 * -----------------------------------------------------------------*/
e571f594 333static int snd_es1938_get_byte(struct es1938 *chip)
1da177e4
LT		 334{
335 int i;
336 unsigned char v;
337 for (i = GET_LOOP_TIMEOUT; i; i--)
338 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
339 return inb(SLSB_REG(chip, READDATA));
99b359ba 340 snd_printk(KERN_ERR "get_byte timeout: status 0x02%x\n", v);
1da177e4
LT		 341 return -ENODEV;
342}
343
344/* -----------------------------------------------------------------
345 * Write value cmd register
346 * -----------------------------------------------------------------*/
e571f594 347static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
1da177e4
LT		 348{
349 unsigned long flags;
350 spin_lock_irqsave(&chip->reg_lock, flags);
351 snd_es1938_write_cmd(chip, reg);
352 snd_es1938_write_cmd(chip, val);
353 spin_unlock_irqrestore(&chip->reg_lock, flags);
354#ifdef REG_DEBUG
99b359ba 355 snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, val);
1da177e4
LT		 356#endif
357}
358
359/* -----------------------------------------------------------------
360 * Read data from cmd register and return it
361 * -----------------------------------------------------------------*/
e571f594 362static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 363{
364 unsigned char val;
365 unsigned long flags;
366 spin_lock_irqsave(&chip->reg_lock, flags);
367 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
368 snd_es1938_write_cmd(chip, reg);
369 val = snd_es1938_get_byte(chip);
370 spin_unlock_irqrestore(&chip->reg_lock, flags);
371#ifdef REG_DEBUG
99b359ba 372 snd_printk(KERN_DEBUG "Reg %02x now is %02x\n", reg, val);
1da177e4
LT		 373#endif
374 return val;
375}
376
377/* -----------------------------------------------------------------
378 * Write data to cmd register and return old value
379 * -----------------------------------------------------------------*/
e571f594
TI		 380static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
381 unsigned char val)
1da177e4
LT		 382{
383 unsigned long flags;
384 unsigned char old, new, oval;
385 spin_lock_irqsave(&chip->reg_lock, flags);
386 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
387 snd_es1938_write_cmd(chip, reg);
388 old = snd_es1938_get_byte(chip);
389 oval = old & mask;
390 if (val != oval) {
391 snd_es1938_write_cmd(chip, reg);
392 new = (old & ~mask) | (val & mask);
393 snd_es1938_write_cmd(chip, new);
394#ifdef REG_DEBUG
99b359ba
TI		 395 snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x\n",
396 reg, old, new);
1da177e4
LT		 397#endif
398 }
399 spin_unlock_irqrestore(&chip->reg_lock, flags);
400 return oval;
401}
402
403/* --------------------------------------------------------------------
404 * Reset the chip
405 * --------------------------------------------------------------------*/
e571f594 406static void snd_es1938_reset(struct es1938 *chip)
1da177e4
LT		 407{
408 int i;
409
410 outb(3, SLSB_REG(chip, RESET));
411 inb(SLSB_REG(chip, RESET));
412 outb(0, SLSB_REG(chip, RESET));
413 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
414 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
415 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
416 goto __next;
417 }
418 }
99b359ba 419 snd_printk(KERN_ERR "ESS Solo-1 reset failed\n");
1da177e4
LT		 420
421 __next:
422 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
423
424 /* Demand transfer DMA: 4 bytes per DMA request */
425 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
426
427 /* Change behaviour of register A1
428 4x oversampling
429 2nd channel DAC asynchronous */
430 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
431 /* enable/select DMA channel and IRQ channel */
432 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
433 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
434 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
435 /* Set spatializer parameters to recommended values */
436 snd_es1938_mixer_write(chip, 0x54, 0x8f);
437 snd_es1938_mixer_write(chip, 0x56, 0x95);
438 snd_es1938_mixer_write(chip, 0x58, 0x94);
439 snd_es1938_mixer_write(chip, 0x5a, 0x80);
440}
441
442/* --------------------------------------------------------------------
443 * Reset the FIFOs
444 * --------------------------------------------------------------------*/
e571f594 445static void snd_es1938_reset_fifo(struct es1938 *chip)
1da177e4
LT		 446{
447 outb(2, SLSB_REG(chip, RESET));
448 outb(0, SLSB_REG(chip, RESET));
449}
450
e571f594 451static struct snd_ratnum clocks[2] = {
1da177e4
LT		 452 {
453 .num = 793800,
454 .den_min = 1,
455 .den_max = 128,
456 .den_step = 1,
457 },
458 {
459 .num = 768000,
460 .den_min = 1,
461 .den_max = 128,
462 .den_step = 1,
463 }
464};
465
e571f594 466static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
1da177e4
LT		 467 .nrats = 2,
468 .rats = clocks,
469};
470
471
e571f594
TI		 472static void snd_es1938_rate_set(struct es1938 *chip,
473 struct snd_pcm_substream *substream,
1da177e4
LT		 474 int mode)
475{
476 unsigned int bits, div0;
e571f594 477 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 478 if (runtime->rate_num == clocks[0].num)
479 bits = 128 - runtime->rate_den;
480 else
481 bits = 256 - runtime->rate_den;
482
483 /* set filter register */
484 div0 = 256 - 7160000*20/(8*82*runtime->rate);
485
486 if (mode == DAC2) {
487 snd_es1938_mixer_write(chip, 0x70, bits);
488 snd_es1938_mixer_write(chip, 0x72, div0);
489 } else {
490 snd_es1938_write(chip, 0xA1, bits);
491 snd_es1938_write(chip, 0xA2, div0);
492 }
493}
494
495/* --------------------------------------------------------------------
496 * Configure Solo1 builtin DMA Controller
497 * --------------------------------------------------------------------*/
498
e571f594 499static void snd_es1938_playback1_setdma(struct es1938 *chip)
1da177e4
LT		 500{
501 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
502 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
503 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
504 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
505}
506
e571f594 507static void snd_es1938_playback2_setdma(struct es1938 *chip)
1da177e4
LT		 508{
509 /* Enable DMA controller */
510 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
511 /* 1. Master reset */
512 outb(0, SLDM_REG(chip, DMACLEAR));
513 /* 2. Mask DMA */
514 outb(1, SLDM_REG(chip, DMAMASK));
515 outb(0x18, SLDM_REG(chip, DMAMODE));
516 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
517 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
518 /* 3. Unmask DMA */
519 outb(0, SLDM_REG(chip, DMAMASK));
520}
521
e571f594 522static void snd_es1938_capture_setdma(struct es1938 *chip)
1da177e4
LT		 523{
524 /* Enable DMA controller */
525 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
526 /* 1. Master reset */
527 outb(0, SLDM_REG(chip, DMACLEAR));
528 /* 2. Mask DMA */
529 outb(1, SLDM_REG(chip, DMAMASK));
530 outb(0x14, SLDM_REG(chip, DMAMODE));
531 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
19e2e3c3 532 chip->last_capture_dmaaddr = chip->dma1_start;
1da177e4
LT		 533 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
534 /* 3. Unmask DMA */
535 outb(0, SLDM_REG(chip, DMAMASK));
536}
537
538/* ----------------------------------------------------------------------
539 *
540 * *** PCM part ***
541 */
542
e571f594 543static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 544 int cmd)
545{
e571f594 546 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 547 int val;
548 switch (cmd) {
549 case SNDRV_PCM_TRIGGER_START:
93b9f426 550 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 551 val = 0x0f;
552 chip->active |= ADC1;
553 break;
554 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 555 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 556 val = 0x00;
557 chip->active &= ~ADC1;
558 break;
559 default:
560 return -EINVAL;
561 }
562 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
563 return 0;
564}
565
e571f594 566static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 567 int cmd)
568{
e571f594 569 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 570 switch (cmd) {
571 case SNDRV_PCM_TRIGGER_START:
93b9f426 572 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 573 /* According to the documentation this should be:
574 0x13 but that value may randomly swap stereo channels */
575 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
576 udelay(10);
577 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
578 /* This two stage init gives the FIFO -> DAC connection time to
579 * settle before first data from DMA flows in. This should ensure
580 * no swapping of stereo channels. Report a bug if otherwise :-) */
581 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
582 chip->active |= DAC2;
583 break;
584 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 585 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 586 outb(0, SLIO_REG(chip, AUDIO2MODE));
587 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
588 chip->active &= ~DAC2;
589 break;
590 default:
591 return -EINVAL;
592 }
593 return 0;
594}
595
e571f594 596static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 597 int cmd)
598{
e571f594 599 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 600 int val;
601 switch (cmd) {
602 case SNDRV_PCM_TRIGGER_START:
93b9f426 603 case SNDRV_PCM_TRIGGER_RESUME:
1da177e4
LT		 604 val = 5;
605 chip->active |= DAC1;
606 break;
607 case SNDRV_PCM_TRIGGER_STOP:
93b9f426 608 case SNDRV_PCM_TRIGGER_SUSPEND:
1da177e4
LT		 609 val = 0;
610 chip->active &= ~DAC1;
611 break;
612 default:
613 return -EINVAL;
614 }
615 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
616 return 0;
617}
618
e571f594 619static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
1da177e4
LT		 620 int cmd)
621{
622 switch (substream->number) {
623 case 0:
624 return snd_es1938_playback1_trigger(substream, cmd);
625 case 1:
626 return snd_es1938_playback2_trigger(substream, cmd);
627 }
628 snd_BUG();
629 return -EINVAL;
630}
631
632/* --------------------------------------------------------------------
633 * First channel for Extended Mode Audio 1 ADC Operation
634 * --------------------------------------------------------------------*/
e571f594 635static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 636{
e571f594
TI		 637 struct es1938 *chip = snd_pcm_substream_chip(substream);
638 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 639 int u, is8, mono;
640 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
641 unsigned int count = snd_pcm_lib_period_bytes(substream);
642
643 chip->dma1_size = size;
644 chip->dma1_start = runtime->dma_addr;
645
646 mono = (runtime->channels > 1) ? 0 : 1;
647 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
648 u = snd_pcm_format_unsigned(runtime->format);
649
650 chip->dma1_shift = 2 - mono - is8;
651
652 snd_es1938_reset_fifo(chip);
653
654 /* program type */
655 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
656
657 /* set clock and counters */
658 snd_es1938_rate_set(chip, substream, ADC1);
659
660 count = 0x10000 - count;
661 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
662 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
663
664 /* initialize and configure ADC */
665 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
666 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
667 (u ? 0x00 : 0x20) |
668 (is8 ? 0x00 : 0x04) |
669 (mono ? 0x40 : 0x08));
670
671 // snd_es1938_reset_fifo(chip);
672
673 /* 11. configure system interrupt controller and DMA controller */
674 snd_es1938_capture_setdma(chip);
675
676 return 0;
677}
678
679
680/* ------------------------------------------------------------------------------
681 * Second Audio channel DAC Operation
682 * ------------------------------------------------------------------------------*/
e571f594 683static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
1da177e4 684{
e571f594
TI		 685 struct es1938 *chip = snd_pcm_substream_chip(substream);
686 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 687 int u, is8, mono;
688 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
689 unsigned int count = snd_pcm_lib_period_bytes(substream);
690
691 chip->dma2_size = size;
692 chip->dma2_start = runtime->dma_addr;
693
694 mono = (runtime->channels > 1) ? 0 : 1;
695 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
696 u = snd_pcm_format_unsigned(runtime->format);
697
698 chip->dma2_shift = 2 - mono - is8;
699
700 snd_es1938_reset_fifo(chip);
701
702 /* set clock and counters */
703 snd_es1938_rate_set(chip, substream, DAC2);
704
705 count >>= 1;
706 count = 0x10000 - count;
707 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
708 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
709
710 /* initialize and configure Audio 2 DAC */
e571f594
TI		 711 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
712 (mono ? 0 : 2) | (is8 ? 0 : 1));
1da177e4
LT		 713
714 /* program DMA */
715 snd_es1938_playback1_setdma(chip);
716
717 return 0;
718}
719
e571f594 720static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
1da177e4 721{
e571f594
TI		 722 struct es1938 *chip = snd_pcm_substream_chip(substream);
723 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 724 int u, is8, mono;
725 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
726 unsigned int count = snd_pcm_lib_period_bytes(substream);
727
728 chip->dma1_size = size;
729 chip->dma1_start = runtime->dma_addr;
730
731 mono = (runtime->channels > 1) ? 0 : 1;
732 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
733 u = snd_pcm_format_unsigned(runtime->format);
734
735 chip->dma1_shift = 2 - mono - is8;
736
737 count = 0x10000 - count;
738
739 /* reset */
740 snd_es1938_reset_fifo(chip);
741
742 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
743
744 /* set clock and counters */
745 snd_es1938_rate_set(chip, substream, DAC1);
746 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
747 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
748
749 /* initialized and configure DAC */
750 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
751 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
752 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
753 0x90 | (mono ? 0x40 : 0x08) |
754 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
755
756 /* program DMA */
757 snd_es1938_playback2_setdma(chip);
758
759 return 0;
760}
761
e571f594 762static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
1da177e4
LT		 763{
764 switch (substream->number) {
765 case 0:
766 return snd_es1938_playback1_prepare(substream);
767 case 1:
768 return snd_es1938_playback2_prepare(substream);
769 }
770 snd_BUG();
771 return -EINVAL;
772}
773
19e2e3c3
HL		 774/* during the incrementing of dma counters the DMA register reads sometimes
775 returns garbage. To ensure a valid hw pointer, the following checks which
776 should be very unlikely to fail are used:
777 - is the current DMA address in the valid DMA range ?
778 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
779 One can argue this could differ by one byte depending on which register is
780 updated first, so the implementation below allows for that.
781*/
e571f594 782static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 783{
e571f594 784 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4 785 size_t ptr;
19e2e3c3 786#if 0
1da177e4 787 size_t old, new;
1da177e4
LT		 788 /* This stuff is *needed*, don't ask why - AB */
789 old = inw(SLDM_REG(chip, DMACOUNT));
790 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
791 old = new;
792 ptr = chip->dma1_size - 1 - new;
793#else
19e2e3c3
HL		 794 size_t count;
795 unsigned int diff;
796
797 ptr = inl(SLDM_REG(chip, DMAADDR));
798 count = inw(SLDM_REG(chip, DMACOUNT));
799 diff = chip->dma1_start + chip->dma1_size - ptr - count;
800
801 if (diff > 3 || ptr < chip->dma1_start
802 || ptr >= chip->dma1_start+chip->dma1_size)
803 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
804 else
805 chip->last_capture_dmaaddr = ptr; /* good, remember it */
806
807 ptr -= chip->dma1_start;
1da177e4
LT		 808#endif
809 return ptr >> chip->dma1_shift;
810}
811
e571f594 812static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
1da177e4 813{
e571f594 814 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 815 size_t ptr;
816#if 1
817 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
818#else
819 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
820#endif
821 return ptr >> chip->dma2_shift;
822}
823
e571f594 824static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
1da177e4 825{
e571f594 826 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 827 size_t ptr;
828 size_t old, new;
829#if 1
830 /* This stuff is *needed*, don't ask why - AB */
831 old = inw(SLDM_REG(chip, DMACOUNT));
832 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
833 old = new;
834 ptr = chip->dma1_size - 1 - new;
835#else
836 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
837#endif
838 return ptr >> chip->dma1_shift;
839}
840
e571f594 841static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
1da177e4
LT		 842{
843 switch (substream->number) {
844 case 0:
845 return snd_es1938_playback1_pointer(substream);
846 case 1:
847 return snd_es1938_playback2_pointer(substream);
848 }
849 snd_BUG();
850 return -EINVAL;
851}
852
e571f594 853static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
1da177e4
LT		 854 int channel,
855 snd_pcm_uframes_t pos,
856 void __user *dst,
857 snd_pcm_uframes_t count)
858{
e571f594
TI		 859 struct snd_pcm_runtime *runtime = substream->runtime;
860 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 861 pos <<= chip->dma1_shift;
862 count <<= chip->dma1_shift;
863 snd_assert(pos + count <= chip->dma1_size, return -EINVAL);
864 if (pos + count < chip->dma1_size) {
865 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
866 return -EFAULT;
867 } else {
868 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
869 return -EFAULT;
870 if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
871 return -EFAULT;
872 }
873 return 0;
874}
875
876/*
877 * buffer management
878 */
e571f594
TI		 879static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
880 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 881
882{
883 int err;
884
885 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
886 return err;
887 return 0;
888}
889
e571f594 890static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 891{
892 return snd_pcm_lib_free_pages(substream);
893}
894
895/* ----------------------------------------------------------------------
896 * Audio1 Capture (ADC)
897 * ----------------------------------------------------------------------*/
e571f594 898static struct snd_pcm_hardware snd_es1938_capture =
1da177e4
LT		 899{
900 .info = (SNDRV_PCM_INFO_INTERLEAVED |
901 SNDRV_PCM_INFO_BLOCK_TRANSFER),
e571f594
TI		 902 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
903 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 904 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
905 .rate_min = 6000,
906 .rate_max = 48000,
907 .channels_min = 1,
908 .channels_max = 2,
909 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
910 .period_bytes_min = 64,
911 .period_bytes_max = 0x8000,
912 .periods_min = 1,
913 .periods_max = 1024,
914 .fifo_size = 256,
915};
916
917/* -----------------------------------------------------------------------
918 * Audio2 Playback (DAC)
919 * -----------------------------------------------------------------------*/
e571f594 920static struct snd_pcm_hardware snd_es1938_playback =
1da177e4
LT		 921{
922 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
923 SNDRV_PCM_INFO_BLOCK_TRANSFER |
924 SNDRV_PCM_INFO_MMAP_VALID),
e571f594
TI		 925 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
926 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
1da177e4
LT		 927 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
928 .rate_min = 6000,
929 .rate_max = 48000,
930 .channels_min = 1,
931 .channels_max = 2,
932 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
933 .period_bytes_min = 64,
934 .period_bytes_max = 0x8000,
935 .periods_min = 1,
936 .periods_max = 1024,
937 .fifo_size = 256,
938};
939
e571f594 940static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
1da177e4 941{
e571f594
TI		 942 struct es1938 *chip = snd_pcm_substream_chip(substream);
943 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 944
945 if (chip->playback2_substream)
946 return -EAGAIN;
947 chip->capture_substream = substream;
948 runtime->hw = snd_es1938_capture;
949 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
950 &hw_constraints_clocks);
951 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
952 return 0;
953}
954
e571f594 955static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
1da177e4 956{
e571f594
TI		 957 struct es1938 *chip = snd_pcm_substream_chip(substream);
958 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 959
960 switch (substream->number) {
961 case 0:
962 chip->playback1_substream = substream;
963 break;
964 case 1:
965 if (chip->capture_substream)
966 return -EAGAIN;
967 chip->playback2_substream = substream;
968 break;
969 default:
970 snd_BUG();
971 return -EINVAL;
972 }
973 runtime->hw = snd_es1938_playback;
974 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
975 &hw_constraints_clocks);
976 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
977 return 0;
978}
979
e571f594 980static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
1da177e4 981{
e571f594 982 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 983
984 chip->capture_substream = NULL;
985 return 0;
986}
987
e571f594 988static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
1da177e4 989{
e571f594 990 struct es1938 *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 991
992 switch (substream->number) {
993 case 0:
994 chip->playback1_substream = NULL;
995 break;
996 case 1:
997 chip->playback2_substream = NULL;
998 break;
999 default:
1000 snd_BUG();
1001 return -EINVAL;
1002 }
1003 return 0;
1004}
1005
e571f594 1006static struct snd_pcm_ops snd_es1938_playback_ops = {
1da177e4
LT		 1007 .open = snd_es1938_playback_open,
1008 .close = snd_es1938_playback_close,
1009 .ioctl = snd_pcm_lib_ioctl,
1010 .hw_params = snd_es1938_pcm_hw_params,
1011 .hw_free = snd_es1938_pcm_hw_free,
1012 .prepare = snd_es1938_playback_prepare,
1013 .trigger = snd_es1938_playback_trigger,
1014 .pointer = snd_es1938_playback_pointer,
1015};
1016
e571f594 1017static struct snd_pcm_ops snd_es1938_capture_ops = {
1da177e4
LT		 1018 .open = snd_es1938_capture_open,
1019 .close = snd_es1938_capture_close,
1020 .ioctl = snd_pcm_lib_ioctl,
1021 .hw_params = snd_es1938_pcm_hw_params,
1022 .hw_free = snd_es1938_pcm_hw_free,
1023 .prepare = snd_es1938_capture_prepare,
1024 .trigger = snd_es1938_capture_trigger,
1025 .pointer = snd_es1938_capture_pointer,
1026 .copy = snd_es1938_capture_copy,
1027};
1028
e571f594 1029static int __devinit snd_es1938_new_pcm(struct es1938 *chip, int device)
1da177e4 1030{
e571f594 1031 struct snd_pcm *pcm;
1da177e4
LT		 1032 int err;
1033
1034 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1035 return err;
1036 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1037 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1038
1039 pcm->private_data = chip;
1da177e4
LT		 1040 pcm->info_flags = 0;
1041 strcpy(pcm->name, "ESS Solo-1");
1042
1043 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1044 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1045
1046 chip->pcm = pcm;
1047 return 0;
1048}
1049
1050/* -------------------------------------------------------------------
1051 *
1052 * *** Mixer part ***
1053 */
1054
e571f594
TI		 1055static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1056 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1057{
1058 static char *texts[8] = {
1059 "Mic", "Mic Master", "CD", "AOUT",
1060 "Mic1", "Mix", "Line", "Master"
1061 };
1062
1063 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1064 uinfo->count = 1;
1065 uinfo->value.enumerated.items = 8;
1066 if (uinfo->value.enumerated.item > 7)
1067 uinfo->value.enumerated.item = 7;
1068 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1069 return 0;
1070}
1071
e571f594
TI		 1072static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1da177e4 1074{
e571f594 1075 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1076 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1077 return 0;
1078}
1079
e571f594
TI		 1080static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1081 struct snd_ctl_elem_value *ucontrol)
1da177e4 1082{
e571f594 1083 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1084 unsigned char val = ucontrol->value.enumerated.item[0];
1085
1086 if (val > 7)
1087 return -EINVAL;
1088 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1089}
1090
a5ce8890 1091#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1da177e4 1092
e571f594
TI		 1093static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1094 struct snd_ctl_elem_value *ucontrol)
1da177e4 1095{
e571f594 1096 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1097 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1098 ucontrol->value.integer.value[0] = !!(val & 8);
1099 return 0;
1100}
1101
e571f594
TI		 1102static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1da177e4 1104{
e571f594 1105 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1106 unsigned char oval, nval;
1107 int change;
1108 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1109 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1110 change = nval != oval;
1111 if (change) {
1112 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1113 snd_es1938_mixer_write(chip, 0x50, nval);
1114 }
1115 return change;
1116}
1117
e571f594
TI		 1118static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1119 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1120{
1121 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1122 uinfo->count = 2;
1123 uinfo->value.integer.min = 0;
1124 uinfo->value.integer.max = 63;
1125 return 0;
1126}
1127
e571f594
TI		 1128static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1129 struct snd_ctl_elem_value *ucontrol)
1da177e4 1130{
e571f594 1131 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1132 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1133 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1134 return 0;
1135}
1136
a5ce8890 1137#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1da177e4 1138
e571f594
TI		 1139static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1140 struct snd_ctl_elem_value *ucontrol)
1da177e4 1141{
e571f594 1142 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1143 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1144 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1145 return 0;
1146}
1147
e571f594 1148static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1da177e4 1149{
e571f594 1150 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1151 chip->master_volume = NULL;
1152 chip->master_switch = NULL;
1153 chip->hw_volume = NULL;
1154 chip->hw_switch = NULL;
1155}
1156
e571f594 1157static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1da177e4
LT		 1158 unsigned char mask, unsigned char val)
1159{
1160 if (reg < 0xa0)
1161 return snd_es1938_mixer_bits(chip, reg, mask, val);
1162 else
1163 return snd_es1938_bits(chip, reg, mask, val);
1164}
1165
e571f594 1166static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1da177e4
LT		 1167{
1168 if (reg < 0xa0)
1169 return snd_es1938_mixer_read(chip, reg);
1170 else
1171 return snd_es1938_read(chip, reg);
1172}
1173
0b593972
TI		 1174#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1175{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1176 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1177 .name = xname, .index = xindex, \
1178 .info = snd_es1938_info_single, \
1179 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1180 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1181 .tlv = { .p = xtlv } }
1da177e4
LT		 1182#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1183{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1184 .info = snd_es1938_info_single, \
1185 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1186 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1187
e571f594
TI		 1188static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1189 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1190{
1191 int mask = (kcontrol->private_value >> 16) & 0xff;
1192
1193 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1194 uinfo->count = 1;
1195 uinfo->value.integer.min = 0;
1196 uinfo->value.integer.max = mask;
1197 return 0;
1198}
1199
e571f594
TI		 1200static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1201 struct snd_ctl_elem_value *ucontrol)
1da177e4 1202{
e571f594 1203 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1204 int reg = kcontrol->private_value & 0xff;
1205 int shift = (kcontrol->private_value >> 8) & 0xff;
1206 int mask = (kcontrol->private_value >> 16) & 0xff;
1207 int invert = (kcontrol->private_value >> 24) & 0xff;
1208 int val;
1209
1210 val = snd_es1938_reg_read(chip, reg);
1211 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1212 if (invert)
1213 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1214 return 0;
1215}
1216
e571f594
TI		 1217static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1218 struct snd_ctl_elem_value *ucontrol)
1da177e4 1219{
e571f594 1220 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1221 int reg = kcontrol->private_value & 0xff;
1222 int shift = (kcontrol->private_value >> 8) & 0xff;
1223 int mask = (kcontrol->private_value >> 16) & 0xff;
1224 int invert = (kcontrol->private_value >> 24) & 0xff;
1225 unsigned char val;
1226
1227 val = (ucontrol->value.integer.value[0] & mask);
1228 if (invert)
1229 val = mask - val;
1230 mask <<= shift;
1231 val <<= shift;
1232 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1233}
1234
0b593972
TI		 1235#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1236{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1237 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1238 .name = xname, .index = xindex, \
1239 .info = snd_es1938_info_double, \
1240 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1241 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1242 .tlv = { .p = xtlv } }
1da177e4
LT		 1243#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1244{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1245 .info = snd_es1938_info_double, \
1246 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1247 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1248
e571f594
TI		 1249static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1250 struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 1251{
1252 int mask = (kcontrol->private_value >> 24) & 0xff;
1253
1254 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1255 uinfo->count = 2;
1256 uinfo->value.integer.min = 0;
1257 uinfo->value.integer.max = mask;
1258 return 0;
1259}
1260
e571f594
TI		 1261static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1262 struct snd_ctl_elem_value *ucontrol)
1da177e4 1263{
e571f594 1264 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1265 int left_reg = kcontrol->private_value & 0xff;
1266 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1267 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1268 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1269 int mask = (kcontrol->private_value >> 24) & 0xff;
1270 int invert = (kcontrol->private_value >> 22) & 1;
1271 unsigned char left, right;
1272
1273 left = snd_es1938_reg_read(chip, left_reg);
1274 if (left_reg != right_reg)
1275 right = snd_es1938_reg_read(chip, right_reg);
1276 else
1277 right = left;
1278 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1279 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1280 if (invert) {
1281 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1282 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1283 }
1284 return 0;
1285}
1286
e571f594
TI		 1287static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1da177e4 1289{
e571f594 1290 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 1291 int left_reg = kcontrol->private_value & 0xff;
1292 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1293 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1294 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1295 int mask = (kcontrol->private_value >> 24) & 0xff;
1296 int invert = (kcontrol->private_value >> 22) & 1;
1297 int change;
1298 unsigned char val1, val2, mask1, mask2;
1299
1300 val1 = ucontrol->value.integer.value[0] & mask;
1301 val2 = ucontrol->value.integer.value[1] & mask;
1302 if (invert) {
1303 val1 = mask - val1;
1304 val2 = mask - val2;
1305 }
1306 val1 <<= shift_left;
1307 val2 <<= shift_right;
1308 mask1 = mask << shift_left;
1309 mask2 = mask << shift_right;
1310 if (left_reg != right_reg) {
1311 change = 0;
1312 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1313 change = 1;
1314 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1315 change = 1;
1316 } else {
1317 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1318 val1 | val2) != (val1 | val2));
1319 }
1320 return change;
1321}
1322
0b593972
TI		 1323static unsigned int db_scale_master[] = {
1324 TLV_DB_RANGE_HEAD(2),
1325 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1326 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1327};
1328
1329static unsigned int db_scale_audio1[] = {
1330 TLV_DB_RANGE_HEAD(2),
1331 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1332 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1333};
1334
1335static unsigned int db_scale_audio2[] = {
1336 TLV_DB_RANGE_HEAD(2),
1337 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1338 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1339};
1340
1341static unsigned int db_scale_mic[] = {
1342 TLV_DB_RANGE_HEAD(2),
1343 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1344 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1345};
1346
1347static unsigned int db_scale_line[] = {
1348 TLV_DB_RANGE_HEAD(2),
1349 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1350 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1351};
1352
0cb29ea0 1353static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
0b593972 1354
e571f594 1355static struct snd_kcontrol_new snd_es1938_controls[] = {
0b593972
TI		 1356ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1357 db_scale_master),
1da177e4
LT		 1358ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1359{
1360 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1361 .name = "Hardware Master Playback Volume",
1362 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1363 .info = snd_es1938_info_hw_volume,
1364 .get = snd_es1938_get_hw_volume,
1365},
1366{
1367 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
dbf91dd4 1368 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
0b593972 1369 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1da177e4 1370 .name = "Hardware Master Playback Switch",
1da177e4
LT		 1371 .info = snd_es1938_info_hw_switch,
1372 .get = snd_es1938_get_hw_switch,
0b593972 1373 .tlv = { .p = db_scale_master },
1da177e4
LT		 1374},
1375ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
0b593972
TI		 1376ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1377 db_scale_line),
1da177e4 1378ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
0b593972
TI		 1379ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1380 db_scale_mic),
1381ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1382 db_scale_line),
1383ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1384 db_scale_mic),
1385ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1386 db_scale_line),
1387ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1388 db_scale_capture),
1da177e4
LT		 1389ES1938_SINGLE("PC Speaker Volume", 0, 0x3c, 0, 7, 0),
1390ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1391ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1392{
1393 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1394 .name = "Capture Source",
1395 .info = snd_es1938_info_mux,
1396 .get = snd_es1938_get_mux,
1397 .put = snd_es1938_put_mux,
1398},
0b593972
TI		 1399ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1400 db_scale_line),
1401ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1402 db_scale_audio2),
1403ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1404 db_scale_mic),
1405ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1406 db_scale_line),
1407ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1408 db_scale_mic),
1409ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1410 db_scale_line),
1411ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1412 db_scale_line),
1413ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1414 db_scale_line),
1415ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1416 db_scale_audio2),
1417ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1418 db_scale_audio1),
1da177e4
LT		 1419ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1420{
1421 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1422 .name = "3D Control - Switch",
1423 .info = snd_es1938_info_spatializer_enable,
1424 .get = snd_es1938_get_spatializer_enable,
1425 .put = snd_es1938_put_spatializer_enable,
1426},
1427ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1428};
1429
1430
1431/* ---------------------------------------------------------------------------- */
1432/* ---------------------------------------------------------------------------- */
1433
1434/*
1435 * initialize the chip - used by resume callback, too
1436 */
e571f594 1437static void snd_es1938_chip_init(struct es1938 *chip)
1da177e4
LT		 1438{
1439 /* reset chip */
1440 snd_es1938_reset(chip);
1441
1442 /* configure native mode */
1443
1444 /* enable bus master */
1445 pci_set_master(chip->pci);
1446
1447 /* disable legacy audio */
1448 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1449
1450 /* set DDMA base */
1451 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1452
1453 /* set DMA/IRQ policy */
1454 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1455
1456 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1457 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1458
1459 /* reset DMA */
1460 outb(0, SLDM_REG(chip, DMACLEAR));
1461}
1462
1463#ifdef CONFIG_PM
1464/*
1465 * PM support
1466 */
1467
1468static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1469 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1470 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1471 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1472 0xa8, 0xb4,
1473};
1474
1475
b34a580e 1476static int es1938_suspend(struct pci_dev *pci, pm_message_t state)
1da177e4 1477{
b34a580e
TI		 1478 struct snd_card *card = pci_get_drvdata(pci);
1479 struct es1938 *chip = card->private_data;
1da177e4
LT		 1480 unsigned char *s, *d;
1481
b34a580e 1482 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1da177e4
LT		 1483 snd_pcm_suspend_all(chip->pcm);
1484
1485 /* save mixer-related registers */
1486 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1487 *d = snd_es1938_reg_read(chip, *s);
1488
1489 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
30b35399
TI		 1490 if (chip->irq >= 0) {
1491 synchronize_irq(chip->irq);
b34a580e 1492 free_irq(chip->irq, chip);
30b35399
TI		 1493 chip->irq = -1;
1494 }
b34a580e
TI		 1495 pci_disable_device(pci);
1496 pci_save_state(pci);
30b35399 1497 pci_set_power_state(pci, pci_choose_state(pci, state));
1da177e4
LT		 1498 return 0;
1499}
1500
b34a580e 1501static int es1938_resume(struct pci_dev *pci)
1da177e4 1502{
b34a580e
TI		 1503 struct snd_card *card = pci_get_drvdata(pci);
1504 struct es1938 *chip = card->private_data;
1da177e4
LT		 1505 unsigned char *s, *d;
1506
30b35399 1507 pci_set_power_state(pci, PCI_D0);
b34a580e 1508 pci_restore_state(pci);
30b35399
TI		 1509 if (pci_enable_device(pci) < 0) {
1510 printk(KERN_ERR "es1938: pci_enable_device failed, "
1511 "disabling device\n");
1512 snd_card_disconnect(card);
1513 return -EIO;
1514 }
1515
1516 if (request_irq(pci->irq, snd_es1938_interrupt,
437a5a46 1517 IRQF_SHARED, "ES1938", chip)) {
30b35399
TI		 1518 printk(KERN_ERR "es1938: unable to grab IRQ %d, "
1519 "disabling device\n", pci->irq);
1520 snd_card_disconnect(card);
1521 return -EIO;
1522 }
b34a580e 1523 chip->irq = pci->irq;
1da177e4
LT		 1524 snd_es1938_chip_init(chip);
1525
1526 /* restore mixer-related registers */
1527 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1528 if (*s < 0xa0)
1529 snd_es1938_mixer_write(chip, *s, *d);
1530 else
1531 snd_es1938_write(chip, *s, *d);
1532 }
1533
b34a580e 1534 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1da177e4
LT		 1535 return 0;
1536}
1537#endif /* CONFIG_PM */
1538
1539#ifdef SUPPORT_JOYSTICK
e571f594 1540static int __devinit snd_es1938_create_gameport(struct es1938 *chip)
1da177e4
LT		 1541{
1542 struct gameport *gp;
1543
1544 chip->gameport = gp = gameport_allocate_port();
1545 if (!gp) {
1546 printk(KERN_ERR "es1938: cannot allocate memory for gameport\n");
1547 return -ENOMEM;
1548 }
1549
1550 gameport_set_name(gp, "ES1938");
1551 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1552 gameport_set_dev_parent(gp, &chip->pci->dev);
1553 gp->io = chip->game_port;
1554
1555 gameport_register_port(gp);
1556
1557 return 0;
1558}
1559
e571f594 1560static void snd_es1938_free_gameport(struct es1938 *chip)
1da177e4
LT		 1561{
1562 if (chip->gameport) {
1563 gameport_unregister_port(chip->gameport);
1564 chip->gameport = NULL;
1565 }
1566}
1567#else
e571f594
TI		 1568static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1569static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1da177e4
LT		 1570#endif /* SUPPORT_JOYSTICK */
1571
e571f594 1572static int snd_es1938_free(struct es1938 *chip)
1da177e4
LT		 1573{
1574 /* disable irqs */
1575 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1576 if (chip->rmidi)
1577 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1578
1579 snd_es1938_free_gameport(chip);
1580
30b35399
TI		 1581 if (chip->irq >= 0) {
1582 synchronize_irq(chip->irq);
e571f594 1583 free_irq(chip->irq, chip);
30b35399 1584 }
1da177e4
LT		 1585 pci_release_regions(chip->pci);
1586 pci_disable_device(chip->pci);
1587 kfree(chip);
1588 return 0;
1589}
1590
e571f594 1591static int snd_es1938_dev_free(struct snd_device *device)
1da177e4 1592{
e571f594 1593 struct es1938 *chip = device->device_data;
1da177e4
LT		 1594 return snd_es1938_free(chip);
1595}
1596
e571f594 1597static int __devinit snd_es1938_create(struct snd_card *card,
1da177e4 1598 struct pci_dev * pci,
e571f594 1599 struct es1938 ** rchip)
1da177e4 1600{
e571f594 1601 struct es1938 *chip;
1da177e4 1602 int err;
e571f594 1603 static struct snd_device_ops ops = {
1da177e4
LT		 1604 .dev_free = snd_es1938_dev_free,
1605 };
1606
1607 *rchip = NULL;
1608
1609 /* enable PCI device */
1610 if ((err = pci_enable_device(pci)) < 0)
1611 return err;
1612 /* check, if we can restrict PCI DMA transfers to 24 bits */
910638ae
MG		 1613 if (pci_set_dma_mask(pci, DMA_24BIT_MASK) < 0 ||
1614 pci_set_consistent_dma_mask(pci, DMA_24BIT_MASK) < 0) {
99b359ba 1615 snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
1da177e4
LT		 1616 pci_disable_device(pci);
1617 return -ENXIO;
1618 }
1619
e560d8d8 1620 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 1621 if (chip == NULL) {
1622 pci_disable_device(pci);
1623 return -ENOMEM;
1624 }
1625 spin_lock_init(&chip->reg_lock);
1626 spin_lock_init(&chip->mixer_lock);
1627 chip->card = card;
1628 chip->pci = pci;
30b35399 1629 chip->irq = -1;
1da177e4
LT		 1630 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1631 kfree(chip);
1632 pci_disable_device(pci);
1633 return err;
1634 }
1635 chip->io_port = pci_resource_start(pci, 0);
1636 chip->sb_port = pci_resource_start(pci, 1);
1637 chip->vc_port = pci_resource_start(pci, 2);
1638 chip->mpu_port = pci_resource_start(pci, 3);
1639 chip->game_port = pci_resource_start(pci, 4);
437a5a46 1640 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
e571f594 1641 "ES1938", chip)) {
99b359ba 1642 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1da177e4
LT		 1643 snd_es1938_free(chip);
1644 return -EBUSY;
1645 }
1646 chip->irq = pci->irq;
1647#ifdef ES1938_DDEBUG
99b359ba 1648 snd_printk(KERN_DEBUG "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1da177e4
LT		 1649 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1650#endif
1651
1652 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1653
1654 snd_es1938_chip_init(chip);
1655
1da177e4
LT		 1656 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1657 snd_es1938_free(chip);
1658 return err;
1659 }
1660
1661 snd_card_set_dev(card, &pci->dev);
1662
1663 *rchip = chip;
1664 return 0;
1665}
1666
1667/* --------------------------------------------------------------------
1668 * Interrupt handler
1669 * -------------------------------------------------------------------- */
7d12e780 1670static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1da177e4 1671{
e571f594 1672 struct es1938 *chip = dev_id;
1da177e4
LT		 1673 unsigned char status, audiostatus;
1674 int handled = 0;
1675
1676 status = inb(SLIO_REG(chip, IRQCONTROL));
1677#if 0
1678 printk("Es1938debug - interrupt status: =0x%x\n", status);
1679#endif
1680
1681 /* AUDIO 1 */
1682 if (status & 0x10) {
1683#if 0
1684 printk("Es1938debug - AUDIO channel 1 interrupt\n");
e571f594
TI		 1685 printk("Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1686 inw(SLDM_REG(chip, DMACOUNT)));
1687 printk("Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1688 inl(SLDM_REG(chip, DMAADDR)));
1689 printk("Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1690 inl(SLDM_REG(chip, DMASTATUS)));
1da177e4
LT		 1691#endif
1692 /* clear irq */
1693 handled = 1;
1694 audiostatus = inb(SLSB_REG(chip, STATUS));
1695 if (chip->active & ADC1)
1696 snd_pcm_period_elapsed(chip->capture_substream);
1697 else if (chip->active & DAC1)
1698 snd_pcm_period_elapsed(chip->playback2_substream);
1699 }
1700
1701 /* AUDIO 2 */
1702 if (status & 0x20) {
1703#if 0
1704 printk("Es1938debug - AUDIO channel 2 interrupt\n");
e571f594
TI		 1705 printk("Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1706 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1707 printk("Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1708 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1da177e4
LT		 1709
1710#endif
1711 /* clear irq */
1712 handled = 1;
1713 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1714 if (chip->active & DAC2)
1715 snd_pcm_period_elapsed(chip->playback1_substream);
1716 }
1717
1718 /* Hardware volume */
1719 if (status & 0x40) {
1720 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1721 handled = 1;
1722 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1723 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1724 if (!split) {
e571f594
TI		 1725 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1726 &chip->master_switch->id);
1727 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1728 &chip->master_volume->id);
1da177e4
LT		 1729 }
1730 /* ack interrupt */
1731 snd_es1938_mixer_write(chip, 0x66, 0x00);
1732 }
1733
1734 /* MPU401 */
1735 if (status & 0x80) {
1736 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1737 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1738 // andreas@flying-snail.de
1739 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1740 if (chip->rmidi) {
1741 handled = 1;
7d12e780 1742 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1da177e4
LT		 1743 }
1744 }
1745 return IRQ_RETVAL(handled);
1746}
1747
1748#define ES1938_DMA_SIZE 64
1749
e571f594 1750static int __devinit snd_es1938_mixer(struct es1938 *chip)
1da177e4 1751{
e571f594 1752 struct snd_card *card;
1da177e4
LT		 1753 unsigned int idx;
1754 int err;
1755
1756 card = chip->card;
1757
1758 strcpy(card->mixername, "ESS Solo-1");
1759
1760 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
e571f594 1761 struct snd_kcontrol *kctl;
1da177e4
LT		 1762 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1763 switch (idx) {
1764 case 0:
1765 chip->master_volume = kctl;
1766 kctl->private_free = snd_es1938_hwv_free;
1767 break;
1768 case 1:
1769 chip->master_switch = kctl;
1770 kctl->private_free = snd_es1938_hwv_free;
1771 break;
1772 case 2:
1773 chip->hw_volume = kctl;
1774 kctl->private_free = snd_es1938_hwv_free;
1775 break;
1776 case 3:
1777 chip->hw_switch = kctl;
1778 kctl->private_free = snd_es1938_hwv_free;
1779 break;
1780 }
1781 if ((err = snd_ctl_add(card, kctl)) < 0)
1782 return err;
1783 }
1784 return 0;
1785}
1786
1787
1788static int __devinit snd_es1938_probe(struct pci_dev *pci,
1789 const struct pci_device_id *pci_id)
1790{
1791 static int dev;
e571f594
TI		 1792 struct snd_card *card;
1793 struct es1938 *chip;
1794 struct snd_opl3 *opl3;
1da177e4
LT		 1795 int idx, err;
1796
1797 if (dev >= SNDRV_CARDS)
1798 return -ENODEV;
1799 if (!enable[dev]) {
1800 dev++;
1801 return -ENOENT;
1802 }
1803
1804 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1805 if (card == NULL)
1806 return -ENOMEM;
1807 for (idx = 0; idx < 5; idx++) {
1808 if (pci_resource_start(pci, idx) == 0 ||
1809 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1810 snd_card_free(card);
1811 return -ENODEV;
1812 }
1813 }
1814 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1815 snd_card_free(card);
1816 return err;
1817 }
b34a580e 1818 card->private_data = chip;
1da177e4
LT		 1819
1820 strcpy(card->driver, "ES1938");
1821 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1822 sprintf(card->longname, "%s rev %i, irq %i",
1823 card->shortname,
1824 chip->revision,
1825 chip->irq);
1826
1827 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1828 snd_card_free(card);
1829 return err;
1830 }
1831 if ((err = snd_es1938_mixer(chip)) < 0) {
1832 snd_card_free(card);
1833 return err;
1834 }
1835 if (snd_opl3_create(card,
1836 SLSB_REG(chip, FMLOWADDR),
1837 SLSB_REG(chip, FMHIGHADDR),
1838 OPL3_HW_OPL3, 1, &opl3) < 0) {
1839 printk(KERN_ERR "es1938: OPL3 not detected at 0x%lx\n",
1840 SLSB_REG(chip, FMLOWADDR));
1841 } else {
1842 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1843 snd_card_free(card);
1844 return err;
1845 }
1846 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1847 snd_card_free(card);
1848 return err;
1849 }
1850 }
1851 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
302e4c2f
TI		 1852 chip->mpu_port, MPU401_INFO_INTEGRATED,
1853 chip->irq, 0, &chip->rmidi) < 0) {
1da177e4
LT		 1854 printk(KERN_ERR "es1938: unable to initialize MPU-401\n");
1855 } else {
1856 // this line is vital for MIDI interrupt handling on ess-solo1
1857 // andreas@flying-snail.de
1858 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1859 }
1860
1861 snd_es1938_create_gameport(chip);
1862
1863 if ((err = snd_card_register(card)) < 0) {
1864 snd_card_free(card);
1865 return err;
1866 }
1867
1868 pci_set_drvdata(pci, card);
1869 dev++;
1870 return 0;
1871}
1872
1873static void __devexit snd_es1938_remove(struct pci_dev *pci)
1874{
1875 snd_card_free(pci_get_drvdata(pci));
1876 pci_set_drvdata(pci, NULL);
1877}
1878
1879static struct pci_driver driver = {
1880 .name = "ESS ES1938 (Solo-1)",
1881 .id_table = snd_es1938_ids,
1882 .probe = snd_es1938_probe,
1883 .remove = __devexit_p(snd_es1938_remove),
b34a580e
TI		 1884#ifdef CONFIG_PM
1885 .suspend = es1938_suspend,
1886 .resume = es1938_resume,
1887#endif
1da177e4
LT		 1888};
1889
1890static int __init alsa_card_es1938_init(void)
1891{
01d25d46 1892 return pci_register_driver(&driver);
1da177e4
LT		 1893}
1894
1895static void __exit alsa_card_es1938_exit(void)
1896{
1897 pci_unregister_driver(&driver);
1898}
1899
1900module_init(alsa_card_es1938_init)
1901module_exit(alsa_card_es1938_exit)
kernel source for telekom puls (alcatel/mediatek)