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12bb5b78 CL |
1 | /* Analog Devices 1889 audio driver |
2 | * | |
3 | * This is a driver for the AD1889 PCI audio chipset found | |
4 | * on the HP PA-RISC [BCJ]-xxx0 workstations. | |
5 | * | |
6 | * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> | |
7 | * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> | |
8 | * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License, version 2, as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | * TODO: | |
24 | * Do we need to take care of CCS register? | |
25 | * Maybe we could use finer grained locking (separate locks for pb/cap)? | |
26 | * Wishlist: | |
27 | * Control Interface (mixer) support | |
28 | * Better AC97 support (VSR...)? | |
29 | * PM support | |
30 | * MIDI support | |
31 | * Game Port support | |
32 | * SG DMA support (this will need *alot* of work) | |
33 | */ | |
34 | ||
35 | #include <linux/init.h> | |
36 | #include <linux/pci.h> | |
9d2f928d | 37 | #include <linux/dma-mapping.h> |
12bb5b78 CL |
38 | #include <linux/slab.h> |
39 | #include <linux/interrupt.h> | |
40 | #include <linux/compiler.h> | |
41 | #include <linux/delay.h> | |
42 | ||
12bb5b78 CL |
43 | #include <sound/core.h> |
44 | #include <sound/pcm.h> | |
45 | #include <sound/initval.h> | |
46 | #include <sound/ac97_codec.h> | |
47 | ||
48 | #include <asm/io.h> | |
49 | ||
50 | #include "ad1889.h" | |
51 | #include "ac97/ac97_id.h" | |
52 | ||
c6f43290 | 53 | #define AD1889_DRVVER "Version: 1.7" |
12bb5b78 CL |
54 | |
55 | MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); | |
56 | MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); | |
57 | MODULE_LICENSE("GPL"); | |
58 | MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}"); | |
59 | ||
60 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; | |
61 | module_param_array(index, int, NULL, 0444); | |
62 | MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); | |
63 | ||
64 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; | |
65 | module_param_array(id, charp, NULL, 0444); | |
66 | MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); | |
67 | ||
68 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
69 | module_param_array(enable, bool, NULL, 0444); | |
70 | MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); | |
71 | ||
72 | static char *ac97_quirk[SNDRV_CARDS]; | |
73 | module_param_array(ac97_quirk, charp, NULL, 0444); | |
74 | MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); | |
75 | ||
76 | #define DEVNAME "ad1889" | |
77 | #define PFX DEVNAME ": " | |
78 | ||
79 | /* let's use the global sound debug interfaces */ | |
80 | #define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg) | |
81 | ||
82 | /* keep track of some hw registers */ | |
83 | struct ad1889_register_state { | |
84 | u16 reg; /* reg setup */ | |
85 | u32 addr; /* dma base address */ | |
86 | unsigned long size; /* DMA buffer size */ | |
87 | }; | |
88 | ||
89 | struct snd_ad1889 { | |
02c2de69 | 90 | struct snd_card *card; |
12bb5b78 CL |
91 | struct pci_dev *pci; |
92 | ||
93 | int irq; | |
94 | unsigned long bar; | |
95 | void __iomem *iobase; | |
96 | ||
02c2de69 TI |
97 | struct snd_ac97 *ac97; |
98 | struct snd_ac97_bus *ac97_bus; | |
99 | struct snd_pcm *pcm; | |
100 | struct snd_info_entry *proc; | |
12bb5b78 | 101 | |
02c2de69 TI |
102 | struct snd_pcm_substream *psubs; |
103 | struct snd_pcm_substream *csubs; | |
12bb5b78 CL |
104 | |
105 | /* playback register state */ | |
106 | struct ad1889_register_state wave; | |
107 | struct ad1889_register_state ramc; | |
108 | ||
109 | spinlock_t lock; | |
110 | }; | |
111 | ||
112 | static inline u16 | |
113 | ad1889_readw(struct snd_ad1889 *chip, unsigned reg) | |
114 | { | |
115 | return readw(chip->iobase + reg); | |
116 | } | |
117 | ||
118 | static inline void | |
119 | ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) | |
120 | { | |
121 | writew(val, chip->iobase + reg); | |
122 | } | |
123 | ||
124 | static inline u32 | |
125 | ad1889_readl(struct snd_ad1889 *chip, unsigned reg) | |
126 | { | |
127 | return readl(chip->iobase + reg); | |
128 | } | |
129 | ||
130 | static inline void | |
131 | ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) | |
132 | { | |
133 | writel(val, chip->iobase + reg); | |
134 | } | |
135 | ||
136 | static inline void | |
137 | ad1889_unmute(struct snd_ad1889 *chip) | |
138 | { | |
139 | u16 st; | |
140 | st = ad1889_readw(chip, AD_DS_WADA) & | |
141 | ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); | |
142 | ad1889_writew(chip, AD_DS_WADA, st); | |
143 | ad1889_readw(chip, AD_DS_WADA); | |
144 | } | |
145 | ||
146 | static inline void | |
147 | ad1889_mute(struct snd_ad1889 *chip) | |
148 | { | |
149 | u16 st; | |
150 | st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; | |
151 | ad1889_writew(chip, AD_DS_WADA, st); | |
152 | ad1889_readw(chip, AD_DS_WADA); | |
153 | } | |
154 | ||
155 | static inline void | |
156 | ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) | |
157 | { | |
158 | ad1889_writel(chip, AD_DMA_ADCBA, address); | |
159 | ad1889_writel(chip, AD_DMA_ADCCA, address); | |
160 | } | |
161 | ||
162 | static inline void | |
163 | ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) | |
164 | { | |
165 | ad1889_writel(chip, AD_DMA_ADCBC, count); | |
166 | ad1889_writel(chip, AD_DMA_ADCCC, count); | |
167 | } | |
168 | ||
169 | static inline void | |
170 | ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) | |
171 | { | |
172 | ad1889_writel(chip, AD_DMA_ADCIB, count); | |
173 | ad1889_writel(chip, AD_DMA_ADCIC, count); | |
174 | } | |
175 | ||
176 | static inline void | |
177 | ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) | |
178 | { | |
179 | ad1889_writel(chip, AD_DMA_WAVBA, address); | |
180 | ad1889_writel(chip, AD_DMA_WAVCA, address); | |
181 | } | |
182 | ||
183 | static inline void | |
184 | ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) | |
185 | { | |
186 | ad1889_writel(chip, AD_DMA_WAVBC, count); | |
187 | ad1889_writel(chip, AD_DMA_WAVCC, count); | |
188 | } | |
189 | ||
190 | static inline void | |
191 | ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) | |
192 | { | |
193 | ad1889_writel(chip, AD_DMA_WAVIB, count); | |
194 | ad1889_writel(chip, AD_DMA_WAVIC, count); | |
195 | } | |
196 | ||
197 | static void | |
198 | ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) | |
199 | { | |
200 | u16 reg; | |
201 | ||
202 | if (channel & AD_CHAN_WAV) { | |
203 | /* Disable wave channel */ | |
204 | reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; | |
205 | ad1889_writew(chip, AD_DS_WSMC, reg); | |
206 | chip->wave.reg = reg; | |
207 | ||
208 | /* disable IRQs */ | |
209 | reg = ad1889_readw(chip, AD_DMA_WAV); | |
210 | reg &= AD_DMA_IM_DIS; | |
211 | reg &= ~AD_DMA_LOOP; | |
212 | ad1889_writew(chip, AD_DMA_WAV, reg); | |
213 | ||
214 | /* clear IRQ and address counters and pointers */ | |
215 | ad1889_load_wave_buffer_address(chip, 0x0); | |
216 | ad1889_load_wave_buffer_count(chip, 0x0); | |
217 | ad1889_load_wave_interrupt_count(chip, 0x0); | |
218 | ||
219 | /* flush */ | |
220 | ad1889_readw(chip, AD_DMA_WAV); | |
221 | } | |
222 | ||
223 | if (channel & AD_CHAN_ADC) { | |
224 | /* Disable ADC channel */ | |
225 | reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; | |
226 | ad1889_writew(chip, AD_DS_RAMC, reg); | |
227 | chip->ramc.reg = reg; | |
228 | ||
229 | reg = ad1889_readw(chip, AD_DMA_ADC); | |
230 | reg &= AD_DMA_IM_DIS; | |
231 | reg &= ~AD_DMA_LOOP; | |
232 | ad1889_writew(chip, AD_DMA_ADC, reg); | |
233 | ||
234 | ad1889_load_adc_buffer_address(chip, 0x0); | |
235 | ad1889_load_adc_buffer_count(chip, 0x0); | |
236 | ad1889_load_adc_interrupt_count(chip, 0x0); | |
237 | ||
238 | /* flush */ | |
239 | ad1889_readw(chip, AD_DMA_ADC); | |
240 | } | |
241 | } | |
242 | ||
f40b6890 | 243 | static u16 |
02c2de69 | 244 | snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
12bb5b78 CL |
245 | { |
246 | struct snd_ad1889 *chip = ac97->private_data; | |
247 | return ad1889_readw(chip, AD_AC97_BASE + reg); | |
248 | } | |
249 | ||
f40b6890 | 250 | static void |
02c2de69 | 251 | snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) |
12bb5b78 CL |
252 | { |
253 | struct snd_ad1889 *chip = ac97->private_data; | |
254 | ad1889_writew(chip, AD_AC97_BASE + reg, val); | |
255 | } | |
256 | ||
257 | static int | |
258 | snd_ad1889_ac97_ready(struct snd_ad1889 *chip) | |
259 | { | |
260 | int retry = 400; /* average needs 352 msec */ | |
261 | ||
262 | while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) | |
263 | && --retry) | |
264 | mdelay(1); | |
265 | if (!retry) { | |
266 | snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n", | |
9bf8e7dd | 267 | __func__); |
12bb5b78 CL |
268 | return -EIO; |
269 | } | |
9bf8e7dd | 270 | ad1889_debug("[%s] ready after %d ms\n", __func__, 400 - retry); |
12bb5b78 CL |
271 | |
272 | return 0; | |
273 | } | |
274 | ||
275 | static int | |
02c2de69 TI |
276 | snd_ad1889_hw_params(struct snd_pcm_substream *substream, |
277 | struct snd_pcm_hw_params *hw_params) | |
12bb5b78 CL |
278 | { |
279 | return snd_pcm_lib_malloc_pages(substream, | |
280 | params_buffer_bytes(hw_params)); | |
281 | } | |
282 | ||
283 | static int | |
02c2de69 | 284 | snd_ad1889_hw_free(struct snd_pcm_substream *substream) |
12bb5b78 CL |
285 | { |
286 | return snd_pcm_lib_free_pages(substream); | |
287 | } | |
288 | ||
02c2de69 | 289 | static struct snd_pcm_hardware snd_ad1889_playback_hw = { |
12bb5b78 CL |
290 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
291 | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, | |
292 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
293 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | |
294 | .rate_min = 8000, /* docs say 7000, but we're lazy */ | |
295 | .rate_max = 48000, | |
296 | .channels_min = 1, | |
297 | .channels_max = 2, | |
298 | .buffer_bytes_max = BUFFER_BYTES_MAX, | |
299 | .period_bytes_min = PERIOD_BYTES_MIN, | |
300 | .period_bytes_max = PERIOD_BYTES_MAX, | |
301 | .periods_min = PERIODS_MIN, | |
302 | .periods_max = PERIODS_MAX, | |
303 | /*.fifo_size = 0,*/ | |
304 | }; | |
305 | ||
02c2de69 | 306 | static struct snd_pcm_hardware snd_ad1889_capture_hw = { |
12bb5b78 CL |
307 | .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
308 | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, | |
309 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | |
310 | .rates = SNDRV_PCM_RATE_48000, | |
311 | .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ | |
312 | .rate_max = 48000, | |
313 | .channels_min = 1, | |
314 | .channels_max = 2, | |
315 | .buffer_bytes_max = BUFFER_BYTES_MAX, | |
316 | .period_bytes_min = PERIOD_BYTES_MIN, | |
317 | .period_bytes_max = PERIOD_BYTES_MAX, | |
318 | .periods_min = PERIODS_MIN, | |
319 | .periods_max = PERIODS_MAX, | |
320 | /*.fifo_size = 0,*/ | |
321 | }; | |
322 | ||
323 | static int | |
02c2de69 | 324 | snd_ad1889_playback_open(struct snd_pcm_substream *ss) |
12bb5b78 CL |
325 | { |
326 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 327 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
328 | |
329 | chip->psubs = ss; | |
330 | rt->hw = snd_ad1889_playback_hw; | |
331 | ||
332 | return 0; | |
333 | } | |
334 | ||
335 | static int | |
02c2de69 | 336 | snd_ad1889_capture_open(struct snd_pcm_substream *ss) |
12bb5b78 CL |
337 | { |
338 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 339 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
340 | |
341 | chip->csubs = ss; | |
342 | rt->hw = snd_ad1889_capture_hw; | |
343 | ||
344 | return 0; | |
345 | } | |
346 | ||
347 | static int | |
02c2de69 | 348 | snd_ad1889_playback_close(struct snd_pcm_substream *ss) |
12bb5b78 CL |
349 | { |
350 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
351 | chip->psubs = NULL; | |
352 | return 0; | |
353 | } | |
354 | ||
355 | static int | |
02c2de69 | 356 | snd_ad1889_capture_close(struct snd_pcm_substream *ss) |
12bb5b78 CL |
357 | { |
358 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
359 | chip->csubs = NULL; | |
360 | return 0; | |
361 | } | |
362 | ||
363 | static int | |
02c2de69 | 364 | snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) |
12bb5b78 CL |
365 | { |
366 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 367 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
368 | unsigned int size = snd_pcm_lib_buffer_bytes(ss); |
369 | unsigned int count = snd_pcm_lib_period_bytes(ss); | |
370 | u16 reg; | |
371 | ||
372 | ad1889_channel_reset(chip, AD_CHAN_WAV); | |
373 | ||
374 | reg = ad1889_readw(chip, AD_DS_WSMC); | |
375 | ||
376 | /* Mask out 16-bit / Stereo */ | |
377 | reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); | |
378 | ||
379 | if (snd_pcm_format_width(rt->format) == 16) | |
380 | reg |= AD_DS_WSMC_WA16; | |
381 | ||
382 | if (rt->channels > 1) | |
383 | reg |= AD_DS_WSMC_WAST; | |
384 | ||
385 | /* let's make sure we don't clobber ourselves */ | |
386 | spin_lock_irq(&chip->lock); | |
387 | ||
388 | chip->wave.size = size; | |
389 | chip->wave.reg = reg; | |
390 | chip->wave.addr = rt->dma_addr; | |
391 | ||
392 | ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); | |
393 | ||
394 | /* Set sample rates on the codec */ | |
395 | ad1889_writew(chip, AD_DS_WAS, rt->rate); | |
396 | ||
397 | /* Set up DMA */ | |
398 | ad1889_load_wave_buffer_address(chip, chip->wave.addr); | |
399 | ad1889_load_wave_buffer_count(chip, size); | |
400 | ad1889_load_wave_interrupt_count(chip, count); | |
401 | ||
402 | /* writes flush */ | |
403 | ad1889_readw(chip, AD_DS_WSMC); | |
404 | ||
405 | spin_unlock_irq(&chip->lock); | |
406 | ||
407 | ad1889_debug("prepare playback: addr = 0x%x, count = %u, " | |
408 | "size = %u, reg = 0x%x, rate = %u\n", chip->wave.addr, | |
409 | count, size, reg, rt->rate); | |
410 | return 0; | |
411 | } | |
412 | ||
413 | static int | |
02c2de69 | 414 | snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) |
12bb5b78 CL |
415 | { |
416 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
02c2de69 | 417 | struct snd_pcm_runtime *rt = ss->runtime; |
12bb5b78 CL |
418 | unsigned int size = snd_pcm_lib_buffer_bytes(ss); |
419 | unsigned int count = snd_pcm_lib_period_bytes(ss); | |
420 | u16 reg; | |
421 | ||
422 | ad1889_channel_reset(chip, AD_CHAN_ADC); | |
423 | ||
424 | reg = ad1889_readw(chip, AD_DS_RAMC); | |
425 | ||
426 | /* Mask out 16-bit / Stereo */ | |
427 | reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); | |
428 | ||
429 | if (snd_pcm_format_width(rt->format) == 16) | |
430 | reg |= AD_DS_RAMC_AD16; | |
431 | ||
432 | if (rt->channels > 1) | |
433 | reg |= AD_DS_RAMC_ADST; | |
434 | ||
435 | /* let's make sure we don't clobber ourselves */ | |
436 | spin_lock_irq(&chip->lock); | |
437 | ||
438 | chip->ramc.size = size; | |
439 | chip->ramc.reg = reg; | |
440 | chip->ramc.addr = rt->dma_addr; | |
441 | ||
442 | ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); | |
443 | ||
444 | /* Set up DMA */ | |
445 | ad1889_load_adc_buffer_address(chip, chip->ramc.addr); | |
446 | ad1889_load_adc_buffer_count(chip, size); | |
447 | ad1889_load_adc_interrupt_count(chip, count); | |
448 | ||
449 | /* writes flush */ | |
450 | ad1889_readw(chip, AD_DS_RAMC); | |
451 | ||
452 | spin_unlock_irq(&chip->lock); | |
453 | ||
454 | ad1889_debug("prepare capture: addr = 0x%x, count = %u, " | |
455 | "size = %u, reg = 0x%x, rate = %u\n", chip->ramc.addr, | |
456 | count, size, reg, rt->rate); | |
457 | return 0; | |
458 | } | |
459 | ||
460 | /* this is called in atomic context with IRQ disabled. | |
461 | Must be as fast as possible and not sleep. | |
462 | DMA should be *triggered* by this call. | |
463 | The WSMC "WAEN" bit triggers DMA Wave On/Off */ | |
464 | static int | |
02c2de69 | 465 | snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) |
12bb5b78 CL |
466 | { |
467 | u16 wsmc; | |
468 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
469 | ||
470 | wsmc = ad1889_readw(chip, AD_DS_WSMC); | |
471 | ||
472 | switch (cmd) { | |
473 | case SNDRV_PCM_TRIGGER_START: | |
474 | /* enable DMA loop & interrupts */ | |
475 | ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); | |
476 | wsmc |= AD_DS_WSMC_WAEN; | |
477 | /* 1 to clear CHSS bit */ | |
478 | ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); | |
479 | ad1889_unmute(chip); | |
480 | break; | |
481 | case SNDRV_PCM_TRIGGER_STOP: | |
482 | ad1889_mute(chip); | |
483 | wsmc &= ~AD_DS_WSMC_WAEN; | |
484 | break; | |
485 | default: | |
486 | snd_BUG(); | |
487 | return -EINVAL; | |
488 | } | |
489 | ||
490 | chip->wave.reg = wsmc; | |
491 | ad1889_writew(chip, AD_DS_WSMC, wsmc); | |
492 | ad1889_readw(chip, AD_DS_WSMC); /* flush */ | |
493 | ||
494 | /* reset the chip when STOP - will disable IRQs */ | |
495 | if (cmd == SNDRV_PCM_TRIGGER_STOP) | |
496 | ad1889_channel_reset(chip, AD_CHAN_WAV); | |
497 | ||
498 | return 0; | |
499 | } | |
500 | ||
501 | /* this is called in atomic context with IRQ disabled. | |
502 | Must be as fast as possible and not sleep. | |
503 | DMA should be *triggered* by this call. | |
504 | The RAMC "ADEN" bit triggers DMA ADC On/Off */ | |
505 | static int | |
02c2de69 | 506 | snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) |
12bb5b78 CL |
507 | { |
508 | u16 ramc; | |
509 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
510 | ||
511 | ramc = ad1889_readw(chip, AD_DS_RAMC); | |
512 | ||
513 | switch (cmd) { | |
514 | case SNDRV_PCM_TRIGGER_START: | |
515 | /* enable DMA loop & interrupts */ | |
516 | ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); | |
517 | ramc |= AD_DS_RAMC_ADEN; | |
518 | /* 1 to clear CHSS bit */ | |
519 | ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); | |
520 | break; | |
521 | case SNDRV_PCM_TRIGGER_STOP: | |
522 | ramc &= ~AD_DS_RAMC_ADEN; | |
523 | break; | |
524 | default: | |
525 | return -EINVAL; | |
526 | } | |
527 | ||
528 | chip->ramc.reg = ramc; | |
529 | ad1889_writew(chip, AD_DS_RAMC, ramc); | |
530 | ad1889_readw(chip, AD_DS_RAMC); /* flush */ | |
531 | ||
532 | /* reset the chip when STOP - will disable IRQs */ | |
533 | if (cmd == SNDRV_PCM_TRIGGER_STOP) | |
534 | ad1889_channel_reset(chip, AD_CHAN_ADC); | |
535 | ||
536 | return 0; | |
537 | } | |
538 | ||
539 | /* Called in atomic context with IRQ disabled */ | |
540 | static snd_pcm_uframes_t | |
02c2de69 | 541 | snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) |
12bb5b78 CL |
542 | { |
543 | size_t ptr = 0; | |
544 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
545 | ||
546 | if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) | |
547 | return 0; | |
548 | ||
549 | ptr = ad1889_readl(chip, AD_DMA_WAVCA); | |
550 | ptr -= chip->wave.addr; | |
551 | ||
552 | snd_assert((ptr >= 0) && (ptr < chip->wave.size), return 0); | |
553 | ||
554 | return bytes_to_frames(ss->runtime, ptr); | |
555 | } | |
556 | ||
557 | /* Called in atomic context with IRQ disabled */ | |
558 | static snd_pcm_uframes_t | |
02c2de69 | 559 | snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) |
12bb5b78 CL |
560 | { |
561 | size_t ptr = 0; | |
562 | struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); | |
563 | ||
564 | if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) | |
565 | return 0; | |
566 | ||
567 | ptr = ad1889_readl(chip, AD_DMA_ADCCA); | |
568 | ptr -= chip->ramc.addr; | |
569 | ||
570 | snd_assert((ptr >= 0) && (ptr < chip->ramc.size), return 0); | |
571 | ||
572 | return bytes_to_frames(ss->runtime, ptr); | |
573 | } | |
574 | ||
02c2de69 | 575 | static struct snd_pcm_ops snd_ad1889_playback_ops = { |
12bb5b78 CL |
576 | .open = snd_ad1889_playback_open, |
577 | .close = snd_ad1889_playback_close, | |
578 | .ioctl = snd_pcm_lib_ioctl, | |
579 | .hw_params = snd_ad1889_hw_params, | |
580 | .hw_free = snd_ad1889_hw_free, | |
581 | .prepare = snd_ad1889_playback_prepare, | |
582 | .trigger = snd_ad1889_playback_trigger, | |
583 | .pointer = snd_ad1889_playback_pointer, | |
584 | }; | |
585 | ||
02c2de69 | 586 | static struct snd_pcm_ops snd_ad1889_capture_ops = { |
12bb5b78 CL |
587 | .open = snd_ad1889_capture_open, |
588 | .close = snd_ad1889_capture_close, | |
589 | .ioctl = snd_pcm_lib_ioctl, | |
590 | .hw_params = snd_ad1889_hw_params, | |
591 | .hw_free = snd_ad1889_hw_free, | |
592 | .prepare = snd_ad1889_capture_prepare, | |
593 | .trigger = snd_ad1889_capture_trigger, | |
594 | .pointer = snd_ad1889_capture_pointer, | |
595 | }; | |
596 | ||
597 | static irqreturn_t | |
7d12e780 | 598 | snd_ad1889_interrupt(int irq, void *dev_id) |
12bb5b78 CL |
599 | { |
600 | unsigned long st; | |
601 | struct snd_ad1889 *chip = dev_id; | |
602 | ||
603 | st = ad1889_readl(chip, AD_DMA_DISR); | |
604 | ||
605 | /* clear ISR */ | |
606 | ad1889_writel(chip, AD_DMA_DISR, st); | |
607 | ||
608 | st &= AD_INTR_MASK; | |
609 | ||
610 | if (unlikely(!st)) | |
611 | return IRQ_NONE; | |
612 | ||
613 | if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) | |
614 | ad1889_debug("Unexpected master or target abort interrupt!\n"); | |
615 | ||
616 | if ((st & AD_DMA_DISR_WAVI) && chip->psubs) | |
617 | snd_pcm_period_elapsed(chip->psubs); | |
618 | if ((st & AD_DMA_DISR_ADCI) && chip->csubs) | |
619 | snd_pcm_period_elapsed(chip->csubs); | |
620 | ||
621 | return IRQ_HANDLED; | |
622 | } | |
623 | ||
12bb5b78 | 624 | static int __devinit |
02c2de69 | 625 | snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm) |
12bb5b78 CL |
626 | { |
627 | int err; | |
02c2de69 | 628 | struct snd_pcm *pcm; |
12bb5b78 CL |
629 | |
630 | if (rpcm) | |
631 | *rpcm = NULL; | |
632 | ||
633 | err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); | |
634 | if (err < 0) | |
635 | return err; | |
636 | ||
637 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, | |
638 | &snd_ad1889_playback_ops); | |
639 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, | |
640 | &snd_ad1889_capture_ops); | |
641 | ||
642 | pcm->private_data = chip; | |
12bb5b78 CL |
643 | pcm->info_flags = 0; |
644 | strcpy(pcm->name, chip->card->shortname); | |
645 | ||
646 | chip->pcm = pcm; | |
647 | chip->psubs = NULL; | |
648 | chip->csubs = NULL; | |
649 | ||
650 | err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
651 | snd_dma_pci_data(chip->pci), | |
652 | BUFFER_BYTES_MAX / 2, | |
653 | BUFFER_BYTES_MAX); | |
654 | ||
655 | if (err < 0) { | |
656 | snd_printk(KERN_ERR PFX "buffer allocation error: %d\n", err); | |
657 | return err; | |
658 | } | |
659 | ||
660 | if (rpcm) | |
661 | *rpcm = pcm; | |
662 | ||
663 | return 0; | |
664 | } | |
665 | ||
666 | static void | |
02c2de69 | 667 | snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) |
12bb5b78 CL |
668 | { |
669 | struct snd_ad1889 *chip = entry->private_data; | |
670 | u16 reg; | |
671 | int tmp; | |
672 | ||
673 | reg = ad1889_readw(chip, AD_DS_WSMC); | |
674 | snd_iprintf(buffer, "Wave output: %s\n", | |
675 | (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled"); | |
676 | snd_iprintf(buffer, "Wave Channels: %s\n", | |
677 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
678 | snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", | |
679 | (reg & AD_DS_WSMC_WA16) ? 16 : 8); | |
680 | ||
681 | /* WARQ is at offset 12 */ | |
682 | tmp = (reg & AD_DS_WSMC_WARQ) ? | |
683 | (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4; | |
684 | tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; | |
685 | ||
686 | snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, | |
687 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
688 | ||
689 | ||
690 | snd_iprintf(buffer, "Synthesis output: %s\n", | |
691 | reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled"); | |
692 | ||
693 | /* SYRQ is at offset 4 */ | |
694 | tmp = (reg & AD_DS_WSMC_SYRQ) ? | |
695 | (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4; | |
696 | tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; | |
697 | ||
698 | snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, | |
699 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
700 | ||
701 | reg = ad1889_readw(chip, AD_DS_RAMC); | |
702 | snd_iprintf(buffer, "ADC input: %s\n", | |
703 | (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled"); | |
704 | snd_iprintf(buffer, "ADC Channels: %s\n", | |
705 | (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); | |
706 | snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", | |
707 | (reg & AD_DS_RAMC_AD16) ? 16 : 8); | |
708 | ||
709 | /* ACRQ is at offset 4 */ | |
710 | tmp = (reg & AD_DS_RAMC_ACRQ) ? | |
711 | (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4; | |
712 | tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; | |
713 | ||
714 | snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, | |
715 | (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); | |
716 | ||
717 | snd_iprintf(buffer, "Resampler input: %s\n", | |
718 | reg & AD_DS_RAMC_REEN ? "enabled" : "disabled"); | |
719 | ||
720 | /* RERQ is at offset 12 */ | |
721 | tmp = (reg & AD_DS_RAMC_RERQ) ? | |
722 | (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4; | |
723 | tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; | |
724 | ||
725 | snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, | |
726 | (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); | |
727 | ||
728 | ||
729 | /* doc says LSB represents -1.5dB, but the max value (-94.5dB) | |
730 | suggests that LSB is -3dB, which is more coherent with the logarithmic | |
731 | nature of the dB scale */ | |
732 | reg = ad1889_readw(chip, AD_DS_WADA); | |
733 | snd_iprintf(buffer, "Left: %s, -%d dB\n", | |
734 | (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", | |
735 | ((reg & AD_DS_WADA_LWAA) >> 8) * 3); | |
736 | reg = ad1889_readw(chip, AD_DS_WADA); | |
737 | snd_iprintf(buffer, "Right: %s, -%d dB\n", | |
738 | (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", | |
739 | ((reg & AD_DS_WADA_RWAA) >> 8) * 3); | |
740 | ||
741 | reg = ad1889_readw(chip, AD_DS_WAS); | |
742 | snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); | |
743 | reg = ad1889_readw(chip, AD_DS_RES); | |
744 | snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); | |
745 | } | |
746 | ||
747 | static void __devinit | |
748 | snd_ad1889_proc_init(struct snd_ad1889 *chip) | |
749 | { | |
02c2de69 | 750 | struct snd_info_entry *entry; |
12bb5b78 CL |
751 | |
752 | if (!snd_card_proc_new(chip->card, chip->card->driver, &entry)) | |
bf850204 | 753 | snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read); |
12bb5b78 CL |
754 | } |
755 | ||
756 | static struct ac97_quirk ac97_quirks[] = { | |
757 | { | |
758 | .subvendor = 0x11d4, /* AD */ | |
759 | .subdevice = 0x1889, /* AD1889 */ | |
760 | .codec_id = AC97_ID_AD1819, | |
761 | .name = "AD1889", | |
762 | .type = AC97_TUNE_HP_ONLY | |
763 | }, | |
764 | { } /* terminator */ | |
765 | }; | |
766 | ||
767 | static void __devinit | |
768 | snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) | |
769 | { | |
770 | u16 reg; | |
771 | ||
772 | reg = ad1889_readw(chip, AD_AC97_ACIC); | |
773 | reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ | |
774 | ad1889_writew(chip, AD_AC97_ACIC, reg); | |
775 | ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ | |
776 | udelay(10); | |
777 | /* Interface Enable */ | |
778 | reg |= AD_AC97_ACIC_ACIE; | |
779 | ad1889_writew(chip, AD_AC97_ACIC, reg); | |
780 | ||
781 | snd_ad1889_ac97_ready(chip); | |
782 | ||
783 | /* Audio Stream Output | Variable Sample Rate Mode */ | |
784 | reg = ad1889_readw(chip, AD_AC97_ACIC); | |
785 | reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; | |
786 | ad1889_writew(chip, AD_AC97_ACIC, reg); | |
787 | ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ | |
788 | ||
789 | } | |
790 | ||
791 | static void | |
02c2de69 | 792 | snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus) |
12bb5b78 CL |
793 | { |
794 | struct snd_ad1889 *chip = bus->private_data; | |
795 | chip->ac97_bus = NULL; | |
796 | } | |
797 | ||
798 | static void | |
02c2de69 | 799 | snd_ad1889_ac97_free(struct snd_ac97 *ac97) |
12bb5b78 CL |
800 | { |
801 | struct snd_ad1889 *chip = ac97->private_data; | |
802 | chip->ac97 = NULL; | |
803 | } | |
804 | ||
805 | static int __devinit | |
806 | snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) | |
807 | { | |
808 | int err; | |
02c2de69 TI |
809 | struct snd_ac97_template ac97; |
810 | static struct snd_ac97_bus_ops ops = { | |
12bb5b78 CL |
811 | .write = snd_ad1889_ac97_write, |
812 | .read = snd_ad1889_ac97_read, | |
813 | }; | |
814 | ||
815 | /* doing that here, it works. */ | |
816 | snd_ad1889_ac97_xinit(chip); | |
817 | ||
818 | err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); | |
819 | if (err < 0) | |
820 | return err; | |
821 | ||
822 | chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free; | |
823 | ||
824 | memset(&ac97, 0, sizeof(ac97)); | |
825 | ac97.private_data = chip; | |
826 | ac97.private_free = snd_ad1889_ac97_free; | |
827 | ac97.pci = chip->pci; | |
828 | ||
829 | err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); | |
830 | if (err < 0) | |
831 | return err; | |
832 | ||
833 | snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); | |
834 | ||
835 | return 0; | |
836 | } | |
837 | ||
838 | static int | |
839 | snd_ad1889_free(struct snd_ad1889 *chip) | |
840 | { | |
841 | if (chip->irq < 0) | |
842 | goto skip_hw; | |
843 | ||
844 | spin_lock_irq(&chip->lock); | |
845 | ||
846 | ad1889_mute(chip); | |
847 | ||
848 | /* Turn off interrupt on count and zero DMA registers */ | |
849 | ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); | |
850 | ||
851 | /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ | |
852 | ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); | |
853 | ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ | |
854 | ||
855 | spin_unlock_irq(&chip->lock); | |
856 | ||
857 | synchronize_irq(chip->irq); | |
858 | ||
859 | if (chip->irq >= 0) | |
437a5a46 | 860 | free_irq(chip->irq, chip); |
12bb5b78 CL |
861 | |
862 | skip_hw: | |
863 | if (chip->iobase) | |
864 | iounmap(chip->iobase); | |
865 | ||
866 | pci_release_regions(chip->pci); | |
867 | pci_disable_device(chip->pci); | |
868 | ||
869 | kfree(chip); | |
870 | return 0; | |
871 | } | |
872 | ||
f40b6890 | 873 | static int |
02c2de69 | 874 | snd_ad1889_dev_free(struct snd_device *device) |
12bb5b78 CL |
875 | { |
876 | struct snd_ad1889 *chip = device->device_data; | |
877 | return snd_ad1889_free(chip); | |
878 | } | |
879 | ||
880 | static int __devinit | |
881 | snd_ad1889_init(struct snd_ad1889 *chip) | |
882 | { | |
883 | ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ | |
884 | ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ | |
885 | ||
886 | mdelay(10); | |
887 | ||
888 | /* enable Master and Target abort interrupts */ | |
889 | ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); | |
890 | ||
891 | return 0; | |
892 | } | |
893 | ||
894 | static int __devinit | |
02c2de69 | 895 | snd_ad1889_create(struct snd_card *card, |
12bb5b78 CL |
896 | struct pci_dev *pci, |
897 | struct snd_ad1889 **rchip) | |
898 | { | |
899 | int err; | |
900 | ||
901 | struct snd_ad1889 *chip; | |
02c2de69 | 902 | static struct snd_device_ops ops = { |
12bb5b78 CL |
903 | .dev_free = snd_ad1889_dev_free, |
904 | }; | |
905 | ||
906 | *rchip = NULL; | |
907 | ||
908 | if ((err = pci_enable_device(pci)) < 0) | |
909 | return err; | |
9d2f928d | 910 | |
12bb5b78 | 911 | /* check PCI availability (32bit DMA) */ |
9d2f928d TK |
912 | if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 || |
913 | pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) { | |
12bb5b78 CL |
914 | printk(KERN_ERR PFX "error setting 32-bit DMA mask.\n"); |
915 | pci_disable_device(pci); | |
916 | return -ENXIO; | |
917 | } | |
918 | ||
919 | /* allocate chip specific data with zero-filled memory */ | |
e560d8d8 | 920 | if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { |
12bb5b78 CL |
921 | pci_disable_device(pci); |
922 | return -ENOMEM; | |
923 | } | |
924 | ||
925 | chip->card = card; | |
926 | card->private_data = chip; | |
927 | chip->pci = pci; | |
928 | chip->irq = -1; | |
929 | ||
930 | /* (1) PCI resource allocation */ | |
931 | if ((err = pci_request_regions(pci, card->driver)) < 0) | |
932 | goto free_and_ret; | |
933 | ||
934 | chip->bar = pci_resource_start(pci, 0); | |
935 | chip->iobase = ioremap_nocache(chip->bar, pci_resource_len(pci, 0)); | |
936 | if (chip->iobase == NULL) { | |
937 | printk(KERN_ERR PFX "unable to reserve region.\n"); | |
938 | err = -EBUSY; | |
939 | goto free_and_ret; | |
940 | } | |
941 | ||
942 | pci_set_master(pci); | |
943 | ||
944 | spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ | |
945 | ||
946 | if (request_irq(pci->irq, snd_ad1889_interrupt, | |
437a5a46 | 947 | IRQF_SHARED, card->driver, chip)) { |
12bb5b78 CL |
948 | printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq); |
949 | snd_ad1889_free(chip); | |
950 | return -EBUSY; | |
951 | } | |
952 | ||
953 | chip->irq = pci->irq; | |
954 | synchronize_irq(chip->irq); | |
955 | ||
956 | /* (2) initialization of the chip hardware */ | |
957 | if ((err = snd_ad1889_init(chip)) < 0) { | |
958 | snd_ad1889_free(chip); | |
959 | return err; | |
960 | } | |
961 | ||
962 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | |
963 | snd_ad1889_free(chip); | |
964 | return err; | |
965 | } | |
966 | ||
967 | snd_card_set_dev(card, &pci->dev); | |
968 | ||
969 | *rchip = chip; | |
970 | ||
971 | return 0; | |
972 | ||
973 | free_and_ret: | |
fc58422a | 974 | kfree(chip); |
12bb5b78 CL |
975 | pci_disable_device(pci); |
976 | ||
977 | return err; | |
978 | } | |
979 | ||
980 | static int __devinit | |
981 | snd_ad1889_probe(struct pci_dev *pci, | |
982 | const struct pci_device_id *pci_id) | |
983 | { | |
984 | int err; | |
985 | static int devno; | |
02c2de69 | 986 | struct snd_card *card; |
12bb5b78 CL |
987 | struct snd_ad1889 *chip; |
988 | ||
989 | /* (1) */ | |
990 | if (devno >= SNDRV_CARDS) | |
991 | return -ENODEV; | |
992 | if (!enable[devno]) { | |
993 | devno++; | |
994 | return -ENOENT; | |
995 | } | |
996 | ||
997 | /* (2) */ | |
998 | card = snd_card_new(index[devno], id[devno], THIS_MODULE, 0); | |
999 | /* XXX REVISIT: we can probably allocate chip in this call */ | |
1000 | if (card == NULL) | |
1001 | return -ENOMEM; | |
1002 | ||
1003 | strcpy(card->driver, "AD1889"); | |
1004 | strcpy(card->shortname, "Analog Devices AD1889"); | |
1005 | ||
1006 | /* (3) */ | |
1007 | err = snd_ad1889_create(card, pci, &chip); | |
1008 | if (err < 0) | |
1009 | goto free_and_ret; | |
1010 | ||
1011 | /* (4) */ | |
1012 | sprintf(card->longname, "%s at 0x%lx irq %i", | |
1013 | card->shortname, chip->bar, chip->irq); | |
1014 | ||
1015 | /* (5) */ | |
1016 | /* register AC97 mixer */ | |
1017 | err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); | |
1018 | if (err < 0) | |
1019 | goto free_and_ret; | |
1020 | ||
1021 | err = snd_ad1889_pcm_init(chip, 0, NULL); | |
1022 | if (err < 0) | |
1023 | goto free_and_ret; | |
1024 | ||
1025 | /* register proc interface */ | |
1026 | snd_ad1889_proc_init(chip); | |
1027 | ||
1028 | /* (6) */ | |
1029 | err = snd_card_register(card); | |
1030 | if (err < 0) | |
1031 | goto free_and_ret; | |
1032 | ||
1033 | /* (7) */ | |
1034 | pci_set_drvdata(pci, card); | |
1035 | ||
1036 | devno++; | |
1037 | return 0; | |
1038 | ||
1039 | free_and_ret: | |
1040 | snd_card_free(card); | |
1041 | return err; | |
1042 | } | |
1043 | ||
1044 | static void __devexit | |
1045 | snd_ad1889_remove(struct pci_dev *pci) | |
1046 | { | |
1047 | snd_card_free(pci_get_drvdata(pci)); | |
1048 | pci_set_drvdata(pci, NULL); | |
1049 | } | |
1050 | ||
f40b6890 | 1051 | static struct pci_device_id snd_ad1889_ids[] = { |
12bb5b78 CL |
1052 | { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, |
1053 | { 0, }, | |
1054 | }; | |
1055 | MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); | |
1056 | ||
e4d76815 | 1057 | static struct pci_driver ad1889_pci_driver = { |
12bb5b78 CL |
1058 | .name = "AD1889 Audio", |
1059 | .id_table = snd_ad1889_ids, | |
1060 | .probe = snd_ad1889_probe, | |
1061 | .remove = __devexit_p(snd_ad1889_remove), | |
1062 | }; | |
1063 | ||
1064 | static int __init | |
1065 | alsa_ad1889_init(void) | |
1066 | { | |
e4d76815 | 1067 | return pci_register_driver(&ad1889_pci_driver); |
12bb5b78 CL |
1068 | } |
1069 | ||
1070 | static void __exit | |
1071 | alsa_ad1889_fini(void) | |
1072 | { | |
e4d76815 | 1073 | pci_unregister_driver(&ad1889_pci_driver); |
12bb5b78 CL |
1074 | } |
1075 | ||
1076 | module_init(alsa_ad1889_init); | |
1077 | module_exit(alsa_ad1889_fini); |