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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / sound / isa / ad1816a / ad1816a_lib.c
CommitLineData
1da177e4
LT		 1/*
2 ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
3 Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18*/
19
20#include <sound/driver.h>
21#include <linux/delay.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/slab.h>
25#include <linux/ioport.h>
26#include <sound/core.h>
0e7febf1 27#include <sound/tlv.h>
1da177e4
LT		 28#include <sound/ad1816a.h>
29
30#include <asm/io.h>
31#include <asm/dma.h>
32
cbdd0dd1 33static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
1da177e4
LT		 34{
35 int timeout;
36
37 for (timeout = 1000; timeout-- > 0; udelay(10))
38 if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
39 return 0;
40
41 snd_printk("chip busy.\n");
42 return -EBUSY;
43}
44
cbdd0dd1 45static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
1da177e4
LT		 46{
47 snd_ad1816a_busy_wait(chip);
48 return inb(AD1816A_REG(reg));
49}
50
cbdd0dd1 51static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 52 unsigned char value)
53{
54 snd_ad1816a_busy_wait(chip);
55 outb(value, AD1816A_REG(reg));
56}
57
cbdd0dd1 58static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 59 unsigned char mask, unsigned char value)
60{
61 snd_ad1816a_out(chip, reg,
62 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
63}
64
cbdd0dd1 65static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
1da177e4
LT		 66{
67 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
68 return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
69 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
70}
71
cbdd0dd1 72static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 73 unsigned short value)
74{
75 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
76 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
77 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
78}
79
cbdd0dd1 80static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
1da177e4
LT		 81 unsigned short mask, unsigned short value)
82{
83 snd_ad1816a_write(chip, reg,
84 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
85}
86
87
cbdd0dd1 88static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
1da177e4
LT		 89 unsigned int format, int channels)
90{
91 unsigned char retval = AD1816A_FMT_LINEAR_8;
92
93 switch (format) {
94 case SNDRV_PCM_FORMAT_MU_LAW:
95 retval = AD1816A_FMT_ULAW_8;
96 break;
97 case SNDRV_PCM_FORMAT_A_LAW:
98 retval = AD1816A_FMT_ALAW_8;
99 break;
100 case SNDRV_PCM_FORMAT_S16_LE:
101 retval = AD1816A_FMT_LINEAR_16_LIT;
102 break;
103 case SNDRV_PCM_FORMAT_S16_BE:
104 retval = AD1816A_FMT_LINEAR_16_BIG;
105 }
106 return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
107}
108
cbdd0dd1 109static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
1da177e4
LT		 110{
111 unsigned long flags;
112
113 spin_lock_irqsave(&chip->lock, flags);
114
115 if (chip->mode & mode) {
116 spin_unlock_irqrestore(&chip->lock, flags);
117 return -EAGAIN;
118 }
119
120 switch ((mode &= AD1816A_MODE_OPEN)) {
121 case AD1816A_MODE_PLAYBACK:
122 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
123 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
124 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
125 AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
126 break;
127 case AD1816A_MODE_CAPTURE:
128 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
129 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
130 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
131 AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
132 break;
133 case AD1816A_MODE_TIMER:
134 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
135 AD1816A_TIMER_IRQ_PENDING, 0x00);
136 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
137 AD1816A_TIMER_IRQ_ENABLE, 0xffff);
138 }
139 chip->mode |= mode;
140
141 spin_unlock_irqrestore(&chip->lock, flags);
142 return 0;
143}
144
cbdd0dd1 145static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
1da177e4
LT		 146{
147 unsigned long flags;
148
149 spin_lock_irqsave(&chip->lock, flags);
150
151 switch ((mode &= AD1816A_MODE_OPEN)) {
152 case AD1816A_MODE_PLAYBACK:
153 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
154 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
155 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
156 AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
157 break;
158 case AD1816A_MODE_CAPTURE:
159 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
160 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
161 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
162 AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
163 break;
164 case AD1816A_MODE_TIMER:
165 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
166 AD1816A_TIMER_IRQ_PENDING, 0x00);
167 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
168 AD1816A_TIMER_IRQ_ENABLE, 0x0000);
169 }
170 if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN))
171 chip->mode = 0;
172
173 spin_unlock_irqrestore(&chip->lock, flags);
174}
175
176
cbdd0dd1 177static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
d08a23e2 178 int channel, int cmd, int iscapture)
1da177e4
LT		 179{
180 int error = 0;
181
182 switch (cmd) {
183 case SNDRV_PCM_TRIGGER_START:
184 case SNDRV_PCM_TRIGGER_STOP:
185 spin_lock(&chip->lock);
186 cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
d08a23e2
KA		 187 /* if (what & AD1816A_PLAYBACK_ENABLE) */
188 /* That is not valid, because playback and capture enable
189 * are the same bit pattern, just to different addresses
190 */
191 if (! iscapture)
1da177e4
LT		 192 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
193 AD1816A_PLAYBACK_ENABLE, cmd);
d08a23e2 194 else
1da177e4
LT		 195 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
196 AD1816A_CAPTURE_ENABLE, cmd);
197 spin_unlock(&chip->lock);
198 break;
199 default:
200 snd_printk("invalid trigger mode 0x%x.\n", what);
201 error = -EINVAL;
202 }
203
204 return error;
205}
206
cbdd0dd1 207static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 208{
cbdd0dd1 209 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 210 return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
d08a23e2 211 SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
1da177e4
LT		 212}
213
cbdd0dd1 214static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
1da177e4 215{
cbdd0dd1 216 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 217 return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
d08a23e2 218 SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
1da177e4
LT		 219}
220
cbdd0dd1
TI		 221static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream,
222 struct snd_pcm_hw_params *hw_params)
1da177e4
LT		 223{
224 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
225}
226
cbdd0dd1 227static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream)
1da177e4
LT		 228{
229 return snd_pcm_lib_free_pages(substream);
230}
231
cbdd0dd1 232static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
1da177e4 233{
cbdd0dd1 234 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 235 unsigned long flags;
cbdd0dd1 236 struct snd_pcm_runtime *runtime = substream->runtime;
5b8f7f73 237 unsigned int size, rate;
1da177e4
LT		 238
239 spin_lock_irqsave(&chip->lock, flags);
240
241 chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
242 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
243 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
244
245 snd_dma_program(chip->dma1, runtime->dma_addr, size,
246 DMA_MODE_WRITE | DMA_AUTOINIT);
247
5b8f7f73
TI		 248 rate = runtime->rate;
249 if (chip->clock_freq)
250 rate = (rate * 33000) / chip->clock_freq;
251 snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
1da177e4
LT		 252 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
253 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
254 snd_ad1816a_get_format(chip, runtime->format,
255 runtime->channels));
256
257 snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
258 snd_pcm_lib_period_bytes(substream) / 4 - 1);
259
260 spin_unlock_irqrestore(&chip->lock, flags);
261 return 0;
262}
263
cbdd0dd1 264static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
1da177e4 265{
cbdd0dd1 266 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4 267 unsigned long flags;
cbdd0dd1 268 struct snd_pcm_runtime *runtime = substream->runtime;
5b8f7f73 269 unsigned int size, rate;
1da177e4
LT		 270
271 spin_lock_irqsave(&chip->lock, flags);
272
273 chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
274 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
275 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
276
277 snd_dma_program(chip->dma2, runtime->dma_addr, size,
278 DMA_MODE_READ | DMA_AUTOINIT);
279
5b8f7f73
TI		 280 rate = runtime->rate;
281 if (chip->clock_freq)
282 rate = (rate * 33000) / chip->clock_freq;
283 snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
1da177e4
LT		 284 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
285 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
286 snd_ad1816a_get_format(chip, runtime->format,
287 runtime->channels));
288
289 snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
290 snd_pcm_lib_period_bytes(substream) / 4 - 1);
291
292 spin_unlock_irqrestore(&chip->lock, flags);
293 return 0;
294}
295
296
cbdd0dd1 297static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
1da177e4 298{
cbdd0dd1 299 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 300 size_t ptr;
301 if (!(chip->mode & AD1816A_MODE_PLAYBACK))
302 return 0;
303 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
304 return bytes_to_frames(substream->runtime, ptr);
305}
306
cbdd0dd1 307static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
1da177e4 308{
cbdd0dd1 309 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 310 size_t ptr;
311 if (!(chip->mode & AD1816A_MODE_CAPTURE))
312 return 0;
313 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
314 return bytes_to_frames(substream->runtime, ptr);
315}
316
317
7d12e780 318static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
1da177e4 319{
cbdd0dd1 320 struct snd_ad1816a *chip = dev_id;
1da177e4
LT		 321 unsigned char status;
322
323 spin_lock(&chip->lock);
324 status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
325 spin_unlock(&chip->lock);
326
327 if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
328 snd_pcm_period_elapsed(chip->playback_substream);
329
330 if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
331 snd_pcm_period_elapsed(chip->capture_substream);
332
333 if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
334 snd_timer_interrupt(chip->timer, chip->timer->sticks);
335
336 spin_lock(&chip->lock);
337 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
338 spin_unlock(&chip->lock);
339 return IRQ_HANDLED;
340}
341
342
cbdd0dd1 343static struct snd_pcm_hardware snd_ad1816a_playback = {
1da177e4
LT		 344 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
345 SNDRV_PCM_INFO_MMAP_VALID),
346 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
347 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
348 SNDRV_PCM_FMTBIT_S16_BE),
349 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
350 .rate_min = 4000,
351 .rate_max = 55200,
352 .channels_min = 1,
353 .channels_max = 2,
354 .buffer_bytes_max = (128*1024),
355 .period_bytes_min = 64,
356 .period_bytes_max = (128*1024),
357 .periods_min = 1,
358 .periods_max = 1024,
359 .fifo_size = 0,
360};
361
cbdd0dd1 362static struct snd_pcm_hardware snd_ad1816a_capture = {
1da177e4
LT		 363 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
364 SNDRV_PCM_INFO_MMAP_VALID),
365 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
366 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
367 SNDRV_PCM_FMTBIT_S16_BE),
368 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
369 .rate_min = 4000,
370 .rate_max = 55200,
371 .channels_min = 1,
372 .channels_max = 2,
373 .buffer_bytes_max = (128*1024),
374 .period_bytes_min = 64,
375 .period_bytes_max = (128*1024),
376 .periods_min = 1,
377 .periods_max = 1024,
378 .fifo_size = 0,
379};
380
381#if 0 /* not used now */
cbdd0dd1 382static int snd_ad1816a_timer_close(struct snd_timer *timer)
1da177e4 383{
cbdd0dd1 384 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 385 snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
386 return 0;
387}
388
cbdd0dd1 389static int snd_ad1816a_timer_open(struct snd_timer *timer)
1da177e4 390{
cbdd0dd1 391 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 392 snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
393 return 0;
394}
395
cbdd0dd1 396static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
1da177e4
LT		 397{
398 snd_assert(timer != NULL, return 0);
399
400 return 10000;
401}
402
cbdd0dd1 403static int snd_ad1816a_timer_start(struct snd_timer *timer)
1da177e4
LT		 404{
405 unsigned short bits;
406 unsigned long flags;
cbdd0dd1 407 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 408 spin_lock_irqsave(&chip->lock, flags);
409 bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
410
411 if (!(bits & AD1816A_TIMER_ENABLE)) {
412 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
413 timer->sticks & 0xffff);
414
415 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
416 AD1816A_TIMER_ENABLE, 0xffff);
417 }
418 spin_unlock_irqrestore(&chip->lock, flags);
419 return 0;
420}
421
cbdd0dd1 422static int snd_ad1816a_timer_stop(struct snd_timer *timer)
1da177e4
LT		 423{
424 unsigned long flags;
cbdd0dd1 425 struct snd_ad1816a *chip = snd_timer_chip(timer);
1da177e4
LT		 426 spin_lock_irqsave(&chip->lock, flags);
427
428 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
429 AD1816A_TIMER_ENABLE, 0x0000);
430
431 spin_unlock_irqrestore(&chip->lock, flags);
432 return 0;
433}
434
cbdd0dd1 435static struct snd_timer_hardware snd_ad1816a_timer_table = {
1da177e4
LT		 436 .flags = SNDRV_TIMER_HW_AUTO,
437 .resolution = 10000,
438 .ticks = 65535,
439 .open = snd_ad1816a_timer_open,
440 .close = snd_ad1816a_timer_close,
441 .c_resolution = snd_ad1816a_timer_resolution,
442 .start = snd_ad1816a_timer_start,
443 .stop = snd_ad1816a_timer_stop,
444};
445#endif /* not used now */
446
447
cbdd0dd1 448static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
1da177e4 449{
cbdd0dd1
TI		 450 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
451 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 452 int error;
453
454 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0)
455 return error;
456 snd_pcm_set_sync(substream);
457 runtime->hw = snd_ad1816a_playback;
458 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
459 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
460 chip->playback_substream = substream;
461 return 0;
462}
463
cbdd0dd1 464static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
1da177e4 465{
cbdd0dd1
TI		 466 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
467 struct snd_pcm_runtime *runtime = substream->runtime;
1da177e4
LT		 468 int error;
469
470 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0)
471 return error;
472 snd_pcm_set_sync(substream);
473 runtime->hw = snd_ad1816a_capture;
474 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
475 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
476 chip->capture_substream = substream;
477 return 0;
478}
479
cbdd0dd1 480static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
1da177e4 481{
cbdd0dd1 482 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 483
484 chip->playback_substream = NULL;
485 snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
486 return 0;
487}
488
cbdd0dd1 489static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
1da177e4 490{
cbdd0dd1 491 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
1da177e4
LT		 492
493 chip->capture_substream = NULL;
494 snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
495 return 0;
496}
497
498
00a4e3d9 499static void __devinit snd_ad1816a_init(struct snd_ad1816a *chip)
1da177e4
LT		 500{
501 unsigned long flags;
502
503 spin_lock_irqsave(&chip->lock, flags);
504
505 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
506 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
507 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
508 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
509 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
510 snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
511 snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
512 AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
513 snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
514 snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
515
516 spin_unlock_irqrestore(&chip->lock, flags);
517}
518
00a4e3d9 519static int __devinit snd_ad1816a_probe(struct snd_ad1816a *chip)
1da177e4
LT		 520{
521 unsigned long flags;
522
523 spin_lock_irqsave(&chip->lock, flags);
524
525 switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
526 case 0:
527 chip->hardware = AD1816A_HW_AD1815;
528 break;
529 case 1:
530 chip->hardware = AD1816A_HW_AD18MAX10;
531 break;
532 case 3:
533 chip->hardware = AD1816A_HW_AD1816A;
534 break;
535 default:
536 chip->hardware = AD1816A_HW_AUTO;
537 }
538
539 spin_unlock_irqrestore(&chip->lock, flags);
540 return 0;
541}
542
cbdd0dd1 543static int snd_ad1816a_free(struct snd_ad1816a *chip)
1da177e4 544{
b1d5776d 545 release_and_free_resource(chip->res_port);
1da177e4
LT		 546 if (chip->irq >= 0)
547 free_irq(chip->irq, (void *) chip);
548 if (chip->dma1 >= 0) {
549 snd_dma_disable(chip->dma1);
550 free_dma(chip->dma1);
551 }
552 if (chip->dma2 >= 0) {
553 snd_dma_disable(chip->dma2);
554 free_dma(chip->dma2);
555 }
556 kfree(chip);
557 return 0;
558}
559
cbdd0dd1 560static int snd_ad1816a_dev_free(struct snd_device *device)
1da177e4 561{
cbdd0dd1 562 struct snd_ad1816a *chip = device->device_data;
1da177e4
LT		 563 return snd_ad1816a_free(chip);
564}
565
00a4e3d9 566static const char __devinit *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
1da177e4
LT		 567{
568 switch (chip->hardware) {
569 case AD1816A_HW_AD1816A: return "AD1816A";
570 case AD1816A_HW_AD1815: return "AD1815";
571 case AD1816A_HW_AD18MAX10: return "AD18max10";
572 default:
573 snd_printk("Unknown chip version %d:%d.\n",
574 chip->version, chip->hardware);
575 return "AD1816A - unknown";
576 }
577}
578
00a4e3d9
TI		 579int __devinit snd_ad1816a_create(struct snd_card *card,
580 unsigned long port, int irq, int dma1, int dma2,
581 struct snd_ad1816a **rchip)
1da177e4 582{
cbdd0dd1 583 static struct snd_device_ops ops = {
1da177e4
LT		 584 .dev_free = snd_ad1816a_dev_free,
585 };
586 int error;
cbdd0dd1 587 struct snd_ad1816a *chip;
1da177e4
LT		 588
589 *rchip = NULL;
590
9e76a76e 591 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1da177e4
LT		 592 if (chip == NULL)
593 return -ENOMEM;
594 chip->irq = -1;
595 chip->dma1 = -1;
596 chip->dma2 = -1;
597
598 if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) {
599 snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
600 snd_ad1816a_free(chip);
601 return -EBUSY;
602 }
65ca68b3 603 if (request_irq(irq, snd_ad1816a_interrupt, IRQF_DISABLED, "AD1816A", (void *) chip)) {
1da177e4
LT		 604 snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
605 snd_ad1816a_free(chip);
606 return -EBUSY;
607 }
608 chip->irq = irq;
609 if (request_dma(dma1, "AD1816A - 1")) {
610 snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
611 snd_ad1816a_free(chip);
612 return -EBUSY;
613 }
614 chip->dma1 = dma1;
615 if (request_dma(dma2, "AD1816A - 2")) {
616 snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
617 snd_ad1816a_free(chip);
618 return -EBUSY;
619 }
620 chip->dma2 = dma2;
621
622 chip->card = card;
623 chip->port = port;
624 spin_lock_init(&chip->lock);
625
626 if ((error = snd_ad1816a_probe(chip))) {
627 snd_ad1816a_free(chip);
628 return error;
629 }
630
631 snd_ad1816a_init(chip);
632
633 /* Register device */
634 if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
635 snd_ad1816a_free(chip);
636 return error;
637 }
638
639 *rchip = chip;
640 return 0;
641}
642
cbdd0dd1 643static struct snd_pcm_ops snd_ad1816a_playback_ops = {
1da177e4
LT		 644 .open = snd_ad1816a_playback_open,
645 .close = snd_ad1816a_playback_close,
646 .ioctl = snd_pcm_lib_ioctl,
647 .hw_params = snd_ad1816a_hw_params,
648 .hw_free = snd_ad1816a_hw_free,
649 .prepare = snd_ad1816a_playback_prepare,
650 .trigger = snd_ad1816a_playback_trigger,
651 .pointer = snd_ad1816a_playback_pointer,
652};
653
cbdd0dd1 654static struct snd_pcm_ops snd_ad1816a_capture_ops = {
1da177e4
LT		 655 .open = snd_ad1816a_capture_open,
656 .close = snd_ad1816a_capture_close,
657 .ioctl = snd_pcm_lib_ioctl,
658 .hw_params = snd_ad1816a_hw_params,
659 .hw_free = snd_ad1816a_hw_free,
660 .prepare = snd_ad1816a_capture_prepare,
661 .trigger = snd_ad1816a_capture_trigger,
662 .pointer = snd_ad1816a_capture_pointer,
663};
664
00a4e3d9 665int __devinit snd_ad1816a_pcm(struct snd_ad1816a *chip, int device, struct snd_pcm **rpcm)
1da177e4
LT		 666{
667 int error;
cbdd0dd1 668 struct snd_pcm *pcm;
1da177e4
LT		 669
670 if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm)))
671 return error;
672
673 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
674 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
675
676 pcm->private_data = chip;
1da177e4
LT		 677 pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
678
679 strcpy(pcm->name, snd_ad1816a_chip_id(chip));
680 snd_ad1816a_init(chip);
681
682 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
683 snd_dma_isa_data(),
684 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
685
686 chip->pcm = pcm;
687 if (rpcm)
688 *rpcm = pcm;
689 return 0;
690}
691
692#if 0 /* not used now */
00a4e3d9 693int __devinit snd_ad1816a_timer(struct snd_ad1816a *chip, int device, struct snd_timer **rtimer)
1da177e4 694{
cbdd0dd1
TI		 695 struct snd_timer *timer;
696 struct snd_timer_id tid;
1da177e4
LT		 697 int error;
698
699 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
700 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
701 tid.card = chip->card->number;
702 tid.device = device;
703 tid.subdevice = 0;
704 if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0)
705 return error;
706 strcpy(timer->name, snd_ad1816a_chip_id(chip));
707 timer->private_data = chip;
1da177e4
LT		 708 chip->timer = timer;
709 timer->hw = snd_ad1816a_timer_table;
710 if (rtimer)
711 *rtimer = timer;
712 return 0;
713}
714#endif /* not used now */
715
716/*
717 *
718 */
719
cbdd0dd1 720static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 721{
722 static char *texts[8] = {
723 "Line", "Mix", "CD", "Synth", "Video",
724 "Mic", "Phone",
725 };
726
727 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
728 uinfo->count = 2;
729 uinfo->value.enumerated.items = 7;
730 if (uinfo->value.enumerated.item > 6)
731 uinfo->value.enumerated.item = 6;
732 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
733 return 0;
734}
735
cbdd0dd1 736static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 737{
cbdd0dd1 738 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 739 unsigned long flags;
740 unsigned short val;
741
742 spin_lock_irqsave(&chip->lock, flags);
743 val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
744 spin_unlock_irqrestore(&chip->lock, flags);
745 ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
746 ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
747 return 0;
748}
749
cbdd0dd1 750static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 751{
cbdd0dd1 752 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 753 unsigned long flags;
754 unsigned short val;
755 int change;
756
757 if (ucontrol->value.enumerated.item[0] > 6 ||
758 ucontrol->value.enumerated.item[1] > 6)
759 return -EINVAL;
760 val = (ucontrol->value.enumerated.item[0] << 12) |
761 (ucontrol->value.enumerated.item[1] << 4);
762 spin_lock_irqsave(&chip->lock, flags);
763 change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
764 snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
765 spin_unlock_irqrestore(&chip->lock, flags);
766 return change;
767}
768
0e7febf1
TI		 769#define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \
770{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
771 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
772 .name = xname, .info = snd_ad1816a_info_single, \
773 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
774 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
775 .tlv = { .p = (xtlv) } }
1da177e4
LT		 776#define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
777{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
778 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
779 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
780
cbdd0dd1 781static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 782{
783 int mask = (kcontrol->private_value >> 16) & 0xff;
784
785 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
786 uinfo->count = 1;
787 uinfo->value.integer.min = 0;
788 uinfo->value.integer.max = mask;
789 return 0;
790}
791
cbdd0dd1 792static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 793{
cbdd0dd1 794 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 795 unsigned long flags;
796 int reg = kcontrol->private_value & 0xff;
797 int shift = (kcontrol->private_value >> 8) & 0xff;
798 int mask = (kcontrol->private_value >> 16) & 0xff;
799 int invert = (kcontrol->private_value >> 24) & 0xff;
800
801 spin_lock_irqsave(&chip->lock, flags);
802 ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
803 spin_unlock_irqrestore(&chip->lock, flags);
804 if (invert)
805 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
806 return 0;
807}
808
cbdd0dd1 809static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 810{
cbdd0dd1 811 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 812 unsigned long flags;
813 int reg = kcontrol->private_value & 0xff;
814 int shift = (kcontrol->private_value >> 8) & 0xff;
815 int mask = (kcontrol->private_value >> 16) & 0xff;
816 int invert = (kcontrol->private_value >> 24) & 0xff;
817 int change;
818 unsigned short old_val, val;
819
820 val = (ucontrol->value.integer.value[0] & mask);
821 if (invert)
822 val = mask - val;
823 val <<= shift;
824 spin_lock_irqsave(&chip->lock, flags);
825 old_val = snd_ad1816a_read(chip, reg);
826 val = (old_val & ~(mask << shift)) | val;
827 change = val != old_val;
828 snd_ad1816a_write(chip, reg, val);
829 spin_unlock_irqrestore(&chip->lock, flags);
830 return change;
831}
832
0e7febf1
TI		 833#define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
834{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
835 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
836 .name = xname, .info = snd_ad1816a_info_double, \
837 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
838 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
839 .tlv = { .p = (xtlv) } }
840
1da177e4
LT		 841#define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
842{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
843 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
844 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
845
cbdd0dd1 846static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1da177e4
LT		 847{
848 int mask = (kcontrol->private_value >> 16) & 0xff;
849
850 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
851 uinfo->count = 2;
852 uinfo->value.integer.min = 0;
853 uinfo->value.integer.max = mask;
854 return 0;
855}
856
cbdd0dd1 857static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 858{
cbdd0dd1 859 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 860 unsigned long flags;
861 int reg = kcontrol->private_value & 0xff;
862 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
863 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
864 int mask = (kcontrol->private_value >> 16) & 0xff;
865 int invert = (kcontrol->private_value >> 24) & 0xff;
866 unsigned short val;
867
868 spin_lock_irqsave(&chip->lock, flags);
869 val = snd_ad1816a_read(chip, reg);
870 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
871 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
872 spin_unlock_irqrestore(&chip->lock, flags);
873 if (invert) {
874 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
875 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
876 }
877 return 0;
878}
879
cbdd0dd1 880static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1da177e4 881{
cbdd0dd1 882 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
1da177e4
LT		 883 unsigned long flags;
884 int reg = kcontrol->private_value & 0xff;
885 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
886 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
887 int mask = (kcontrol->private_value >> 16) & 0xff;
888 int invert = (kcontrol->private_value >> 24) & 0xff;
889 int change;
890 unsigned short old_val, val1, val2;
891
892 val1 = ucontrol->value.integer.value[0] & mask;
893 val2 = ucontrol->value.integer.value[1] & mask;
894 if (invert) {
895 val1 = mask - val1;
896 val2 = mask - val2;
897 }
898 val1 <<= shift_left;
899 val2 <<= shift_right;
900 spin_lock_irqsave(&chip->lock, flags);
901 old_val = snd_ad1816a_read(chip, reg);
902 val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
903 change = val1 != old_val;
904 snd_ad1816a_write(chip, reg, val1);
905 spin_unlock_irqrestore(&chip->lock, flags);
906 return change;
907}
908
0e7febf1
TI		 909static DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
910static DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
911static DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
912static DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
913static DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
914
00a4e3d9 915static struct snd_kcontrol_new snd_ad1816a_controls[] __devinitdata = {
1da177e4 916AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
0e7febf1
TI		 917AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
918 db_scale_5bit),
1da177e4 919AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
0e7febf1
TI		 920AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
921 db_scale_6bit),
1da177e4 922AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 923AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
924 db_scale_5bit_12db_max),
1da177e4 925AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 926AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
927 db_scale_5bit_12db_max),
1da177e4 928AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 929AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
930 db_scale_5bit_12db_max),
1da177e4 931AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
0e7febf1
TI		 932AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
933 db_scale_6bit),
1da177e4 934AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
0e7febf1
TI		 935AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
936 db_scale_5bit_12db_max),
1da177e4
LT		 937AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
938AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
0e7febf1
TI		 939AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
940 db_scale_5bit_12db_max),
1da177e4 941AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
0e7febf1
TI		 942AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
943 db_scale_4bit),
1da177e4 944AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
0e7febf1
TI		 945AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
946 db_scale_5bit),
1da177e4
LT		 947{
948 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
949 .name = "Capture Source",
950 .info = snd_ad1816a_info_mux,
951 .get = snd_ad1816a_get_mux,
952 .put = snd_ad1816a_put_mux,
953},
954AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
0e7febf1
TI		 955AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
956 db_scale_rec_gain),
1da177e4
LT		 957AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
958AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
959};
960
00a4e3d9 961int __devinit snd_ad1816a_mixer(struct snd_ad1816a *chip)
1da177e4 962{
cbdd0dd1 963 struct snd_card *card;
1da177e4
LT		 964 unsigned int idx;
965 int err;
966
967 snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
968
969 card = chip->card;
970
971 strcpy(card->mixername, snd_ad1816a_chip_id(chip));
972
973 for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
974 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0)
975 return err;
976 }
977 return 0;
978}
kernel source for telekom puls (alcatel/mediatek)