Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Routines for control of the AK4114 via I2C and 4-wire serial interface | |
3 | * IEC958 (S/PDIF) receiver by Asahi Kasei | |
4 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> | |
5 | * | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <sound/driver.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/delay.h> | |
26 | #include <sound/core.h> | |
27 | #include <sound/control.h> | |
28 | #include <sound/pcm.h> | |
29 | #include <sound/ak4114.h> | |
30 | #include <sound/asoundef.h> | |
31 | ||
32 | MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); | |
33 | MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei"); | |
34 | MODULE_LICENSE("GPL"); | |
35 | ||
36 | #define AK4114_ADDR 0x00 /* fixed address */ | |
37 | ||
c4028958 | 38 | static void ak4114_stats(struct work_struct *work); |
51354ae3 | 39 | static void ak4114_init_regs(struct ak4114 *chip); |
1da177e4 | 40 | |
97f02e05 | 41 | static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val) |
1da177e4 LT |
42 | { |
43 | ak4114->write(ak4114->private_data, reg, val); | |
44 | if (reg <= AK4114_REG_INT1_MASK) | |
45 | ak4114->regmap[reg] = val; | |
1ab774e0 JD |
46 | else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4) |
47 | ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val; | |
1da177e4 LT |
48 | } |
49 | ||
97f02e05 | 50 | static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg) |
1da177e4 LT |
51 | { |
52 | return ak4114->read(ak4114->private_data, reg); | |
53 | } | |
54 | ||
55 | #if 0 | |
97f02e05 | 56 | static void reg_dump(struct ak4114 *ak4114) |
1da177e4 LT |
57 | { |
58 | int i; | |
59 | ||
99b359ba | 60 | printk(KERN_DEBUG "AK4114 REG DUMP:\n"); |
1da177e4 | 61 | for (i = 0; i < 0x20; i++) |
99b359ba | 62 | printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < sizeof(ak4114->regmap) ? ak4114->regmap[i] : 0); |
1da177e4 LT |
63 | } |
64 | #endif | |
65 | ||
97f02e05 | 66 | static void snd_ak4114_free(struct ak4114 *chip) |
1da177e4 LT |
67 | { |
68 | chip->init = 1; /* don't schedule new work */ | |
69 | mb(); | |
3b6baa5a | 70 | cancel_delayed_work(&chip->work); |
4014c38b | 71 | flush_scheduled_work(); |
1da177e4 LT |
72 | kfree(chip); |
73 | } | |
74 | ||
97f02e05 | 75 | static int snd_ak4114_dev_free(struct snd_device *device) |
1da177e4 | 76 | { |
97f02e05 | 77 | struct ak4114 *chip = device->device_data; |
1da177e4 LT |
78 | snd_ak4114_free(chip); |
79 | return 0; | |
80 | } | |
81 | ||
97f02e05 | 82 | int snd_ak4114_create(struct snd_card *card, |
1da177e4 | 83 | ak4114_read_t *read, ak4114_write_t *write, |
517400cb | 84 | const unsigned char pgm[7], const unsigned char txcsb[5], |
97f02e05 | 85 | void *private_data, struct ak4114 **r_ak4114) |
1da177e4 | 86 | { |
97f02e05 | 87 | struct ak4114 *chip; |
1da177e4 LT |
88 | int err = 0; |
89 | unsigned char reg; | |
97f02e05 | 90 | static struct snd_device_ops ops = { |
1da177e4 LT |
91 | .dev_free = snd_ak4114_dev_free, |
92 | }; | |
93 | ||
561b220a | 94 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 LT |
95 | if (chip == NULL) |
96 | return -ENOMEM; | |
97 | spin_lock_init(&chip->lock); | |
98 | chip->card = card; | |
99 | chip->read = read; | |
100 | chip->write = write; | |
101 | chip->private_data = private_data; | |
3b6baa5a | 102 | INIT_DELAYED_WORK(&chip->work, ak4114_stats); |
1da177e4 LT |
103 | |
104 | for (reg = 0; reg < 7; reg++) | |
105 | chip->regmap[reg] = pgm[reg]; | |
106 | for (reg = 0; reg < 5; reg++) | |
107 | chip->txcsb[reg] = txcsb[reg]; | |
108 | ||
51354ae3 | 109 | ak4114_init_regs(chip); |
1da177e4 LT |
110 | |
111 | chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT); | |
112 | chip->rcs1 = reg_read(chip, AK4114_REG_RCS1); | |
113 | ||
114 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) | |
115 | goto __fail; | |
116 | ||
117 | if (r_ak4114) | |
118 | *r_ak4114 = chip; | |
119 | return 0; | |
120 | ||
121 | __fail: | |
122 | snd_ak4114_free(chip); | |
123 | return err < 0 ? err : -EIO; | |
124 | } | |
125 | ||
97f02e05 | 126 | void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val) |
1da177e4 LT |
127 | { |
128 | if (reg <= AK4114_REG_INT1_MASK) | |
129 | reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); | |
130 | else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4) | |
1ab774e0 JD |
131 | reg_write(chip, reg, |
132 | (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val); | |
1da177e4 LT |
133 | } |
134 | ||
51354ae3 | 135 | static void ak4114_init_regs(struct ak4114 *chip) |
1da177e4 LT |
136 | { |
137 | unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg; | |
138 | ||
1da177e4 LT |
139 | /* bring the chip to reset state and powerdown state */ |
140 | reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN)); | |
141 | udelay(200); | |
142 | /* release reset, but leave powerdown */ | |
143 | reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN); | |
144 | udelay(200); | |
145 | for (reg = 1; reg < 7; reg++) | |
146 | reg_write(chip, reg, chip->regmap[reg]); | |
147 | for (reg = 0; reg < 5; reg++) | |
148 | reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]); | |
149 | /* release powerdown, everything is initialized now */ | |
150 | reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN); | |
51354ae3 TI |
151 | } |
152 | ||
153 | void snd_ak4114_reinit(struct ak4114 *chip) | |
154 | { | |
155 | chip->init = 1; | |
156 | mb(); | |
157 | flush_scheduled_work(); | |
158 | ak4114_init_regs(chip); | |
1da177e4 LT |
159 | /* bring up statistics / event queing */ |
160 | chip->init = 0; | |
51354ae3 TI |
161 | if (chip->kctls[0]) |
162 | schedule_delayed_work(&chip->work, HZ / 10); | |
1da177e4 LT |
163 | } |
164 | ||
165 | static unsigned int external_rate(unsigned char rcs1) | |
166 | { | |
167 | switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) { | |
168 | case AK4114_FS_32000HZ: return 32000; | |
169 | case AK4114_FS_44100HZ: return 44100; | |
170 | case AK4114_FS_48000HZ: return 48000; | |
171 | case AK4114_FS_88200HZ: return 88200; | |
172 | case AK4114_FS_96000HZ: return 96000; | |
173 | case AK4114_FS_176400HZ: return 176400; | |
174 | case AK4114_FS_192000HZ: return 192000; | |
175 | default: return 0; | |
176 | } | |
177 | } | |
178 | ||
97f02e05 TI |
179 | static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol, |
180 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
181 | { |
182 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
183 | uinfo->count = 1; | |
184 | uinfo->value.integer.min = 0; | |
185 | uinfo->value.integer.max = LONG_MAX; | |
186 | return 0; | |
187 | } | |
188 | ||
97f02e05 TI |
189 | static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol, |
190 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 191 | { |
97f02e05 | 192 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
193 | long *ptr; |
194 | ||
195 | spin_lock_irq(&chip->lock); | |
196 | ptr = (long *)(((char *)chip) + kcontrol->private_value); | |
197 | ucontrol->value.integer.value[0] = *ptr; | |
198 | *ptr = 0; | |
199 | spin_unlock_irq(&chip->lock); | |
200 | return 0; | |
201 | } | |
202 | ||
97f02e05 TI |
203 | static int snd_ak4114_in_bit_info(struct snd_kcontrol *kcontrol, |
204 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
205 | { |
206 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | |
207 | uinfo->count = 1; | |
208 | uinfo->value.integer.min = 0; | |
209 | uinfo->value.integer.max = 1; | |
210 | return 0; | |
211 | } | |
212 | ||
97f02e05 TI |
213 | static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol, |
214 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 215 | { |
97f02e05 | 216 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
217 | unsigned char reg = kcontrol->private_value & 0xff; |
218 | unsigned char bit = (kcontrol->private_value >> 8) & 0xff; | |
219 | unsigned char inv = (kcontrol->private_value >> 31) & 1; | |
220 | ||
221 | ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; | |
222 | return 0; | |
223 | } | |
224 | ||
97f02e05 TI |
225 | static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol, |
226 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 LT |
227 | { |
228 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
229 | uinfo->count = 1; | |
230 | uinfo->value.integer.min = 0; | |
231 | uinfo->value.integer.max = 192000; | |
232 | return 0; | |
233 | } | |
234 | ||
97f02e05 TI |
235 | static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol, |
236 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 237 | { |
97f02e05 | 238 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
239 | |
240 | ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1)); | |
241 | return 0; | |
242 | } | |
243 | ||
97f02e05 | 244 | static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
245 | { |
246 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
247 | uinfo->count = 1; | |
248 | return 0; | |
249 | } | |
250 | ||
97f02e05 TI |
251 | static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol, |
252 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 253 | { |
97f02e05 | 254 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
255 | unsigned i; |
256 | ||
257 | for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++) | |
258 | ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i); | |
259 | return 0; | |
260 | } | |
261 | ||
97f02e05 TI |
262 | static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol, |
263 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 264 | { |
97f02e05 | 265 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
266 | unsigned i; |
267 | ||
268 | for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++) | |
269 | ucontrol->value.iec958.status[i] = chip->txcsb[i]; | |
270 | return 0; | |
271 | } | |
272 | ||
97f02e05 TI |
273 | static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol, |
274 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 275 | { |
97f02e05 | 276 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
277 | unsigned i; |
278 | ||
279 | for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++) | |
280 | reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]); | |
281 | return 0; | |
282 | } | |
283 | ||
97f02e05 | 284 | static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
285 | { |
286 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | |
287 | uinfo->count = 1; | |
288 | return 0; | |
289 | } | |
290 | ||
97f02e05 TI |
291 | static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol, |
292 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 LT |
293 | { |
294 | memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE); | |
295 | return 0; | |
296 | } | |
297 | ||
97f02e05 | 298 | static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
299 | { |
300 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | |
301 | uinfo->value.integer.min = 0; | |
302 | uinfo->value.integer.max = 0xffff; | |
303 | uinfo->count = 4; | |
304 | return 0; | |
305 | } | |
306 | ||
97f02e05 TI |
307 | static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol, |
308 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 309 | { |
97f02e05 | 310 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
311 | unsigned short tmp; |
312 | ||
313 | ucontrol->value.integer.value[0] = 0xf8f2; | |
314 | ucontrol->value.integer.value[1] = 0x4e1f; | |
315 | tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8); | |
316 | ucontrol->value.integer.value[2] = tmp; | |
317 | tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8); | |
318 | ucontrol->value.integer.value[3] = tmp; | |
319 | return 0; | |
320 | } | |
321 | ||
97f02e05 | 322 | static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
1da177e4 LT |
323 | { |
324 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; | |
325 | uinfo->count = AK4114_REG_QSUB_SIZE; | |
326 | return 0; | |
327 | } | |
328 | ||
97f02e05 TI |
329 | static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol, |
330 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 331 | { |
97f02e05 | 332 | struct ak4114 *chip = snd_kcontrol_chip(kcontrol); |
1da177e4 LT |
333 | unsigned i; |
334 | ||
335 | for (i = 0; i < AK4114_REG_QSUB_SIZE; i++) | |
336 | ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i); | |
337 | return 0; | |
338 | } | |
339 | ||
340 | /* Don't forget to change AK4114_CONTROLS define!!! */ | |
97f02e05 | 341 | static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = { |
1da177e4 LT |
342 | { |
343 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
344 | .name = "IEC958 Parity Errors", | |
345 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
346 | .info = snd_ak4114_in_error_info, | |
347 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 348 | .private_value = offsetof(struct ak4114, parity_errors), |
1da177e4 LT |
349 | }, |
350 | { | |
351 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
352 | .name = "IEC958 V-Bit Errors", | |
353 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
354 | .info = snd_ak4114_in_error_info, | |
355 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 356 | .private_value = offsetof(struct ak4114, v_bit_errors), |
1da177e4 LT |
357 | }, |
358 | { | |
359 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
360 | .name = "IEC958 C-CRC Errors", | |
361 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
362 | .info = snd_ak4114_in_error_info, | |
363 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 364 | .private_value = offsetof(struct ak4114, ccrc_errors), |
1da177e4 LT |
365 | }, |
366 | { | |
367 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
368 | .name = "IEC958 Q-CRC Errors", | |
369 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
370 | .info = snd_ak4114_in_error_info, | |
371 | .get = snd_ak4114_in_error_get, | |
97f02e05 | 372 | .private_value = offsetof(struct ak4114, qcrc_errors), |
1da177e4 LT |
373 | }, |
374 | { | |
375 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
376 | .name = "IEC958 External Rate", | |
377 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
378 | .info = snd_ak4114_rate_info, | |
379 | .get = snd_ak4114_rate_get, | |
380 | }, | |
381 | { | |
382 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
383 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), | |
384 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
385 | .info = snd_ak4114_spdif_mask_info, | |
386 | .get = snd_ak4114_spdif_mask_get, | |
387 | }, | |
388 | { | |
389 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
390 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), | |
391 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
392 | .info = snd_ak4114_spdif_info, | |
393 | .get = snd_ak4114_spdif_playback_get, | |
394 | .put = snd_ak4114_spdif_playback_put, | |
395 | }, | |
396 | { | |
397 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
398 | .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK), | |
399 | .access = SNDRV_CTL_ELEM_ACCESS_READ, | |
400 | .info = snd_ak4114_spdif_mask_info, | |
401 | .get = snd_ak4114_spdif_mask_get, | |
402 | }, | |
403 | { | |
404 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
405 | .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), | |
406 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
407 | .info = snd_ak4114_spdif_info, | |
408 | .get = snd_ak4114_spdif_get, | |
409 | }, | |
410 | { | |
411 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
412 | .name = "IEC958 Preample Capture Default", | |
413 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
414 | .info = snd_ak4114_spdif_pinfo, | |
415 | .get = snd_ak4114_spdif_pget, | |
416 | }, | |
417 | { | |
418 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
419 | .name = "IEC958 Q-subcode Capture Default", | |
420 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
421 | .info = snd_ak4114_spdif_qinfo, | |
422 | .get = snd_ak4114_spdif_qget, | |
423 | }, | |
424 | { | |
425 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
426 | .name = "IEC958 Audio", | |
427 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
428 | .info = snd_ak4114_in_bit_info, | |
429 | .get = snd_ak4114_in_bit_get, | |
430 | .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0, | |
431 | }, | |
432 | { | |
433 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
434 | .name = "IEC958 Non-PCM Bitstream", | |
435 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
436 | .info = snd_ak4114_in_bit_info, | |
437 | .get = snd_ak4114_in_bit_get, | |
c4116ae7 | 438 | .private_value = (6<<8) | AK4114_REG_RCS0, |
1da177e4 LT |
439 | }, |
440 | { | |
441 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
442 | .name = "IEC958 DTS Bitstream", | |
443 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
444 | .info = snd_ak4114_in_bit_info, | |
445 | .get = snd_ak4114_in_bit_get, | |
c4116ae7 PH |
446 | .private_value = (3<<8) | AK4114_REG_RCS0, |
447 | }, | |
448 | { | |
449 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | |
450 | .name = "IEC958 PPL Lock Status", | |
451 | .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, | |
452 | .info = snd_ak4114_in_bit_info, | |
453 | .get = snd_ak4114_in_bit_get, | |
454 | .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0, | |
1da177e4 LT |
455 | } |
456 | }; | |
457 | ||
97f02e05 TI |
458 | int snd_ak4114_build(struct ak4114 *ak4114, |
459 | struct snd_pcm_substream *ply_substream, | |
460 | struct snd_pcm_substream *cap_substream) | |
1da177e4 | 461 | { |
97f02e05 | 462 | struct snd_kcontrol *kctl; |
1da177e4 LT |
463 | unsigned int idx; |
464 | int err; | |
465 | ||
466 | snd_assert(cap_substream, return -EINVAL); | |
467 | ak4114->playback_substream = ply_substream; | |
468 | ak4114->capture_substream = cap_substream; | |
469 | for (idx = 0; idx < AK4114_CONTROLS; idx++) { | |
470 | kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114); | |
471 | if (kctl == NULL) | |
472 | return -ENOMEM; | |
c4116ae7 | 473 | if (strstr(kctl->id.name, "Playback")) { |
1da177e4 LT |
474 | if (ply_substream == NULL) { |
475 | snd_ctl_free_one(kctl); | |
476 | ak4114->kctls[idx] = NULL; | |
477 | continue; | |
478 | } | |
479 | kctl->id.device = ply_substream->pcm->device; | |
480 | kctl->id.subdevice = ply_substream->number; | |
481 | } else { | |
482 | kctl->id.device = cap_substream->pcm->device; | |
483 | kctl->id.subdevice = cap_substream->number; | |
484 | } | |
485 | err = snd_ctl_add(ak4114->card, kctl); | |
486 | if (err < 0) | |
487 | return err; | |
488 | ak4114->kctls[idx] = kctl; | |
489 | } | |
51354ae3 TI |
490 | /* trigger workq */ |
491 | schedule_delayed_work(&ak4114->work, HZ / 10); | |
1da177e4 LT |
492 | return 0; |
493 | } | |
494 | ||
51354ae3 TI |
495 | /* notify kcontrols if any parameters are changed */ |
496 | static void ak4114_notify(struct ak4114 *ak4114, | |
497 | unsigned char rcs0, unsigned char rcs1, | |
498 | unsigned char c0, unsigned char c1) | |
499 | { | |
500 | if (!ak4114->kctls[0]) | |
501 | return; | |
502 | ||
503 | if (rcs0 & AK4114_PAR) | |
504 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
505 | &ak4114->kctls[0]->id); | |
506 | if (rcs0 & AK4114_V) | |
507 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
508 | &ak4114->kctls[1]->id); | |
509 | if (rcs1 & AK4114_CCRC) | |
510 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
511 | &ak4114->kctls[2]->id); | |
512 | if (rcs1 & AK4114_QCRC) | |
513 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
514 | &ak4114->kctls[3]->id); | |
515 | ||
516 | /* rate change */ | |
517 | if (c1 & 0xf0) | |
518 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
519 | &ak4114->kctls[4]->id); | |
520 | ||
521 | if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT)) | |
522 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
523 | &ak4114->kctls[9]->id); | |
524 | if (c0 & AK4114_QINT) | |
525 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
526 | &ak4114->kctls[10]->id); | |
527 | ||
528 | if (c0 & AK4114_AUDION) | |
529 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
530 | &ak4114->kctls[11]->id); | |
531 | if (c0 & AK4114_AUTO) | |
532 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
533 | &ak4114->kctls[12]->id); | |
534 | if (c0 & AK4114_DTSCD) | |
535 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
536 | &ak4114->kctls[13]->id); | |
c4116ae7 PH |
537 | if (c0 & AK4114_UNLCK) |
538 | snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE, | |
539 | &ak4114->kctls[14]->id); | |
51354ae3 TI |
540 | } |
541 | ||
97f02e05 | 542 | int snd_ak4114_external_rate(struct ak4114 *ak4114) |
1da177e4 LT |
543 | { |
544 | unsigned char rcs1; | |
545 | ||
546 | rcs1 = reg_read(ak4114, AK4114_REG_RCS1); | |
547 | return external_rate(rcs1); | |
548 | } | |
549 | ||
97f02e05 | 550 | int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags) |
1da177e4 | 551 | { |
97f02e05 | 552 | struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL; |
1da177e4 LT |
553 | unsigned long _flags; |
554 | int res = 0; | |
555 | unsigned char rcs0, rcs1; | |
556 | unsigned char c0, c1; | |
557 | ||
558 | rcs1 = reg_read(ak4114, AK4114_REG_RCS1); | |
559 | if (flags & AK4114_CHECK_NO_STAT) | |
560 | goto __rate; | |
561 | rcs0 = reg_read(ak4114, AK4114_REG_RCS0); | |
562 | spin_lock_irqsave(&ak4114->lock, _flags); | |
563 | if (rcs0 & AK4114_PAR) | |
564 | ak4114->parity_errors++; | |
565 | if (rcs1 & AK4114_V) | |
566 | ak4114->v_bit_errors++; | |
567 | if (rcs1 & AK4114_CCRC) | |
568 | ak4114->ccrc_errors++; | |
569 | if (rcs1 & AK4114_QCRC) | |
570 | ak4114->qcrc_errors++; | |
571 | c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^ | |
572 | (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)); | |
573 | c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0); | |
574 | ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT); | |
575 | ak4114->rcs1 = rcs1; | |
576 | spin_unlock_irqrestore(&ak4114->lock, _flags); | |
577 | ||
51354ae3 | 578 | ak4114_notify(ak4114, rcs0, rcs1, c0, c1); |
1da177e4 LT |
579 | if (ak4114->change_callback && (c0 | c1) != 0) |
580 | ak4114->change_callback(ak4114, c0, c1); | |
581 | ||
582 | __rate: | |
583 | /* compare rate */ | |
584 | res = external_rate(rcs1); | |
585 | if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) { | |
586 | snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags); | |
587 | if (snd_pcm_running(ak4114->capture_substream)) { | |
99b359ba | 588 | // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res); |
1da177e4 | 589 | snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING); |
1da177e4 LT |
590 | res = 1; |
591 | } | |
592 | snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags); | |
593 | } | |
594 | return res; | |
595 | } | |
596 | ||
c4028958 | 597 | static void ak4114_stats(struct work_struct *work) |
1da177e4 | 598 | { |
c4028958 | 599 | struct ak4114 *chip = container_of(work, struct ak4114, work.work); |
1da177e4 | 600 | |
c4116ae7 | 601 | if (!chip->init) |
51354ae3 TI |
602 | snd_ak4114_check_rate_and_errors(chip, 0); |
603 | ||
4014c38b | 604 | schedule_delayed_work(&chip->work, HZ / 10); |
1da177e4 LT |
605 | } |
606 | ||
607 | EXPORT_SYMBOL(snd_ak4114_create); | |
608 | EXPORT_SYMBOL(snd_ak4114_reg_write); | |
609 | EXPORT_SYMBOL(snd_ak4114_reinit); | |
610 | EXPORT_SYMBOL(snd_ak4114_build); | |
611 | EXPORT_SYMBOL(snd_ak4114_external_rate); | |
612 | EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors); |