swiotlb: add hwdev to swiotlb_phys_to_bus() / swiotlb_sg_to_bus()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / lib / swiotlb.c
CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4 23#include <linux/spinlock.h>
8c5df16b 24#include <linux/swiotlb.h>
1da177e4 25#include <linux/string.h>
0016fdee 26#include <linux/swiotlb.h>
1da177e4
LT
27#include <linux/types.h>
28#include <linux/ctype.h>
ef9b1893 29#include <linux/highmem.h>
1da177e4
LT
30
31#include <asm/io.h>
1da177e4 32#include <asm/dma.h>
17e5ad6c 33#include <asm/scatterlist.h>
1da177e4
LT
34
35#include <linux/init.h>
36#include <linux/bootmem.h>
a8522509 37#include <linux/iommu-helper.h>
1da177e4
LT
38
39#define OFFSET(val,align) ((unsigned long) \
40 ( (val) & ( (align) - 1)))
41
0b9afede
AW
42#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
43
44/*
45 * Minimum IO TLB size to bother booting with. Systems with mainly
46 * 64bit capable cards will only lightly use the swiotlb. If we can't
47 * allocate a contiguous 1MB, we're probably in trouble anyway.
48 */
49#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
50
de69e0f0
JL
51/*
52 * Enumeration for sync targets
53 */
54enum dma_sync_target {
55 SYNC_FOR_CPU = 0,
56 SYNC_FOR_DEVICE = 1,
57};
58
1da177e4
LT
59int swiotlb_force;
60
61/*
62 * Used to do a quick range check in swiotlb_unmap_single and
63 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
64 * API.
65 */
66static char *io_tlb_start, *io_tlb_end;
67
68/*
69 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
70 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
71 */
72static unsigned long io_tlb_nslabs;
73
74/*
75 * When the IOMMU overflows we return a fallback buffer. This sets the size.
76 */
77static unsigned long io_tlb_overflow = 32*1024;
78
79void *io_tlb_overflow_buffer;
80
81/*
82 * This is a free list describing the number of free entries available from
83 * each index
84 */
85static unsigned int *io_tlb_list;
86static unsigned int io_tlb_index;
87
88/*
89 * We need to save away the original address corresponding to a mapped entry
90 * for the sync operations.
91 */
ef9b1893
JF
92static struct swiotlb_phys_addr {
93 struct page *page;
94 unsigned int offset;
95} *io_tlb_orig_addr;
1da177e4
LT
96
97/*
98 * Protect the above data structures in the map and unmap calls
99 */
100static DEFINE_SPINLOCK(io_tlb_lock);
101
102static int __init
103setup_io_tlb_npages(char *str)
104{
105 if (isdigit(*str)) {
e8579e72 106 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
107 /* avoid tail segment of size < IO_TLB_SEGSIZE */
108 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
109 }
110 if (*str == ',')
111 ++str;
112 if (!strcmp(str, "force"))
113 swiotlb_force = 1;
114 return 1;
115}
116__setup("swiotlb=", setup_io_tlb_npages);
117/* make io_tlb_overflow tunable too? */
118
8c5df16b
JF
119void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs)
120{
121 return alloc_bootmem_low_pages(size);
122}
123
124void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
125{
126 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
127}
128
70a7d3cc 129dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
e08e1f7a
IC
130{
131 return paddr;
132}
133
134phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
135{
136 return baddr;
137}
138
70a7d3cc
JF
139static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
140 volatile void *address)
e08e1f7a 141{
70a7d3cc 142 return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
e08e1f7a
IC
143}
144
145static void *swiotlb_bus_to_virt(dma_addr_t address)
146{
147 return phys_to_virt(swiotlb_bus_to_phys(address));
148}
149
b81ea27b
IC
150int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
151{
152 return 0;
153}
154
70a7d3cc 155static dma_addr_t swiotlb_sg_to_bus(struct device *hwdev, struct scatterlist *sg)
ef9b1893 156{
70a7d3cc 157 return swiotlb_phys_to_bus(hwdev, page_to_phys(sg_page(sg)) + sg->offset);
ef9b1893
JF
158}
159
2e5b2b86
IC
160static void swiotlb_print_info(unsigned long bytes)
161{
162 phys_addr_t pstart, pend;
2e5b2b86
IC
163
164 pstart = virt_to_phys(io_tlb_start);
165 pend = virt_to_phys(io_tlb_end);
166
2e5b2b86
IC
167 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
168 bytes >> 20, io_tlb_start, io_tlb_end);
70a7d3cc
JF
169 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
170 (unsigned long long)pstart,
171 (unsigned long long)pend);
2e5b2b86
IC
172}
173
1da177e4
LT
174/*
175 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 176 * structures for the software IO TLB used to implement the DMA API.
1da177e4 177 */
563aaf06
JB
178void __init
179swiotlb_init_with_default_size(size_t default_size)
1da177e4 180{
563aaf06 181 unsigned long i, bytes;
1da177e4
LT
182
183 if (!io_tlb_nslabs) {
e8579e72 184 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
185 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
186 }
187
563aaf06
JB
188 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
189
1da177e4
LT
190 /*
191 * Get IO TLB memory from the low pages
192 */
8c5df16b 193 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
1da177e4
LT
194 if (!io_tlb_start)
195 panic("Cannot allocate SWIOTLB buffer");
563aaf06 196 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
197
198 /*
199 * Allocate and initialize the free list array. This array is used
200 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
201 * between io_tlb_start and io_tlb_end.
202 */
203 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 204 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
205 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
206 io_tlb_index = 0;
ef9b1893 207 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
1da177e4
LT
208
209 /*
210 * Get the overflow emergency buffer
211 */
212 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
213 if (!io_tlb_overflow_buffer)
214 panic("Cannot allocate SWIOTLB overflow buffer!\n");
215
2e5b2b86 216 swiotlb_print_info(bytes);
1da177e4
LT
217}
218
563aaf06
JB
219void __init
220swiotlb_init(void)
1da177e4 221{
25667d67 222 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
223}
224
0b9afede
AW
225/*
226 * Systems with larger DMA zones (those that don't support ISA) can
227 * initialize the swiotlb later using the slab allocator if needed.
228 * This should be just like above, but with some error catching.
229 */
230int
563aaf06 231swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 232{
563aaf06 233 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
234 unsigned int order;
235
236 if (!io_tlb_nslabs) {
237 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
238 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
239 }
240
241 /*
242 * Get IO TLB memory from the low pages
243 */
563aaf06 244 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 245 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 246 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
247
248 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
8c5df16b 249 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
0b9afede
AW
250 if (io_tlb_start)
251 break;
252 order--;
253 }
254
255 if (!io_tlb_start)
256 goto cleanup1;
257
563aaf06 258 if (order != get_order(bytes)) {
0b9afede
AW
259 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
260 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
261 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 262 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 263 }
563aaf06
JB
264 io_tlb_end = io_tlb_start + bytes;
265 memset(io_tlb_start, 0, bytes);
0b9afede
AW
266
267 /*
268 * Allocate and initialize the free list array. This array is used
269 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
270 * between io_tlb_start and io_tlb_end.
271 */
272 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
273 get_order(io_tlb_nslabs * sizeof(int)));
274 if (!io_tlb_list)
275 goto cleanup2;
276
277 for (i = 0; i < io_tlb_nslabs; i++)
278 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
279 io_tlb_index = 0;
280
ef9b1893
JF
281 io_tlb_orig_addr = (struct swiotlb_phys_addr *)__get_free_pages(GFP_KERNEL,
282 get_order(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr)));
0b9afede
AW
283 if (!io_tlb_orig_addr)
284 goto cleanup3;
285
ef9b1893 286 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
0b9afede
AW
287
288 /*
289 * Get the overflow emergency buffer
290 */
291 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
292 get_order(io_tlb_overflow));
293 if (!io_tlb_overflow_buffer)
294 goto cleanup4;
295
2e5b2b86 296 swiotlb_print_info(bytes);
0b9afede
AW
297
298 return 0;
299
300cleanup4:
25667d67
TL
301 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
302 sizeof(char *)));
0b9afede
AW
303 io_tlb_orig_addr = NULL;
304cleanup3:
25667d67
TL
305 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
306 sizeof(int)));
0b9afede 307 io_tlb_list = NULL;
0b9afede 308cleanup2:
563aaf06 309 io_tlb_end = NULL;
0b9afede
AW
310 free_pages((unsigned long)io_tlb_start, order);
311 io_tlb_start = NULL;
312cleanup1:
313 io_tlb_nslabs = req_nslabs;
314 return -ENOMEM;
315}
316
be6b0267 317static int
2797982e 318address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
1da177e4 319{
07a2c01a 320 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
1da177e4
LT
321}
322
b81ea27b
IC
323static inline int range_needs_mapping(void *ptr, size_t size)
324{
325 return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
326}
327
640aebfe
FT
328static int is_swiotlb_buffer(char *addr)
329{
330 return addr >= io_tlb_start && addr < io_tlb_end;
331}
332
ef9b1893 333static struct swiotlb_phys_addr swiotlb_bus_to_phys_addr(char *dma_addr)
1b548f66 334{
ef9b1893
JF
335 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
336 struct swiotlb_phys_addr buffer = io_tlb_orig_addr[index];
337 buffer.offset += (long)dma_addr & ((1 << IO_TLB_SHIFT) - 1);
338 buffer.page += buffer.offset >> PAGE_SHIFT;
339 buffer.offset &= PAGE_SIZE - 1;
340 return buffer;
341}
342
343static void
344__sync_single(struct swiotlb_phys_addr buffer, char *dma_addr, size_t size, int dir)
345{
346 if (PageHighMem(buffer.page)) {
347 size_t len, bytes;
348 char *dev, *host, *kmp;
349
350 len = size;
351 while (len != 0) {
352 unsigned long flags;
353
354 bytes = len;
355 if ((bytes + buffer.offset) > PAGE_SIZE)
356 bytes = PAGE_SIZE - buffer.offset;
357 local_irq_save(flags); /* protects KM_BOUNCE_READ */
358 kmp = kmap_atomic(buffer.page, KM_BOUNCE_READ);
359 dev = dma_addr + size - len;
360 host = kmp + buffer.offset;
361 if (dir == DMA_FROM_DEVICE)
362 memcpy(host, dev, bytes);
363 else
364 memcpy(dev, host, bytes);
365 kunmap_atomic(kmp, KM_BOUNCE_READ);
366 local_irq_restore(flags);
367 len -= bytes;
368 buffer.page++;
369 buffer.offset = 0;
370 }
371 } else {
372 void *v = page_address(buffer.page) + buffer.offset;
373
374 if (dir == DMA_TO_DEVICE)
375 memcpy(dma_addr, v, size);
376 else
377 memcpy(v, dma_addr, size);
378 }
1b548f66
JF
379}
380
1da177e4
LT
381/*
382 * Allocates bounce buffer and returns its kernel virtual address.
383 */
384static void *
ef9b1893 385map_single(struct device *hwdev, struct swiotlb_phys_addr buffer, size_t size, int dir)
1da177e4
LT
386{
387 unsigned long flags;
388 char *dma_addr;
389 unsigned int nslots, stride, index, wrap;
390 int i;
681cc5cd
FT
391 unsigned long start_dma_addr;
392 unsigned long mask;
393 unsigned long offset_slots;
394 unsigned long max_slots;
ef9b1893 395 struct swiotlb_phys_addr slot_buf;
681cc5cd
FT
396
397 mask = dma_get_seg_boundary(hwdev);
70a7d3cc 398 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
681cc5cd
FT
399
400 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
a5ddde4a
IC
401
402 /*
403 * Carefully handle integer overflow which can occur when mask == ~0UL.
404 */
b15a3891
JB
405 max_slots = mask + 1
406 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
407 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
408
409 /*
410 * For mappings greater than a page, we limit the stride (and
411 * hence alignment) to a page size.
412 */
413 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
414 if (size > PAGE_SIZE)
415 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
416 else
417 stride = 1;
418
34814545 419 BUG_ON(!nslots);
1da177e4
LT
420
421 /*
422 * Find suitable number of IO TLB entries size that will fit this
423 * request and allocate a buffer from that IO TLB pool.
424 */
425 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
426 index = ALIGN(io_tlb_index, stride);
427 if (index >= io_tlb_nslabs)
428 index = 0;
429 wrap = index;
430
431 do {
a8522509
FT
432 while (iommu_is_span_boundary(index, nslots, offset_slots,
433 max_slots)) {
b15a3891
JB
434 index += stride;
435 if (index >= io_tlb_nslabs)
436 index = 0;
a7133a15
AM
437 if (index == wrap)
438 goto not_found;
439 }
440
441 /*
442 * If we find a slot that indicates we have 'nslots' number of
443 * contiguous buffers, we allocate the buffers from that slot
444 * and mark the entries as '0' indicating unavailable.
445 */
446 if (io_tlb_list[index] >= nslots) {
447 int count = 0;
448
449 for (i = index; i < (int) (index + nslots); i++)
450 io_tlb_list[i] = 0;
451 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
452 io_tlb_list[i] = ++count;
453 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 454
a7133a15
AM
455 /*
456 * Update the indices to avoid searching in the next
457 * round.
458 */
459 io_tlb_index = ((index + nslots) < io_tlb_nslabs
460 ? (index + nslots) : 0);
461
462 goto found;
463 }
464 index += stride;
465 if (index >= io_tlb_nslabs)
466 index = 0;
467 } while (index != wrap);
468
469not_found:
470 spin_unlock_irqrestore(&io_tlb_lock, flags);
471 return NULL;
472found:
1da177e4
LT
473 spin_unlock_irqrestore(&io_tlb_lock, flags);
474
475 /*
476 * Save away the mapping from the original address to the DMA address.
477 * This is needed when we sync the memory. Then we sync the buffer if
478 * needed.
479 */
ef9b1893
JF
480 slot_buf = buffer;
481 for (i = 0; i < nslots; i++) {
482 slot_buf.page += slot_buf.offset >> PAGE_SHIFT;
483 slot_buf.offset &= PAGE_SIZE - 1;
484 io_tlb_orig_addr[index+i] = slot_buf;
485 slot_buf.offset += 1 << IO_TLB_SHIFT;
486 }
1da177e4 487 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
1b548f66 488 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
1da177e4
LT
489
490 return dma_addr;
491}
492
493/*
494 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
495 */
496static void
497unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
498{
499 unsigned long flags;
500 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
501 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
ef9b1893 502 struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
1da177e4
LT
503
504 /*
505 * First, sync the memory before unmapping the entry
506 */
ef9b1893 507 if ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))
1da177e4
LT
508 /*
509 * bounce... copy the data back into the original buffer * and
510 * delete the bounce buffer.
511 */
1b548f66 512 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
1da177e4
LT
513
514 /*
515 * Return the buffer to the free list by setting the corresponding
516 * entries to indicate the number of contigous entries available.
517 * While returning the entries to the free list, we merge the entries
518 * with slots below and above the pool being returned.
519 */
520 spin_lock_irqsave(&io_tlb_lock, flags);
521 {
522 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
523 io_tlb_list[index + nslots] : 0);
524 /*
525 * Step 1: return the slots to the free list, merging the
526 * slots with superceeding slots
527 */
528 for (i = index + nslots - 1; i >= index; i--)
529 io_tlb_list[i] = ++count;
530 /*
531 * Step 2: merge the returned slots with the preceding slots,
532 * if available (non zero)
533 */
534 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
535 io_tlb_list[i] = ++count;
536 }
537 spin_unlock_irqrestore(&io_tlb_lock, flags);
538}
539
540static void
de69e0f0
JL
541sync_single(struct device *hwdev, char *dma_addr, size_t size,
542 int dir, int target)
1da177e4 543{
ef9b1893 544 struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
df336d1c 545
de69e0f0
JL
546 switch (target) {
547 case SYNC_FOR_CPU:
548 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
1b548f66 549 __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
34814545
ES
550 else
551 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
552 break;
553 case SYNC_FOR_DEVICE:
554 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
1b548f66 555 __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
34814545
ES
556 else
557 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
558 break;
559 default:
1da177e4 560 BUG();
de69e0f0 561 }
1da177e4
LT
562}
563
564void *
565swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 566 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 567{
563aaf06 568 dma_addr_t dev_addr;
1da177e4
LT
569 void *ret;
570 int order = get_order(size);
1e74f300
FT
571 u64 dma_mask = DMA_32BIT_MASK;
572
573 if (hwdev && hwdev->coherent_dma_mask)
574 dma_mask = hwdev->coherent_dma_mask;
1da177e4 575
25667d67 576 ret = (void *)__get_free_pages(flags, order);
70a7d3cc
JF
577 if (ret &&
578 !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
579 size)) {
1da177e4
LT
580 /*
581 * The allocated memory isn't reachable by the device.
582 * Fall back on swiotlb_map_single().
583 */
584 free_pages((unsigned long) ret, order);
585 ret = NULL;
586 }
587 if (!ret) {
588 /*
589 * We are either out of memory or the device can't DMA
590 * to GFP_DMA memory; fall back on
591 * swiotlb_map_single(), which will grab memory from
592 * the lowest available address range.
593 */
ef9b1893
JF
594 struct swiotlb_phys_addr buffer;
595 buffer.page = virt_to_page(NULL);
596 buffer.offset = 0;
597 ret = map_single(hwdev, buffer, size, DMA_FROM_DEVICE);
9dfda12b 598 if (!ret)
1da177e4 599 return NULL;
1da177e4
LT
600 }
601
602 memset(ret, 0, size);
70a7d3cc 603 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
1da177e4
LT
604
605 /* Confirm address can be DMA'd by device */
1e74f300 606 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
563aaf06 607 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
1e74f300 608 (unsigned long long)dma_mask,
563aaf06 609 (unsigned long long)dev_addr);
a2b89b59
FT
610
611 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
612 unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
613 return NULL;
1da177e4
LT
614 }
615 *dma_handle = dev_addr;
616 return ret;
617}
618
619void
620swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
621 dma_addr_t dma_handle)
622{
aa24886e 623 WARN_ON(irqs_disabled());
640aebfe 624 if (!is_swiotlb_buffer(vaddr))
1da177e4
LT
625 free_pages((unsigned long) vaddr, get_order(size));
626 else
627 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
21f6c4de 628 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4
LT
629}
630
631static void
632swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
633{
634 /*
635 * Ran out of IOMMU space for this operation. This is very bad.
636 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 637 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
638 * When the mapping is small enough return a static buffer to limit
639 * the damage, or panic when the transfer is too big.
640 */
563aaf06 641 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
642 "device %s\n", size, dev ? dev->bus_id : "?");
643
644 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
645 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
646 panic("DMA: Memory would be corrupted\n");
647 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
648 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
649 }
650}
651
652/*
653 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 654 * physical address to use is returned.
1da177e4
LT
655 *
656 * Once the device is given the dma address, the device owns this memory until
657 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
658 */
659dma_addr_t
309df0c5
AK
660swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
661 int dir, struct dma_attrs *attrs)
1da177e4 662{
70a7d3cc 663 dma_addr_t dev_addr = swiotlb_virt_to_bus(hwdev, ptr);
1da177e4 664 void *map;
ef9b1893 665 struct swiotlb_phys_addr buffer;
1da177e4 666
34814545 667 BUG_ON(dir == DMA_NONE);
1da177e4
LT
668 /*
669 * If the pointer passed in happens to be in the device's DMA window,
670 * we can safely return the device addr and not worry about bounce
671 * buffering it.
672 */
b81ea27b
IC
673 if (!address_needs_mapping(hwdev, dev_addr, size) &&
674 !range_needs_mapping(ptr, size))
1da177e4
LT
675 return dev_addr;
676
677 /*
678 * Oh well, have to allocate and map a bounce buffer.
679 */
ef9b1893
JF
680 buffer.page = virt_to_page(ptr);
681 buffer.offset = (unsigned long)ptr & ~PAGE_MASK;
682 map = map_single(hwdev, buffer, size, dir);
1da177e4
LT
683 if (!map) {
684 swiotlb_full(hwdev, size, dir, 1);
685 map = io_tlb_overflow_buffer;
686 }
687
70a7d3cc 688 dev_addr = swiotlb_virt_to_bus(hwdev, map);
1da177e4
LT
689
690 /*
691 * Ensure that the address returned is DMA'ble
692 */
2797982e 693 if (address_needs_mapping(hwdev, dev_addr, size))
1da177e4
LT
694 panic("map_single: bounce buffer is not DMA'ble");
695
696 return dev_addr;
697}
309df0c5
AK
698EXPORT_SYMBOL(swiotlb_map_single_attrs);
699
700dma_addr_t
701swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
702{
703 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
704}
1da177e4 705
1da177e4
LT
706/*
707 * Unmap a single streaming mode DMA translation. The dma_addr and size must
708 * match what was provided for in a previous swiotlb_map_single call. All
709 * other usages are undefined.
710 *
711 * After this call, reads by the cpu to the buffer are guaranteed to see
712 * whatever the device wrote there.
713 */
714void
309df0c5
AK
715swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
716 size_t size, int dir, struct dma_attrs *attrs)
1da177e4 717{
e08e1f7a 718 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 719
34814545 720 BUG_ON(dir == DMA_NONE);
640aebfe 721 if (is_swiotlb_buffer(dma_addr))
1da177e4
LT
722 unmap_single(hwdev, dma_addr, size, dir);
723 else if (dir == DMA_FROM_DEVICE)
cde14bbf 724 dma_mark_clean(dma_addr, size);
1da177e4 725}
309df0c5 726EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
1da177e4 727
309df0c5
AK
728void
729swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
730 int dir)
731{
732 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
733}
1da177e4
LT
734/*
735 * Make physical memory consistent for a single streaming mode DMA translation
736 * after a transfer.
737 *
738 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
739 * using the cpu, yet do not wish to teardown the dma mapping, you must
740 * call this function before doing so. At the next point you give the dma
1da177e4
LT
741 * address back to the card, you must first perform a
742 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
743 */
be6b0267 744static void
8270f3f1 745swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 746 size_t size, int dir, int target)
1da177e4 747{
e08e1f7a 748 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 749
34814545 750 BUG_ON(dir == DMA_NONE);
640aebfe 751 if (is_swiotlb_buffer(dma_addr))
de69e0f0 752 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 753 else if (dir == DMA_FROM_DEVICE)
cde14bbf 754 dma_mark_clean(dma_addr, size);
1da177e4
LT
755}
756
8270f3f1
JL
757void
758swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
759 size_t size, int dir)
760{
de69e0f0 761 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
762}
763
1da177e4
LT
764void
765swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
766 size_t size, int dir)
767{
de69e0f0 768 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
769}
770
878a97cf
JL
771/*
772 * Same as above, but for a sub-range of the mapping.
773 */
be6b0267 774static void
878a97cf 775swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
776 unsigned long offset, size_t size,
777 int dir, int target)
878a97cf 778{
e08e1f7a 779 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
878a97cf 780
34814545 781 BUG_ON(dir == DMA_NONE);
640aebfe 782 if (is_swiotlb_buffer(dma_addr))
de69e0f0 783 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 784 else if (dir == DMA_FROM_DEVICE)
cde14bbf 785 dma_mark_clean(dma_addr, size);
878a97cf
JL
786}
787
788void
789swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
790 unsigned long offset, size_t size, int dir)
791{
de69e0f0
JL
792 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
793 SYNC_FOR_CPU);
878a97cf
JL
794}
795
796void
797swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
798 unsigned long offset, size_t size, int dir)
799{
de69e0f0
JL
800 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
801 SYNC_FOR_DEVICE);
878a97cf
JL
802}
803
309df0c5
AK
804void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
805 struct dma_attrs *);
1da177e4
LT
806/*
807 * Map a set of buffers described by scatterlist in streaming mode for DMA.
808 * This is the scatter-gather version of the above swiotlb_map_single
809 * interface. Here the scatter gather list elements are each tagged with the
810 * appropriate dma address and length. They are obtained via
811 * sg_dma_{address,length}(SG).
812 *
813 * NOTE: An implementation may be able to use a smaller number of
814 * DMA address/length pairs than there are SG table elements.
815 * (for example via virtual mapping capabilities)
816 * The routine returns the number of addr/length pairs actually
817 * used, at most nents.
818 *
819 * Device ownership issues as mentioned above for swiotlb_map_single are the
820 * same here.
821 */
822int
309df0c5
AK
823swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
824 int dir, struct dma_attrs *attrs)
1da177e4 825{
dbfd49fe 826 struct scatterlist *sg;
ef9b1893 827 struct swiotlb_phys_addr buffer;
563aaf06 828 dma_addr_t dev_addr;
1da177e4
LT
829 int i;
830
34814545 831 BUG_ON(dir == DMA_NONE);
1da177e4 832
dbfd49fe 833 for_each_sg(sgl, sg, nelems, i) {
70a7d3cc 834 dev_addr = swiotlb_sg_to_bus(hwdev, sg);
b81ea27b 835 if (range_needs_mapping(sg_virt(sg), sg->length) ||
2797982e 836 address_needs_mapping(hwdev, dev_addr, sg->length)) {
ef9b1893
JF
837 void *map;
838 buffer.page = sg_page(sg);
839 buffer.offset = sg->offset;
840 map = map_single(hwdev, buffer, sg->length, dir);
7e870233 841 if (!map) {
1da177e4
LT
842 /* Don't panic here, we expect map_sg users
843 to do proper error handling. */
844 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
845 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
846 attrs);
dbfd49fe 847 sgl[0].dma_length = 0;
1da177e4
LT
848 return 0;
849 }
70a7d3cc 850 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
1da177e4
LT
851 } else
852 sg->dma_address = dev_addr;
853 sg->dma_length = sg->length;
854 }
855 return nelems;
856}
309df0c5
AK
857EXPORT_SYMBOL(swiotlb_map_sg_attrs);
858
859int
860swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
861 int dir)
862{
863 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
864}
1da177e4
LT
865
866/*
867 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
868 * concerning calls here are the same as for swiotlb_unmap_single() above.
869 */
870void
309df0c5
AK
871swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
872 int nelems, int dir, struct dma_attrs *attrs)
1da177e4 873{
dbfd49fe 874 struct scatterlist *sg;
1da177e4
LT
875 int i;
876
34814545 877 BUG_ON(dir == DMA_NONE);
1da177e4 878
dbfd49fe 879 for_each_sg(sgl, sg, nelems, i) {
70a7d3cc 880 if (sg->dma_address != swiotlb_sg_to_bus(hwdev, sg))
e08e1f7a 881 unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
93fbff63 882 sg->dma_length, dir);
1da177e4 883 else if (dir == DMA_FROM_DEVICE)
ef9b1893 884 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 885 }
1da177e4 886}
309df0c5
AK
887EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
888
889void
890swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
891 int dir)
892{
893 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
894}
1da177e4
LT
895
896/*
897 * Make physical memory consistent for a set of streaming mode DMA translations
898 * after a transfer.
899 *
900 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
901 * and usage.
902 */
be6b0267 903static void
dbfd49fe 904swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 905 int nelems, int dir, int target)
1da177e4 906{
dbfd49fe 907 struct scatterlist *sg;
1da177e4
LT
908 int i;
909
34814545 910 BUG_ON(dir == DMA_NONE);
1da177e4 911
dbfd49fe 912 for_each_sg(sgl, sg, nelems, i) {
70a7d3cc 913 if (sg->dma_address != swiotlb_sg_to_bus(hwdev, sg))
e08e1f7a 914 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
de69e0f0 915 sg->dma_length, dir, target);
cde14bbf 916 else if (dir == DMA_FROM_DEVICE)
ef9b1893 917 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 918 }
1da177e4
LT
919}
920
8270f3f1
JL
921void
922swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
923 int nelems, int dir)
924{
de69e0f0 925 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1
JL
926}
927
1da177e4
LT
928void
929swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
930 int nelems, int dir)
931{
de69e0f0 932 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
933}
934
935int
8d8bb39b 936swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 937{
70a7d3cc 938 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
1da177e4
LT
939}
940
941/*
17e5ad6c 942 * Return whether the given device DMA address mask can be supported
1da177e4 943 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 944 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
945 * this function.
946 */
947int
563aaf06 948swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 949{
70a7d3cc 950 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
1da177e4
LT
951}
952
1da177e4
LT
953EXPORT_SYMBOL(swiotlb_map_single);
954EXPORT_SYMBOL(swiotlb_unmap_single);
955EXPORT_SYMBOL(swiotlb_map_sg);
956EXPORT_SYMBOL(swiotlb_unmap_sg);
957EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
958EXPORT_SYMBOL(swiotlb_sync_single_for_device);
878a97cf
JL
959EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
960EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
LT
961EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
962EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
963EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
964EXPORT_SYMBOL(swiotlb_alloc_coherent);
965EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 966EXPORT_SYMBOL(swiotlb_dma_supported);