Commit | Line | Data |
---|---|---|
0793a61d TG |
1 | /* |
2 | * Performance counter core code | |
3 | * | |
98144511 IM |
4 | * Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de> |
5 | * Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar | |
6 | * Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com> | |
7b732a75 PZ |
7 | * |
8 | * For licensing details see kernel-base/COPYING | |
0793a61d TG |
9 | */ |
10 | ||
11 | #include <linux/fs.h> | |
b9cacc7b | 12 | #include <linux/mm.h> |
0793a61d TG |
13 | #include <linux/cpu.h> |
14 | #include <linux/smp.h> | |
04289bb9 | 15 | #include <linux/file.h> |
0793a61d TG |
16 | #include <linux/poll.h> |
17 | #include <linux/sysfs.h> | |
18 | #include <linux/ptrace.h> | |
19 | #include <linux/percpu.h> | |
b9cacc7b PZ |
20 | #include <linux/vmstat.h> |
21 | #include <linux/hardirq.h> | |
22 | #include <linux/rculist.h> | |
0793a61d TG |
23 | #include <linux/uaccess.h> |
24 | #include <linux/syscalls.h> | |
25 | #include <linux/anon_inodes.h> | |
aa9c4c0f | 26 | #include <linux/kernel_stat.h> |
0793a61d | 27 | #include <linux/perf_counter.h> |
0a4a9391 | 28 | #include <linux/dcache.h> |
0793a61d | 29 | |
4e193bd4 TB |
30 | #include <asm/irq_regs.h> |
31 | ||
0793a61d TG |
32 | /* |
33 | * Each CPU has a list of per CPU counters: | |
34 | */ | |
35 | DEFINE_PER_CPU(struct perf_cpu_context, perf_cpu_context); | |
36 | ||
088e2852 | 37 | int perf_max_counters __read_mostly = 1; |
0793a61d TG |
38 | static int perf_reserved_percpu __read_mostly; |
39 | static int perf_overcommit __read_mostly = 1; | |
40 | ||
9ee318a7 PZ |
41 | static atomic_t nr_mmap_tracking __read_mostly; |
42 | static atomic_t nr_munmap_tracking __read_mostly; | |
43 | static atomic_t nr_comm_tracking __read_mostly; | |
44 | ||
1ccd1549 PZ |
45 | int sysctl_perf_counter_priv __read_mostly; /* do we need to be privileged */ |
46 | ||
0793a61d TG |
47 | /* |
48 | * Mutex for (sysadmin-configurable) counter reservations: | |
49 | */ | |
50 | static DEFINE_MUTEX(perf_resource_mutex); | |
51 | ||
52 | /* | |
53 | * Architecture provided APIs - weak aliases: | |
54 | */ | |
4aeb0b42 | 55 | extern __weak const struct pmu *hw_perf_counter_init(struct perf_counter *counter) |
0793a61d | 56 | { |
ff6f0541 | 57 | return NULL; |
0793a61d TG |
58 | } |
59 | ||
01b2838c | 60 | u64 __weak hw_perf_save_disable(void) { return 0; } |
01ea1cca | 61 | void __weak hw_perf_restore(u64 ctrl) { barrier(); } |
01d0287f | 62 | void __weak hw_perf_counter_setup(int cpu) { barrier(); } |
3cbed429 PM |
63 | int __weak hw_perf_group_sched_in(struct perf_counter *group_leader, |
64 | struct perf_cpu_context *cpuctx, | |
65 | struct perf_counter_context *ctx, int cpu) | |
66 | { | |
67 | return 0; | |
68 | } | |
0793a61d | 69 | |
4eb96fcf PM |
70 | void __weak perf_counter_print_debug(void) { } |
71 | ||
04289bb9 IM |
72 | static void |
73 | list_add_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
74 | { | |
75 | struct perf_counter *group_leader = counter->group_leader; | |
76 | ||
77 | /* | |
78 | * Depending on whether it is a standalone or sibling counter, | |
79 | * add it straight to the context's counter list, or to the group | |
80 | * leader's sibling list: | |
81 | */ | |
82 | if (counter->group_leader == counter) | |
83 | list_add_tail(&counter->list_entry, &ctx->counter_list); | |
5c148194 | 84 | else { |
04289bb9 | 85 | list_add_tail(&counter->list_entry, &group_leader->sibling_list); |
5c148194 PZ |
86 | group_leader->nr_siblings++; |
87 | } | |
592903cd PZ |
88 | |
89 | list_add_rcu(&counter->event_entry, &ctx->event_list); | |
04289bb9 IM |
90 | } |
91 | ||
92 | static void | |
93 | list_del_counter(struct perf_counter *counter, struct perf_counter_context *ctx) | |
94 | { | |
95 | struct perf_counter *sibling, *tmp; | |
96 | ||
97 | list_del_init(&counter->list_entry); | |
592903cd | 98 | list_del_rcu(&counter->event_entry); |
04289bb9 | 99 | |
5c148194 PZ |
100 | if (counter->group_leader != counter) |
101 | counter->group_leader->nr_siblings--; | |
102 | ||
04289bb9 IM |
103 | /* |
104 | * If this was a group counter with sibling counters then | |
105 | * upgrade the siblings to singleton counters by adding them | |
106 | * to the context list directly: | |
107 | */ | |
108 | list_for_each_entry_safe(sibling, tmp, | |
109 | &counter->sibling_list, list_entry) { | |
110 | ||
75564232 | 111 | list_move_tail(&sibling->list_entry, &ctx->counter_list); |
04289bb9 IM |
112 | sibling->group_leader = sibling; |
113 | } | |
114 | } | |
115 | ||
3b6f9e5c PM |
116 | static void |
117 | counter_sched_out(struct perf_counter *counter, | |
118 | struct perf_cpu_context *cpuctx, | |
119 | struct perf_counter_context *ctx) | |
120 | { | |
121 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
122 | return; | |
123 | ||
124 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
4af4998b | 125 | counter->tstamp_stopped = ctx->time; |
4aeb0b42 | 126 | counter->pmu->disable(counter); |
3b6f9e5c PM |
127 | counter->oncpu = -1; |
128 | ||
129 | if (!is_software_counter(counter)) | |
130 | cpuctx->active_oncpu--; | |
131 | ctx->nr_active--; | |
132 | if (counter->hw_event.exclusive || !cpuctx->active_oncpu) | |
133 | cpuctx->exclusive = 0; | |
134 | } | |
135 | ||
d859e29f PM |
136 | static void |
137 | group_sched_out(struct perf_counter *group_counter, | |
138 | struct perf_cpu_context *cpuctx, | |
139 | struct perf_counter_context *ctx) | |
140 | { | |
141 | struct perf_counter *counter; | |
142 | ||
143 | if (group_counter->state != PERF_COUNTER_STATE_ACTIVE) | |
144 | return; | |
145 | ||
146 | counter_sched_out(group_counter, cpuctx, ctx); | |
147 | ||
148 | /* | |
149 | * Schedule out siblings (if any): | |
150 | */ | |
151 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) | |
152 | counter_sched_out(counter, cpuctx, ctx); | |
153 | ||
154 | if (group_counter->hw_event.exclusive) | |
155 | cpuctx->exclusive = 0; | |
156 | } | |
157 | ||
0793a61d TG |
158 | /* |
159 | * Cross CPU call to remove a performance counter | |
160 | * | |
161 | * We disable the counter on the hardware level first. After that we | |
162 | * remove it from the context list. | |
163 | */ | |
04289bb9 | 164 | static void __perf_counter_remove_from_context(void *info) |
0793a61d TG |
165 | { |
166 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
167 | struct perf_counter *counter = info; | |
168 | struct perf_counter_context *ctx = counter->ctx; | |
9b51f66d | 169 | unsigned long flags; |
5c92d124 | 170 | u64 perf_flags; |
0793a61d TG |
171 | |
172 | /* | |
173 | * If this is a task context, we need to check whether it is | |
174 | * the current task context of this cpu. If not it has been | |
175 | * scheduled out before the smp call arrived. | |
176 | */ | |
177 | if (ctx->task && cpuctx->task_ctx != ctx) | |
178 | return; | |
179 | ||
849691a6 | 180 | spin_lock_irqsave(&ctx->lock, flags); |
0793a61d | 181 | |
3b6f9e5c PM |
182 | counter_sched_out(counter, cpuctx, ctx); |
183 | ||
184 | counter->task = NULL; | |
0793a61d TG |
185 | ctx->nr_counters--; |
186 | ||
187 | /* | |
188 | * Protect the list operation against NMI by disabling the | |
189 | * counters on a global level. NOP for non NMI based counters. | |
190 | */ | |
01b2838c | 191 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 192 | list_del_counter(counter, ctx); |
01b2838c | 193 | hw_perf_restore(perf_flags); |
0793a61d TG |
194 | |
195 | if (!ctx->task) { | |
196 | /* | |
197 | * Allow more per task counters with respect to the | |
198 | * reservation: | |
199 | */ | |
200 | cpuctx->max_pertask = | |
201 | min(perf_max_counters - ctx->nr_counters, | |
202 | perf_max_counters - perf_reserved_percpu); | |
203 | } | |
204 | ||
849691a6 | 205 | spin_unlock_irqrestore(&ctx->lock, flags); |
0793a61d TG |
206 | } |
207 | ||
208 | ||
209 | /* | |
210 | * Remove the counter from a task's (or a CPU's) list of counters. | |
211 | * | |
d859e29f | 212 | * Must be called with counter->mutex and ctx->mutex held. |
0793a61d TG |
213 | * |
214 | * CPU counters are removed with a smp call. For task counters we only | |
215 | * call when the task is on a CPU. | |
216 | */ | |
04289bb9 | 217 | static void perf_counter_remove_from_context(struct perf_counter *counter) |
0793a61d TG |
218 | { |
219 | struct perf_counter_context *ctx = counter->ctx; | |
220 | struct task_struct *task = ctx->task; | |
221 | ||
222 | if (!task) { | |
223 | /* | |
224 | * Per cpu counters are removed via an smp call and | |
225 | * the removal is always sucessful. | |
226 | */ | |
227 | smp_call_function_single(counter->cpu, | |
04289bb9 | 228 | __perf_counter_remove_from_context, |
0793a61d TG |
229 | counter, 1); |
230 | return; | |
231 | } | |
232 | ||
233 | retry: | |
04289bb9 | 234 | task_oncpu_function_call(task, __perf_counter_remove_from_context, |
0793a61d TG |
235 | counter); |
236 | ||
237 | spin_lock_irq(&ctx->lock); | |
238 | /* | |
239 | * If the context is active we need to retry the smp call. | |
240 | */ | |
04289bb9 | 241 | if (ctx->nr_active && !list_empty(&counter->list_entry)) { |
0793a61d TG |
242 | spin_unlock_irq(&ctx->lock); |
243 | goto retry; | |
244 | } | |
245 | ||
246 | /* | |
247 | * The lock prevents that this context is scheduled in so we | |
04289bb9 | 248 | * can remove the counter safely, if the call above did not |
0793a61d TG |
249 | * succeed. |
250 | */ | |
04289bb9 | 251 | if (!list_empty(&counter->list_entry)) { |
0793a61d | 252 | ctx->nr_counters--; |
04289bb9 | 253 | list_del_counter(counter, ctx); |
0793a61d TG |
254 | counter->task = NULL; |
255 | } | |
256 | spin_unlock_irq(&ctx->lock); | |
257 | } | |
258 | ||
4af4998b | 259 | static inline u64 perf_clock(void) |
53cfbf59 | 260 | { |
4af4998b | 261 | return cpu_clock(smp_processor_id()); |
53cfbf59 PM |
262 | } |
263 | ||
264 | /* | |
265 | * Update the record of the current time in a context. | |
266 | */ | |
4af4998b | 267 | static void update_context_time(struct perf_counter_context *ctx) |
53cfbf59 | 268 | { |
4af4998b PZ |
269 | u64 now = perf_clock(); |
270 | ||
271 | ctx->time += now - ctx->timestamp; | |
272 | ctx->timestamp = now; | |
53cfbf59 PM |
273 | } |
274 | ||
275 | /* | |
276 | * Update the total_time_enabled and total_time_running fields for a counter. | |
277 | */ | |
278 | static void update_counter_times(struct perf_counter *counter) | |
279 | { | |
280 | struct perf_counter_context *ctx = counter->ctx; | |
281 | u64 run_end; | |
282 | ||
4af4998b PZ |
283 | if (counter->state < PERF_COUNTER_STATE_INACTIVE) |
284 | return; | |
285 | ||
286 | counter->total_time_enabled = ctx->time - counter->tstamp_enabled; | |
287 | ||
288 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) | |
289 | run_end = counter->tstamp_stopped; | |
290 | else | |
291 | run_end = ctx->time; | |
292 | ||
293 | counter->total_time_running = run_end - counter->tstamp_running; | |
53cfbf59 PM |
294 | } |
295 | ||
296 | /* | |
297 | * Update total_time_enabled and total_time_running for all counters in a group. | |
298 | */ | |
299 | static void update_group_times(struct perf_counter *leader) | |
300 | { | |
301 | struct perf_counter *counter; | |
302 | ||
303 | update_counter_times(leader); | |
304 | list_for_each_entry(counter, &leader->sibling_list, list_entry) | |
305 | update_counter_times(counter); | |
306 | } | |
307 | ||
d859e29f PM |
308 | /* |
309 | * Cross CPU call to disable a performance counter | |
310 | */ | |
311 | static void __perf_counter_disable(void *info) | |
312 | { | |
313 | struct perf_counter *counter = info; | |
314 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
315 | struct perf_counter_context *ctx = counter->ctx; | |
316 | unsigned long flags; | |
317 | ||
318 | /* | |
319 | * If this is a per-task counter, need to check whether this | |
320 | * counter's task is the current task on this cpu. | |
321 | */ | |
322 | if (ctx->task && cpuctx->task_ctx != ctx) | |
323 | return; | |
324 | ||
849691a6 | 325 | spin_lock_irqsave(&ctx->lock, flags); |
d859e29f PM |
326 | |
327 | /* | |
328 | * If the counter is on, turn it off. | |
329 | * If it is in error state, leave it in error state. | |
330 | */ | |
331 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) { | |
4af4998b | 332 | update_context_time(ctx); |
53cfbf59 | 333 | update_counter_times(counter); |
d859e29f PM |
334 | if (counter == counter->group_leader) |
335 | group_sched_out(counter, cpuctx, ctx); | |
336 | else | |
337 | counter_sched_out(counter, cpuctx, ctx); | |
338 | counter->state = PERF_COUNTER_STATE_OFF; | |
339 | } | |
340 | ||
849691a6 | 341 | spin_unlock_irqrestore(&ctx->lock, flags); |
d859e29f PM |
342 | } |
343 | ||
344 | /* | |
345 | * Disable a counter. | |
346 | */ | |
347 | static void perf_counter_disable(struct perf_counter *counter) | |
348 | { | |
349 | struct perf_counter_context *ctx = counter->ctx; | |
350 | struct task_struct *task = ctx->task; | |
351 | ||
352 | if (!task) { | |
353 | /* | |
354 | * Disable the counter on the cpu that it's on | |
355 | */ | |
356 | smp_call_function_single(counter->cpu, __perf_counter_disable, | |
357 | counter, 1); | |
358 | return; | |
359 | } | |
360 | ||
361 | retry: | |
362 | task_oncpu_function_call(task, __perf_counter_disable, counter); | |
363 | ||
364 | spin_lock_irq(&ctx->lock); | |
365 | /* | |
366 | * If the counter is still active, we need to retry the cross-call. | |
367 | */ | |
368 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { | |
369 | spin_unlock_irq(&ctx->lock); | |
370 | goto retry; | |
371 | } | |
372 | ||
373 | /* | |
374 | * Since we have the lock this context can't be scheduled | |
375 | * in, so we can change the state safely. | |
376 | */ | |
53cfbf59 PM |
377 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
378 | update_counter_times(counter); | |
d859e29f | 379 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 380 | } |
d859e29f PM |
381 | |
382 | spin_unlock_irq(&ctx->lock); | |
383 | } | |
384 | ||
385 | /* | |
386 | * Disable a counter and all its children. | |
387 | */ | |
388 | static void perf_counter_disable_family(struct perf_counter *counter) | |
389 | { | |
390 | struct perf_counter *child; | |
391 | ||
392 | perf_counter_disable(counter); | |
393 | ||
394 | /* | |
395 | * Lock the mutex to protect the list of children | |
396 | */ | |
397 | mutex_lock(&counter->mutex); | |
398 | list_for_each_entry(child, &counter->child_list, child_list) | |
399 | perf_counter_disable(child); | |
400 | mutex_unlock(&counter->mutex); | |
401 | } | |
402 | ||
235c7fc7 IM |
403 | static int |
404 | counter_sched_in(struct perf_counter *counter, | |
405 | struct perf_cpu_context *cpuctx, | |
406 | struct perf_counter_context *ctx, | |
407 | int cpu) | |
408 | { | |
3b6f9e5c | 409 | if (counter->state <= PERF_COUNTER_STATE_OFF) |
235c7fc7 IM |
410 | return 0; |
411 | ||
412 | counter->state = PERF_COUNTER_STATE_ACTIVE; | |
413 | counter->oncpu = cpu; /* TODO: put 'cpu' into cpuctx->cpu */ | |
414 | /* | |
415 | * The new state must be visible before we turn it on in the hardware: | |
416 | */ | |
417 | smp_wmb(); | |
418 | ||
4aeb0b42 | 419 | if (counter->pmu->enable(counter)) { |
235c7fc7 IM |
420 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
421 | counter->oncpu = -1; | |
422 | return -EAGAIN; | |
423 | } | |
424 | ||
4af4998b | 425 | counter->tstamp_running += ctx->time - counter->tstamp_stopped; |
53cfbf59 | 426 | |
3b6f9e5c PM |
427 | if (!is_software_counter(counter)) |
428 | cpuctx->active_oncpu++; | |
235c7fc7 IM |
429 | ctx->nr_active++; |
430 | ||
3b6f9e5c PM |
431 | if (counter->hw_event.exclusive) |
432 | cpuctx->exclusive = 1; | |
433 | ||
235c7fc7 IM |
434 | return 0; |
435 | } | |
436 | ||
3b6f9e5c PM |
437 | /* |
438 | * Return 1 for a group consisting entirely of software counters, | |
439 | * 0 if the group contains any hardware counters. | |
440 | */ | |
441 | static int is_software_only_group(struct perf_counter *leader) | |
442 | { | |
443 | struct perf_counter *counter; | |
444 | ||
445 | if (!is_software_counter(leader)) | |
446 | return 0; | |
5c148194 | 447 | |
3b6f9e5c PM |
448 | list_for_each_entry(counter, &leader->sibling_list, list_entry) |
449 | if (!is_software_counter(counter)) | |
450 | return 0; | |
5c148194 | 451 | |
3b6f9e5c PM |
452 | return 1; |
453 | } | |
454 | ||
455 | /* | |
456 | * Work out whether we can put this counter group on the CPU now. | |
457 | */ | |
458 | static int group_can_go_on(struct perf_counter *counter, | |
459 | struct perf_cpu_context *cpuctx, | |
460 | int can_add_hw) | |
461 | { | |
462 | /* | |
463 | * Groups consisting entirely of software counters can always go on. | |
464 | */ | |
465 | if (is_software_only_group(counter)) | |
466 | return 1; | |
467 | /* | |
468 | * If an exclusive group is already on, no other hardware | |
469 | * counters can go on. | |
470 | */ | |
471 | if (cpuctx->exclusive) | |
472 | return 0; | |
473 | /* | |
474 | * If this group is exclusive and there are already | |
475 | * counters on the CPU, it can't go on. | |
476 | */ | |
477 | if (counter->hw_event.exclusive && cpuctx->active_oncpu) | |
478 | return 0; | |
479 | /* | |
480 | * Otherwise, try to add it if all previous groups were able | |
481 | * to go on. | |
482 | */ | |
483 | return can_add_hw; | |
484 | } | |
485 | ||
53cfbf59 PM |
486 | static void add_counter_to_ctx(struct perf_counter *counter, |
487 | struct perf_counter_context *ctx) | |
488 | { | |
489 | list_add_counter(counter, ctx); | |
490 | ctx->nr_counters++; | |
491 | counter->prev_state = PERF_COUNTER_STATE_OFF; | |
4af4998b PZ |
492 | counter->tstamp_enabled = ctx->time; |
493 | counter->tstamp_running = ctx->time; | |
494 | counter->tstamp_stopped = ctx->time; | |
53cfbf59 PM |
495 | } |
496 | ||
0793a61d | 497 | /* |
235c7fc7 | 498 | * Cross CPU call to install and enable a performance counter |
0793a61d TG |
499 | */ |
500 | static void __perf_install_in_context(void *info) | |
501 | { | |
502 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
503 | struct perf_counter *counter = info; | |
504 | struct perf_counter_context *ctx = counter->ctx; | |
d859e29f | 505 | struct perf_counter *leader = counter->group_leader; |
0793a61d | 506 | int cpu = smp_processor_id(); |
9b51f66d | 507 | unsigned long flags; |
5c92d124 | 508 | u64 perf_flags; |
3b6f9e5c | 509 | int err; |
0793a61d TG |
510 | |
511 | /* | |
512 | * If this is a task context, we need to check whether it is | |
513 | * the current task context of this cpu. If not it has been | |
514 | * scheduled out before the smp call arrived. | |
515 | */ | |
516 | if (ctx->task && cpuctx->task_ctx != ctx) | |
517 | return; | |
518 | ||
849691a6 | 519 | spin_lock_irqsave(&ctx->lock, flags); |
4af4998b | 520 | update_context_time(ctx); |
0793a61d TG |
521 | |
522 | /* | |
523 | * Protect the list operation against NMI by disabling the | |
524 | * counters on a global level. NOP for non NMI based counters. | |
525 | */ | |
01b2838c | 526 | perf_flags = hw_perf_save_disable(); |
0793a61d | 527 | |
53cfbf59 | 528 | add_counter_to_ctx(counter, ctx); |
0793a61d | 529 | |
d859e29f PM |
530 | /* |
531 | * Don't put the counter on if it is disabled or if | |
532 | * it is in a group and the group isn't on. | |
533 | */ | |
534 | if (counter->state != PERF_COUNTER_STATE_INACTIVE || | |
535 | (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE)) | |
536 | goto unlock; | |
537 | ||
3b6f9e5c PM |
538 | /* |
539 | * An exclusive counter can't go on if there are already active | |
540 | * hardware counters, and no hardware counter can go on if there | |
541 | * is already an exclusive counter on. | |
542 | */ | |
d859e29f | 543 | if (!group_can_go_on(counter, cpuctx, 1)) |
3b6f9e5c PM |
544 | err = -EEXIST; |
545 | else | |
546 | err = counter_sched_in(counter, cpuctx, ctx, cpu); | |
547 | ||
d859e29f PM |
548 | if (err) { |
549 | /* | |
550 | * This counter couldn't go on. If it is in a group | |
551 | * then we have to pull the whole group off. | |
552 | * If the counter group is pinned then put it in error state. | |
553 | */ | |
554 | if (leader != counter) | |
555 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
556 | if (leader->hw_event.pinned) { |
557 | update_group_times(leader); | |
d859e29f | 558 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 559 | } |
d859e29f | 560 | } |
0793a61d | 561 | |
3b6f9e5c | 562 | if (!err && !ctx->task && cpuctx->max_pertask) |
0793a61d TG |
563 | cpuctx->max_pertask--; |
564 | ||
d859e29f | 565 | unlock: |
235c7fc7 IM |
566 | hw_perf_restore(perf_flags); |
567 | ||
849691a6 | 568 | spin_unlock_irqrestore(&ctx->lock, flags); |
0793a61d TG |
569 | } |
570 | ||
571 | /* | |
572 | * Attach a performance counter to a context | |
573 | * | |
574 | * First we add the counter to the list with the hardware enable bit | |
575 | * in counter->hw_config cleared. | |
576 | * | |
577 | * If the counter is attached to a task which is on a CPU we use a smp | |
578 | * call to enable it in the task context. The task might have been | |
579 | * scheduled away, but we check this in the smp call again. | |
d859e29f PM |
580 | * |
581 | * Must be called with ctx->mutex held. | |
0793a61d TG |
582 | */ |
583 | static void | |
584 | perf_install_in_context(struct perf_counter_context *ctx, | |
585 | struct perf_counter *counter, | |
586 | int cpu) | |
587 | { | |
588 | struct task_struct *task = ctx->task; | |
589 | ||
0793a61d TG |
590 | if (!task) { |
591 | /* | |
592 | * Per cpu counters are installed via an smp call and | |
593 | * the install is always sucessful. | |
594 | */ | |
595 | smp_call_function_single(cpu, __perf_install_in_context, | |
596 | counter, 1); | |
597 | return; | |
598 | } | |
599 | ||
600 | counter->task = task; | |
601 | retry: | |
602 | task_oncpu_function_call(task, __perf_install_in_context, | |
603 | counter); | |
604 | ||
605 | spin_lock_irq(&ctx->lock); | |
606 | /* | |
0793a61d TG |
607 | * we need to retry the smp call. |
608 | */ | |
d859e29f | 609 | if (ctx->is_active && list_empty(&counter->list_entry)) { |
0793a61d TG |
610 | spin_unlock_irq(&ctx->lock); |
611 | goto retry; | |
612 | } | |
613 | ||
614 | /* | |
615 | * The lock prevents that this context is scheduled in so we | |
616 | * can add the counter safely, if it the call above did not | |
617 | * succeed. | |
618 | */ | |
53cfbf59 PM |
619 | if (list_empty(&counter->list_entry)) |
620 | add_counter_to_ctx(counter, ctx); | |
0793a61d TG |
621 | spin_unlock_irq(&ctx->lock); |
622 | } | |
623 | ||
d859e29f PM |
624 | /* |
625 | * Cross CPU call to enable a performance counter | |
626 | */ | |
627 | static void __perf_counter_enable(void *info) | |
04289bb9 | 628 | { |
d859e29f PM |
629 | struct perf_counter *counter = info; |
630 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
631 | struct perf_counter_context *ctx = counter->ctx; | |
632 | struct perf_counter *leader = counter->group_leader; | |
633 | unsigned long flags; | |
634 | int err; | |
04289bb9 | 635 | |
d859e29f PM |
636 | /* |
637 | * If this is a per-task counter, need to check whether this | |
638 | * counter's task is the current task on this cpu. | |
639 | */ | |
640 | if (ctx->task && cpuctx->task_ctx != ctx) | |
3cbed429 PM |
641 | return; |
642 | ||
849691a6 | 643 | spin_lock_irqsave(&ctx->lock, flags); |
4af4998b | 644 | update_context_time(ctx); |
d859e29f | 645 | |
c07c99b6 | 646 | counter->prev_state = counter->state; |
d859e29f PM |
647 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) |
648 | goto unlock; | |
649 | counter->state = PERF_COUNTER_STATE_INACTIVE; | |
4af4998b | 650 | counter->tstamp_enabled = ctx->time - counter->total_time_enabled; |
04289bb9 IM |
651 | |
652 | /* | |
d859e29f PM |
653 | * If the counter is in a group and isn't the group leader, |
654 | * then don't put it on unless the group is on. | |
04289bb9 | 655 | */ |
d859e29f PM |
656 | if (leader != counter && leader->state != PERF_COUNTER_STATE_ACTIVE) |
657 | goto unlock; | |
3b6f9e5c | 658 | |
d859e29f PM |
659 | if (!group_can_go_on(counter, cpuctx, 1)) |
660 | err = -EEXIST; | |
661 | else | |
662 | err = counter_sched_in(counter, cpuctx, ctx, | |
663 | smp_processor_id()); | |
664 | ||
665 | if (err) { | |
666 | /* | |
667 | * If this counter can't go on and it's part of a | |
668 | * group, then the whole group has to come off. | |
669 | */ | |
670 | if (leader != counter) | |
671 | group_sched_out(leader, cpuctx, ctx); | |
53cfbf59 PM |
672 | if (leader->hw_event.pinned) { |
673 | update_group_times(leader); | |
d859e29f | 674 | leader->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 675 | } |
d859e29f PM |
676 | } |
677 | ||
678 | unlock: | |
849691a6 | 679 | spin_unlock_irqrestore(&ctx->lock, flags); |
d859e29f PM |
680 | } |
681 | ||
682 | /* | |
683 | * Enable a counter. | |
684 | */ | |
685 | static void perf_counter_enable(struct perf_counter *counter) | |
686 | { | |
687 | struct perf_counter_context *ctx = counter->ctx; | |
688 | struct task_struct *task = ctx->task; | |
689 | ||
690 | if (!task) { | |
691 | /* | |
692 | * Enable the counter on the cpu that it's on | |
693 | */ | |
694 | smp_call_function_single(counter->cpu, __perf_counter_enable, | |
695 | counter, 1); | |
696 | return; | |
697 | } | |
698 | ||
699 | spin_lock_irq(&ctx->lock); | |
700 | if (counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
701 | goto out; | |
702 | ||
703 | /* | |
704 | * If the counter is in error state, clear that first. | |
705 | * That way, if we see the counter in error state below, we | |
706 | * know that it has gone back into error state, as distinct | |
707 | * from the task having been scheduled away before the | |
708 | * cross-call arrived. | |
709 | */ | |
710 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
711 | counter->state = PERF_COUNTER_STATE_OFF; | |
712 | ||
713 | retry: | |
714 | spin_unlock_irq(&ctx->lock); | |
715 | task_oncpu_function_call(task, __perf_counter_enable, counter); | |
716 | ||
717 | spin_lock_irq(&ctx->lock); | |
718 | ||
719 | /* | |
720 | * If the context is active and the counter is still off, | |
721 | * we need to retry the cross-call. | |
722 | */ | |
723 | if (ctx->is_active && counter->state == PERF_COUNTER_STATE_OFF) | |
724 | goto retry; | |
725 | ||
726 | /* | |
727 | * Since we have the lock this context can't be scheduled | |
728 | * in, so we can change the state safely. | |
729 | */ | |
53cfbf59 | 730 | if (counter->state == PERF_COUNTER_STATE_OFF) { |
d859e29f | 731 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
4af4998b PZ |
732 | counter->tstamp_enabled = |
733 | ctx->time - counter->total_time_enabled; | |
53cfbf59 | 734 | } |
d859e29f PM |
735 | out: |
736 | spin_unlock_irq(&ctx->lock); | |
737 | } | |
738 | ||
79f14641 PZ |
739 | static void perf_counter_refresh(struct perf_counter *counter, int refresh) |
740 | { | |
741 | atomic_add(refresh, &counter->event_limit); | |
742 | perf_counter_enable(counter); | |
743 | } | |
744 | ||
d859e29f PM |
745 | /* |
746 | * Enable a counter and all its children. | |
747 | */ | |
748 | static void perf_counter_enable_family(struct perf_counter *counter) | |
749 | { | |
750 | struct perf_counter *child; | |
751 | ||
752 | perf_counter_enable(counter); | |
753 | ||
754 | /* | |
755 | * Lock the mutex to protect the list of children | |
756 | */ | |
757 | mutex_lock(&counter->mutex); | |
758 | list_for_each_entry(child, &counter->child_list, child_list) | |
759 | perf_counter_enable(child); | |
760 | mutex_unlock(&counter->mutex); | |
04289bb9 IM |
761 | } |
762 | ||
235c7fc7 IM |
763 | void __perf_counter_sched_out(struct perf_counter_context *ctx, |
764 | struct perf_cpu_context *cpuctx) | |
765 | { | |
766 | struct perf_counter *counter; | |
3cbed429 | 767 | u64 flags; |
235c7fc7 | 768 | |
d859e29f PM |
769 | spin_lock(&ctx->lock); |
770 | ctx->is_active = 0; | |
235c7fc7 | 771 | if (likely(!ctx->nr_counters)) |
d859e29f | 772 | goto out; |
4af4998b | 773 | update_context_time(ctx); |
235c7fc7 | 774 | |
3cbed429 | 775 | flags = hw_perf_save_disable(); |
235c7fc7 IM |
776 | if (ctx->nr_active) { |
777 | list_for_each_entry(counter, &ctx->counter_list, list_entry) | |
778 | group_sched_out(counter, cpuctx, ctx); | |
779 | } | |
3cbed429 | 780 | hw_perf_restore(flags); |
d859e29f | 781 | out: |
235c7fc7 IM |
782 | spin_unlock(&ctx->lock); |
783 | } | |
784 | ||
0793a61d TG |
785 | /* |
786 | * Called from scheduler to remove the counters of the current task, | |
787 | * with interrupts disabled. | |
788 | * | |
789 | * We stop each counter and update the counter value in counter->count. | |
790 | * | |
7671581f | 791 | * This does not protect us against NMI, but disable() |
0793a61d TG |
792 | * sets the disabled bit in the control field of counter _before_ |
793 | * accessing the counter control register. If a NMI hits, then it will | |
794 | * not restart the counter. | |
795 | */ | |
796 | void perf_counter_task_sched_out(struct task_struct *task, int cpu) | |
797 | { | |
798 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
799 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
4a0deca6 | 800 | struct pt_regs *regs; |
0793a61d TG |
801 | |
802 | if (likely(!cpuctx->task_ctx)) | |
803 | return; | |
804 | ||
bce379bf PZ |
805 | update_context_time(ctx); |
806 | ||
4a0deca6 | 807 | regs = task_pt_regs(task); |
78f13e95 | 808 | perf_swcounter_event(PERF_COUNT_CONTEXT_SWITCHES, 1, 1, regs, 0); |
235c7fc7 IM |
809 | __perf_counter_sched_out(ctx, cpuctx); |
810 | ||
0793a61d TG |
811 | cpuctx->task_ctx = NULL; |
812 | } | |
813 | ||
235c7fc7 | 814 | static void perf_counter_cpu_sched_out(struct perf_cpu_context *cpuctx) |
04289bb9 | 815 | { |
235c7fc7 | 816 | __perf_counter_sched_out(&cpuctx->ctx, cpuctx); |
04289bb9 IM |
817 | } |
818 | ||
7995888f | 819 | static int |
04289bb9 IM |
820 | group_sched_in(struct perf_counter *group_counter, |
821 | struct perf_cpu_context *cpuctx, | |
822 | struct perf_counter_context *ctx, | |
823 | int cpu) | |
824 | { | |
95cdd2e7 | 825 | struct perf_counter *counter, *partial_group; |
3cbed429 PM |
826 | int ret; |
827 | ||
828 | if (group_counter->state == PERF_COUNTER_STATE_OFF) | |
829 | return 0; | |
830 | ||
831 | ret = hw_perf_group_sched_in(group_counter, cpuctx, ctx, cpu); | |
832 | if (ret) | |
833 | return ret < 0 ? ret : 0; | |
04289bb9 | 834 | |
c07c99b6 | 835 | group_counter->prev_state = group_counter->state; |
95cdd2e7 IM |
836 | if (counter_sched_in(group_counter, cpuctx, ctx, cpu)) |
837 | return -EAGAIN; | |
04289bb9 IM |
838 | |
839 | /* | |
840 | * Schedule in siblings as one group (if any): | |
841 | */ | |
7995888f | 842 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { |
c07c99b6 | 843 | counter->prev_state = counter->state; |
95cdd2e7 IM |
844 | if (counter_sched_in(counter, cpuctx, ctx, cpu)) { |
845 | partial_group = counter; | |
846 | goto group_error; | |
847 | } | |
95cdd2e7 IM |
848 | } |
849 | ||
3cbed429 | 850 | return 0; |
95cdd2e7 IM |
851 | |
852 | group_error: | |
853 | /* | |
854 | * Groups can be scheduled in as one unit only, so undo any | |
855 | * partial group before returning: | |
856 | */ | |
857 | list_for_each_entry(counter, &group_counter->sibling_list, list_entry) { | |
858 | if (counter == partial_group) | |
859 | break; | |
860 | counter_sched_out(counter, cpuctx, ctx); | |
7995888f | 861 | } |
95cdd2e7 | 862 | counter_sched_out(group_counter, cpuctx, ctx); |
7995888f | 863 | |
95cdd2e7 | 864 | return -EAGAIN; |
04289bb9 IM |
865 | } |
866 | ||
235c7fc7 IM |
867 | static void |
868 | __perf_counter_sched_in(struct perf_counter_context *ctx, | |
869 | struct perf_cpu_context *cpuctx, int cpu) | |
0793a61d | 870 | { |
0793a61d | 871 | struct perf_counter *counter; |
3cbed429 | 872 | u64 flags; |
dd0e6ba2 | 873 | int can_add_hw = 1; |
0793a61d | 874 | |
d859e29f PM |
875 | spin_lock(&ctx->lock); |
876 | ctx->is_active = 1; | |
0793a61d | 877 | if (likely(!ctx->nr_counters)) |
d859e29f | 878 | goto out; |
0793a61d | 879 | |
4af4998b | 880 | ctx->timestamp = perf_clock(); |
53cfbf59 | 881 | |
3cbed429 | 882 | flags = hw_perf_save_disable(); |
3b6f9e5c PM |
883 | |
884 | /* | |
885 | * First go through the list and put on any pinned groups | |
886 | * in order to give them the best chance of going on. | |
887 | */ | |
888 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
889 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
890 | !counter->hw_event.pinned) | |
891 | continue; | |
892 | if (counter->cpu != -1 && counter->cpu != cpu) | |
893 | continue; | |
894 | ||
895 | if (group_can_go_on(counter, cpuctx, 1)) | |
896 | group_sched_in(counter, cpuctx, ctx, cpu); | |
897 | ||
898 | /* | |
899 | * If this pinned group hasn't been scheduled, | |
900 | * put it in error state. | |
901 | */ | |
53cfbf59 PM |
902 | if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
903 | update_group_times(counter); | |
3b6f9e5c | 904 | counter->state = PERF_COUNTER_STATE_ERROR; |
53cfbf59 | 905 | } |
3b6f9e5c PM |
906 | } |
907 | ||
04289bb9 | 908 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
3b6f9e5c PM |
909 | /* |
910 | * Ignore counters in OFF or ERROR state, and | |
911 | * ignore pinned counters since we did them already. | |
912 | */ | |
913 | if (counter->state <= PERF_COUNTER_STATE_OFF || | |
914 | counter->hw_event.pinned) | |
915 | continue; | |
916 | ||
04289bb9 IM |
917 | /* |
918 | * Listen to the 'cpu' scheduling filter constraint | |
919 | * of counters: | |
920 | */ | |
0793a61d TG |
921 | if (counter->cpu != -1 && counter->cpu != cpu) |
922 | continue; | |
923 | ||
3b6f9e5c | 924 | if (group_can_go_on(counter, cpuctx, can_add_hw)) { |
dd0e6ba2 PM |
925 | if (group_sched_in(counter, cpuctx, ctx, cpu)) |
926 | can_add_hw = 0; | |
3b6f9e5c | 927 | } |
0793a61d | 928 | } |
3cbed429 | 929 | hw_perf_restore(flags); |
d859e29f | 930 | out: |
0793a61d | 931 | spin_unlock(&ctx->lock); |
235c7fc7 IM |
932 | } |
933 | ||
934 | /* | |
935 | * Called from scheduler to add the counters of the current task | |
936 | * with interrupts disabled. | |
937 | * | |
938 | * We restore the counter value and then enable it. | |
939 | * | |
940 | * This does not protect us against NMI, but enable() | |
941 | * sets the enabled bit in the control field of counter _before_ | |
942 | * accessing the counter control register. If a NMI hits, then it will | |
943 | * keep the counter running. | |
944 | */ | |
945 | void perf_counter_task_sched_in(struct task_struct *task, int cpu) | |
946 | { | |
947 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
948 | struct perf_counter_context *ctx = &task->perf_counter_ctx; | |
04289bb9 | 949 | |
235c7fc7 | 950 | __perf_counter_sched_in(ctx, cpuctx, cpu); |
0793a61d TG |
951 | cpuctx->task_ctx = ctx; |
952 | } | |
953 | ||
235c7fc7 IM |
954 | static void perf_counter_cpu_sched_in(struct perf_cpu_context *cpuctx, int cpu) |
955 | { | |
956 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
957 | ||
958 | __perf_counter_sched_in(ctx, cpuctx, cpu); | |
959 | } | |
960 | ||
1d1c7ddb IM |
961 | int perf_counter_task_disable(void) |
962 | { | |
963 | struct task_struct *curr = current; | |
964 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
965 | struct perf_counter *counter; | |
aa9c4c0f | 966 | unsigned long flags; |
1d1c7ddb IM |
967 | u64 perf_flags; |
968 | int cpu; | |
969 | ||
970 | if (likely(!ctx->nr_counters)) | |
971 | return 0; | |
972 | ||
849691a6 | 973 | local_irq_save(flags); |
1d1c7ddb IM |
974 | cpu = smp_processor_id(); |
975 | ||
976 | perf_counter_task_sched_out(curr, cpu); | |
977 | ||
978 | spin_lock(&ctx->lock); | |
979 | ||
980 | /* | |
981 | * Disable all the counters: | |
982 | */ | |
983 | perf_flags = hw_perf_save_disable(); | |
984 | ||
3b6f9e5c | 985 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
53cfbf59 PM |
986 | if (counter->state != PERF_COUNTER_STATE_ERROR) { |
987 | update_group_times(counter); | |
3b6f9e5c | 988 | counter->state = PERF_COUNTER_STATE_OFF; |
53cfbf59 | 989 | } |
3b6f9e5c | 990 | } |
9b51f66d | 991 | |
1d1c7ddb IM |
992 | hw_perf_restore(perf_flags); |
993 | ||
849691a6 | 994 | spin_unlock_irqrestore(&ctx->lock, flags); |
1d1c7ddb IM |
995 | |
996 | return 0; | |
997 | } | |
998 | ||
999 | int perf_counter_task_enable(void) | |
1000 | { | |
1001 | struct task_struct *curr = current; | |
1002 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1003 | struct perf_counter *counter; | |
aa9c4c0f | 1004 | unsigned long flags; |
1d1c7ddb IM |
1005 | u64 perf_flags; |
1006 | int cpu; | |
1007 | ||
1008 | if (likely(!ctx->nr_counters)) | |
1009 | return 0; | |
1010 | ||
849691a6 | 1011 | local_irq_save(flags); |
1d1c7ddb IM |
1012 | cpu = smp_processor_id(); |
1013 | ||
235c7fc7 IM |
1014 | perf_counter_task_sched_out(curr, cpu); |
1015 | ||
1d1c7ddb IM |
1016 | spin_lock(&ctx->lock); |
1017 | ||
1018 | /* | |
1019 | * Disable all the counters: | |
1020 | */ | |
1021 | perf_flags = hw_perf_save_disable(); | |
1022 | ||
1023 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { | |
3b6f9e5c | 1024 | if (counter->state > PERF_COUNTER_STATE_OFF) |
1d1c7ddb | 1025 | continue; |
6a930700 | 1026 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
4af4998b PZ |
1027 | counter->tstamp_enabled = |
1028 | ctx->time - counter->total_time_enabled; | |
aa9c4c0f | 1029 | counter->hw_event.disabled = 0; |
1d1c7ddb IM |
1030 | } |
1031 | hw_perf_restore(perf_flags); | |
1032 | ||
1033 | spin_unlock(&ctx->lock); | |
1034 | ||
1035 | perf_counter_task_sched_in(curr, cpu); | |
1036 | ||
849691a6 | 1037 | local_irq_restore(flags); |
1d1c7ddb IM |
1038 | |
1039 | return 0; | |
1040 | } | |
1041 | ||
235c7fc7 IM |
1042 | /* |
1043 | * Round-robin a context's counters: | |
1044 | */ | |
1045 | static void rotate_ctx(struct perf_counter_context *ctx) | |
0793a61d | 1046 | { |
0793a61d | 1047 | struct perf_counter *counter; |
5c92d124 | 1048 | u64 perf_flags; |
0793a61d | 1049 | |
235c7fc7 | 1050 | if (!ctx->nr_counters) |
0793a61d TG |
1051 | return; |
1052 | ||
0793a61d | 1053 | spin_lock(&ctx->lock); |
0793a61d | 1054 | /* |
04289bb9 | 1055 | * Rotate the first entry last (works just fine for group counters too): |
0793a61d | 1056 | */ |
01b2838c | 1057 | perf_flags = hw_perf_save_disable(); |
04289bb9 | 1058 | list_for_each_entry(counter, &ctx->counter_list, list_entry) { |
75564232 | 1059 | list_move_tail(&counter->list_entry, &ctx->counter_list); |
0793a61d TG |
1060 | break; |
1061 | } | |
01b2838c | 1062 | hw_perf_restore(perf_flags); |
0793a61d TG |
1063 | |
1064 | spin_unlock(&ctx->lock); | |
235c7fc7 IM |
1065 | } |
1066 | ||
1067 | void perf_counter_task_tick(struct task_struct *curr, int cpu) | |
1068 | { | |
1069 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1070 | struct perf_counter_context *ctx = &curr->perf_counter_ctx; | |
1071 | const int rotate_percpu = 0; | |
1072 | ||
1073 | if (rotate_percpu) | |
1074 | perf_counter_cpu_sched_out(cpuctx); | |
1075 | perf_counter_task_sched_out(curr, cpu); | |
0793a61d | 1076 | |
235c7fc7 IM |
1077 | if (rotate_percpu) |
1078 | rotate_ctx(&cpuctx->ctx); | |
1079 | rotate_ctx(ctx); | |
1080 | ||
1081 | if (rotate_percpu) | |
1082 | perf_counter_cpu_sched_in(cpuctx, cpu); | |
0793a61d TG |
1083 | perf_counter_task_sched_in(curr, cpu); |
1084 | } | |
1085 | ||
0793a61d TG |
1086 | /* |
1087 | * Cross CPU call to read the hardware counter | |
1088 | */ | |
7671581f | 1089 | static void __read(void *info) |
0793a61d | 1090 | { |
621a01ea | 1091 | struct perf_counter *counter = info; |
53cfbf59 | 1092 | struct perf_counter_context *ctx = counter->ctx; |
aa9c4c0f | 1093 | unsigned long flags; |
621a01ea | 1094 | |
849691a6 | 1095 | local_irq_save(flags); |
53cfbf59 | 1096 | if (ctx->is_active) |
4af4998b | 1097 | update_context_time(ctx); |
4aeb0b42 | 1098 | counter->pmu->read(counter); |
53cfbf59 | 1099 | update_counter_times(counter); |
849691a6 | 1100 | local_irq_restore(flags); |
0793a61d TG |
1101 | } |
1102 | ||
04289bb9 | 1103 | static u64 perf_counter_read(struct perf_counter *counter) |
0793a61d TG |
1104 | { |
1105 | /* | |
1106 | * If counter is enabled and currently active on a CPU, update the | |
1107 | * value in the counter structure: | |
1108 | */ | |
6a930700 | 1109 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) { |
0793a61d | 1110 | smp_call_function_single(counter->oncpu, |
7671581f | 1111 | __read, counter, 1); |
53cfbf59 PM |
1112 | } else if (counter->state == PERF_COUNTER_STATE_INACTIVE) { |
1113 | update_counter_times(counter); | |
0793a61d TG |
1114 | } |
1115 | ||
ee06094f | 1116 | return atomic64_read(&counter->count); |
0793a61d TG |
1117 | } |
1118 | ||
0793a61d TG |
1119 | static void put_context(struct perf_counter_context *ctx) |
1120 | { | |
1121 | if (ctx->task) | |
1122 | put_task_struct(ctx->task); | |
1123 | } | |
1124 | ||
1125 | static struct perf_counter_context *find_get_context(pid_t pid, int cpu) | |
1126 | { | |
1127 | struct perf_cpu_context *cpuctx; | |
1128 | struct perf_counter_context *ctx; | |
1129 | struct task_struct *task; | |
1130 | ||
1131 | /* | |
1132 | * If cpu is not a wildcard then this is a percpu counter: | |
1133 | */ | |
1134 | if (cpu != -1) { | |
1135 | /* Must be root to operate on a CPU counter: */ | |
1ccd1549 | 1136 | if (sysctl_perf_counter_priv && !capable(CAP_SYS_ADMIN)) |
0793a61d TG |
1137 | return ERR_PTR(-EACCES); |
1138 | ||
1139 | if (cpu < 0 || cpu > num_possible_cpus()) | |
1140 | return ERR_PTR(-EINVAL); | |
1141 | ||
1142 | /* | |
1143 | * We could be clever and allow to attach a counter to an | |
1144 | * offline CPU and activate it when the CPU comes up, but | |
1145 | * that's for later. | |
1146 | */ | |
1147 | if (!cpu_isset(cpu, cpu_online_map)) | |
1148 | return ERR_PTR(-ENODEV); | |
1149 | ||
1150 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
1151 | ctx = &cpuctx->ctx; | |
1152 | ||
0793a61d TG |
1153 | return ctx; |
1154 | } | |
1155 | ||
1156 | rcu_read_lock(); | |
1157 | if (!pid) | |
1158 | task = current; | |
1159 | else | |
1160 | task = find_task_by_vpid(pid); | |
1161 | if (task) | |
1162 | get_task_struct(task); | |
1163 | rcu_read_unlock(); | |
1164 | ||
1165 | if (!task) | |
1166 | return ERR_PTR(-ESRCH); | |
1167 | ||
1168 | ctx = &task->perf_counter_ctx; | |
1169 | ctx->task = task; | |
1170 | ||
1171 | /* Reuse ptrace permission checks for now. */ | |
1172 | if (!ptrace_may_access(task, PTRACE_MODE_READ)) { | |
1173 | put_context(ctx); | |
1174 | return ERR_PTR(-EACCES); | |
1175 | } | |
1176 | ||
1177 | return ctx; | |
1178 | } | |
1179 | ||
592903cd PZ |
1180 | static void free_counter_rcu(struct rcu_head *head) |
1181 | { | |
1182 | struct perf_counter *counter; | |
1183 | ||
1184 | counter = container_of(head, struct perf_counter, rcu_head); | |
1185 | kfree(counter); | |
1186 | } | |
1187 | ||
925d519a PZ |
1188 | static void perf_pending_sync(struct perf_counter *counter); |
1189 | ||
f1600952 PZ |
1190 | static void free_counter(struct perf_counter *counter) |
1191 | { | |
925d519a PZ |
1192 | perf_pending_sync(counter); |
1193 | ||
9ee318a7 PZ |
1194 | if (counter->hw_event.mmap) |
1195 | atomic_dec(&nr_mmap_tracking); | |
1196 | if (counter->hw_event.munmap) | |
1197 | atomic_dec(&nr_munmap_tracking); | |
1198 | if (counter->hw_event.comm) | |
1199 | atomic_dec(&nr_comm_tracking); | |
1200 | ||
e077df4f PZ |
1201 | if (counter->destroy) |
1202 | counter->destroy(counter); | |
1203 | ||
f1600952 PZ |
1204 | call_rcu(&counter->rcu_head, free_counter_rcu); |
1205 | } | |
1206 | ||
0793a61d TG |
1207 | /* |
1208 | * Called when the last reference to the file is gone. | |
1209 | */ | |
1210 | static int perf_release(struct inode *inode, struct file *file) | |
1211 | { | |
1212 | struct perf_counter *counter = file->private_data; | |
1213 | struct perf_counter_context *ctx = counter->ctx; | |
1214 | ||
1215 | file->private_data = NULL; | |
1216 | ||
d859e29f | 1217 | mutex_lock(&ctx->mutex); |
0793a61d TG |
1218 | mutex_lock(&counter->mutex); |
1219 | ||
04289bb9 | 1220 | perf_counter_remove_from_context(counter); |
0793a61d TG |
1221 | |
1222 | mutex_unlock(&counter->mutex); | |
d859e29f | 1223 | mutex_unlock(&ctx->mutex); |
0793a61d | 1224 | |
f1600952 | 1225 | free_counter(counter); |
5af75917 | 1226 | put_context(ctx); |
0793a61d TG |
1227 | |
1228 | return 0; | |
1229 | } | |
1230 | ||
1231 | /* | |
1232 | * Read the performance counter - simple non blocking version for now | |
1233 | */ | |
1234 | static ssize_t | |
1235 | perf_read_hw(struct perf_counter *counter, char __user *buf, size_t count) | |
1236 | { | |
53cfbf59 PM |
1237 | u64 values[3]; |
1238 | int n; | |
0793a61d | 1239 | |
3b6f9e5c PM |
1240 | /* |
1241 | * Return end-of-file for a read on a counter that is in | |
1242 | * error state (i.e. because it was pinned but it couldn't be | |
1243 | * scheduled on to the CPU at some point). | |
1244 | */ | |
1245 | if (counter->state == PERF_COUNTER_STATE_ERROR) | |
1246 | return 0; | |
1247 | ||
0793a61d | 1248 | mutex_lock(&counter->mutex); |
53cfbf59 PM |
1249 | values[0] = perf_counter_read(counter); |
1250 | n = 1; | |
1251 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1252 | values[n++] = counter->total_time_enabled + | |
1253 | atomic64_read(&counter->child_total_time_enabled); | |
1254 | if (counter->hw_event.read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1255 | values[n++] = counter->total_time_running + | |
1256 | atomic64_read(&counter->child_total_time_running); | |
0793a61d TG |
1257 | mutex_unlock(&counter->mutex); |
1258 | ||
53cfbf59 PM |
1259 | if (count < n * sizeof(u64)) |
1260 | return -EINVAL; | |
1261 | count = n * sizeof(u64); | |
1262 | ||
1263 | if (copy_to_user(buf, values, count)) | |
1264 | return -EFAULT; | |
1265 | ||
1266 | return count; | |
0793a61d TG |
1267 | } |
1268 | ||
0793a61d TG |
1269 | static ssize_t |
1270 | perf_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) | |
1271 | { | |
1272 | struct perf_counter *counter = file->private_data; | |
1273 | ||
7b732a75 | 1274 | return perf_read_hw(counter, buf, count); |
0793a61d TG |
1275 | } |
1276 | ||
1277 | static unsigned int perf_poll(struct file *file, poll_table *wait) | |
1278 | { | |
1279 | struct perf_counter *counter = file->private_data; | |
c7138f37 PZ |
1280 | struct perf_mmap_data *data; |
1281 | unsigned int events; | |
1282 | ||
1283 | rcu_read_lock(); | |
1284 | data = rcu_dereference(counter->data); | |
1285 | if (data) | |
1286 | events = atomic_xchg(&data->wakeup, 0); | |
1287 | else | |
1288 | events = POLL_HUP; | |
1289 | rcu_read_unlock(); | |
0793a61d TG |
1290 | |
1291 | poll_wait(file, &counter->waitq, wait); | |
1292 | ||
0793a61d TG |
1293 | return events; |
1294 | } | |
1295 | ||
d859e29f PM |
1296 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1297 | { | |
1298 | struct perf_counter *counter = file->private_data; | |
1299 | int err = 0; | |
1300 | ||
1301 | switch (cmd) { | |
1302 | case PERF_COUNTER_IOC_ENABLE: | |
1303 | perf_counter_enable_family(counter); | |
1304 | break; | |
1305 | case PERF_COUNTER_IOC_DISABLE: | |
1306 | perf_counter_disable_family(counter); | |
1307 | break; | |
79f14641 PZ |
1308 | case PERF_COUNTER_IOC_REFRESH: |
1309 | perf_counter_refresh(counter, arg); | |
1310 | break; | |
d859e29f PM |
1311 | default: |
1312 | err = -ENOTTY; | |
1313 | } | |
1314 | return err; | |
1315 | } | |
1316 | ||
38ff667b PZ |
1317 | /* |
1318 | * Callers need to ensure there can be no nesting of this function, otherwise | |
1319 | * the seqlock logic goes bad. We can not serialize this because the arch | |
1320 | * code calls this from NMI context. | |
1321 | */ | |
1322 | void perf_counter_update_userpage(struct perf_counter *counter) | |
37d81828 | 1323 | { |
38ff667b PZ |
1324 | struct perf_mmap_data *data; |
1325 | struct perf_counter_mmap_page *userpg; | |
1326 | ||
1327 | rcu_read_lock(); | |
1328 | data = rcu_dereference(counter->data); | |
1329 | if (!data) | |
1330 | goto unlock; | |
1331 | ||
1332 | userpg = data->user_page; | |
37d81828 | 1333 | |
7b732a75 PZ |
1334 | /* |
1335 | * Disable preemption so as to not let the corresponding user-space | |
1336 | * spin too long if we get preempted. | |
1337 | */ | |
1338 | preempt_disable(); | |
37d81828 | 1339 | ++userpg->lock; |
92f22a38 | 1340 | barrier(); |
37d81828 PM |
1341 | userpg->index = counter->hw.idx; |
1342 | userpg->offset = atomic64_read(&counter->count); | |
1343 | if (counter->state == PERF_COUNTER_STATE_ACTIVE) | |
1344 | userpg->offset -= atomic64_read(&counter->hw.prev_count); | |
7b732a75 | 1345 | |
92f22a38 | 1346 | barrier(); |
37d81828 | 1347 | ++userpg->lock; |
7b732a75 | 1348 | preempt_enable(); |
38ff667b | 1349 | unlock: |
7b732a75 | 1350 | rcu_read_unlock(); |
37d81828 PM |
1351 | } |
1352 | ||
1353 | static int perf_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |
1354 | { | |
1355 | struct perf_counter *counter = vma->vm_file->private_data; | |
7b732a75 PZ |
1356 | struct perf_mmap_data *data; |
1357 | int ret = VM_FAULT_SIGBUS; | |
1358 | ||
1359 | rcu_read_lock(); | |
1360 | data = rcu_dereference(counter->data); | |
1361 | if (!data) | |
1362 | goto unlock; | |
1363 | ||
1364 | if (vmf->pgoff == 0) { | |
1365 | vmf->page = virt_to_page(data->user_page); | |
1366 | } else { | |
1367 | int nr = vmf->pgoff - 1; | |
37d81828 | 1368 | |
7b732a75 PZ |
1369 | if ((unsigned)nr > data->nr_pages) |
1370 | goto unlock; | |
37d81828 | 1371 | |
7b732a75 PZ |
1372 | vmf->page = virt_to_page(data->data_pages[nr]); |
1373 | } | |
37d81828 | 1374 | get_page(vmf->page); |
7b732a75 PZ |
1375 | ret = 0; |
1376 | unlock: | |
1377 | rcu_read_unlock(); | |
1378 | ||
1379 | return ret; | |
1380 | } | |
1381 | ||
1382 | static int perf_mmap_data_alloc(struct perf_counter *counter, int nr_pages) | |
1383 | { | |
1384 | struct perf_mmap_data *data; | |
1385 | unsigned long size; | |
1386 | int i; | |
1387 | ||
1388 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1389 | ||
1390 | size = sizeof(struct perf_mmap_data); | |
1391 | size += nr_pages * sizeof(void *); | |
1392 | ||
1393 | data = kzalloc(size, GFP_KERNEL); | |
1394 | if (!data) | |
1395 | goto fail; | |
1396 | ||
1397 | data->user_page = (void *)get_zeroed_page(GFP_KERNEL); | |
1398 | if (!data->user_page) | |
1399 | goto fail_user_page; | |
1400 | ||
1401 | for (i = 0; i < nr_pages; i++) { | |
1402 | data->data_pages[i] = (void *)get_zeroed_page(GFP_KERNEL); | |
1403 | if (!data->data_pages[i]) | |
1404 | goto fail_data_pages; | |
1405 | } | |
1406 | ||
1407 | data->nr_pages = nr_pages; | |
1408 | ||
1409 | rcu_assign_pointer(counter->data, data); | |
1410 | ||
37d81828 | 1411 | return 0; |
7b732a75 PZ |
1412 | |
1413 | fail_data_pages: | |
1414 | for (i--; i >= 0; i--) | |
1415 | free_page((unsigned long)data->data_pages[i]); | |
1416 | ||
1417 | free_page((unsigned long)data->user_page); | |
1418 | ||
1419 | fail_user_page: | |
1420 | kfree(data); | |
1421 | ||
1422 | fail: | |
1423 | return -ENOMEM; | |
1424 | } | |
1425 | ||
1426 | static void __perf_mmap_data_free(struct rcu_head *rcu_head) | |
1427 | { | |
1428 | struct perf_mmap_data *data = container_of(rcu_head, | |
1429 | struct perf_mmap_data, rcu_head); | |
1430 | int i; | |
1431 | ||
1432 | free_page((unsigned long)data->user_page); | |
1433 | for (i = 0; i < data->nr_pages; i++) | |
1434 | free_page((unsigned long)data->data_pages[i]); | |
1435 | kfree(data); | |
1436 | } | |
1437 | ||
1438 | static void perf_mmap_data_free(struct perf_counter *counter) | |
1439 | { | |
1440 | struct perf_mmap_data *data = counter->data; | |
1441 | ||
1442 | WARN_ON(atomic_read(&counter->mmap_count)); | |
1443 | ||
1444 | rcu_assign_pointer(counter->data, NULL); | |
1445 | call_rcu(&data->rcu_head, __perf_mmap_data_free); | |
1446 | } | |
1447 | ||
1448 | static void perf_mmap_open(struct vm_area_struct *vma) | |
1449 | { | |
1450 | struct perf_counter *counter = vma->vm_file->private_data; | |
1451 | ||
1452 | atomic_inc(&counter->mmap_count); | |
1453 | } | |
1454 | ||
1455 | static void perf_mmap_close(struct vm_area_struct *vma) | |
1456 | { | |
1457 | struct perf_counter *counter = vma->vm_file->private_data; | |
1458 | ||
1459 | if (atomic_dec_and_mutex_lock(&counter->mmap_count, | |
1460 | &counter->mmap_mutex)) { | |
ebb3c4c4 | 1461 | vma->vm_mm->locked_vm -= counter->data->nr_pages + 1; |
7b732a75 PZ |
1462 | perf_mmap_data_free(counter); |
1463 | mutex_unlock(&counter->mmap_mutex); | |
1464 | } | |
37d81828 PM |
1465 | } |
1466 | ||
1467 | static struct vm_operations_struct perf_mmap_vmops = { | |
ebb3c4c4 | 1468 | .open = perf_mmap_open, |
7b732a75 | 1469 | .close = perf_mmap_close, |
37d81828 PM |
1470 | .fault = perf_mmap_fault, |
1471 | }; | |
1472 | ||
1473 | static int perf_mmap(struct file *file, struct vm_area_struct *vma) | |
1474 | { | |
1475 | struct perf_counter *counter = file->private_data; | |
7b732a75 PZ |
1476 | unsigned long vma_size; |
1477 | unsigned long nr_pages; | |
1478 | unsigned long locked, lock_limit; | |
1479 | int ret = 0; | |
37d81828 PM |
1480 | |
1481 | if (!(vma->vm_flags & VM_SHARED) || (vma->vm_flags & VM_WRITE)) | |
1482 | return -EINVAL; | |
7b732a75 PZ |
1483 | |
1484 | vma_size = vma->vm_end - vma->vm_start; | |
1485 | nr_pages = (vma_size / PAGE_SIZE) - 1; | |
1486 | ||
7730d865 PZ |
1487 | /* |
1488 | * If we have data pages ensure they're a power-of-two number, so we | |
1489 | * can do bitmasks instead of modulo. | |
1490 | */ | |
1491 | if (nr_pages != 0 && !is_power_of_2(nr_pages)) | |
37d81828 PM |
1492 | return -EINVAL; |
1493 | ||
7b732a75 | 1494 | if (vma_size != PAGE_SIZE * (1 + nr_pages)) |
37d81828 PM |
1495 | return -EINVAL; |
1496 | ||
7b732a75 PZ |
1497 | if (vma->vm_pgoff != 0) |
1498 | return -EINVAL; | |
37d81828 | 1499 | |
ebb3c4c4 PZ |
1500 | mutex_lock(&counter->mmap_mutex); |
1501 | if (atomic_inc_not_zero(&counter->mmap_count)) { | |
1502 | if (nr_pages != counter->data->nr_pages) | |
1503 | ret = -EINVAL; | |
1504 | goto unlock; | |
1505 | } | |
1506 | ||
1507 | locked = vma->vm_mm->locked_vm; | |
1508 | locked += nr_pages + 1; | |
7b732a75 PZ |
1509 | |
1510 | lock_limit = current->signal->rlim[RLIMIT_MEMLOCK].rlim_cur; | |
1511 | lock_limit >>= PAGE_SHIFT; | |
1512 | ||
ebb3c4c4 PZ |
1513 | if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) { |
1514 | ret = -EPERM; | |
1515 | goto unlock; | |
1516 | } | |
7b732a75 PZ |
1517 | |
1518 | WARN_ON(counter->data); | |
1519 | ret = perf_mmap_data_alloc(counter, nr_pages); | |
ebb3c4c4 PZ |
1520 | if (ret) |
1521 | goto unlock; | |
1522 | ||
1523 | atomic_set(&counter->mmap_count, 1); | |
1524 | vma->vm_mm->locked_vm += nr_pages + 1; | |
1525 | unlock: | |
7b732a75 | 1526 | mutex_unlock(&counter->mmap_mutex); |
37d81828 PM |
1527 | |
1528 | vma->vm_flags &= ~VM_MAYWRITE; | |
1529 | vma->vm_flags |= VM_RESERVED; | |
1530 | vma->vm_ops = &perf_mmap_vmops; | |
7b732a75 PZ |
1531 | |
1532 | return ret; | |
37d81828 PM |
1533 | } |
1534 | ||
3c446b3d PZ |
1535 | static int perf_fasync(int fd, struct file *filp, int on) |
1536 | { | |
1537 | struct perf_counter *counter = filp->private_data; | |
1538 | struct inode *inode = filp->f_path.dentry->d_inode; | |
1539 | int retval; | |
1540 | ||
1541 | mutex_lock(&inode->i_mutex); | |
1542 | retval = fasync_helper(fd, filp, on, &counter->fasync); | |
1543 | mutex_unlock(&inode->i_mutex); | |
1544 | ||
1545 | if (retval < 0) | |
1546 | return retval; | |
1547 | ||
1548 | return 0; | |
1549 | } | |
1550 | ||
0793a61d TG |
1551 | static const struct file_operations perf_fops = { |
1552 | .release = perf_release, | |
1553 | .read = perf_read, | |
1554 | .poll = perf_poll, | |
d859e29f PM |
1555 | .unlocked_ioctl = perf_ioctl, |
1556 | .compat_ioctl = perf_ioctl, | |
37d81828 | 1557 | .mmap = perf_mmap, |
3c446b3d | 1558 | .fasync = perf_fasync, |
0793a61d TG |
1559 | }; |
1560 | ||
925d519a PZ |
1561 | /* |
1562 | * Perf counter wakeup | |
1563 | * | |
1564 | * If there's data, ensure we set the poll() state and publish everything | |
1565 | * to user-space before waking everybody up. | |
1566 | */ | |
1567 | ||
1568 | void perf_counter_wakeup(struct perf_counter *counter) | |
1569 | { | |
1570 | struct perf_mmap_data *data; | |
1571 | ||
1572 | rcu_read_lock(); | |
1573 | data = rcu_dereference(counter->data); | |
1574 | if (data) { | |
3c446b3d | 1575 | atomic_set(&data->wakeup, POLL_IN); |
38ff667b PZ |
1576 | /* |
1577 | * Ensure all data writes are issued before updating the | |
1578 | * user-space data head information. The matching rmb() | |
1579 | * will be in userspace after reading this value. | |
1580 | */ | |
1581 | smp_wmb(); | |
1582 | data->user_page->data_head = atomic_read(&data->head); | |
925d519a PZ |
1583 | } |
1584 | rcu_read_unlock(); | |
1585 | ||
1586 | wake_up_all(&counter->waitq); | |
4c9e2542 PZ |
1587 | |
1588 | if (counter->pending_kill) { | |
1589 | kill_fasync(&counter->fasync, SIGIO, counter->pending_kill); | |
1590 | counter->pending_kill = 0; | |
1591 | } | |
925d519a PZ |
1592 | } |
1593 | ||
1594 | /* | |
1595 | * Pending wakeups | |
1596 | * | |
1597 | * Handle the case where we need to wakeup up from NMI (or rq->lock) context. | |
1598 | * | |
1599 | * The NMI bit means we cannot possibly take locks. Therefore, maintain a | |
1600 | * single linked list and use cmpxchg() to add entries lockless. | |
1601 | */ | |
1602 | ||
79f14641 PZ |
1603 | static void perf_pending_counter(struct perf_pending_entry *entry) |
1604 | { | |
1605 | struct perf_counter *counter = container_of(entry, | |
1606 | struct perf_counter, pending); | |
1607 | ||
1608 | if (counter->pending_disable) { | |
1609 | counter->pending_disable = 0; | |
1610 | perf_counter_disable(counter); | |
1611 | } | |
1612 | ||
1613 | if (counter->pending_wakeup) { | |
1614 | counter->pending_wakeup = 0; | |
1615 | perf_counter_wakeup(counter); | |
1616 | } | |
1617 | } | |
1618 | ||
671dec5d | 1619 | #define PENDING_TAIL ((struct perf_pending_entry *)-1UL) |
925d519a | 1620 | |
671dec5d | 1621 | static DEFINE_PER_CPU(struct perf_pending_entry *, perf_pending_head) = { |
925d519a PZ |
1622 | PENDING_TAIL, |
1623 | }; | |
1624 | ||
671dec5d PZ |
1625 | static void perf_pending_queue(struct perf_pending_entry *entry, |
1626 | void (*func)(struct perf_pending_entry *)) | |
925d519a | 1627 | { |
671dec5d | 1628 | struct perf_pending_entry **head; |
925d519a | 1629 | |
671dec5d | 1630 | if (cmpxchg(&entry->next, NULL, PENDING_TAIL) != NULL) |
925d519a PZ |
1631 | return; |
1632 | ||
671dec5d PZ |
1633 | entry->func = func; |
1634 | ||
1635 | head = &get_cpu_var(perf_pending_head); | |
925d519a PZ |
1636 | |
1637 | do { | |
671dec5d PZ |
1638 | entry->next = *head; |
1639 | } while (cmpxchg(head, entry->next, entry) != entry->next); | |
925d519a PZ |
1640 | |
1641 | set_perf_counter_pending(); | |
1642 | ||
671dec5d | 1643 | put_cpu_var(perf_pending_head); |
925d519a PZ |
1644 | } |
1645 | ||
1646 | static int __perf_pending_run(void) | |
1647 | { | |
671dec5d | 1648 | struct perf_pending_entry *list; |
925d519a PZ |
1649 | int nr = 0; |
1650 | ||
671dec5d | 1651 | list = xchg(&__get_cpu_var(perf_pending_head), PENDING_TAIL); |
925d519a | 1652 | while (list != PENDING_TAIL) { |
671dec5d PZ |
1653 | void (*func)(struct perf_pending_entry *); |
1654 | struct perf_pending_entry *entry = list; | |
925d519a PZ |
1655 | |
1656 | list = list->next; | |
1657 | ||
671dec5d PZ |
1658 | func = entry->func; |
1659 | entry->next = NULL; | |
925d519a PZ |
1660 | /* |
1661 | * Ensure we observe the unqueue before we issue the wakeup, | |
1662 | * so that we won't be waiting forever. | |
1663 | * -- see perf_not_pending(). | |
1664 | */ | |
1665 | smp_wmb(); | |
1666 | ||
671dec5d | 1667 | func(entry); |
925d519a PZ |
1668 | nr++; |
1669 | } | |
1670 | ||
1671 | return nr; | |
1672 | } | |
1673 | ||
1674 | static inline int perf_not_pending(struct perf_counter *counter) | |
1675 | { | |
1676 | /* | |
1677 | * If we flush on whatever cpu we run, there is a chance we don't | |
1678 | * need to wait. | |
1679 | */ | |
1680 | get_cpu(); | |
1681 | __perf_pending_run(); | |
1682 | put_cpu(); | |
1683 | ||
1684 | /* | |
1685 | * Ensure we see the proper queue state before going to sleep | |
1686 | * so that we do not miss the wakeup. -- see perf_pending_handle() | |
1687 | */ | |
1688 | smp_rmb(); | |
671dec5d | 1689 | return counter->pending.next == NULL; |
925d519a PZ |
1690 | } |
1691 | ||
1692 | static void perf_pending_sync(struct perf_counter *counter) | |
1693 | { | |
1694 | wait_event(counter->waitq, perf_not_pending(counter)); | |
1695 | } | |
1696 | ||
1697 | void perf_counter_do_pending(void) | |
1698 | { | |
1699 | __perf_pending_run(); | |
1700 | } | |
1701 | ||
394ee076 PZ |
1702 | /* |
1703 | * Callchain support -- arch specific | |
1704 | */ | |
1705 | ||
9c03d88e | 1706 | __weak struct perf_callchain_entry *perf_callchain(struct pt_regs *regs) |
394ee076 PZ |
1707 | { |
1708 | return NULL; | |
1709 | } | |
1710 | ||
0322cd6e PZ |
1711 | /* |
1712 | * Output | |
1713 | */ | |
1714 | ||
b9cacc7b PZ |
1715 | struct perf_output_handle { |
1716 | struct perf_counter *counter; | |
1717 | struct perf_mmap_data *data; | |
1718 | unsigned int offset; | |
63e35b25 | 1719 | unsigned int head; |
b9cacc7b | 1720 | int wakeup; |
78d613eb | 1721 | int nmi; |
4c9e2542 | 1722 | int overflow; |
b9cacc7b PZ |
1723 | }; |
1724 | ||
78d613eb PZ |
1725 | static inline void __perf_output_wakeup(struct perf_output_handle *handle) |
1726 | { | |
671dec5d | 1727 | if (handle->nmi) { |
79f14641 | 1728 | handle->counter->pending_wakeup = 1; |
671dec5d | 1729 | perf_pending_queue(&handle->counter->pending, |
79f14641 | 1730 | perf_pending_counter); |
671dec5d | 1731 | } else |
78d613eb PZ |
1732 | perf_counter_wakeup(handle->counter); |
1733 | } | |
1734 | ||
b9cacc7b | 1735 | static int perf_output_begin(struct perf_output_handle *handle, |
78d613eb | 1736 | struct perf_counter *counter, unsigned int size, |
4c9e2542 | 1737 | int nmi, int overflow) |
0322cd6e | 1738 | { |
7b732a75 | 1739 | struct perf_mmap_data *data; |
b9cacc7b | 1740 | unsigned int offset, head; |
0322cd6e | 1741 | |
7b732a75 | 1742 | rcu_read_lock(); |
7b732a75 PZ |
1743 | data = rcu_dereference(counter->data); |
1744 | if (!data) | |
1745 | goto out; | |
1746 | ||
4c9e2542 PZ |
1747 | handle->counter = counter; |
1748 | handle->nmi = nmi; | |
1749 | handle->overflow = overflow; | |
78d613eb | 1750 | |
7b732a75 | 1751 | if (!data->nr_pages) |
78d613eb | 1752 | goto fail; |
7b732a75 | 1753 | |
7b732a75 PZ |
1754 | do { |
1755 | offset = head = atomic_read(&data->head); | |
c7138f37 | 1756 | head += size; |
7b732a75 PZ |
1757 | } while (atomic_cmpxchg(&data->head, offset, head) != offset); |
1758 | ||
b9cacc7b PZ |
1759 | handle->data = data; |
1760 | handle->offset = offset; | |
63e35b25 | 1761 | handle->head = head; |
b9cacc7b | 1762 | handle->wakeup = (offset >> PAGE_SHIFT) != (head >> PAGE_SHIFT); |
0322cd6e | 1763 | |
b9cacc7b | 1764 | return 0; |
7b732a75 | 1765 | |
78d613eb PZ |
1766 | fail: |
1767 | __perf_output_wakeup(handle); | |
b9cacc7b PZ |
1768 | out: |
1769 | rcu_read_unlock(); | |
7b732a75 | 1770 | |
b9cacc7b PZ |
1771 | return -ENOSPC; |
1772 | } | |
7b732a75 | 1773 | |
b9cacc7b PZ |
1774 | static void perf_output_copy(struct perf_output_handle *handle, |
1775 | void *buf, unsigned int len) | |
1776 | { | |
1777 | unsigned int pages_mask; | |
1778 | unsigned int offset; | |
1779 | unsigned int size; | |
1780 | void **pages; | |
1781 | ||
1782 | offset = handle->offset; | |
1783 | pages_mask = handle->data->nr_pages - 1; | |
1784 | pages = handle->data->data_pages; | |
1785 | ||
1786 | do { | |
1787 | unsigned int page_offset; | |
1788 | int nr; | |
1789 | ||
1790 | nr = (offset >> PAGE_SHIFT) & pages_mask; | |
1791 | page_offset = offset & (PAGE_SIZE - 1); | |
1792 | size = min_t(unsigned int, PAGE_SIZE - page_offset, len); | |
1793 | ||
1794 | memcpy(pages[nr] + page_offset, buf, size); | |
1795 | ||
1796 | len -= size; | |
1797 | buf += size; | |
1798 | offset += size; | |
1799 | } while (len); | |
1800 | ||
1801 | handle->offset = offset; | |
63e35b25 PZ |
1802 | |
1803 | WARN_ON_ONCE(handle->offset > handle->head); | |
b9cacc7b PZ |
1804 | } |
1805 | ||
5c148194 PZ |
1806 | #define perf_output_put(handle, x) \ |
1807 | perf_output_copy((handle), &(x), sizeof(x)) | |
1808 | ||
78d613eb | 1809 | static void perf_output_end(struct perf_output_handle *handle) |
b9cacc7b | 1810 | { |
c457810a PZ |
1811 | int wakeup_events = handle->counter->hw_event.wakeup_events; |
1812 | ||
4c9e2542 | 1813 | if (handle->overflow && wakeup_events) { |
c457810a PZ |
1814 | int events = atomic_inc_return(&handle->data->events); |
1815 | if (events >= wakeup_events) { | |
1816 | atomic_sub(wakeup_events, &handle->data->events); | |
1817 | __perf_output_wakeup(handle); | |
1818 | } | |
1819 | } else if (handle->wakeup) | |
78d613eb | 1820 | __perf_output_wakeup(handle); |
7b732a75 | 1821 | rcu_read_unlock(); |
b9cacc7b PZ |
1822 | } |
1823 | ||
f6c7d5fe | 1824 | static void perf_counter_output(struct perf_counter *counter, |
78f13e95 | 1825 | int nmi, struct pt_regs *regs, u64 addr) |
7b732a75 | 1826 | { |
5ed00415 | 1827 | int ret; |
8a057d84 | 1828 | u64 record_type = counter->hw_event.record_type; |
5ed00415 PZ |
1829 | struct perf_output_handle handle; |
1830 | struct perf_event_header header; | |
1831 | u64 ip; | |
5c148194 | 1832 | struct { |
ea5d20cf | 1833 | u32 pid, tid; |
5ed00415 | 1834 | } tid_entry; |
8a057d84 PZ |
1835 | struct { |
1836 | u64 event; | |
1837 | u64 counter; | |
1838 | } group_entry; | |
394ee076 PZ |
1839 | struct perf_callchain_entry *callchain = NULL; |
1840 | int callchain_size = 0; | |
339f7c90 | 1841 | u64 time; |
7b732a75 | 1842 | |
6b6e5486 | 1843 | header.type = 0; |
5ed00415 | 1844 | header.size = sizeof(header); |
7b732a75 | 1845 | |
6b6e5486 PZ |
1846 | header.misc = PERF_EVENT_MISC_OVERFLOW; |
1847 | header.misc |= user_mode(regs) ? | |
6fab0192 PZ |
1848 | PERF_EVENT_MISC_USER : PERF_EVENT_MISC_KERNEL; |
1849 | ||
8a057d84 PZ |
1850 | if (record_type & PERF_RECORD_IP) { |
1851 | ip = instruction_pointer(regs); | |
6b6e5486 | 1852 | header.type |= PERF_RECORD_IP; |
8a057d84 PZ |
1853 | header.size += sizeof(ip); |
1854 | } | |
ea5d20cf | 1855 | |
8a057d84 | 1856 | if (record_type & PERF_RECORD_TID) { |
ea5d20cf | 1857 | /* namespace issues */ |
5ed00415 PZ |
1858 | tid_entry.pid = current->group_leader->pid; |
1859 | tid_entry.tid = current->pid; | |
1860 | ||
6b6e5486 | 1861 | header.type |= PERF_RECORD_TID; |
5ed00415 PZ |
1862 | header.size += sizeof(tid_entry); |
1863 | } | |
1864 | ||
4d855457 PZ |
1865 | if (record_type & PERF_RECORD_TIME) { |
1866 | /* | |
1867 | * Maybe do better on x86 and provide cpu_clock_nmi() | |
1868 | */ | |
1869 | time = sched_clock(); | |
1870 | ||
1871 | header.type |= PERF_RECORD_TIME; | |
1872 | header.size += sizeof(u64); | |
1873 | } | |
1874 | ||
78f13e95 PZ |
1875 | if (record_type & PERF_RECORD_ADDR) { |
1876 | header.type |= PERF_RECORD_ADDR; | |
1877 | header.size += sizeof(u64); | |
1878 | } | |
1879 | ||
8a057d84 | 1880 | if (record_type & PERF_RECORD_GROUP) { |
6b6e5486 | 1881 | header.type |= PERF_RECORD_GROUP; |
8a057d84 PZ |
1882 | header.size += sizeof(u64) + |
1883 | counter->nr_siblings * sizeof(group_entry); | |
1884 | } | |
1885 | ||
1886 | if (record_type & PERF_RECORD_CALLCHAIN) { | |
394ee076 PZ |
1887 | callchain = perf_callchain(regs); |
1888 | ||
1889 | if (callchain) { | |
9c03d88e | 1890 | callchain_size = (1 + callchain->nr) * sizeof(u64); |
394ee076 | 1891 | |
6b6e5486 | 1892 | header.type |= PERF_RECORD_CALLCHAIN; |
394ee076 PZ |
1893 | header.size += callchain_size; |
1894 | } | |
1895 | } | |
1896 | ||
4c9e2542 | 1897 | ret = perf_output_begin(&handle, counter, header.size, nmi, 1); |
5ed00415 PZ |
1898 | if (ret) |
1899 | return; | |
ea5d20cf | 1900 | |
5ed00415 | 1901 | perf_output_put(&handle, header); |
5c148194 | 1902 | |
8a057d84 PZ |
1903 | if (record_type & PERF_RECORD_IP) |
1904 | perf_output_put(&handle, ip); | |
5c148194 | 1905 | |
8a057d84 PZ |
1906 | if (record_type & PERF_RECORD_TID) |
1907 | perf_output_put(&handle, tid_entry); | |
5c148194 | 1908 | |
4d855457 PZ |
1909 | if (record_type & PERF_RECORD_TIME) |
1910 | perf_output_put(&handle, time); | |
1911 | ||
78f13e95 PZ |
1912 | if (record_type & PERF_RECORD_ADDR) |
1913 | perf_output_put(&handle, addr); | |
1914 | ||
8a057d84 PZ |
1915 | if (record_type & PERF_RECORD_GROUP) { |
1916 | struct perf_counter *leader, *sub; | |
1917 | u64 nr = counter->nr_siblings; | |
5c148194 | 1918 | |
8a057d84 | 1919 | perf_output_put(&handle, nr); |
0322cd6e | 1920 | |
8a057d84 PZ |
1921 | leader = counter->group_leader; |
1922 | list_for_each_entry(sub, &leader->sibling_list, list_entry) { | |
1923 | if (sub != counter) | |
4aeb0b42 | 1924 | sub->pmu->read(sub); |
7b732a75 | 1925 | |
8a057d84 PZ |
1926 | group_entry.event = sub->hw_event.config; |
1927 | group_entry.counter = atomic64_read(&sub->count); | |
7b732a75 | 1928 | |
8a057d84 PZ |
1929 | perf_output_put(&handle, group_entry); |
1930 | } | |
0322cd6e | 1931 | } |
5c148194 | 1932 | |
8a057d84 PZ |
1933 | if (callchain) |
1934 | perf_output_copy(&handle, callchain, callchain_size); | |
0322cd6e | 1935 | |
8a057d84 | 1936 | perf_output_end(&handle); |
0322cd6e PZ |
1937 | } |
1938 | ||
8d1b2d93 PZ |
1939 | /* |
1940 | * comm tracking | |
1941 | */ | |
1942 | ||
1943 | struct perf_comm_event { | |
1944 | struct task_struct *task; | |
1945 | char *comm; | |
1946 | int comm_size; | |
1947 | ||
1948 | struct { | |
1949 | struct perf_event_header header; | |
1950 | ||
1951 | u32 pid; | |
1952 | u32 tid; | |
1953 | } event; | |
1954 | }; | |
1955 | ||
1956 | static void perf_counter_comm_output(struct perf_counter *counter, | |
1957 | struct perf_comm_event *comm_event) | |
1958 | { | |
1959 | struct perf_output_handle handle; | |
1960 | int size = comm_event->event.header.size; | |
1961 | int ret = perf_output_begin(&handle, counter, size, 0, 0); | |
1962 | ||
1963 | if (ret) | |
1964 | return; | |
1965 | ||
1966 | perf_output_put(&handle, comm_event->event); | |
1967 | perf_output_copy(&handle, comm_event->comm, | |
1968 | comm_event->comm_size); | |
1969 | perf_output_end(&handle); | |
1970 | } | |
1971 | ||
1972 | static int perf_counter_comm_match(struct perf_counter *counter, | |
1973 | struct perf_comm_event *comm_event) | |
1974 | { | |
1975 | if (counter->hw_event.comm && | |
1976 | comm_event->event.header.type == PERF_EVENT_COMM) | |
1977 | return 1; | |
1978 | ||
1979 | return 0; | |
1980 | } | |
1981 | ||
1982 | static void perf_counter_comm_ctx(struct perf_counter_context *ctx, | |
1983 | struct perf_comm_event *comm_event) | |
1984 | { | |
1985 | struct perf_counter *counter; | |
1986 | ||
1987 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) | |
1988 | return; | |
1989 | ||
1990 | rcu_read_lock(); | |
1991 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
1992 | if (perf_counter_comm_match(counter, comm_event)) | |
1993 | perf_counter_comm_output(counter, comm_event); | |
1994 | } | |
1995 | rcu_read_unlock(); | |
1996 | } | |
1997 | ||
1998 | static void perf_counter_comm_event(struct perf_comm_event *comm_event) | |
1999 | { | |
2000 | struct perf_cpu_context *cpuctx; | |
2001 | unsigned int size; | |
2002 | char *comm = comm_event->task->comm; | |
2003 | ||
888fcee0 | 2004 | size = ALIGN(strlen(comm)+1, sizeof(u64)); |
8d1b2d93 PZ |
2005 | |
2006 | comm_event->comm = comm; | |
2007 | comm_event->comm_size = size; | |
2008 | ||
2009 | comm_event->event.header.size = sizeof(comm_event->event) + size; | |
2010 | ||
2011 | cpuctx = &get_cpu_var(perf_cpu_context); | |
2012 | perf_counter_comm_ctx(&cpuctx->ctx, comm_event); | |
2013 | put_cpu_var(perf_cpu_context); | |
2014 | ||
2015 | perf_counter_comm_ctx(¤t->perf_counter_ctx, comm_event); | |
2016 | } | |
2017 | ||
2018 | void perf_counter_comm(struct task_struct *task) | |
2019 | { | |
9ee318a7 PZ |
2020 | struct perf_comm_event comm_event; |
2021 | ||
2022 | if (!atomic_read(&nr_comm_tracking)) | |
2023 | return; | |
2024 | ||
2025 | comm_event = (struct perf_comm_event){ | |
8d1b2d93 PZ |
2026 | .task = task, |
2027 | .event = { | |
2028 | .header = { .type = PERF_EVENT_COMM, }, | |
2029 | .pid = task->group_leader->pid, | |
2030 | .tid = task->pid, | |
2031 | }, | |
2032 | }; | |
2033 | ||
2034 | perf_counter_comm_event(&comm_event); | |
2035 | } | |
2036 | ||
0a4a9391 PZ |
2037 | /* |
2038 | * mmap tracking | |
2039 | */ | |
2040 | ||
2041 | struct perf_mmap_event { | |
2042 | struct file *file; | |
2043 | char *file_name; | |
2044 | int file_size; | |
2045 | ||
2046 | struct { | |
2047 | struct perf_event_header header; | |
2048 | ||
2049 | u32 pid; | |
2050 | u32 tid; | |
2051 | u64 start; | |
2052 | u64 len; | |
2053 | u64 pgoff; | |
2054 | } event; | |
2055 | }; | |
2056 | ||
2057 | static void perf_counter_mmap_output(struct perf_counter *counter, | |
2058 | struct perf_mmap_event *mmap_event) | |
2059 | { | |
2060 | struct perf_output_handle handle; | |
2061 | int size = mmap_event->event.header.size; | |
4c9e2542 | 2062 | int ret = perf_output_begin(&handle, counter, size, 0, 0); |
0a4a9391 PZ |
2063 | |
2064 | if (ret) | |
2065 | return; | |
2066 | ||
2067 | perf_output_put(&handle, mmap_event->event); | |
2068 | perf_output_copy(&handle, mmap_event->file_name, | |
2069 | mmap_event->file_size); | |
78d613eb | 2070 | perf_output_end(&handle); |
0a4a9391 PZ |
2071 | } |
2072 | ||
2073 | static int perf_counter_mmap_match(struct perf_counter *counter, | |
2074 | struct perf_mmap_event *mmap_event) | |
2075 | { | |
2076 | if (counter->hw_event.mmap && | |
2077 | mmap_event->event.header.type == PERF_EVENT_MMAP) | |
2078 | return 1; | |
2079 | ||
2080 | if (counter->hw_event.munmap && | |
2081 | mmap_event->event.header.type == PERF_EVENT_MUNMAP) | |
2082 | return 1; | |
2083 | ||
2084 | return 0; | |
2085 | } | |
2086 | ||
2087 | static void perf_counter_mmap_ctx(struct perf_counter_context *ctx, | |
2088 | struct perf_mmap_event *mmap_event) | |
2089 | { | |
2090 | struct perf_counter *counter; | |
2091 | ||
2092 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) | |
2093 | return; | |
2094 | ||
2095 | rcu_read_lock(); | |
2096 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
2097 | if (perf_counter_mmap_match(counter, mmap_event)) | |
2098 | perf_counter_mmap_output(counter, mmap_event); | |
2099 | } | |
2100 | rcu_read_unlock(); | |
2101 | } | |
2102 | ||
2103 | static void perf_counter_mmap_event(struct perf_mmap_event *mmap_event) | |
2104 | { | |
2105 | struct perf_cpu_context *cpuctx; | |
2106 | struct file *file = mmap_event->file; | |
2107 | unsigned int size; | |
2108 | char tmp[16]; | |
2109 | char *buf = NULL; | |
2110 | char *name; | |
2111 | ||
2112 | if (file) { | |
2113 | buf = kzalloc(PATH_MAX, GFP_KERNEL); | |
2114 | if (!buf) { | |
2115 | name = strncpy(tmp, "//enomem", sizeof(tmp)); | |
2116 | goto got_name; | |
2117 | } | |
d3d21c41 | 2118 | name = d_path(&file->f_path, buf, PATH_MAX); |
0a4a9391 PZ |
2119 | if (IS_ERR(name)) { |
2120 | name = strncpy(tmp, "//toolong", sizeof(tmp)); | |
2121 | goto got_name; | |
2122 | } | |
2123 | } else { | |
2124 | name = strncpy(tmp, "//anon", sizeof(tmp)); | |
2125 | goto got_name; | |
2126 | } | |
2127 | ||
2128 | got_name: | |
888fcee0 | 2129 | size = ALIGN(strlen(name)+1, sizeof(u64)); |
0a4a9391 PZ |
2130 | |
2131 | mmap_event->file_name = name; | |
2132 | mmap_event->file_size = size; | |
2133 | ||
2134 | mmap_event->event.header.size = sizeof(mmap_event->event) + size; | |
2135 | ||
2136 | cpuctx = &get_cpu_var(perf_cpu_context); | |
2137 | perf_counter_mmap_ctx(&cpuctx->ctx, mmap_event); | |
2138 | put_cpu_var(perf_cpu_context); | |
2139 | ||
2140 | perf_counter_mmap_ctx(¤t->perf_counter_ctx, mmap_event); | |
2141 | ||
2142 | kfree(buf); | |
2143 | } | |
2144 | ||
2145 | void perf_counter_mmap(unsigned long addr, unsigned long len, | |
2146 | unsigned long pgoff, struct file *file) | |
2147 | { | |
9ee318a7 PZ |
2148 | struct perf_mmap_event mmap_event; |
2149 | ||
2150 | if (!atomic_read(&nr_mmap_tracking)) | |
2151 | return; | |
2152 | ||
2153 | mmap_event = (struct perf_mmap_event){ | |
0a4a9391 PZ |
2154 | .file = file, |
2155 | .event = { | |
2156 | .header = { .type = PERF_EVENT_MMAP, }, | |
2157 | .pid = current->group_leader->pid, | |
2158 | .tid = current->pid, | |
2159 | .start = addr, | |
2160 | .len = len, | |
2161 | .pgoff = pgoff, | |
2162 | }, | |
2163 | }; | |
2164 | ||
2165 | perf_counter_mmap_event(&mmap_event); | |
2166 | } | |
2167 | ||
2168 | void perf_counter_munmap(unsigned long addr, unsigned long len, | |
2169 | unsigned long pgoff, struct file *file) | |
2170 | { | |
9ee318a7 PZ |
2171 | struct perf_mmap_event mmap_event; |
2172 | ||
2173 | if (!atomic_read(&nr_munmap_tracking)) | |
2174 | return; | |
2175 | ||
2176 | mmap_event = (struct perf_mmap_event){ | |
0a4a9391 PZ |
2177 | .file = file, |
2178 | .event = { | |
2179 | .header = { .type = PERF_EVENT_MUNMAP, }, | |
2180 | .pid = current->group_leader->pid, | |
2181 | .tid = current->pid, | |
2182 | .start = addr, | |
2183 | .len = len, | |
2184 | .pgoff = pgoff, | |
2185 | }, | |
2186 | }; | |
2187 | ||
2188 | perf_counter_mmap_event(&mmap_event); | |
2189 | } | |
2190 | ||
f6c7d5fe PZ |
2191 | /* |
2192 | * Generic counter overflow handling. | |
2193 | */ | |
2194 | ||
2195 | int perf_counter_overflow(struct perf_counter *counter, | |
78f13e95 | 2196 | int nmi, struct pt_regs *regs, u64 addr) |
f6c7d5fe | 2197 | { |
79f14641 PZ |
2198 | int events = atomic_read(&counter->event_limit); |
2199 | int ret = 0; | |
2200 | ||
4c9e2542 | 2201 | counter->pending_kill = POLL_IN; |
79f14641 PZ |
2202 | if (events && atomic_dec_and_test(&counter->event_limit)) { |
2203 | ret = 1; | |
4c9e2542 | 2204 | counter->pending_kill = POLL_HUP; |
79f14641 PZ |
2205 | if (nmi) { |
2206 | counter->pending_disable = 1; | |
2207 | perf_pending_queue(&counter->pending, | |
2208 | perf_pending_counter); | |
2209 | } else | |
2210 | perf_counter_disable(counter); | |
2211 | } | |
2212 | ||
78f13e95 | 2213 | perf_counter_output(counter, nmi, regs, addr); |
79f14641 | 2214 | return ret; |
f6c7d5fe PZ |
2215 | } |
2216 | ||
15dbf27c PZ |
2217 | /* |
2218 | * Generic software counter infrastructure | |
2219 | */ | |
2220 | ||
2221 | static void perf_swcounter_update(struct perf_counter *counter) | |
2222 | { | |
2223 | struct hw_perf_counter *hwc = &counter->hw; | |
2224 | u64 prev, now; | |
2225 | s64 delta; | |
2226 | ||
2227 | again: | |
2228 | prev = atomic64_read(&hwc->prev_count); | |
2229 | now = atomic64_read(&hwc->count); | |
2230 | if (atomic64_cmpxchg(&hwc->prev_count, prev, now) != prev) | |
2231 | goto again; | |
2232 | ||
2233 | delta = now - prev; | |
2234 | ||
2235 | atomic64_add(delta, &counter->count); | |
2236 | atomic64_sub(delta, &hwc->period_left); | |
2237 | } | |
2238 | ||
2239 | static void perf_swcounter_set_period(struct perf_counter *counter) | |
2240 | { | |
2241 | struct hw_perf_counter *hwc = &counter->hw; | |
2242 | s64 left = atomic64_read(&hwc->period_left); | |
2243 | s64 period = hwc->irq_period; | |
2244 | ||
2245 | if (unlikely(left <= -period)) { | |
2246 | left = period; | |
2247 | atomic64_set(&hwc->period_left, left); | |
2248 | } | |
2249 | ||
2250 | if (unlikely(left <= 0)) { | |
2251 | left += period; | |
2252 | atomic64_add(period, &hwc->period_left); | |
2253 | } | |
2254 | ||
2255 | atomic64_set(&hwc->prev_count, -left); | |
2256 | atomic64_set(&hwc->count, -left); | |
2257 | } | |
2258 | ||
d6d020e9 PZ |
2259 | static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer) |
2260 | { | |
f6c7d5fe | 2261 | enum hrtimer_restart ret = HRTIMER_RESTART; |
d6d020e9 PZ |
2262 | struct perf_counter *counter; |
2263 | struct pt_regs *regs; | |
2264 | ||
2265 | counter = container_of(hrtimer, struct perf_counter, hw.hrtimer); | |
4aeb0b42 | 2266 | counter->pmu->read(counter); |
d6d020e9 PZ |
2267 | |
2268 | regs = get_irq_regs(); | |
2269 | /* | |
2270 | * In case we exclude kernel IPs or are somehow not in interrupt | |
2271 | * context, provide the next best thing, the user IP. | |
2272 | */ | |
2273 | if ((counter->hw_event.exclude_kernel || !regs) && | |
2274 | !counter->hw_event.exclude_user) | |
2275 | regs = task_pt_regs(current); | |
2276 | ||
f6c7d5fe | 2277 | if (regs) { |
78f13e95 | 2278 | if (perf_counter_overflow(counter, 0, regs, 0)) |
f6c7d5fe PZ |
2279 | ret = HRTIMER_NORESTART; |
2280 | } | |
d6d020e9 PZ |
2281 | |
2282 | hrtimer_forward_now(hrtimer, ns_to_ktime(counter->hw.irq_period)); | |
2283 | ||
f6c7d5fe | 2284 | return ret; |
d6d020e9 PZ |
2285 | } |
2286 | ||
2287 | static void perf_swcounter_overflow(struct perf_counter *counter, | |
78f13e95 | 2288 | int nmi, struct pt_regs *regs, u64 addr) |
d6d020e9 | 2289 | { |
b8e83514 PZ |
2290 | perf_swcounter_update(counter); |
2291 | perf_swcounter_set_period(counter); | |
78f13e95 | 2292 | if (perf_counter_overflow(counter, nmi, regs, addr)) |
f6c7d5fe PZ |
2293 | /* soft-disable the counter */ |
2294 | ; | |
2295 | ||
d6d020e9 PZ |
2296 | } |
2297 | ||
15dbf27c | 2298 | static int perf_swcounter_match(struct perf_counter *counter, |
b8e83514 PZ |
2299 | enum perf_event_types type, |
2300 | u32 event, struct pt_regs *regs) | |
15dbf27c PZ |
2301 | { |
2302 | if (counter->state != PERF_COUNTER_STATE_ACTIVE) | |
2303 | return 0; | |
2304 | ||
f4a2deb4 | 2305 | if (perf_event_raw(&counter->hw_event)) |
b8e83514 PZ |
2306 | return 0; |
2307 | ||
f4a2deb4 | 2308 | if (perf_event_type(&counter->hw_event) != type) |
15dbf27c PZ |
2309 | return 0; |
2310 | ||
f4a2deb4 | 2311 | if (perf_event_id(&counter->hw_event) != event) |
15dbf27c PZ |
2312 | return 0; |
2313 | ||
2314 | if (counter->hw_event.exclude_user && user_mode(regs)) | |
2315 | return 0; | |
2316 | ||
2317 | if (counter->hw_event.exclude_kernel && !user_mode(regs)) | |
2318 | return 0; | |
2319 | ||
2320 | return 1; | |
2321 | } | |
2322 | ||
d6d020e9 | 2323 | static void perf_swcounter_add(struct perf_counter *counter, u64 nr, |
78f13e95 | 2324 | int nmi, struct pt_regs *regs, u64 addr) |
d6d020e9 PZ |
2325 | { |
2326 | int neg = atomic64_add_negative(nr, &counter->hw.count); | |
2327 | if (counter->hw.irq_period && !neg) | |
78f13e95 | 2328 | perf_swcounter_overflow(counter, nmi, regs, addr); |
d6d020e9 PZ |
2329 | } |
2330 | ||
15dbf27c | 2331 | static void perf_swcounter_ctx_event(struct perf_counter_context *ctx, |
b8e83514 | 2332 | enum perf_event_types type, u32 event, |
78f13e95 PZ |
2333 | u64 nr, int nmi, struct pt_regs *regs, |
2334 | u64 addr) | |
15dbf27c PZ |
2335 | { |
2336 | struct perf_counter *counter; | |
15dbf27c | 2337 | |
01ef09d9 | 2338 | if (system_state != SYSTEM_RUNNING || list_empty(&ctx->event_list)) |
15dbf27c PZ |
2339 | return; |
2340 | ||
592903cd PZ |
2341 | rcu_read_lock(); |
2342 | list_for_each_entry_rcu(counter, &ctx->event_list, event_entry) { | |
b8e83514 | 2343 | if (perf_swcounter_match(counter, type, event, regs)) |
78f13e95 | 2344 | perf_swcounter_add(counter, nr, nmi, regs, addr); |
15dbf27c | 2345 | } |
592903cd | 2346 | rcu_read_unlock(); |
15dbf27c PZ |
2347 | } |
2348 | ||
96f6d444 PZ |
2349 | static int *perf_swcounter_recursion_context(struct perf_cpu_context *cpuctx) |
2350 | { | |
2351 | if (in_nmi()) | |
2352 | return &cpuctx->recursion[3]; | |
2353 | ||
2354 | if (in_irq()) | |
2355 | return &cpuctx->recursion[2]; | |
2356 | ||
2357 | if (in_softirq()) | |
2358 | return &cpuctx->recursion[1]; | |
2359 | ||
2360 | return &cpuctx->recursion[0]; | |
2361 | } | |
2362 | ||
b8e83514 | 2363 | static void __perf_swcounter_event(enum perf_event_types type, u32 event, |
78f13e95 PZ |
2364 | u64 nr, int nmi, struct pt_regs *regs, |
2365 | u64 addr) | |
15dbf27c PZ |
2366 | { |
2367 | struct perf_cpu_context *cpuctx = &get_cpu_var(perf_cpu_context); | |
96f6d444 PZ |
2368 | int *recursion = perf_swcounter_recursion_context(cpuctx); |
2369 | ||
2370 | if (*recursion) | |
2371 | goto out; | |
2372 | ||
2373 | (*recursion)++; | |
2374 | barrier(); | |
15dbf27c | 2375 | |
78f13e95 PZ |
2376 | perf_swcounter_ctx_event(&cpuctx->ctx, type, event, |
2377 | nr, nmi, regs, addr); | |
b8e83514 PZ |
2378 | if (cpuctx->task_ctx) { |
2379 | perf_swcounter_ctx_event(cpuctx->task_ctx, type, event, | |
78f13e95 | 2380 | nr, nmi, regs, addr); |
b8e83514 | 2381 | } |
15dbf27c | 2382 | |
96f6d444 PZ |
2383 | barrier(); |
2384 | (*recursion)--; | |
2385 | ||
2386 | out: | |
15dbf27c PZ |
2387 | put_cpu_var(perf_cpu_context); |
2388 | } | |
2389 | ||
78f13e95 PZ |
2390 | void |
2391 | perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr) | |
b8e83514 | 2392 | { |
78f13e95 | 2393 | __perf_swcounter_event(PERF_TYPE_SOFTWARE, event, nr, nmi, regs, addr); |
b8e83514 PZ |
2394 | } |
2395 | ||
15dbf27c PZ |
2396 | static void perf_swcounter_read(struct perf_counter *counter) |
2397 | { | |
2398 | perf_swcounter_update(counter); | |
2399 | } | |
2400 | ||
2401 | static int perf_swcounter_enable(struct perf_counter *counter) | |
2402 | { | |
2403 | perf_swcounter_set_period(counter); | |
2404 | return 0; | |
2405 | } | |
2406 | ||
2407 | static void perf_swcounter_disable(struct perf_counter *counter) | |
2408 | { | |
2409 | perf_swcounter_update(counter); | |
2410 | } | |
2411 | ||
4aeb0b42 | 2412 | static const struct pmu perf_ops_generic = { |
ac17dc8e PZ |
2413 | .enable = perf_swcounter_enable, |
2414 | .disable = perf_swcounter_disable, | |
2415 | .read = perf_swcounter_read, | |
2416 | }; | |
2417 | ||
15dbf27c PZ |
2418 | /* |
2419 | * Software counter: cpu wall time clock | |
2420 | */ | |
2421 | ||
9abf8a08 PM |
2422 | static void cpu_clock_perf_counter_update(struct perf_counter *counter) |
2423 | { | |
2424 | int cpu = raw_smp_processor_id(); | |
2425 | s64 prev; | |
2426 | u64 now; | |
2427 | ||
2428 | now = cpu_clock(cpu); | |
2429 | prev = atomic64_read(&counter->hw.prev_count); | |
2430 | atomic64_set(&counter->hw.prev_count, now); | |
2431 | atomic64_add(now - prev, &counter->count); | |
2432 | } | |
2433 | ||
d6d020e9 PZ |
2434 | static int cpu_clock_perf_counter_enable(struct perf_counter *counter) |
2435 | { | |
2436 | struct hw_perf_counter *hwc = &counter->hw; | |
2437 | int cpu = raw_smp_processor_id(); | |
2438 | ||
2439 | atomic64_set(&hwc->prev_count, cpu_clock(cpu)); | |
039fc91e PZ |
2440 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2441 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2442 | if (hwc->irq_period) { |
d6d020e9 PZ |
2443 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2444 | ns_to_ktime(hwc->irq_period), 0, | |
2445 | HRTIMER_MODE_REL, 0); | |
2446 | } | |
2447 | ||
2448 | return 0; | |
2449 | } | |
2450 | ||
5c92d124 IM |
2451 | static void cpu_clock_perf_counter_disable(struct perf_counter *counter) |
2452 | { | |
d6d020e9 | 2453 | hrtimer_cancel(&counter->hw.hrtimer); |
9abf8a08 | 2454 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2455 | } |
2456 | ||
2457 | static void cpu_clock_perf_counter_read(struct perf_counter *counter) | |
2458 | { | |
9abf8a08 | 2459 | cpu_clock_perf_counter_update(counter); |
5c92d124 IM |
2460 | } |
2461 | ||
4aeb0b42 | 2462 | static const struct pmu perf_ops_cpu_clock = { |
7671581f IM |
2463 | .enable = cpu_clock_perf_counter_enable, |
2464 | .disable = cpu_clock_perf_counter_disable, | |
2465 | .read = cpu_clock_perf_counter_read, | |
5c92d124 IM |
2466 | }; |
2467 | ||
15dbf27c PZ |
2468 | /* |
2469 | * Software counter: task time clock | |
2470 | */ | |
2471 | ||
e30e08f6 | 2472 | static void task_clock_perf_counter_update(struct perf_counter *counter, u64 now) |
aa9c4c0f | 2473 | { |
e30e08f6 | 2474 | u64 prev; |
8cb391e8 IM |
2475 | s64 delta; |
2476 | ||
a39d6f25 | 2477 | prev = atomic64_xchg(&counter->hw.prev_count, now); |
8cb391e8 | 2478 | delta = now - prev; |
8cb391e8 | 2479 | atomic64_add(delta, &counter->count); |
bae43c99 IM |
2480 | } |
2481 | ||
95cdd2e7 | 2482 | static int task_clock_perf_counter_enable(struct perf_counter *counter) |
8cb391e8 | 2483 | { |
d6d020e9 | 2484 | struct hw_perf_counter *hwc = &counter->hw; |
a39d6f25 PZ |
2485 | u64 now; |
2486 | ||
a39d6f25 | 2487 | now = counter->ctx->time; |
d6d020e9 | 2488 | |
a39d6f25 | 2489 | atomic64_set(&hwc->prev_count, now); |
039fc91e PZ |
2490 | hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
2491 | hwc->hrtimer.function = perf_swcounter_hrtimer; | |
d6d020e9 | 2492 | if (hwc->irq_period) { |
d6d020e9 PZ |
2493 | __hrtimer_start_range_ns(&hwc->hrtimer, |
2494 | ns_to_ktime(hwc->irq_period), 0, | |
2495 | HRTIMER_MODE_REL, 0); | |
2496 | } | |
95cdd2e7 IM |
2497 | |
2498 | return 0; | |
8cb391e8 IM |
2499 | } |
2500 | ||
2501 | static void task_clock_perf_counter_disable(struct perf_counter *counter) | |
bae43c99 | 2502 | { |
d6d020e9 | 2503 | hrtimer_cancel(&counter->hw.hrtimer); |
e30e08f6 PZ |
2504 | task_clock_perf_counter_update(counter, counter->ctx->time); |
2505 | ||
d6d020e9 | 2506 | } |
aa9c4c0f | 2507 | |
d6d020e9 PZ |
2508 | static void task_clock_perf_counter_read(struct perf_counter *counter) |
2509 | { | |
e30e08f6 PZ |
2510 | u64 time; |
2511 | ||
2512 | if (!in_nmi()) { | |
2513 | update_context_time(counter->ctx); | |
2514 | time = counter->ctx->time; | |
2515 | } else { | |
2516 | u64 now = perf_clock(); | |
2517 | u64 delta = now - counter->ctx->timestamp; | |
2518 | time = counter->ctx->time + delta; | |
2519 | } | |
2520 | ||
2521 | task_clock_perf_counter_update(counter, time); | |
bae43c99 IM |
2522 | } |
2523 | ||
4aeb0b42 | 2524 | static const struct pmu perf_ops_task_clock = { |
7671581f IM |
2525 | .enable = task_clock_perf_counter_enable, |
2526 | .disable = task_clock_perf_counter_disable, | |
2527 | .read = task_clock_perf_counter_read, | |
bae43c99 IM |
2528 | }; |
2529 | ||
15dbf27c PZ |
2530 | /* |
2531 | * Software counter: cpu migrations | |
2532 | */ | |
2533 | ||
23a185ca | 2534 | static inline u64 get_cpu_migrations(struct perf_counter *counter) |
6c594c21 | 2535 | { |
23a185ca PM |
2536 | struct task_struct *curr = counter->ctx->task; |
2537 | ||
2538 | if (curr) | |
2539 | return curr->se.nr_migrations; | |
2540 | return cpu_nr_migrations(smp_processor_id()); | |
6c594c21 IM |
2541 | } |
2542 | ||
2543 | static void cpu_migrations_perf_counter_update(struct perf_counter *counter) | |
2544 | { | |
2545 | u64 prev, now; | |
2546 | s64 delta; | |
2547 | ||
2548 | prev = atomic64_read(&counter->hw.prev_count); | |
23a185ca | 2549 | now = get_cpu_migrations(counter); |
6c594c21 IM |
2550 | |
2551 | atomic64_set(&counter->hw.prev_count, now); | |
2552 | ||
2553 | delta = now - prev; | |
6c594c21 IM |
2554 | |
2555 | atomic64_add(delta, &counter->count); | |
2556 | } | |
2557 | ||
2558 | static void cpu_migrations_perf_counter_read(struct perf_counter *counter) | |
2559 | { | |
2560 | cpu_migrations_perf_counter_update(counter); | |
2561 | } | |
2562 | ||
95cdd2e7 | 2563 | static int cpu_migrations_perf_counter_enable(struct perf_counter *counter) |
6c594c21 | 2564 | { |
c07c99b6 PM |
2565 | if (counter->prev_state <= PERF_COUNTER_STATE_OFF) |
2566 | atomic64_set(&counter->hw.prev_count, | |
2567 | get_cpu_migrations(counter)); | |
95cdd2e7 | 2568 | return 0; |
6c594c21 IM |
2569 | } |
2570 | ||
2571 | static void cpu_migrations_perf_counter_disable(struct perf_counter *counter) | |
2572 | { | |
2573 | cpu_migrations_perf_counter_update(counter); | |
2574 | } | |
2575 | ||
4aeb0b42 | 2576 | static const struct pmu perf_ops_cpu_migrations = { |
7671581f IM |
2577 | .enable = cpu_migrations_perf_counter_enable, |
2578 | .disable = cpu_migrations_perf_counter_disable, | |
2579 | .read = cpu_migrations_perf_counter_read, | |
6c594c21 IM |
2580 | }; |
2581 | ||
e077df4f PZ |
2582 | #ifdef CONFIG_EVENT_PROFILE |
2583 | void perf_tpcounter_event(int event_id) | |
2584 | { | |
b8e83514 PZ |
2585 | struct pt_regs *regs = get_irq_regs(); |
2586 | ||
2587 | if (!regs) | |
2588 | regs = task_pt_regs(current); | |
2589 | ||
78f13e95 | 2590 | __perf_swcounter_event(PERF_TYPE_TRACEPOINT, event_id, 1, 1, regs, 0); |
e077df4f | 2591 | } |
ff7b1b4f | 2592 | EXPORT_SYMBOL_GPL(perf_tpcounter_event); |
e077df4f PZ |
2593 | |
2594 | extern int ftrace_profile_enable(int); | |
2595 | extern void ftrace_profile_disable(int); | |
2596 | ||
2597 | static void tp_perf_counter_destroy(struct perf_counter *counter) | |
2598 | { | |
f4a2deb4 | 2599 | ftrace_profile_disable(perf_event_id(&counter->hw_event)); |
e077df4f PZ |
2600 | } |
2601 | ||
4aeb0b42 | 2602 | static const struct pmu *tp_perf_counter_init(struct perf_counter *counter) |
e077df4f | 2603 | { |
f4a2deb4 | 2604 | int event_id = perf_event_id(&counter->hw_event); |
e077df4f PZ |
2605 | int ret; |
2606 | ||
2607 | ret = ftrace_profile_enable(event_id); | |
2608 | if (ret) | |
2609 | return NULL; | |
2610 | ||
2611 | counter->destroy = tp_perf_counter_destroy; | |
b8e83514 | 2612 | counter->hw.irq_period = counter->hw_event.irq_period; |
e077df4f PZ |
2613 | |
2614 | return &perf_ops_generic; | |
2615 | } | |
2616 | #else | |
4aeb0b42 | 2617 | static const struct pmu *tp_perf_counter_init(struct perf_counter *counter) |
e077df4f PZ |
2618 | { |
2619 | return NULL; | |
2620 | } | |
2621 | #endif | |
2622 | ||
4aeb0b42 | 2623 | static const struct pmu *sw_perf_counter_init(struct perf_counter *counter) |
5c92d124 | 2624 | { |
15dbf27c | 2625 | struct perf_counter_hw_event *hw_event = &counter->hw_event; |
4aeb0b42 | 2626 | const struct pmu *pmu = NULL; |
15dbf27c | 2627 | struct hw_perf_counter *hwc = &counter->hw; |
5c92d124 | 2628 | |
0475f9ea PM |
2629 | /* |
2630 | * Software counters (currently) can't in general distinguish | |
2631 | * between user, kernel and hypervisor events. | |
2632 | * However, context switches and cpu migrations are considered | |
2633 | * to be kernel events, and page faults are never hypervisor | |
2634 | * events. | |
2635 | */ | |
f4a2deb4 | 2636 | switch (perf_event_id(&counter->hw_event)) { |
5c92d124 | 2637 | case PERF_COUNT_CPU_CLOCK: |
4aeb0b42 | 2638 | pmu = &perf_ops_cpu_clock; |
d6d020e9 PZ |
2639 | |
2640 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2641 | hw_event->irq_period = 10000; | |
5c92d124 | 2642 | break; |
bae43c99 | 2643 | case PERF_COUNT_TASK_CLOCK: |
23a185ca PM |
2644 | /* |
2645 | * If the user instantiates this as a per-cpu counter, | |
2646 | * use the cpu_clock counter instead. | |
2647 | */ | |
2648 | if (counter->ctx->task) | |
4aeb0b42 | 2649 | pmu = &perf_ops_task_clock; |
23a185ca | 2650 | else |
4aeb0b42 | 2651 | pmu = &perf_ops_cpu_clock; |
d6d020e9 PZ |
2652 | |
2653 | if (hw_event->irq_period && hw_event->irq_period < 10000) | |
2654 | hw_event->irq_period = 10000; | |
bae43c99 | 2655 | break; |
e06c61a8 | 2656 | case PERF_COUNT_PAGE_FAULTS: |
ac17dc8e PZ |
2657 | case PERF_COUNT_PAGE_FAULTS_MIN: |
2658 | case PERF_COUNT_PAGE_FAULTS_MAJ: | |
5d6a27d8 | 2659 | case PERF_COUNT_CONTEXT_SWITCHES: |
4aeb0b42 | 2660 | pmu = &perf_ops_generic; |
5d6a27d8 | 2661 | break; |
6c594c21 | 2662 | case PERF_COUNT_CPU_MIGRATIONS: |
0475f9ea | 2663 | if (!counter->hw_event.exclude_kernel) |
4aeb0b42 | 2664 | pmu = &perf_ops_cpu_migrations; |
6c594c21 | 2665 | break; |
5c92d124 | 2666 | } |
15dbf27c | 2667 | |
4aeb0b42 | 2668 | if (pmu) |
15dbf27c PZ |
2669 | hwc->irq_period = hw_event->irq_period; |
2670 | ||
4aeb0b42 | 2671 | return pmu; |
5c92d124 IM |
2672 | } |
2673 | ||
0793a61d TG |
2674 | /* |
2675 | * Allocate and initialize a counter structure | |
2676 | */ | |
2677 | static struct perf_counter * | |
04289bb9 IM |
2678 | perf_counter_alloc(struct perf_counter_hw_event *hw_event, |
2679 | int cpu, | |
23a185ca | 2680 | struct perf_counter_context *ctx, |
9b51f66d IM |
2681 | struct perf_counter *group_leader, |
2682 | gfp_t gfpflags) | |
0793a61d | 2683 | { |
4aeb0b42 | 2684 | const struct pmu *pmu; |
621a01ea | 2685 | struct perf_counter *counter; |
d5d2bc0d | 2686 | long err; |
0793a61d | 2687 | |
9b51f66d | 2688 | counter = kzalloc(sizeof(*counter), gfpflags); |
0793a61d | 2689 | if (!counter) |
d5d2bc0d | 2690 | return ERR_PTR(-ENOMEM); |
0793a61d | 2691 | |
04289bb9 IM |
2692 | /* |
2693 | * Single counters are their own group leaders, with an | |
2694 | * empty sibling list: | |
2695 | */ | |
2696 | if (!group_leader) | |
2697 | group_leader = counter; | |
2698 | ||
0793a61d | 2699 | mutex_init(&counter->mutex); |
04289bb9 | 2700 | INIT_LIST_HEAD(&counter->list_entry); |
592903cd | 2701 | INIT_LIST_HEAD(&counter->event_entry); |
04289bb9 | 2702 | INIT_LIST_HEAD(&counter->sibling_list); |
0793a61d TG |
2703 | init_waitqueue_head(&counter->waitq); |
2704 | ||
7b732a75 PZ |
2705 | mutex_init(&counter->mmap_mutex); |
2706 | ||
d859e29f PM |
2707 | INIT_LIST_HEAD(&counter->child_list); |
2708 | ||
9f66a381 IM |
2709 | counter->cpu = cpu; |
2710 | counter->hw_event = *hw_event; | |
04289bb9 | 2711 | counter->group_leader = group_leader; |
4aeb0b42 | 2712 | counter->pmu = NULL; |
23a185ca | 2713 | counter->ctx = ctx; |
621a01ea | 2714 | |
235c7fc7 | 2715 | counter->state = PERF_COUNTER_STATE_INACTIVE; |
a86ed508 IM |
2716 | if (hw_event->disabled) |
2717 | counter->state = PERF_COUNTER_STATE_OFF; | |
2718 | ||
4aeb0b42 | 2719 | pmu = NULL; |
b8e83514 | 2720 | |
f4a2deb4 | 2721 | if (perf_event_raw(hw_event)) { |
4aeb0b42 | 2722 | pmu = hw_perf_counter_init(counter); |
f4a2deb4 PZ |
2723 | goto done; |
2724 | } | |
2725 | ||
2726 | switch (perf_event_type(hw_event)) { | |
b8e83514 | 2727 | case PERF_TYPE_HARDWARE: |
4aeb0b42 | 2728 | pmu = hw_perf_counter_init(counter); |
b8e83514 PZ |
2729 | break; |
2730 | ||
2731 | case PERF_TYPE_SOFTWARE: | |
4aeb0b42 | 2732 | pmu = sw_perf_counter_init(counter); |
b8e83514 PZ |
2733 | break; |
2734 | ||
2735 | case PERF_TYPE_TRACEPOINT: | |
4aeb0b42 | 2736 | pmu = tp_perf_counter_init(counter); |
b8e83514 PZ |
2737 | break; |
2738 | } | |
d5d2bc0d PM |
2739 | done: |
2740 | err = 0; | |
4aeb0b42 | 2741 | if (!pmu) |
d5d2bc0d | 2742 | err = -EINVAL; |
4aeb0b42 RR |
2743 | else if (IS_ERR(pmu)) |
2744 | err = PTR_ERR(pmu); | |
5c92d124 | 2745 | |
d5d2bc0d | 2746 | if (err) { |
621a01ea | 2747 | kfree(counter); |
d5d2bc0d | 2748 | return ERR_PTR(err); |
621a01ea | 2749 | } |
d5d2bc0d | 2750 | |
4aeb0b42 | 2751 | counter->pmu = pmu; |
0793a61d | 2752 | |
9ee318a7 PZ |
2753 | if (counter->hw_event.mmap) |
2754 | atomic_inc(&nr_mmap_tracking); | |
2755 | if (counter->hw_event.munmap) | |
2756 | atomic_inc(&nr_munmap_tracking); | |
2757 | if (counter->hw_event.comm) | |
2758 | atomic_inc(&nr_comm_tracking); | |
2759 | ||
0793a61d TG |
2760 | return counter; |
2761 | } | |
2762 | ||
2763 | /** | |
2743a5b0 | 2764 | * sys_perf_counter_open - open a performance counter, associate it to a task/cpu |
9f66a381 IM |
2765 | * |
2766 | * @hw_event_uptr: event type attributes for monitoring/sampling | |
0793a61d | 2767 | * @pid: target pid |
9f66a381 IM |
2768 | * @cpu: target cpu |
2769 | * @group_fd: group leader counter fd | |
0793a61d | 2770 | */ |
2743a5b0 | 2771 | SYSCALL_DEFINE5(perf_counter_open, |
f3dfd265 | 2772 | const struct perf_counter_hw_event __user *, hw_event_uptr, |
2743a5b0 | 2773 | pid_t, pid, int, cpu, int, group_fd, unsigned long, flags) |
0793a61d | 2774 | { |
04289bb9 | 2775 | struct perf_counter *counter, *group_leader; |
9f66a381 | 2776 | struct perf_counter_hw_event hw_event; |
04289bb9 | 2777 | struct perf_counter_context *ctx; |
9b51f66d | 2778 | struct file *counter_file = NULL; |
04289bb9 IM |
2779 | struct file *group_file = NULL; |
2780 | int fput_needed = 0; | |
9b51f66d | 2781 | int fput_needed2 = 0; |
0793a61d TG |
2782 | int ret; |
2783 | ||
2743a5b0 PM |
2784 | /* for future expandability... */ |
2785 | if (flags) | |
2786 | return -EINVAL; | |
2787 | ||
9f66a381 | 2788 | if (copy_from_user(&hw_event, hw_event_uptr, sizeof(hw_event)) != 0) |
eab656ae TG |
2789 | return -EFAULT; |
2790 | ||
04289bb9 | 2791 | /* |
ccff286d IM |
2792 | * Get the target context (task or percpu): |
2793 | */ | |
2794 | ctx = find_get_context(pid, cpu); | |
2795 | if (IS_ERR(ctx)) | |
2796 | return PTR_ERR(ctx); | |
2797 | ||
2798 | /* | |
2799 | * Look up the group leader (we will attach this counter to it): | |
04289bb9 IM |
2800 | */ |
2801 | group_leader = NULL; | |
2802 | if (group_fd != -1) { | |
2803 | ret = -EINVAL; | |
2804 | group_file = fget_light(group_fd, &fput_needed); | |
2805 | if (!group_file) | |
ccff286d | 2806 | goto err_put_context; |
04289bb9 | 2807 | if (group_file->f_op != &perf_fops) |
ccff286d | 2808 | goto err_put_context; |
04289bb9 IM |
2809 | |
2810 | group_leader = group_file->private_data; | |
2811 | /* | |
ccff286d IM |
2812 | * Do not allow a recursive hierarchy (this new sibling |
2813 | * becoming part of another group-sibling): | |
2814 | */ | |
2815 | if (group_leader->group_leader != group_leader) | |
2816 | goto err_put_context; | |
2817 | /* | |
2818 | * Do not allow to attach to a group in a different | |
2819 | * task or CPU context: | |
04289bb9 | 2820 | */ |
ccff286d IM |
2821 | if (group_leader->ctx != ctx) |
2822 | goto err_put_context; | |
3b6f9e5c PM |
2823 | /* |
2824 | * Only a group leader can be exclusive or pinned | |
2825 | */ | |
2826 | if (hw_event.exclusive || hw_event.pinned) | |
2827 | goto err_put_context; | |
04289bb9 IM |
2828 | } |
2829 | ||
23a185ca PM |
2830 | counter = perf_counter_alloc(&hw_event, cpu, ctx, group_leader, |
2831 | GFP_KERNEL); | |
d5d2bc0d PM |
2832 | ret = PTR_ERR(counter); |
2833 | if (IS_ERR(counter)) | |
0793a61d TG |
2834 | goto err_put_context; |
2835 | ||
0793a61d TG |
2836 | ret = anon_inode_getfd("[perf_counter]", &perf_fops, counter, 0); |
2837 | if (ret < 0) | |
9b51f66d IM |
2838 | goto err_free_put_context; |
2839 | ||
2840 | counter_file = fget_light(ret, &fput_needed2); | |
2841 | if (!counter_file) | |
2842 | goto err_free_put_context; | |
2843 | ||
2844 | counter->filp = counter_file; | |
d859e29f | 2845 | mutex_lock(&ctx->mutex); |
9b51f66d | 2846 | perf_install_in_context(ctx, counter, cpu); |
d859e29f | 2847 | mutex_unlock(&ctx->mutex); |
9b51f66d IM |
2848 | |
2849 | fput_light(counter_file, fput_needed2); | |
0793a61d | 2850 | |
04289bb9 IM |
2851 | out_fput: |
2852 | fput_light(group_file, fput_needed); | |
2853 | ||
0793a61d TG |
2854 | return ret; |
2855 | ||
9b51f66d | 2856 | err_free_put_context: |
0793a61d TG |
2857 | kfree(counter); |
2858 | ||
2859 | err_put_context: | |
2860 | put_context(ctx); | |
2861 | ||
04289bb9 | 2862 | goto out_fput; |
0793a61d TG |
2863 | } |
2864 | ||
9b51f66d IM |
2865 | /* |
2866 | * Initialize the perf_counter context in a task_struct: | |
2867 | */ | |
2868 | static void | |
2869 | __perf_counter_init_context(struct perf_counter_context *ctx, | |
2870 | struct task_struct *task) | |
2871 | { | |
2872 | memset(ctx, 0, sizeof(*ctx)); | |
2873 | spin_lock_init(&ctx->lock); | |
d859e29f | 2874 | mutex_init(&ctx->mutex); |
9b51f66d | 2875 | INIT_LIST_HEAD(&ctx->counter_list); |
592903cd | 2876 | INIT_LIST_HEAD(&ctx->event_list); |
9b51f66d IM |
2877 | ctx->task = task; |
2878 | } | |
2879 | ||
2880 | /* | |
2881 | * inherit a counter from parent task to child task: | |
2882 | */ | |
d859e29f | 2883 | static struct perf_counter * |
9b51f66d IM |
2884 | inherit_counter(struct perf_counter *parent_counter, |
2885 | struct task_struct *parent, | |
2886 | struct perf_counter_context *parent_ctx, | |
2887 | struct task_struct *child, | |
d859e29f | 2888 | struct perf_counter *group_leader, |
9b51f66d IM |
2889 | struct perf_counter_context *child_ctx) |
2890 | { | |
2891 | struct perf_counter *child_counter; | |
2892 | ||
d859e29f PM |
2893 | /* |
2894 | * Instead of creating recursive hierarchies of counters, | |
2895 | * we link inherited counters back to the original parent, | |
2896 | * which has a filp for sure, which we use as the reference | |
2897 | * count: | |
2898 | */ | |
2899 | if (parent_counter->parent) | |
2900 | parent_counter = parent_counter->parent; | |
2901 | ||
9b51f66d | 2902 | child_counter = perf_counter_alloc(&parent_counter->hw_event, |
23a185ca PM |
2903 | parent_counter->cpu, child_ctx, |
2904 | group_leader, GFP_KERNEL); | |
d5d2bc0d PM |
2905 | if (IS_ERR(child_counter)) |
2906 | return child_counter; | |
9b51f66d IM |
2907 | |
2908 | /* | |
2909 | * Link it up in the child's context: | |
2910 | */ | |
9b51f66d | 2911 | child_counter->task = child; |
53cfbf59 | 2912 | add_counter_to_ctx(child_counter, child_ctx); |
9b51f66d IM |
2913 | |
2914 | child_counter->parent = parent_counter; | |
9b51f66d IM |
2915 | /* |
2916 | * inherit into child's child as well: | |
2917 | */ | |
2918 | child_counter->hw_event.inherit = 1; | |
2919 | ||
2920 | /* | |
2921 | * Get a reference to the parent filp - we will fput it | |
2922 | * when the child counter exits. This is safe to do because | |
2923 | * we are in the parent and we know that the filp still | |
2924 | * exists and has a nonzero count: | |
2925 | */ | |
2926 | atomic_long_inc(&parent_counter->filp->f_count); | |
2927 | ||
d859e29f PM |
2928 | /* |
2929 | * Link this into the parent counter's child list | |
2930 | */ | |
2931 | mutex_lock(&parent_counter->mutex); | |
2932 | list_add_tail(&child_counter->child_list, &parent_counter->child_list); | |
2933 | ||
2934 | /* | |
2935 | * Make the child state follow the state of the parent counter, | |
2936 | * not its hw_event.disabled bit. We hold the parent's mutex, | |
2937 | * so we won't race with perf_counter_{en,dis}able_family. | |
2938 | */ | |
2939 | if (parent_counter->state >= PERF_COUNTER_STATE_INACTIVE) | |
2940 | child_counter->state = PERF_COUNTER_STATE_INACTIVE; | |
2941 | else | |
2942 | child_counter->state = PERF_COUNTER_STATE_OFF; | |
2943 | ||
2944 | mutex_unlock(&parent_counter->mutex); | |
2945 | ||
2946 | return child_counter; | |
2947 | } | |
2948 | ||
2949 | static int inherit_group(struct perf_counter *parent_counter, | |
2950 | struct task_struct *parent, | |
2951 | struct perf_counter_context *parent_ctx, | |
2952 | struct task_struct *child, | |
2953 | struct perf_counter_context *child_ctx) | |
2954 | { | |
2955 | struct perf_counter *leader; | |
2956 | struct perf_counter *sub; | |
d5d2bc0d | 2957 | struct perf_counter *child_ctr; |
d859e29f PM |
2958 | |
2959 | leader = inherit_counter(parent_counter, parent, parent_ctx, | |
2960 | child, NULL, child_ctx); | |
d5d2bc0d PM |
2961 | if (IS_ERR(leader)) |
2962 | return PTR_ERR(leader); | |
d859e29f | 2963 | list_for_each_entry(sub, &parent_counter->sibling_list, list_entry) { |
d5d2bc0d PM |
2964 | child_ctr = inherit_counter(sub, parent, parent_ctx, |
2965 | child, leader, child_ctx); | |
2966 | if (IS_ERR(child_ctr)) | |
2967 | return PTR_ERR(child_ctr); | |
d859e29f | 2968 | } |
9b51f66d IM |
2969 | return 0; |
2970 | } | |
2971 | ||
d859e29f PM |
2972 | static void sync_child_counter(struct perf_counter *child_counter, |
2973 | struct perf_counter *parent_counter) | |
2974 | { | |
2975 | u64 parent_val, child_val; | |
2976 | ||
2977 | parent_val = atomic64_read(&parent_counter->count); | |
2978 | child_val = atomic64_read(&child_counter->count); | |
2979 | ||
2980 | /* | |
2981 | * Add back the child's count to the parent's count: | |
2982 | */ | |
2983 | atomic64_add(child_val, &parent_counter->count); | |
53cfbf59 PM |
2984 | atomic64_add(child_counter->total_time_enabled, |
2985 | &parent_counter->child_total_time_enabled); | |
2986 | atomic64_add(child_counter->total_time_running, | |
2987 | &parent_counter->child_total_time_running); | |
d859e29f PM |
2988 | |
2989 | /* | |
2990 | * Remove this counter from the parent's list | |
2991 | */ | |
2992 | mutex_lock(&parent_counter->mutex); | |
2993 | list_del_init(&child_counter->child_list); | |
2994 | mutex_unlock(&parent_counter->mutex); | |
2995 | ||
2996 | /* | |
2997 | * Release the parent counter, if this was the last | |
2998 | * reference to it. | |
2999 | */ | |
3000 | fput(parent_counter->filp); | |
3001 | } | |
3002 | ||
9b51f66d IM |
3003 | static void |
3004 | __perf_counter_exit_task(struct task_struct *child, | |
3005 | struct perf_counter *child_counter, | |
3006 | struct perf_counter_context *child_ctx) | |
3007 | { | |
3008 | struct perf_counter *parent_counter; | |
d859e29f | 3009 | struct perf_counter *sub, *tmp; |
9b51f66d IM |
3010 | |
3011 | /* | |
235c7fc7 IM |
3012 | * If we do not self-reap then we have to wait for the |
3013 | * child task to unschedule (it will happen for sure), | |
3014 | * so that its counter is at its final count. (This | |
3015 | * condition triggers rarely - child tasks usually get | |
3016 | * off their CPU before the parent has a chance to | |
3017 | * get this far into the reaping action) | |
9b51f66d | 3018 | */ |
235c7fc7 IM |
3019 | if (child != current) { |
3020 | wait_task_inactive(child, 0); | |
3021 | list_del_init(&child_counter->list_entry); | |
53cfbf59 | 3022 | update_counter_times(child_counter); |
235c7fc7 | 3023 | } else { |
0cc0c027 | 3024 | struct perf_cpu_context *cpuctx; |
235c7fc7 IM |
3025 | unsigned long flags; |
3026 | u64 perf_flags; | |
3027 | ||
3028 | /* | |
3029 | * Disable and unlink this counter. | |
3030 | * | |
3031 | * Be careful about zapping the list - IRQ/NMI context | |
3032 | * could still be processing it: | |
3033 | */ | |
849691a6 | 3034 | local_irq_save(flags); |
235c7fc7 | 3035 | perf_flags = hw_perf_save_disable(); |
0cc0c027 IM |
3036 | |
3037 | cpuctx = &__get_cpu_var(perf_cpu_context); | |
3038 | ||
d859e29f | 3039 | group_sched_out(child_counter, cpuctx, child_ctx); |
53cfbf59 | 3040 | update_counter_times(child_counter); |
0cc0c027 | 3041 | |
235c7fc7 | 3042 | list_del_init(&child_counter->list_entry); |
0cc0c027 | 3043 | |
235c7fc7 | 3044 | child_ctx->nr_counters--; |
9b51f66d | 3045 | |
235c7fc7 | 3046 | hw_perf_restore(perf_flags); |
849691a6 | 3047 | local_irq_restore(flags); |
235c7fc7 | 3048 | } |
9b51f66d IM |
3049 | |
3050 | parent_counter = child_counter->parent; | |
3051 | /* | |
3052 | * It can happen that parent exits first, and has counters | |
3053 | * that are still around due to the child reference. These | |
3054 | * counters need to be zapped - but otherwise linger. | |
3055 | */ | |
d859e29f PM |
3056 | if (parent_counter) { |
3057 | sync_child_counter(child_counter, parent_counter); | |
3058 | list_for_each_entry_safe(sub, tmp, &child_counter->sibling_list, | |
3059 | list_entry) { | |
4bcf349a | 3060 | if (sub->parent) { |
d859e29f | 3061 | sync_child_counter(sub, sub->parent); |
f1600952 | 3062 | free_counter(sub); |
4bcf349a | 3063 | } |
d859e29f | 3064 | } |
f1600952 | 3065 | free_counter(child_counter); |
4bcf349a | 3066 | } |
9b51f66d IM |
3067 | } |
3068 | ||
3069 | /* | |
d859e29f | 3070 | * When a child task exits, feed back counter values to parent counters. |
9b51f66d | 3071 | * |
d859e29f | 3072 | * Note: we may be running in child context, but the PID is not hashed |
9b51f66d IM |
3073 | * anymore so new counters will not be added. |
3074 | */ | |
3075 | void perf_counter_exit_task(struct task_struct *child) | |
3076 | { | |
3077 | struct perf_counter *child_counter, *tmp; | |
3078 | struct perf_counter_context *child_ctx; | |
3079 | ||
3080 | child_ctx = &child->perf_counter_ctx; | |
3081 | ||
3082 | if (likely(!child_ctx->nr_counters)) | |
3083 | return; | |
3084 | ||
3085 | list_for_each_entry_safe(child_counter, tmp, &child_ctx->counter_list, | |
3086 | list_entry) | |
3087 | __perf_counter_exit_task(child, child_counter, child_ctx); | |
3088 | } | |
3089 | ||
3090 | /* | |
3091 | * Initialize the perf_counter context in task_struct | |
3092 | */ | |
3093 | void perf_counter_init_task(struct task_struct *child) | |
3094 | { | |
3095 | struct perf_counter_context *child_ctx, *parent_ctx; | |
d859e29f | 3096 | struct perf_counter *counter; |
9b51f66d | 3097 | struct task_struct *parent = current; |
9b51f66d IM |
3098 | |
3099 | child_ctx = &child->perf_counter_ctx; | |
3100 | parent_ctx = &parent->perf_counter_ctx; | |
3101 | ||
3102 | __perf_counter_init_context(child_ctx, child); | |
3103 | ||
3104 | /* | |
3105 | * This is executed from the parent task context, so inherit | |
3106 | * counters that have been marked for cloning: | |
3107 | */ | |
3108 | ||
3109 | if (likely(!parent_ctx->nr_counters)) | |
3110 | return; | |
3111 | ||
3112 | /* | |
3113 | * Lock the parent list. No need to lock the child - not PID | |
3114 | * hashed yet and not running, so nobody can access it. | |
3115 | */ | |
d859e29f | 3116 | mutex_lock(&parent_ctx->mutex); |
9b51f66d IM |
3117 | |
3118 | /* | |
3119 | * We dont have to disable NMIs - we are only looking at | |
3120 | * the list, not manipulating it: | |
3121 | */ | |
3122 | list_for_each_entry(counter, &parent_ctx->counter_list, list_entry) { | |
d859e29f | 3123 | if (!counter->hw_event.inherit) |
9b51f66d IM |
3124 | continue; |
3125 | ||
d859e29f | 3126 | if (inherit_group(counter, parent, |
9b51f66d IM |
3127 | parent_ctx, child, child_ctx)) |
3128 | break; | |
3129 | } | |
3130 | ||
d859e29f | 3131 | mutex_unlock(&parent_ctx->mutex); |
9b51f66d IM |
3132 | } |
3133 | ||
04289bb9 | 3134 | static void __cpuinit perf_counter_init_cpu(int cpu) |
0793a61d | 3135 | { |
04289bb9 | 3136 | struct perf_cpu_context *cpuctx; |
0793a61d | 3137 | |
04289bb9 IM |
3138 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
3139 | __perf_counter_init_context(&cpuctx->ctx, NULL); | |
0793a61d TG |
3140 | |
3141 | mutex_lock(&perf_resource_mutex); | |
04289bb9 | 3142 | cpuctx->max_pertask = perf_max_counters - perf_reserved_percpu; |
0793a61d | 3143 | mutex_unlock(&perf_resource_mutex); |
04289bb9 | 3144 | |
01d0287f | 3145 | hw_perf_counter_setup(cpu); |
0793a61d TG |
3146 | } |
3147 | ||
3148 | #ifdef CONFIG_HOTPLUG_CPU | |
04289bb9 | 3149 | static void __perf_counter_exit_cpu(void *info) |
0793a61d TG |
3150 | { |
3151 | struct perf_cpu_context *cpuctx = &__get_cpu_var(perf_cpu_context); | |
3152 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
3153 | struct perf_counter *counter, *tmp; | |
3154 | ||
04289bb9 IM |
3155 | list_for_each_entry_safe(counter, tmp, &ctx->counter_list, list_entry) |
3156 | __perf_counter_remove_from_context(counter); | |
0793a61d | 3157 | } |
04289bb9 | 3158 | static void perf_counter_exit_cpu(int cpu) |
0793a61d | 3159 | { |
d859e29f PM |
3160 | struct perf_cpu_context *cpuctx = &per_cpu(perf_cpu_context, cpu); |
3161 | struct perf_counter_context *ctx = &cpuctx->ctx; | |
3162 | ||
3163 | mutex_lock(&ctx->mutex); | |
04289bb9 | 3164 | smp_call_function_single(cpu, __perf_counter_exit_cpu, NULL, 1); |
d859e29f | 3165 | mutex_unlock(&ctx->mutex); |
0793a61d TG |
3166 | } |
3167 | #else | |
04289bb9 | 3168 | static inline void perf_counter_exit_cpu(int cpu) { } |
0793a61d TG |
3169 | #endif |
3170 | ||
3171 | static int __cpuinit | |
3172 | perf_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) | |
3173 | { | |
3174 | unsigned int cpu = (long)hcpu; | |
3175 | ||
3176 | switch (action) { | |
3177 | ||
3178 | case CPU_UP_PREPARE: | |
3179 | case CPU_UP_PREPARE_FROZEN: | |
04289bb9 | 3180 | perf_counter_init_cpu(cpu); |
0793a61d TG |
3181 | break; |
3182 | ||
3183 | case CPU_DOWN_PREPARE: | |
3184 | case CPU_DOWN_PREPARE_FROZEN: | |
04289bb9 | 3185 | perf_counter_exit_cpu(cpu); |
0793a61d TG |
3186 | break; |
3187 | ||
3188 | default: | |
3189 | break; | |
3190 | } | |
3191 | ||
3192 | return NOTIFY_OK; | |
3193 | } | |
3194 | ||
3195 | static struct notifier_block __cpuinitdata perf_cpu_nb = { | |
3196 | .notifier_call = perf_cpu_notify, | |
3197 | }; | |
3198 | ||
3199 | static int __init perf_counter_init(void) | |
3200 | { | |
3201 | perf_cpu_notify(&perf_cpu_nb, (unsigned long)CPU_UP_PREPARE, | |
3202 | (void *)(long)smp_processor_id()); | |
3203 | register_cpu_notifier(&perf_cpu_nb); | |
3204 | ||
3205 | return 0; | |
3206 | } | |
3207 | early_initcall(perf_counter_init); | |
3208 | ||
3209 | static ssize_t perf_show_reserve_percpu(struct sysdev_class *class, char *buf) | |
3210 | { | |
3211 | return sprintf(buf, "%d\n", perf_reserved_percpu); | |
3212 | } | |
3213 | ||
3214 | static ssize_t | |
3215 | perf_set_reserve_percpu(struct sysdev_class *class, | |
3216 | const char *buf, | |
3217 | size_t count) | |
3218 | { | |
3219 | struct perf_cpu_context *cpuctx; | |
3220 | unsigned long val; | |
3221 | int err, cpu, mpt; | |
3222 | ||
3223 | err = strict_strtoul(buf, 10, &val); | |
3224 | if (err) | |
3225 | return err; | |
3226 | if (val > perf_max_counters) | |
3227 | return -EINVAL; | |
3228 | ||
3229 | mutex_lock(&perf_resource_mutex); | |
3230 | perf_reserved_percpu = val; | |
3231 | for_each_online_cpu(cpu) { | |
3232 | cpuctx = &per_cpu(perf_cpu_context, cpu); | |
3233 | spin_lock_irq(&cpuctx->ctx.lock); | |
3234 | mpt = min(perf_max_counters - cpuctx->ctx.nr_counters, | |
3235 | perf_max_counters - perf_reserved_percpu); | |
3236 | cpuctx->max_pertask = mpt; | |
3237 | spin_unlock_irq(&cpuctx->ctx.lock); | |
3238 | } | |
3239 | mutex_unlock(&perf_resource_mutex); | |
3240 | ||
3241 | return count; | |
3242 | } | |
3243 | ||
3244 | static ssize_t perf_show_overcommit(struct sysdev_class *class, char *buf) | |
3245 | { | |
3246 | return sprintf(buf, "%d\n", perf_overcommit); | |
3247 | } | |
3248 | ||
3249 | static ssize_t | |
3250 | perf_set_overcommit(struct sysdev_class *class, const char *buf, size_t count) | |
3251 | { | |
3252 | unsigned long val; | |
3253 | int err; | |
3254 | ||
3255 | err = strict_strtoul(buf, 10, &val); | |
3256 | if (err) | |
3257 | return err; | |
3258 | if (val > 1) | |
3259 | return -EINVAL; | |
3260 | ||
3261 | mutex_lock(&perf_resource_mutex); | |
3262 | perf_overcommit = val; | |
3263 | mutex_unlock(&perf_resource_mutex); | |
3264 | ||
3265 | return count; | |
3266 | } | |
3267 | ||
3268 | static SYSDEV_CLASS_ATTR( | |
3269 | reserve_percpu, | |
3270 | 0644, | |
3271 | perf_show_reserve_percpu, | |
3272 | perf_set_reserve_percpu | |
3273 | ); | |
3274 | ||
3275 | static SYSDEV_CLASS_ATTR( | |
3276 | overcommit, | |
3277 | 0644, | |
3278 | perf_show_overcommit, | |
3279 | perf_set_overcommit | |
3280 | ); | |
3281 | ||
3282 | static struct attribute *perfclass_attrs[] = { | |
3283 | &attr_reserve_percpu.attr, | |
3284 | &attr_overcommit.attr, | |
3285 | NULL | |
3286 | }; | |
3287 | ||
3288 | static struct attribute_group perfclass_attr_group = { | |
3289 | .attrs = perfclass_attrs, | |
3290 | .name = "perf_counters", | |
3291 | }; | |
3292 | ||
3293 | static int __init perf_counter_sysfs_init(void) | |
3294 | { | |
3295 | return sysfs_create_group(&cpu_sysdev_class.kset.kobj, | |
3296 | &perfclass_attr_group); | |
3297 | } | |
3298 | device_initcall(perf_counter_sysfs_init); |