Commit | Line | Data |
---|---|---|
c777ac55 | 1 | |
d824e66a | 2 | #include <linux/irq.h> |
c777ac55 AM |
3 | |
4 | void set_pending_irq(unsigned int irq, cpumask_t mask) | |
5 | { | |
34ffdb72 | 6 | struct irq_desc *desc = irq_desc + irq; |
c777ac55 AM |
7 | unsigned long flags; |
8 | ||
9 | spin_lock_irqsave(&desc->lock, flags); | |
10 | desc->move_irq = 1; | |
cd916d31 | 11 | irq_desc[irq].pending_mask = mask; |
c777ac55 AM |
12 | spin_unlock_irqrestore(&desc->lock, flags); |
13 | } | |
14 | ||
15 | void move_native_irq(int irq) | |
16 | { | |
34ffdb72 | 17 | struct irq_desc *desc = irq_desc + irq; |
c777ac55 | 18 | cpumask_t tmp; |
c777ac55 | 19 | |
501f2499 | 20 | if (likely(!desc->move_irq)) |
c777ac55 AM |
21 | return; |
22 | ||
501f2499 BH |
23 | /* |
24 | * Paranoia: cpu-local interrupts shouldn't be calling in here anyway. | |
25 | */ | |
26 | if (CHECK_IRQ_PER_CPU(desc->status)) { | |
27 | WARN_ON(1); | |
28 | return; | |
29 | } | |
30 | ||
c777ac55 AM |
31 | desc->move_irq = 0; |
32 | ||
cd916d31 | 33 | if (unlikely(cpus_empty(irq_desc[irq].pending_mask))) |
c777ac55 AM |
34 | return; |
35 | ||
d1bef4ed | 36 | if (!desc->chip->set_affinity) |
c777ac55 AM |
37 | return; |
38 | ||
501f2499 BH |
39 | assert_spin_locked(&desc->lock); |
40 | ||
cd916d31 | 41 | cpus_and(tmp, irq_desc[irq].pending_mask, cpu_online_map); |
c777ac55 AM |
42 | |
43 | /* | |
44 | * If there was a valid mask to work with, please | |
45 | * do the disable, re-program, enable sequence. | |
46 | * This is *not* particularly important for level triggered | |
47 | * but in a edge trigger case, we might be setting rte | |
48 | * when an active trigger is comming in. This could | |
49 | * cause some ioapics to mal-function. | |
50 | * Being paranoid i guess! | |
51 | */ | |
89d0cf01 | 52 | if (likely(!cpus_empty(tmp))) { |
501f2499 | 53 | if (likely(!(desc->status & IRQ_DISABLED))) |
d1bef4ed | 54 | desc->chip->disable(irq); |
501f2499 | 55 | |
d1bef4ed | 56 | desc->chip->set_affinity(irq,tmp); |
501f2499 BH |
57 | |
58 | if (likely(!(desc->status & IRQ_DISABLED))) | |
d1bef4ed | 59 | desc->chip->enable(irq); |
c777ac55 | 60 | } |
cd916d31 | 61 | cpus_clear(irq_desc[irq].pending_mask); |
c777ac55 | 62 | } |