Merge tag 'md/4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/shli/md
[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
0881e7bd 20#include <linux/sched/task.h>
ae7e81c0 21#include <uapi/linux/sched/types.h>
4d1d61a6 22#include <linux/task_work.h>
1da177e4
LT
23
24#include "internals.h"
25
8d32a307
TG
26#ifdef CONFIG_IRQ_FORCED_THREADING
27__read_mostly bool force_irqthreads;
28
29static int __init setup_forced_irqthreads(char *arg)
30{
31 force_irqthreads = true;
32 return 0;
33}
34early_param("threadirqs", setup_forced_irqthreads);
35#endif
36
18258f72 37static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 38{
32f4125e 39 bool inprogress;
1da177e4 40
a98ce5c6
HX
41 do {
42 unsigned long flags;
43
44 /*
45 * Wait until we're out of the critical section. This might
46 * give the wrong answer due to the lack of memory barriers.
47 */
32f4125e 48 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
49 cpu_relax();
50
51 /* Ok, that indicated we're done: double-check carefully. */
239007b8 52 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 53 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 54 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
55
56 /* Oops, that failed? */
32f4125e 57 } while (inprogress);
18258f72
TG
58}
59
60/**
61 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
62 * @irq: interrupt number to wait for
63 *
64 * This function waits for any pending hard IRQ handlers for this
65 * interrupt to complete before returning. If you use this
66 * function while holding a resource the IRQ handler may need you
67 * will deadlock. It does not take associated threaded handlers
68 * into account.
69 *
70 * Do not use this for shutdown scenarios where you must be sure
71 * that all parts (hardirq and threaded handler) have completed.
72 *
02cea395
PZ
73 * Returns: false if a threaded handler is active.
74 *
18258f72
TG
75 * This function may be called - with care - from IRQ context.
76 */
02cea395 77bool synchronize_hardirq(unsigned int irq)
18258f72
TG
78{
79 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 80
02cea395 81 if (desc) {
18258f72 82 __synchronize_hardirq(desc);
02cea395
PZ
83 return !atomic_read(&desc->threads_active);
84 }
85
86 return true;
18258f72
TG
87}
88EXPORT_SYMBOL(synchronize_hardirq);
89
90/**
91 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
92 * @irq: interrupt number to wait for
93 *
94 * This function waits for any pending IRQ handlers for this interrupt
95 * to complete before returning. If you use this function while
96 * holding a resource the IRQ handler may need you will deadlock.
97 *
98 * This function may be called - with care - from IRQ context.
99 */
100void synchronize_irq(unsigned int irq)
101{
102 struct irq_desc *desc = irq_to_desc(irq);
103
104 if (desc) {
105 __synchronize_hardirq(desc);
106 /*
107 * We made sure that no hardirq handler is
108 * running. Now verify that no threaded handlers are
109 * active.
110 */
111 wait_event(desc->wait_for_threads,
112 !atomic_read(&desc->threads_active));
113 }
1da177e4 114}
1da177e4
LT
115EXPORT_SYMBOL(synchronize_irq);
116
3aa551c9
TG
117#ifdef CONFIG_SMP
118cpumask_var_t irq_default_affinity;
119
9c255583 120static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
121{
122 if (!desc || !irqd_can_balance(&desc->irq_data) ||
123 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
124 return false;
125 return true;
e019c249
JL
126}
127
771ee3b0
TG
128/**
129 * irq_can_set_affinity - Check if the affinity of a given irq can be set
130 * @irq: Interrupt to check
131 *
132 */
133int irq_can_set_affinity(unsigned int irq)
134{
e019c249 135 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
136}
137
9c255583
TG
138/**
139 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
140 * @irq: Interrupt to check
141 *
142 * Like irq_can_set_affinity() above, but additionally checks for the
143 * AFFINITY_MANAGED flag.
144 */
145bool irq_can_set_affinity_usr(unsigned int irq)
146{
147 struct irq_desc *desc = irq_to_desc(irq);
148
149 return __irq_can_set_affinity(desc) &&
150 !irqd_affinity_is_managed(&desc->irq_data);
151}
152
591d2fb0
TG
153/**
154 * irq_set_thread_affinity - Notify irq threads to adjust affinity
155 * @desc: irq descriptor which has affitnity changed
156 *
157 * We just set IRQTF_AFFINITY and delegate the affinity setting
158 * to the interrupt thread itself. We can not call
159 * set_cpus_allowed_ptr() here as we hold desc->lock and this
160 * code can be called from hard interrupt context.
161 */
162void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 163{
f944b5a7 164 struct irqaction *action;
3aa551c9 165
f944b5a7 166 for_each_action_of_desc(desc, action)
3aa551c9 167 if (action->thread)
591d2fb0 168 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
169}
170
1fa46f1f 171#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 172static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 173{
0ef5ca1e 174 return irqd_can_move_in_process_context(data);
1fa46f1f 175}
0ef5ca1e 176static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 177{
0ef5ca1e 178 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
179}
180static inline void
181irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
182{
183 cpumask_copy(desc->pending_mask, mask);
184}
185static inline void
186irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
187{
188 cpumask_copy(mask, desc->pending_mask);
189}
190#else
0ef5ca1e 191static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 192static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
193static inline void
194irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
195static inline void
196irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
197#endif
198
818b0f3b
JL
199int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
200 bool force)
201{
202 struct irq_desc *desc = irq_data_to_desc(data);
203 struct irq_chip *chip = irq_data_get_irq_chip(data);
204 int ret;
205
01f8fa4f 206 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
207 switch (ret) {
208 case IRQ_SET_MASK_OK:
2cb62547 209 case IRQ_SET_MASK_OK_DONE:
9df872fa 210 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b
JL
211 case IRQ_SET_MASK_OK_NOCOPY:
212 irq_set_thread_affinity(desc);
213 ret = 0;
214 }
215
216 return ret;
217}
218
01f8fa4f
TG
219int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
220 bool force)
771ee3b0 221{
c2d0c555
DD
222 struct irq_chip *chip = irq_data_get_irq_chip(data);
223 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 224 int ret = 0;
771ee3b0 225
c2d0c555 226 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
227 return -EINVAL;
228
0ef5ca1e 229 if (irq_can_move_pcntxt(data)) {
01f8fa4f 230 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 231 } else {
c2d0c555 232 irqd_set_move_pending(data);
1fa46f1f 233 irq_copy_pending(desc, mask);
57b150cc 234 }
1fa46f1f 235
cd7eab44
BH
236 if (desc->affinity_notify) {
237 kref_get(&desc->affinity_notify->kref);
238 schedule_work(&desc->affinity_notify->work);
239 }
c2d0c555
DD
240 irqd_set(data, IRQD_AFFINITY_SET);
241
242 return ret;
243}
244
01f8fa4f 245int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
246{
247 struct irq_desc *desc = irq_to_desc(irq);
248 unsigned long flags;
249 int ret;
250
251 if (!desc)
252 return -EINVAL;
253
254 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 255 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 256 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 257 return ret;
771ee3b0
TG
258}
259
e7a297b0
PWJ
260int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
261{
e7a297b0 262 unsigned long flags;
31d9d9b6 263 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
264
265 if (!desc)
266 return -EINVAL;
e7a297b0 267 desc->affinity_hint = m;
02725e74 268 irq_put_desc_unlock(desc, flags);
e2e64a93 269 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
270 if (m)
271 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
272 return 0;
273}
274EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
275
cd7eab44
BH
276static void irq_affinity_notify(struct work_struct *work)
277{
278 struct irq_affinity_notify *notify =
279 container_of(work, struct irq_affinity_notify, work);
280 struct irq_desc *desc = irq_to_desc(notify->irq);
281 cpumask_var_t cpumask;
282 unsigned long flags;
283
1fa46f1f 284 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
285 goto out;
286
287 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 288 if (irq_move_pending(&desc->irq_data))
1fa46f1f 289 irq_get_pending(cpumask, desc);
cd7eab44 290 else
9df872fa 291 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
292 raw_spin_unlock_irqrestore(&desc->lock, flags);
293
294 notify->notify(notify, cpumask);
295
296 free_cpumask_var(cpumask);
297out:
298 kref_put(&notify->kref, notify->release);
299}
300
301/**
302 * irq_set_affinity_notifier - control notification of IRQ affinity changes
303 * @irq: Interrupt for which to enable/disable notification
304 * @notify: Context for notification, or %NULL to disable
305 * notification. Function pointers must be initialised;
306 * the other fields will be initialised by this function.
307 *
308 * Must be called in process context. Notification may only be enabled
309 * after the IRQ is allocated and must be disabled before the IRQ is
310 * freed using free_irq().
311 */
312int
313irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
314{
315 struct irq_desc *desc = irq_to_desc(irq);
316 struct irq_affinity_notify *old_notify;
317 unsigned long flags;
318
319 /* The release function is promised process context */
320 might_sleep();
321
322 if (!desc)
323 return -EINVAL;
324
325 /* Complete initialisation of *notify */
326 if (notify) {
327 notify->irq = irq;
328 kref_init(&notify->kref);
329 INIT_WORK(&notify->work, irq_affinity_notify);
330 }
331
332 raw_spin_lock_irqsave(&desc->lock, flags);
333 old_notify = desc->affinity_notify;
334 desc->affinity_notify = notify;
335 raw_spin_unlock_irqrestore(&desc->lock, flags);
336
337 if (old_notify)
338 kref_put(&old_notify->kref, old_notify->release);
339
340 return 0;
341}
342EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
343
18404756
MK
344#ifndef CONFIG_AUTO_IRQ_AFFINITY
345/*
346 * Generic version of the affinity autoselector.
347 */
a8a98eac 348static int setup_affinity(struct irq_desc *desc, struct cpumask *mask)
18404756 349{
569bda8d 350 struct cpumask *set = irq_default_affinity;
6783011b 351 int node = irq_desc_get_node(desc);
569bda8d 352
b008207c 353 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 354 if (!__irq_can_set_affinity(desc))
18404756
MK
355 return 0;
356
f6d87f4b 357 /*
9332ef9d 358 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 359 * setup, but make sure that one of the targets is online.
f6d87f4b 360 */
06ee6d57
TG
361 if (irqd_affinity_is_managed(&desc->irq_data) ||
362 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 363 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 364 cpu_online_mask))
9df872fa 365 set = desc->irq_common_data.affinity;
0c6f8a8b 366 else
2bdd1055 367 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 368 }
18404756 369
3b8249e7 370 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
371 if (node != NUMA_NO_NODE) {
372 const struct cpumask *nodemask = cpumask_of_node(node);
373
374 /* make sure at least one of the cpus in nodemask is online */
375 if (cpumask_intersects(mask, nodemask))
376 cpumask_and(mask, mask, nodemask);
377 }
818b0f3b 378 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
379 return 0;
380}
f6d87f4b 381#else
a8a98eac
JL
382/* Wrapper for ALPHA specific affinity selector magic */
383static inline int setup_affinity(struct irq_desc *d, struct cpumask *mask)
f6d87f4b 384{
a8a98eac 385 return irq_select_affinity(irq_desc_get_irq(d));
f6d87f4b 386}
18404756
MK
387#endif
388
f6d87f4b
TG
389/*
390 * Called when affinity is set via /proc/irq
391 */
3b8249e7 392int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
393{
394 struct irq_desc *desc = irq_to_desc(irq);
395 unsigned long flags;
396 int ret;
397
239007b8 398 raw_spin_lock_irqsave(&desc->lock, flags);
a8a98eac 399 ret = setup_affinity(desc, mask);
239007b8 400 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
401 return ret;
402}
403
404#else
3b8249e7 405static inline int
a8a98eac 406setup_affinity(struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
407{
408 return 0;
409}
1da177e4
LT
410#endif
411
fcf1ae2f
FW
412/**
413 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
414 * @irq: interrupt number to set affinity
415 * @vcpu_info: vCPU specific data
416 *
417 * This function uses the vCPU specific data to set the vCPU
418 * affinity for an irq. The vCPU specific data is passed from
419 * outside, such as KVM. One example code path is as below:
420 * KVM -> IOMMU -> irq_set_vcpu_affinity().
421 */
422int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
423{
424 unsigned long flags;
425 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
426 struct irq_data *data;
427 struct irq_chip *chip;
428 int ret = -ENOSYS;
429
430 if (!desc)
431 return -EINVAL;
432
433 data = irq_desc_get_irq_data(desc);
434 chip = irq_data_get_irq_chip(data);
435 if (chip && chip->irq_set_vcpu_affinity)
436 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
437 irq_put_desc_unlock(desc, flags);
438
439 return ret;
440}
441EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
442
79ff1cda 443void __disable_irq(struct irq_desc *desc)
0a0c5168 444{
3aae994f 445 if (!desc->depth++)
87923470 446 irq_disable(desc);
0a0c5168
RW
447}
448
02725e74
TG
449static int __disable_irq_nosync(unsigned int irq)
450{
451 unsigned long flags;
31d9d9b6 452 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
453
454 if (!desc)
455 return -EINVAL;
79ff1cda 456 __disable_irq(desc);
02725e74
TG
457 irq_put_desc_busunlock(desc, flags);
458 return 0;
459}
460
1da177e4
LT
461/**
462 * disable_irq_nosync - disable an irq without waiting
463 * @irq: Interrupt to disable
464 *
465 * Disable the selected interrupt line. Disables and Enables are
466 * nested.
467 * Unlike disable_irq(), this function does not ensure existing
468 * instances of the IRQ handler have completed before returning.
469 *
470 * This function may be called from IRQ context.
471 */
472void disable_irq_nosync(unsigned int irq)
473{
02725e74 474 __disable_irq_nosync(irq);
1da177e4 475}
1da177e4
LT
476EXPORT_SYMBOL(disable_irq_nosync);
477
478/**
479 * disable_irq - disable an irq and wait for completion
480 * @irq: Interrupt to disable
481 *
482 * Disable the selected interrupt line. Enables and Disables are
483 * nested.
484 * This function waits for any pending IRQ handlers for this interrupt
485 * to complete before returning. If you use this function while
486 * holding a resource the IRQ handler may need you will deadlock.
487 *
488 * This function may be called - with care - from IRQ context.
489 */
490void disable_irq(unsigned int irq)
491{
02725e74 492 if (!__disable_irq_nosync(irq))
1da177e4
LT
493 synchronize_irq(irq);
494}
1da177e4
LT
495EXPORT_SYMBOL(disable_irq);
496
02cea395
PZ
497/**
498 * disable_hardirq - disables an irq and waits for hardirq completion
499 * @irq: Interrupt to disable
500 *
501 * Disable the selected interrupt line. Enables and Disables are
502 * nested.
503 * This function waits for any pending hard IRQ handlers for this
504 * interrupt to complete before returning. If you use this function while
505 * holding a resource the hard IRQ handler may need you will deadlock.
506 *
507 * When used to optimistically disable an interrupt from atomic context
508 * the return value must be checked.
509 *
510 * Returns: false if a threaded handler is active.
511 *
512 * This function may be called - with care - from IRQ context.
513 */
514bool disable_hardirq(unsigned int irq)
515{
516 if (!__disable_irq_nosync(irq))
517 return synchronize_hardirq(irq);
518
519 return false;
520}
521EXPORT_SYMBOL_GPL(disable_hardirq);
522
79ff1cda 523void __enable_irq(struct irq_desc *desc)
1adb0850
TG
524{
525 switch (desc->depth) {
526 case 0:
0a0c5168 527 err_out:
79ff1cda
JL
528 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
529 irq_desc_get_irq(desc));
1adb0850
TG
530 break;
531 case 1: {
c531e836 532 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 533 goto err_out;
1adb0850 534 /* Prevent probing on this irq: */
1ccb4e61 535 irq_settings_set_noprobe(desc);
3aae994f 536 irq_enable(desc);
0798abeb 537 check_irq_resend(desc);
1adb0850
TG
538 /* fall-through */
539 }
540 default:
541 desc->depth--;
542 }
543}
544
1da177e4
LT
545/**
546 * enable_irq - enable handling of an irq
547 * @irq: Interrupt to enable
548 *
549 * Undoes the effect of one call to disable_irq(). If this
550 * matches the last disable, processing of interrupts on this
551 * IRQ line is re-enabled.
552 *
70aedd24 553 * This function may be called from IRQ context only when
6b8ff312 554 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
555 */
556void enable_irq(unsigned int irq)
557{
1da177e4 558 unsigned long flags;
31d9d9b6 559 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 560
7d94f7ca 561 if (!desc)
c2b5a251 562 return;
50f7c032
TG
563 if (WARN(!desc->irq_data.chip,
564 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 565 goto out;
2656c366 566
79ff1cda 567 __enable_irq(desc);
02725e74
TG
568out:
569 irq_put_desc_busunlock(desc, flags);
1da177e4 570}
1da177e4
LT
571EXPORT_SYMBOL(enable_irq);
572
0c5d1eb7 573static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 574{
08678b08 575 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
576 int ret = -ENXIO;
577
60f96b41
SS
578 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
579 return 0;
580
2f7e99bb
TG
581 if (desc->irq_data.chip->irq_set_wake)
582 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
583
584 return ret;
585}
586
ba9a2331 587/**
a0cd9ca2 588 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
589 * @irq: interrupt to control
590 * @on: enable/disable power management wakeup
591 *
15a647eb
DB
592 * Enable/disable power management wakeup mode, which is
593 * disabled by default. Enables and disables must match,
594 * just as they match for non-wakeup mode support.
595 *
596 * Wakeup mode lets this IRQ wake the system from sleep
597 * states like "suspend to RAM".
ba9a2331 598 */
a0cd9ca2 599int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 600{
ba9a2331 601 unsigned long flags;
31d9d9b6 602 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 603 int ret = 0;
ba9a2331 604
13863a66
JJ
605 if (!desc)
606 return -EINVAL;
607
15a647eb
DB
608 /* wakeup-capable irqs can be shared between drivers that
609 * don't need to have the same sleep mode behaviors.
610 */
15a647eb 611 if (on) {
2db87321
UKK
612 if (desc->wake_depth++ == 0) {
613 ret = set_irq_wake_real(irq, on);
614 if (ret)
615 desc->wake_depth = 0;
616 else
7f94226f 617 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 618 }
15a647eb
DB
619 } else {
620 if (desc->wake_depth == 0) {
7a2c4770 621 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
622 } else if (--desc->wake_depth == 0) {
623 ret = set_irq_wake_real(irq, on);
624 if (ret)
625 desc->wake_depth = 1;
626 else
7f94226f 627 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 628 }
15a647eb 629 }
02725e74 630 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
631 return ret;
632}
a0cd9ca2 633EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 634
1da177e4
LT
635/*
636 * Internal function that tells the architecture code whether a
637 * particular irq has been exclusively allocated or is available
638 * for driver use.
639 */
640int can_request_irq(unsigned int irq, unsigned long irqflags)
641{
cc8c3b78 642 unsigned long flags;
31d9d9b6 643 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 644 int canrequest = 0;
1da177e4 645
7d94f7ca
YL
646 if (!desc)
647 return 0;
648
02725e74 649 if (irq_settings_can_request(desc)) {
2779db8d
BH
650 if (!desc->action ||
651 irqflags & desc->action->flags & IRQF_SHARED)
652 canrequest = 1;
02725e74
TG
653 }
654 irq_put_desc_unlock(desc, flags);
655 return canrequest;
1da177e4
LT
656}
657
a1ff541a 658int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 659{
6b8ff312 660 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 661 int ret, unmask = 0;
82736f4d 662
b2ba2c30 663 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
664 /*
665 * IRQF_TRIGGER_* but the PIC does not support multiple
666 * flow-types?
667 */
a1ff541a
JL
668 pr_debug("No set_type function for IRQ %d (%s)\n",
669 irq_desc_get_irq(desc),
f5d89470 670 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
671 return 0;
672 }
673
d4d5e089 674 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 675 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 676 mask_irq(desc);
32f4125e 677 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
678 unmask = 1;
679 }
680
00b992de
AK
681 /* Mask all flags except trigger mode */
682 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 683 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 684
876dbd4c
TG
685 switch (ret) {
686 case IRQ_SET_MASK_OK:
2cb62547 687 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
688 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
689 irqd_set(&desc->irq_data, flags);
690
691 case IRQ_SET_MASK_OK_NOCOPY:
692 flags = irqd_get_trigger_type(&desc->irq_data);
693 irq_settings_set_trigger_mask(desc, flags);
694 irqd_clear(&desc->irq_data, IRQD_LEVEL);
695 irq_settings_clr_level(desc);
696 if (flags & IRQ_TYPE_LEVEL_MASK) {
697 irq_settings_set_level(desc);
698 irqd_set(&desc->irq_data, IRQD_LEVEL);
699 }
46732475 700
d4d5e089 701 ret = 0;
8fff39e0 702 break;
876dbd4c 703 default:
97fd75b7 704 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 705 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 706 }
d4d5e089
TG
707 if (unmask)
708 unmask_irq(desc);
82736f4d
UKK
709 return ret;
710}
711
293a7a0a
TG
712#ifdef CONFIG_HARDIRQS_SW_RESEND
713int irq_set_parent(int irq, int parent_irq)
714{
715 unsigned long flags;
716 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
717
718 if (!desc)
719 return -EINVAL;
720
721 desc->parent_irq = parent_irq;
722
723 irq_put_desc_unlock(desc, flags);
724 return 0;
725}
3118dac5 726EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
727#endif
728
b25c340c
TG
729/*
730 * Default primary interrupt handler for threaded interrupts. Is
731 * assigned as primary handler when request_threaded_irq is called
732 * with handler == NULL. Useful for oneshot interrupts.
733 */
734static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
735{
736 return IRQ_WAKE_THREAD;
737}
738
399b5da2
TG
739/*
740 * Primary handler for nested threaded interrupts. Should never be
741 * called.
742 */
743static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
744{
745 WARN(1, "Primary handler called for nested irq %d\n", irq);
746 return IRQ_NONE;
747}
748
2a1d3ab8
TG
749static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
750{
751 WARN(1, "Secondary action handler called for irq %d\n", irq);
752 return IRQ_NONE;
753}
754
3aa551c9
TG
755static int irq_wait_for_interrupt(struct irqaction *action)
756{
550acb19
IY
757 set_current_state(TASK_INTERRUPTIBLE);
758
3aa551c9 759 while (!kthread_should_stop()) {
f48fe81e
TG
760
761 if (test_and_clear_bit(IRQTF_RUNTHREAD,
762 &action->thread_flags)) {
3aa551c9
TG
763 __set_current_state(TASK_RUNNING);
764 return 0;
f48fe81e
TG
765 }
766 schedule();
550acb19 767 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 768 }
550acb19 769 __set_current_state(TASK_RUNNING);
3aa551c9
TG
770 return -1;
771}
772
b25c340c
TG
773/*
774 * Oneshot interrupts keep the irq line masked until the threaded
775 * handler finished. unmask if the interrupt has not been disabled and
776 * is marked MASKED.
777 */
b5faba21 778static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 779 struct irqaction *action)
b25c340c 780{
2a1d3ab8
TG
781 if (!(desc->istate & IRQS_ONESHOT) ||
782 action->handler == irq_forced_secondary_handler)
b5faba21 783 return;
0b1adaa0 784again:
3876ec9e 785 chip_bus_lock(desc);
239007b8 786 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
787
788 /*
789 * Implausible though it may be we need to protect us against
790 * the following scenario:
791 *
792 * The thread is faster done than the hard interrupt handler
793 * on the other CPU. If we unmask the irq line then the
794 * interrupt can come in again and masks the line, leaves due
009b4c3b 795 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
796 *
797 * This also serializes the state of shared oneshot handlers
798 * versus "desc->threads_onehsot |= action->thread_mask;" in
799 * irq_wake_thread(). See the comment there which explains the
800 * serialization.
0b1adaa0 801 */
32f4125e 802 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 803 raw_spin_unlock_irq(&desc->lock);
3876ec9e 804 chip_bus_sync_unlock(desc);
0b1adaa0
TG
805 cpu_relax();
806 goto again;
807 }
808
b5faba21
TG
809 /*
810 * Now check again, whether the thread should run. Otherwise
811 * we would clear the threads_oneshot bit of this thread which
812 * was just set.
813 */
f3f79e38 814 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
815 goto out_unlock;
816
817 desc->threads_oneshot &= ~action->thread_mask;
818
32f4125e
TG
819 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
820 irqd_irq_masked(&desc->irq_data))
328a4978 821 unmask_threaded_irq(desc);
32f4125e 822
b5faba21 823out_unlock:
239007b8 824 raw_spin_unlock_irq(&desc->lock);
3876ec9e 825 chip_bus_sync_unlock(desc);
b25c340c
TG
826}
827
61f38261 828#ifdef CONFIG_SMP
591d2fb0 829/*
b04c644e 830 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
831 */
832static void
833irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
834{
835 cpumask_var_t mask;
04aa530e 836 bool valid = true;
591d2fb0
TG
837
838 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
839 return;
840
841 /*
842 * In case we are out of memory we set IRQTF_AFFINITY again and
843 * try again next time
844 */
845 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
846 set_bit(IRQTF_AFFINITY, &action->thread_flags);
847 return;
848 }
849
239007b8 850 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
851 /*
852 * This code is triggered unconditionally. Check the affinity
853 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
854 */
d170fe7d 855 if (cpumask_available(desc->irq_common_data.affinity))
9df872fa 856 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
857 else
858 valid = false;
239007b8 859 raw_spin_unlock_irq(&desc->lock);
591d2fb0 860
04aa530e
TG
861 if (valid)
862 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
863 free_cpumask_var(mask);
864}
61f38261
BP
865#else
866static inline void
867irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
868#endif
591d2fb0 869
8d32a307
TG
870/*
871 * Interrupts which are not explicitely requested as threaded
872 * interrupts rely on the implicit bh/preempt disable of the hard irq
873 * context. So we need to disable bh here to avoid deadlocks and other
874 * side effects.
875 */
3a43e05f 876static irqreturn_t
8d32a307
TG
877irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
878{
3a43e05f
SAS
879 irqreturn_t ret;
880
8d32a307 881 local_bh_disable();
3a43e05f 882 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 883 irq_finalize_oneshot(desc, action);
8d32a307 884 local_bh_enable();
3a43e05f 885 return ret;
8d32a307
TG
886}
887
888/*
f788e7bf 889 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
890 * preemtible - many of them need to sleep and wait for slow busses to
891 * complete.
892 */
3a43e05f
SAS
893static irqreturn_t irq_thread_fn(struct irq_desc *desc,
894 struct irqaction *action)
8d32a307 895{
3a43e05f
SAS
896 irqreturn_t ret;
897
898 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 899 irq_finalize_oneshot(desc, action);
3a43e05f 900 return ret;
8d32a307
TG
901}
902
7140ea19
IY
903static void wake_threads_waitq(struct irq_desc *desc)
904{
c685689f 905 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
906 wake_up(&desc->wait_for_threads);
907}
908
67d12145 909static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
910{
911 struct task_struct *tsk = current;
912 struct irq_desc *desc;
913 struct irqaction *action;
914
915 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
916 return;
917
918 action = kthread_data(tsk);
919
fb21affa 920 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 921 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
922
923
924 desc = irq_to_desc(action->irq);
925 /*
926 * If IRQTF_RUNTHREAD is set, we need to decrement
927 * desc->threads_active and wake possible waiters.
928 */
929 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
930 wake_threads_waitq(desc);
931
932 /* Prevent a stale desc->threads_oneshot */
933 irq_finalize_oneshot(desc, action);
934}
935
2a1d3ab8
TG
936static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
937{
938 struct irqaction *secondary = action->secondary;
939
940 if (WARN_ON_ONCE(!secondary))
941 return;
942
943 raw_spin_lock_irq(&desc->lock);
944 __irq_wake_thread(desc, secondary);
945 raw_spin_unlock_irq(&desc->lock);
946}
947
3aa551c9
TG
948/*
949 * Interrupt handler thread
950 */
951static int irq_thread(void *data)
952{
67d12145 953 struct callback_head on_exit_work;
3aa551c9
TG
954 struct irqaction *action = data;
955 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
956 irqreturn_t (*handler_fn)(struct irq_desc *desc,
957 struct irqaction *action);
3aa551c9 958
540b60e2 959 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
960 &action->thread_flags))
961 handler_fn = irq_forced_thread_fn;
962 else
963 handler_fn = irq_thread_fn;
964
41f9d29f 965 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 966 task_work_add(current, &on_exit_work, false);
3aa551c9 967
f3de44ed
SM
968 irq_thread_check_affinity(desc, action);
969
3aa551c9 970 while (!irq_wait_for_interrupt(action)) {
7140ea19 971 irqreturn_t action_ret;
3aa551c9 972
591d2fb0
TG
973 irq_thread_check_affinity(desc, action);
974
7140ea19 975 action_ret = handler_fn(desc, action);
1e77d0a1
TG
976 if (action_ret == IRQ_HANDLED)
977 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
978 if (action_ret == IRQ_WAKE_THREAD)
979 irq_wake_secondary(desc, action);
3aa551c9 980
7140ea19 981 wake_threads_waitq(desc);
3aa551c9
TG
982 }
983
7140ea19
IY
984 /*
985 * This is the regular exit path. __free_irq() is stopping the
986 * thread via kthread_stop() after calling
987 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
988 * oneshot mask bit can be set. We cannot verify that as we
989 * cannot touch the oneshot mask at this point anymore as
990 * __setup_irq() might have given out currents thread_mask
991 * again.
3aa551c9 992 */
4d1d61a6 993 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
994 return 0;
995}
996
a92444c6
TG
997/**
998 * irq_wake_thread - wake the irq thread for the action identified by dev_id
999 * @irq: Interrupt line
1000 * @dev_id: Device identity for which the thread should be woken
1001 *
1002 */
1003void irq_wake_thread(unsigned int irq, void *dev_id)
1004{
1005 struct irq_desc *desc = irq_to_desc(irq);
1006 struct irqaction *action;
1007 unsigned long flags;
1008
1009 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1010 return;
1011
1012 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 1013 for_each_action_of_desc(desc, action) {
a92444c6
TG
1014 if (action->dev_id == dev_id) {
1015 if (action->thread)
1016 __irq_wake_thread(desc, action);
1017 break;
1018 }
1019 }
1020 raw_spin_unlock_irqrestore(&desc->lock, flags);
1021}
1022EXPORT_SYMBOL_GPL(irq_wake_thread);
1023
2a1d3ab8 1024static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1025{
1026 if (!force_irqthreads)
2a1d3ab8 1027 return 0;
8d32a307 1028 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1029 return 0;
8d32a307
TG
1030
1031 new->flags |= IRQF_ONESHOT;
1032
2a1d3ab8
TG
1033 /*
1034 * Handle the case where we have a real primary handler and a
1035 * thread handler. We force thread them as well by creating a
1036 * secondary action.
1037 */
1038 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1039 /* Allocate the secondary action */
1040 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1041 if (!new->secondary)
1042 return -ENOMEM;
1043 new->secondary->handler = irq_forced_secondary_handler;
1044 new->secondary->thread_fn = new->thread_fn;
1045 new->secondary->dev_id = new->dev_id;
1046 new->secondary->irq = new->irq;
1047 new->secondary->name = new->name;
8d32a307 1048 }
2a1d3ab8
TG
1049 /* Deal with the primary handler */
1050 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1051 new->thread_fn = new->handler;
1052 new->handler = irq_default_primary_handler;
1053 return 0;
8d32a307
TG
1054}
1055
c1bacbae
TG
1056static int irq_request_resources(struct irq_desc *desc)
1057{
1058 struct irq_data *d = &desc->irq_data;
1059 struct irq_chip *c = d->chip;
1060
1061 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1062}
1063
1064static void irq_release_resources(struct irq_desc *desc)
1065{
1066 struct irq_data *d = &desc->irq_data;
1067 struct irq_chip *c = d->chip;
1068
1069 if (c->irq_release_resources)
1070 c->irq_release_resources(d);
1071}
1072
2a1d3ab8
TG
1073static int
1074setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1075{
1076 struct task_struct *t;
1077 struct sched_param param = {
1078 .sched_priority = MAX_USER_RT_PRIO/2,
1079 };
1080
1081 if (!secondary) {
1082 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1083 new->name);
1084 } else {
1085 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1086 new->name);
1087 param.sched_priority -= 1;
1088 }
1089
1090 if (IS_ERR(t))
1091 return PTR_ERR(t);
1092
1093 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1094
1095 /*
1096 * We keep the reference to the task struct even if
1097 * the thread dies to avoid that the interrupt code
1098 * references an already freed task_struct.
1099 */
1100 get_task_struct(t);
1101 new->thread = t;
1102 /*
1103 * Tell the thread to set its affinity. This is
1104 * important for shared interrupt handlers as we do
1105 * not invoke setup_affinity() for the secondary
1106 * handlers as everything is already set up. Even for
1107 * interrupts marked with IRQF_NO_BALANCE this is
1108 * correct as we want the thread to move to the cpu(s)
1109 * on which the requesting code placed the interrupt.
1110 */
1111 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1112 return 0;
1113}
1114
1da177e4
LT
1115/*
1116 * Internal function to register an irqaction - typically used to
1117 * allocate special interrupts that are part of the architecture.
1118 */
d3c60047 1119static int
327ec569 1120__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1121{
f17c7545 1122 struct irqaction *old, **old_ptr;
b5faba21 1123 unsigned long flags, thread_mask = 0;
3b8249e7
TG
1124 int ret, nested, shared = 0;
1125 cpumask_var_t mask;
1da177e4 1126
7d94f7ca 1127 if (!desc)
c2b5a251
MW
1128 return -EINVAL;
1129
6b8ff312 1130 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1131 return -ENOSYS;
b6873807
SAS
1132 if (!try_module_get(desc->owner))
1133 return -ENODEV;
1da177e4 1134
2a1d3ab8
TG
1135 new->irq = irq;
1136
4b357dae
JH
1137 /*
1138 * If the trigger type is not specified by the caller,
1139 * then use the default for this interrupt.
1140 */
1141 if (!(new->flags & IRQF_TRIGGER_MASK))
1142 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1143
3aa551c9 1144 /*
399b5da2
TG
1145 * Check whether the interrupt nests into another interrupt
1146 * thread.
1147 */
1ccb4e61 1148 nested = irq_settings_is_nested_thread(desc);
399b5da2 1149 if (nested) {
b6873807
SAS
1150 if (!new->thread_fn) {
1151 ret = -EINVAL;
1152 goto out_mput;
1153 }
399b5da2
TG
1154 /*
1155 * Replace the primary handler which was provided from
1156 * the driver for non nested interrupt handling by the
1157 * dummy function which warns when called.
1158 */
1159 new->handler = irq_nested_primary_handler;
8d32a307 1160 } else {
2a1d3ab8
TG
1161 if (irq_settings_can_thread(desc)) {
1162 ret = irq_setup_forced_threading(new);
1163 if (ret)
1164 goto out_mput;
1165 }
399b5da2
TG
1166 }
1167
3aa551c9 1168 /*
399b5da2
TG
1169 * Create a handler thread when a thread function is supplied
1170 * and the interrupt does not nest into another interrupt
1171 * thread.
3aa551c9 1172 */
399b5da2 1173 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1174 ret = setup_irq_thread(new, irq, false);
1175 if (ret)
b6873807 1176 goto out_mput;
2a1d3ab8
TG
1177 if (new->secondary) {
1178 ret = setup_irq_thread(new->secondary, irq, true);
1179 if (ret)
1180 goto out_thread;
b6873807 1181 }
3aa551c9
TG
1182 }
1183
3b8249e7
TG
1184 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1185 ret = -ENOMEM;
1186 goto out_thread;
1187 }
1188
dc9b229a
TG
1189 /*
1190 * Drivers are often written to work w/o knowledge about the
1191 * underlying irq chip implementation, so a request for a
1192 * threaded irq without a primary hard irq context handler
1193 * requires the ONESHOT flag to be set. Some irq chips like
1194 * MSI based interrupts are per se one shot safe. Check the
1195 * chip flags, so we can avoid the unmask dance at the end of
1196 * the threaded handler for those.
1197 */
1198 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1199 new->flags &= ~IRQF_ONESHOT;
1200
1da177e4
LT
1201 /*
1202 * The following block of code has to be executed atomically
1203 */
239007b8 1204 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1205 old_ptr = &desc->action;
1206 old = *old_ptr;
06fcb0c6 1207 if (old) {
e76de9f8
TG
1208 /*
1209 * Can't share interrupts unless both agree to and are
1210 * the same type (level, edge, polarity). So both flag
3cca53b0 1211 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1212 * set the trigger type must match. Also all must
1213 * agree on ONESHOT.
e76de9f8 1214 */
382bd4de
HG
1215 unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
1216
3cca53b0 1217 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1218 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1219 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1220 goto mismatch;
1221
f5163427 1222 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1223 if ((old->flags & IRQF_PERCPU) !=
1224 (new->flags & IRQF_PERCPU))
f5163427 1225 goto mismatch;
1da177e4
LT
1226
1227 /* add new interrupt at end of irq queue */
1228 do {
52abb700
TG
1229 /*
1230 * Or all existing action->thread_mask bits,
1231 * so we can find the next zero bit for this
1232 * new action.
1233 */
b5faba21 1234 thread_mask |= old->thread_mask;
f17c7545
IM
1235 old_ptr = &old->next;
1236 old = *old_ptr;
1da177e4
LT
1237 } while (old);
1238 shared = 1;
1239 }
1240
b5faba21 1241 /*
52abb700
TG
1242 * Setup the thread mask for this irqaction for ONESHOT. For
1243 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1244 * conditional in irq_wake_thread().
b5faba21 1245 */
52abb700
TG
1246 if (new->flags & IRQF_ONESHOT) {
1247 /*
1248 * Unlikely to have 32 resp 64 irqs sharing one line,
1249 * but who knows.
1250 */
1251 if (thread_mask == ~0UL) {
1252 ret = -EBUSY;
1253 goto out_mask;
1254 }
1255 /*
1256 * The thread_mask for the action is or'ed to
1257 * desc->thread_active to indicate that the
1258 * IRQF_ONESHOT thread handler has been woken, but not
1259 * yet finished. The bit is cleared when a thread
1260 * completes. When all threads of a shared interrupt
1261 * line have completed desc->threads_active becomes
1262 * zero and the interrupt line is unmasked. See
1263 * handle.c:irq_wake_thread() for further information.
1264 *
1265 * If no thread is woken by primary (hard irq context)
1266 * interrupt handlers, then desc->threads_active is
1267 * also checked for zero to unmask the irq line in the
1268 * affected hard irq flow handlers
1269 * (handle_[fasteoi|level]_irq).
1270 *
1271 * The new action gets the first zero bit of
1272 * thread_mask assigned. See the loop above which or's
1273 * all existing action->thread_mask bits.
1274 */
1275 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1276
dc9b229a
TG
1277 } else if (new->handler == irq_default_primary_handler &&
1278 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1279 /*
1280 * The interrupt was requested with handler = NULL, so
1281 * we use the default primary handler for it. But it
1282 * does not have the oneshot flag set. In combination
1283 * with level interrupts this is deadly, because the
1284 * default primary handler just wakes the thread, then
1285 * the irq lines is reenabled, but the device still
1286 * has the level irq asserted. Rinse and repeat....
1287 *
1288 * While this works for edge type interrupts, we play
1289 * it safe and reject unconditionally because we can't
1290 * say for sure which type this interrupt really
1291 * has. The type flags are unreliable as the
1292 * underlying chip implementation can override them.
1293 */
97fd75b7 1294 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1295 irq);
1296 ret = -EINVAL;
1297 goto out_mask;
b5faba21 1298 }
b5faba21 1299
1da177e4 1300 if (!shared) {
c1bacbae
TG
1301 ret = irq_request_resources(desc);
1302 if (ret) {
1303 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1304 new->name, irq, desc->irq_data.chip->name);
1305 goto out_mask;
1306 }
1307
3aa551c9
TG
1308 init_waitqueue_head(&desc->wait_for_threads);
1309
e76de9f8 1310 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1311 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1312 ret = __irq_set_trigger(desc,
1313 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1314
3aa551c9 1315 if (ret)
3b8249e7 1316 goto out_mask;
091738a2 1317 }
6a6de9ef 1318
009b4c3b 1319 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1320 IRQS_ONESHOT | IRQS_WAITING);
1321 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1322
a005677b
TG
1323 if (new->flags & IRQF_PERCPU) {
1324 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1325 irq_settings_set_per_cpu(desc);
1326 }
6a58fb3b 1327
b25c340c 1328 if (new->flags & IRQF_ONESHOT)
3d67baec 1329 desc->istate |= IRQS_ONESHOT;
b25c340c 1330
1ccb4e61 1331 if (irq_settings_can_autoenable(desc))
b4bc724e 1332 irq_startup(desc, true);
46999238 1333 else
e76de9f8
TG
1334 /* Undo nested disables: */
1335 desc->depth = 1;
18404756 1336
612e3684 1337 /* Exclude IRQ from balancing if requested */
a005677b
TG
1338 if (new->flags & IRQF_NOBALANCING) {
1339 irq_settings_set_no_balancing(desc);
1340 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1341 }
612e3684 1342
18404756 1343 /* Set default affinity mask once everything is setup */
a8a98eac 1344 setup_affinity(desc, mask);
0c5d1eb7 1345
876dbd4c
TG
1346 } else if (new->flags & IRQF_TRIGGER_MASK) {
1347 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1348 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1349
1350 if (nmsk != omsk)
1351 /* hope the handler works with current trigger mode */
a395d6a7 1352 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1353 irq, omsk, nmsk);
1da177e4 1354 }
82736f4d 1355
f17c7545 1356 *old_ptr = new;
82736f4d 1357
cab303be
TG
1358 irq_pm_install_action(desc, new);
1359
8528b0f1
LT
1360 /* Reset broken irq detection when installing new handler */
1361 desc->irq_count = 0;
1362 desc->irqs_unhandled = 0;
1adb0850
TG
1363
1364 /*
1365 * Check whether we disabled the irq via the spurious handler
1366 * before. Reenable it and give it another chance.
1367 */
7acdd53e
TG
1368 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1369 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1370 __enable_irq(desc);
1adb0850
TG
1371 }
1372
239007b8 1373 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1374
69ab8494
TG
1375 /*
1376 * Strictly no need to wake it up, but hung_task complains
1377 * when no hard interrupt wakes the thread up.
1378 */
1379 if (new->thread)
1380 wake_up_process(new->thread);
2a1d3ab8
TG
1381 if (new->secondary)
1382 wake_up_process(new->secondary->thread);
69ab8494 1383
2c6927a3 1384 register_irq_proc(irq, desc);
1da177e4
LT
1385 new->dir = NULL;
1386 register_handler_proc(irq, new);
4f5058c3 1387 free_cpumask_var(mask);
1da177e4
LT
1388
1389 return 0;
f5163427
DS
1390
1391mismatch:
3cca53b0 1392 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1393 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1394 irq, new->flags, new->name, old->flags, old->name);
1395#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1396 dump_stack();
3f050447 1397#endif
f5d89470 1398 }
3aa551c9
TG
1399 ret = -EBUSY;
1400
3b8249e7 1401out_mask:
1c389795 1402 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1403 free_cpumask_var(mask);
1404
3aa551c9 1405out_thread:
3aa551c9
TG
1406 if (new->thread) {
1407 struct task_struct *t = new->thread;
1408
1409 new->thread = NULL;
05d74efa 1410 kthread_stop(t);
3aa551c9
TG
1411 put_task_struct(t);
1412 }
2a1d3ab8
TG
1413 if (new->secondary && new->secondary->thread) {
1414 struct task_struct *t = new->secondary->thread;
1415
1416 new->secondary->thread = NULL;
1417 kthread_stop(t);
1418 put_task_struct(t);
1419 }
b6873807
SAS
1420out_mput:
1421 module_put(desc->owner);
3aa551c9 1422 return ret;
1da177e4
LT
1423}
1424
d3c60047
TG
1425/**
1426 * setup_irq - setup an interrupt
1427 * @irq: Interrupt line to setup
1428 * @act: irqaction for the interrupt
1429 *
1430 * Used to statically setup interrupts in the early boot process.
1431 */
1432int setup_irq(unsigned int irq, struct irqaction *act)
1433{
986c011d 1434 int retval;
d3c60047
TG
1435 struct irq_desc *desc = irq_to_desc(irq);
1436
9b5d585d 1437 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1438 return -EINVAL;
be45beb2
JH
1439
1440 retval = irq_chip_pm_get(&desc->irq_data);
1441 if (retval < 0)
1442 return retval;
1443
986c011d
DD
1444 chip_bus_lock(desc);
1445 retval = __setup_irq(irq, desc, act);
1446 chip_bus_sync_unlock(desc);
1447
be45beb2
JH
1448 if (retval)
1449 irq_chip_pm_put(&desc->irq_data);
1450
986c011d 1451 return retval;
d3c60047 1452}
eb53b4e8 1453EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1454
31d9d9b6 1455/*
cbf94f06
MD
1456 * Internal function to unregister an irqaction - used to free
1457 * regular and special interrupts that are part of the architecture.
1da177e4 1458 */
cbf94f06 1459static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1460{
d3c60047 1461 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1462 struct irqaction *action, **action_ptr;
1da177e4
LT
1463 unsigned long flags;
1464
ae88a23b 1465 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1466
7d94f7ca 1467 if (!desc)
f21cfb25 1468 return NULL;
1da177e4 1469
abc7e40c 1470 chip_bus_lock(desc);
239007b8 1471 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1472
1473 /*
1474 * There can be multiple actions per IRQ descriptor, find the right
1475 * one based on the dev_id:
1476 */
f17c7545 1477 action_ptr = &desc->action;
1da177e4 1478 for (;;) {
f17c7545 1479 action = *action_ptr;
1da177e4 1480
ae88a23b
IM
1481 if (!action) {
1482 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1483 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1484 chip_bus_sync_unlock(desc);
f21cfb25 1485 return NULL;
ae88a23b 1486 }
1da177e4 1487
8316e381
IM
1488 if (action->dev_id == dev_id)
1489 break;
f17c7545 1490 action_ptr = &action->next;
ae88a23b 1491 }
dbce706e 1492
ae88a23b 1493 /* Found it - now remove it from the list of entries: */
f17c7545 1494 *action_ptr = action->next;
ae88a23b 1495
cab303be
TG
1496 irq_pm_remove_action(desc, action);
1497
ae88a23b 1498 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1499 if (!desc->action) {
e9849777 1500 irq_settings_clr_disable_unlazy(desc);
46999238 1501 irq_shutdown(desc);
c1bacbae
TG
1502 irq_release_resources(desc);
1503 }
3aa551c9 1504
e7a297b0
PWJ
1505#ifdef CONFIG_SMP
1506 /* make sure affinity_hint is cleaned up */
1507 if (WARN_ON_ONCE(desc->affinity_hint))
1508 desc->affinity_hint = NULL;
1509#endif
1510
239007b8 1511 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1512 chip_bus_sync_unlock(desc);
ae88a23b
IM
1513
1514 unregister_handler_proc(irq, action);
1515
1516 /* Make sure it's not being used on another CPU: */
1517 synchronize_irq(irq);
1da177e4 1518
70edcd77 1519#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1520 /*
1521 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1522 * event to happen even now it's being freed, so let's make sure that
1523 * is so by doing an extra call to the handler ....
1524 *
1525 * ( We do this after actually deregistering it, to make sure that a
1526 * 'real' IRQ doesn't run in * parallel with our fake. )
1527 */
1528 if (action->flags & IRQF_SHARED) {
1529 local_irq_save(flags);
1530 action->handler(irq, dev_id);
1531 local_irq_restore(flags);
1da177e4 1532 }
ae88a23b 1533#endif
2d860ad7
LT
1534
1535 if (action->thread) {
05d74efa 1536 kthread_stop(action->thread);
2d860ad7 1537 put_task_struct(action->thread);
2a1d3ab8
TG
1538 if (action->secondary && action->secondary->thread) {
1539 kthread_stop(action->secondary->thread);
1540 put_task_struct(action->secondary->thread);
1541 }
2d860ad7
LT
1542 }
1543
be45beb2 1544 irq_chip_pm_put(&desc->irq_data);
b6873807 1545 module_put(desc->owner);
2a1d3ab8 1546 kfree(action->secondary);
f21cfb25
MD
1547 return action;
1548}
1549
cbf94f06
MD
1550/**
1551 * remove_irq - free an interrupt
1552 * @irq: Interrupt line to free
1553 * @act: irqaction for the interrupt
1554 *
1555 * Used to remove interrupts statically setup by the early boot process.
1556 */
1557void remove_irq(unsigned int irq, struct irqaction *act)
1558{
31d9d9b6
MZ
1559 struct irq_desc *desc = irq_to_desc(irq);
1560
1561 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
a7e60e55 1562 __free_irq(irq, act->dev_id);
cbf94f06 1563}
eb53b4e8 1564EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1565
f21cfb25
MD
1566/**
1567 * free_irq - free an interrupt allocated with request_irq
1568 * @irq: Interrupt line to free
1569 * @dev_id: Device identity to free
1570 *
1571 * Remove an interrupt handler. The handler is removed and if the
1572 * interrupt line is no longer in use by any driver it is disabled.
1573 * On a shared IRQ the caller must ensure the interrupt is disabled
1574 * on the card it drives before calling this function. The function
1575 * does not return until any executing interrupts for this IRQ
1576 * have completed.
1577 *
1578 * This function must not be called from interrupt context.
25ce4be7
CH
1579 *
1580 * Returns the devname argument passed to request_irq.
f21cfb25 1581 */
25ce4be7 1582const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1583{
70aedd24 1584 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1585 struct irqaction *action;
1586 const char *devname;
70aedd24 1587
31d9d9b6 1588 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1589 return NULL;
70aedd24 1590
cd7eab44
BH
1591#ifdef CONFIG_SMP
1592 if (WARN_ON(desc->affinity_notify))
1593 desc->affinity_notify = NULL;
1594#endif
1595
25ce4be7
CH
1596 action = __free_irq(irq, dev_id);
1597 devname = action->name;
1598 kfree(action);
1599 return devname;
1da177e4 1600}
1da177e4
LT
1601EXPORT_SYMBOL(free_irq);
1602
1603/**
3aa551c9 1604 * request_threaded_irq - allocate an interrupt line
1da177e4 1605 * @irq: Interrupt line to allocate
3aa551c9
TG
1606 * @handler: Function to be called when the IRQ occurs.
1607 * Primary handler for threaded interrupts
b25c340c
TG
1608 * If NULL and thread_fn != NULL the default
1609 * primary handler is installed
f48fe81e
TG
1610 * @thread_fn: Function called from the irq handler thread
1611 * If NULL, no irq thread is created
1da177e4
LT
1612 * @irqflags: Interrupt type flags
1613 * @devname: An ascii name for the claiming device
1614 * @dev_id: A cookie passed back to the handler function
1615 *
1616 * This call allocates interrupt resources and enables the
1617 * interrupt line and IRQ handling. From the point this
1618 * call is made your handler function may be invoked. Since
1619 * your handler function must clear any interrupt the board
1620 * raises, you must take care both to initialise your hardware
1621 * and to set up the interrupt handler in the right order.
1622 *
3aa551c9 1623 * If you want to set up a threaded irq handler for your device
6d21af4f 1624 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1625 * still called in hard interrupt context and has to check
1626 * whether the interrupt originates from the device. If yes it
1627 * needs to disable the interrupt on the device and return
39a2eddb 1628 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1629 * @thread_fn. This split handler design is necessary to support
1630 * shared interrupts.
1631 *
1da177e4
LT
1632 * Dev_id must be globally unique. Normally the address of the
1633 * device data structure is used as the cookie. Since the handler
1634 * receives this value it makes sense to use it.
1635 *
1636 * If your interrupt is shared you must pass a non NULL dev_id
1637 * as this is required when freeing the interrupt.
1638 *
1639 * Flags:
1640 *
3cca53b0 1641 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1642 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1643 *
1644 */
3aa551c9
TG
1645int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1646 irq_handler_t thread_fn, unsigned long irqflags,
1647 const char *devname, void *dev_id)
1da177e4 1648{
06fcb0c6 1649 struct irqaction *action;
08678b08 1650 struct irq_desc *desc;
d3c60047 1651 int retval;
1da177e4 1652
e237a551
CF
1653 if (irq == IRQ_NOTCONNECTED)
1654 return -ENOTCONN;
1655
1da177e4
LT
1656 /*
1657 * Sanity-check: shared interrupts must pass in a real dev-ID,
1658 * otherwise we'll have trouble later trying to figure out
1659 * which interrupt is which (messes up the interrupt freeing
1660 * logic etc).
17f48034
RW
1661 *
1662 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1663 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1664 */
17f48034
RW
1665 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1666 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1667 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1668 return -EINVAL;
7d94f7ca 1669
cb5bc832 1670 desc = irq_to_desc(irq);
7d94f7ca 1671 if (!desc)
1da177e4 1672 return -EINVAL;
7d94f7ca 1673
31d9d9b6
MZ
1674 if (!irq_settings_can_request(desc) ||
1675 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1676 return -EINVAL;
b25c340c
TG
1677
1678 if (!handler) {
1679 if (!thread_fn)
1680 return -EINVAL;
1681 handler = irq_default_primary_handler;
1682 }
1da177e4 1683
45535732 1684 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1685 if (!action)
1686 return -ENOMEM;
1687
1688 action->handler = handler;
3aa551c9 1689 action->thread_fn = thread_fn;
1da177e4 1690 action->flags = irqflags;
1da177e4 1691 action->name = devname;
1da177e4
LT
1692 action->dev_id = dev_id;
1693
be45beb2 1694 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1695 if (retval < 0) {
1696 kfree(action);
be45beb2 1697 return retval;
4396f46c 1698 }
be45beb2 1699
3876ec9e 1700 chip_bus_lock(desc);
d3c60047 1701 retval = __setup_irq(irq, desc, action);
3876ec9e 1702 chip_bus_sync_unlock(desc);
70aedd24 1703
2a1d3ab8 1704 if (retval) {
be45beb2 1705 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1706 kfree(action->secondary);
377bf1e4 1707 kfree(action);
2a1d3ab8 1708 }
377bf1e4 1709
6d83f94d 1710#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1711 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1712 /*
1713 * It's a shared IRQ -- the driver ought to be prepared for it
1714 * to happen immediately, so let's make sure....
377bf1e4
AV
1715 * We disable the irq to make sure that a 'real' IRQ doesn't
1716 * run in parallel with our fake.
a304e1b8 1717 */
59845b1f 1718 unsigned long flags;
a304e1b8 1719
377bf1e4 1720 disable_irq(irq);
59845b1f 1721 local_irq_save(flags);
377bf1e4 1722
59845b1f 1723 handler(irq, dev_id);
377bf1e4 1724
59845b1f 1725 local_irq_restore(flags);
377bf1e4 1726 enable_irq(irq);
a304e1b8
DW
1727 }
1728#endif
1da177e4
LT
1729 return retval;
1730}
3aa551c9 1731EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1732
1733/**
1734 * request_any_context_irq - allocate an interrupt line
1735 * @irq: Interrupt line to allocate
1736 * @handler: Function to be called when the IRQ occurs.
1737 * Threaded handler for threaded interrupts.
1738 * @flags: Interrupt type flags
1739 * @name: An ascii name for the claiming device
1740 * @dev_id: A cookie passed back to the handler function
1741 *
1742 * This call allocates interrupt resources and enables the
1743 * interrupt line and IRQ handling. It selects either a
1744 * hardirq or threaded handling method depending on the
1745 * context.
1746 *
1747 * On failure, it returns a negative value. On success,
1748 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1749 */
1750int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1751 unsigned long flags, const char *name, void *dev_id)
1752{
e237a551 1753 struct irq_desc *desc;
ae731f8d
MZ
1754 int ret;
1755
e237a551
CF
1756 if (irq == IRQ_NOTCONNECTED)
1757 return -ENOTCONN;
1758
1759 desc = irq_to_desc(irq);
ae731f8d
MZ
1760 if (!desc)
1761 return -EINVAL;
1762
1ccb4e61 1763 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1764 ret = request_threaded_irq(irq, NULL, handler,
1765 flags, name, dev_id);
1766 return !ret ? IRQC_IS_NESTED : ret;
1767 }
1768
1769 ret = request_irq(irq, handler, flags, name, dev_id);
1770 return !ret ? IRQC_IS_HARDIRQ : ret;
1771}
1772EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1773
1e7c5fd2 1774void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1775{
1776 unsigned int cpu = smp_processor_id();
1777 unsigned long flags;
1778 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1779
1780 if (!desc)
1781 return;
1782
f35ad083
MZ
1783 /*
1784 * If the trigger type is not specified by the caller, then
1785 * use the default for this interrupt.
1786 */
1e7c5fd2 1787 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1788 if (type == IRQ_TYPE_NONE)
1789 type = irqd_get_trigger_type(&desc->irq_data);
1790
1e7c5fd2
MZ
1791 if (type != IRQ_TYPE_NONE) {
1792 int ret;
1793
a1ff541a 1794 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1795
1796 if (ret) {
32cffdde 1797 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1798 goto out;
1799 }
1800 }
1801
31d9d9b6 1802 irq_percpu_enable(desc, cpu);
1e7c5fd2 1803out:
31d9d9b6
MZ
1804 irq_put_desc_unlock(desc, flags);
1805}
36a5df85 1806EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1807
f0cb3220
TP
1808/**
1809 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1810 * @irq: Linux irq number to check for
1811 *
1812 * Must be called from a non migratable context. Returns the enable
1813 * state of a per cpu interrupt on the current cpu.
1814 */
1815bool irq_percpu_is_enabled(unsigned int irq)
1816{
1817 unsigned int cpu = smp_processor_id();
1818 struct irq_desc *desc;
1819 unsigned long flags;
1820 bool is_enabled;
1821
1822 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1823 if (!desc)
1824 return false;
1825
1826 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1827 irq_put_desc_unlock(desc, flags);
1828
1829 return is_enabled;
1830}
1831EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1832
31d9d9b6
MZ
1833void disable_percpu_irq(unsigned int irq)
1834{
1835 unsigned int cpu = smp_processor_id();
1836 unsigned long flags;
1837 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1838
1839 if (!desc)
1840 return;
1841
1842 irq_percpu_disable(desc, cpu);
1843 irq_put_desc_unlock(desc, flags);
1844}
36a5df85 1845EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1846
1847/*
1848 * Internal function to unregister a percpu irqaction.
1849 */
1850static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1851{
1852 struct irq_desc *desc = irq_to_desc(irq);
1853 struct irqaction *action;
1854 unsigned long flags;
1855
1856 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1857
1858 if (!desc)
1859 return NULL;
1860
1861 raw_spin_lock_irqsave(&desc->lock, flags);
1862
1863 action = desc->action;
1864 if (!action || action->percpu_dev_id != dev_id) {
1865 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1866 goto bad;
1867 }
1868
1869 if (!cpumask_empty(desc->percpu_enabled)) {
1870 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1871 irq, cpumask_first(desc->percpu_enabled));
1872 goto bad;
1873 }
1874
1875 /* Found it - now remove it from the list of entries: */
1876 desc->action = NULL;
1877
1878 raw_spin_unlock_irqrestore(&desc->lock, flags);
1879
1880 unregister_handler_proc(irq, action);
1881
be45beb2 1882 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1883 module_put(desc->owner);
1884 return action;
1885
1886bad:
1887 raw_spin_unlock_irqrestore(&desc->lock, flags);
1888 return NULL;
1889}
1890
1891/**
1892 * remove_percpu_irq - free a per-cpu interrupt
1893 * @irq: Interrupt line to free
1894 * @act: irqaction for the interrupt
1895 *
1896 * Used to remove interrupts statically setup by the early boot process.
1897 */
1898void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1899{
1900 struct irq_desc *desc = irq_to_desc(irq);
1901
1902 if (desc && irq_settings_is_per_cpu_devid(desc))
1903 __free_percpu_irq(irq, act->percpu_dev_id);
1904}
1905
1906/**
1907 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1908 * @irq: Interrupt line to free
1909 * @dev_id: Device identity to free
1910 *
1911 * Remove a percpu interrupt handler. The handler is removed, but
1912 * the interrupt line is not disabled. This must be done on each
1913 * CPU before calling this function. The function does not return
1914 * until any executing interrupts for this IRQ have completed.
1915 *
1916 * This function must not be called from interrupt context.
1917 */
1918void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1919{
1920 struct irq_desc *desc = irq_to_desc(irq);
1921
1922 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1923 return;
1924
1925 chip_bus_lock(desc);
1926 kfree(__free_percpu_irq(irq, dev_id));
1927 chip_bus_sync_unlock(desc);
1928}
aec2e2ad 1929EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1930
1931/**
1932 * setup_percpu_irq - setup a per-cpu interrupt
1933 * @irq: Interrupt line to setup
1934 * @act: irqaction for the interrupt
1935 *
1936 * Used to statically setup per-cpu interrupts in the early boot process.
1937 */
1938int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1939{
1940 struct irq_desc *desc = irq_to_desc(irq);
1941 int retval;
1942
1943 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1944 return -EINVAL;
be45beb2
JH
1945
1946 retval = irq_chip_pm_get(&desc->irq_data);
1947 if (retval < 0)
1948 return retval;
1949
31d9d9b6
MZ
1950 chip_bus_lock(desc);
1951 retval = __setup_irq(irq, desc, act);
1952 chip_bus_sync_unlock(desc);
1953
be45beb2
JH
1954 if (retval)
1955 irq_chip_pm_put(&desc->irq_data);
1956
31d9d9b6
MZ
1957 return retval;
1958}
1959
1960/**
1961 * request_percpu_irq - allocate a percpu interrupt line
1962 * @irq: Interrupt line to allocate
1963 * @handler: Function to be called when the IRQ occurs.
1964 * @devname: An ascii name for the claiming device
1965 * @dev_id: A percpu cookie passed back to the handler function
1966 *
a1b7febd
MR
1967 * This call allocates interrupt resources and enables the
1968 * interrupt on the local CPU. If the interrupt is supposed to be
1969 * enabled on other CPUs, it has to be done on each CPU using
1970 * enable_percpu_irq().
31d9d9b6
MZ
1971 *
1972 * Dev_id must be globally unique. It is a per-cpu variable, and
1973 * the handler gets called with the interrupted CPU's instance of
1974 * that variable.
1975 */
1976int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1977 const char *devname, void __percpu *dev_id)
1978{
1979 struct irqaction *action;
1980 struct irq_desc *desc;
1981 int retval;
1982
1983 if (!dev_id)
1984 return -EINVAL;
1985
1986 desc = irq_to_desc(irq);
1987 if (!desc || !irq_settings_can_request(desc) ||
1988 !irq_settings_is_per_cpu_devid(desc))
1989 return -EINVAL;
1990
1991 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1992 if (!action)
1993 return -ENOMEM;
1994
1995 action->handler = handler;
2ed0e645 1996 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1997 action->name = devname;
1998 action->percpu_dev_id = dev_id;
1999
be45beb2 2000 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2001 if (retval < 0) {
2002 kfree(action);
be45beb2 2003 return retval;
4396f46c 2004 }
be45beb2 2005
31d9d9b6
MZ
2006 chip_bus_lock(desc);
2007 retval = __setup_irq(irq, desc, action);
2008 chip_bus_sync_unlock(desc);
2009
be45beb2
JH
2010 if (retval) {
2011 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2012 kfree(action);
be45beb2 2013 }
31d9d9b6
MZ
2014
2015 return retval;
2016}
aec2e2ad 2017EXPORT_SYMBOL_GPL(request_percpu_irq);
1b7047ed
MZ
2018
2019/**
2020 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2021 * @irq: Interrupt line that is forwarded to a VM
2022 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2023 * @state: a pointer to a boolean where the state is to be storeed
2024 *
2025 * This call snapshots the internal irqchip state of an
2026 * interrupt, returning into @state the bit corresponding to
2027 * stage @which
2028 *
2029 * This function should be called with preemption disabled if the
2030 * interrupt controller has per-cpu registers.
2031 */
2032int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2033 bool *state)
2034{
2035 struct irq_desc *desc;
2036 struct irq_data *data;
2037 struct irq_chip *chip;
2038 unsigned long flags;
2039 int err = -EINVAL;
2040
2041 desc = irq_get_desc_buslock(irq, &flags, 0);
2042 if (!desc)
2043 return err;
2044
2045 data = irq_desc_get_irq_data(desc);
2046
2047 do {
2048 chip = irq_data_get_irq_chip(data);
2049 if (chip->irq_get_irqchip_state)
2050 break;
2051#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2052 data = data->parent_data;
2053#else
2054 data = NULL;
2055#endif
2056 } while (data);
2057
2058 if (data)
2059 err = chip->irq_get_irqchip_state(data, which, state);
2060
2061 irq_put_desc_busunlock(desc, flags);
2062 return err;
2063}
1ee4fb3e 2064EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2065
2066/**
2067 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2068 * @irq: Interrupt line that is forwarded to a VM
2069 * @which: State to be restored (one of IRQCHIP_STATE_*)
2070 * @val: Value corresponding to @which
2071 *
2072 * This call sets the internal irqchip state of an interrupt,
2073 * depending on the value of @which.
2074 *
2075 * This function should be called with preemption disabled if the
2076 * interrupt controller has per-cpu registers.
2077 */
2078int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2079 bool val)
2080{
2081 struct irq_desc *desc;
2082 struct irq_data *data;
2083 struct irq_chip *chip;
2084 unsigned long flags;
2085 int err = -EINVAL;
2086
2087 desc = irq_get_desc_buslock(irq, &flags, 0);
2088 if (!desc)
2089 return err;
2090
2091 data = irq_desc_get_irq_data(desc);
2092
2093 do {
2094 chip = irq_data_get_irq_chip(data);
2095 if (chip->irq_set_irqchip_state)
2096 break;
2097#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2098 data = data->parent_data;
2099#else
2100 data = NULL;
2101#endif
2102 } while (data);
2103
2104 if (data)
2105 err = chip->irq_set_irqchip_state(data, which, val);
2106
2107 irq_put_desc_busunlock(desc, flags);
2108 return err;
2109}
1ee4fb3e 2110EXPORT_SYMBOL_GPL(irq_set_irqchip_state);