Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/random.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
0b8f1efa YL |
18 | #include <linux/rculist.h> |
19 | #include <linux/hash.h> | |
1da177e4 LT |
20 | |
21 | #include "internals.h" | |
22 | ||
0b8f1efa YL |
23 | /* |
24 | * lockdep: we want to handle all irq_desc locks as a single lock-class: | |
25 | */ | |
48a1b10a | 26 | struct lock_class_key irq_desc_lock_class; |
0b8f1efa | 27 | |
6a6de9ef TG |
28 | /** |
29 | * handle_bad_irq - handle spurious and unhandled irqs | |
43a1dd50 HK |
30 | * @irq: the interrupt number |
31 | * @desc: description of the interrupt | |
43a1dd50 HK |
32 | * |
33 | * Handles spurious and unhandled IRQ's. It also prints a debugmessage. | |
6a6de9ef | 34 | */ |
d6c88a50 | 35 | void handle_bad_irq(unsigned int irq, struct irq_desc *desc) |
6a6de9ef | 36 | { |
43f77759 | 37 | print_irq_desc(irq, desc); |
d6c88a50 | 38 | kstat_incr_irqs_this_cpu(irq, desc); |
6a6de9ef TG |
39 | ack_bad_irq(irq); |
40 | } | |
41 | ||
1da177e4 LT |
42 | /* |
43 | * Linux has a controller-independent interrupt architecture. | |
44 | * Every controller has a 'controller-template', that is used | |
45 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 46 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
47 | * controller. Thus drivers need not be aware of the |
48 | * interrupt-controller. | |
49 | * | |
50 | * The code is designed to be easily extended with new/different | |
51 | * interrupt controllers, without having to do assembly magic or | |
52 | * having to touch the generic code. | |
53 | * | |
54 | * Controller mappings for all interrupt sources: | |
55 | */ | |
85c0f909 | 56 | int nr_irqs = NR_IRQS; |
fa42d10d | 57 | EXPORT_SYMBOL_GPL(nr_irqs); |
d60458b2 | 58 | |
0b8f1efa YL |
59 | void __init __attribute__((weak)) arch_early_irq_init(void) |
60 | { | |
61 | } | |
62 | ||
63 | #ifdef CONFIG_SPARSE_IRQ | |
64 | static struct irq_desc irq_desc_init = { | |
65 | .irq = -1, | |
66 | .status = IRQ_DISABLED, | |
67 | .chip = &no_irq_chip, | |
68 | .handle_irq = handle_bad_irq, | |
69 | .depth = 1, | |
70 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
71 | #ifdef CONFIG_SMP | |
72 | .affinity = CPU_MASK_ALL | |
73 | #endif | |
74 | }; | |
75 | ||
48a1b10a | 76 | void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr) |
0b8f1efa YL |
77 | { |
78 | unsigned long bytes; | |
79 | char *ptr; | |
80 | int node; | |
81 | ||
82 | /* Compute how many bytes we need per irq and allocate them */ | |
83 | bytes = nr * sizeof(unsigned int); | |
84 | ||
85 | node = cpu_to_node(cpu); | |
86 | ptr = kzalloc_node(bytes, GFP_ATOMIC, node); | |
87 | printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", cpu, node); | |
88 | ||
89 | if (ptr) | |
90 | desc->kstat_irqs = (unsigned int *)ptr; | |
91 | } | |
92 | ||
93 | void __attribute__((weak)) arch_init_chip_data(struct irq_desc *desc, int cpu) | |
94 | { | |
95 | } | |
96 | ||
97 | static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu) | |
98 | { | |
99 | memcpy(desc, &irq_desc_init, sizeof(struct irq_desc)); | |
100 | desc->irq = irq; | |
101 | #ifdef CONFIG_SMP | |
102 | desc->cpu = cpu; | |
103 | #endif | |
104 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); | |
105 | init_kstat_irqs(desc, cpu, nr_cpu_ids); | |
106 | if (!desc->kstat_irqs) { | |
107 | printk(KERN_ERR "can not alloc kstat_irqs\n"); | |
108 | BUG_ON(1); | |
109 | } | |
110 | arch_init_chip_data(desc, cpu); | |
111 | } | |
112 | ||
113 | /* | |
114 | * Protect the sparse_irqs: | |
115 | */ | |
48a1b10a | 116 | DEFINE_SPINLOCK(sparse_irq_lock); |
0b8f1efa YL |
117 | |
118 | struct irq_desc *irq_desc_ptrs[NR_IRQS] __read_mostly; | |
119 | ||
99d093d1 YL |
120 | static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = { |
121 | [0 ... NR_IRQS_LEGACY-1] = { | |
0b8f1efa YL |
122 | .irq = -1, |
123 | .status = IRQ_DISABLED, | |
124 | .chip = &no_irq_chip, | |
125 | .handle_irq = handle_bad_irq, | |
126 | .depth = 1, | |
127 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
128 | #ifdef CONFIG_SMP | |
129 | .affinity = CPU_MASK_ALL | |
130 | #endif | |
131 | } | |
132 | }; | |
133 | ||
134 | /* FIXME: use bootmem alloc ...*/ | |
99d093d1 | 135 | static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS]; |
0b8f1efa YL |
136 | |
137 | void __init early_irq_init(void) | |
138 | { | |
139 | struct irq_desc *desc; | |
140 | int legacy_count; | |
141 | int i; | |
142 | ||
143 | desc = irq_desc_legacy; | |
144 | legacy_count = ARRAY_SIZE(irq_desc_legacy); | |
145 | ||
146 | for (i = 0; i < legacy_count; i++) { | |
147 | desc[i].irq = i; | |
148 | desc[i].kstat_irqs = kstat_irqs_legacy[i]; | |
149 | ||
150 | irq_desc_ptrs[i] = desc + i; | |
151 | } | |
152 | ||
153 | for (i = legacy_count; i < NR_IRQS; i++) | |
154 | irq_desc_ptrs[i] = NULL; | |
155 | ||
156 | arch_early_irq_init(); | |
157 | } | |
158 | ||
159 | struct irq_desc *irq_to_desc(unsigned int irq) | |
160 | { | |
161 | return (irq < NR_IRQS) ? irq_desc_ptrs[irq] : NULL; | |
162 | } | |
163 | ||
164 | struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu) | |
165 | { | |
166 | struct irq_desc *desc; | |
167 | unsigned long flags; | |
168 | int node; | |
169 | ||
170 | if (irq >= NR_IRQS) { | |
171 | printk(KERN_WARNING "irq >= NR_IRQS in irq_to_desc_alloc: %d %d\n", | |
172 | irq, NR_IRQS); | |
173 | WARN_ON(1); | |
174 | return NULL; | |
175 | } | |
176 | ||
177 | desc = irq_desc_ptrs[irq]; | |
178 | if (desc) | |
179 | return desc; | |
180 | ||
181 | spin_lock_irqsave(&sparse_irq_lock, flags); | |
182 | ||
183 | /* We have to check it to avoid races with another CPU */ | |
184 | desc = irq_desc_ptrs[irq]; | |
185 | if (desc) | |
186 | goto out_unlock; | |
187 | ||
188 | node = cpu_to_node(cpu); | |
189 | desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node); | |
190 | printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n", | |
191 | irq, cpu, node); | |
192 | if (!desc) { | |
193 | printk(KERN_ERR "can not alloc irq_desc\n"); | |
194 | BUG_ON(1); | |
195 | } | |
196 | init_one_irq_desc(irq, desc, cpu); | |
197 | ||
198 | irq_desc_ptrs[irq] = desc; | |
199 | ||
200 | out_unlock: | |
201 | spin_unlock_irqrestore(&sparse_irq_lock, flags); | |
202 | ||
203 | return desc; | |
204 | } | |
205 | ||
f9af0e70 | 206 | #else /* !CONFIG_SPARSE_IRQ */ |
0b8f1efa | 207 | |
e729aa16 | 208 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = { |
1da177e4 | 209 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 210 | .status = IRQ_DISABLED, |
f1c2662c | 211 | .chip = &no_irq_chip, |
7a55713a | 212 | .handle_irq = handle_bad_irq, |
94d39e1f | 213 | .depth = 1, |
aac3f2b6 | 214 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), |
a53da52f IM |
215 | #ifdef CONFIG_SMP |
216 | .affinity = CPU_MASK_ALL | |
217 | #endif | |
1da177e4 LT |
218 | } |
219 | }; | |
08678b08 | 220 | |
f9af0e70 KM |
221 | struct irq_desc *irq_to_desc(unsigned int irq) |
222 | { | |
223 | return (irq < NR_IRQS) ? irq_desc + irq : NULL; | |
224 | } | |
225 | ||
226 | struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu) | |
227 | { | |
228 | return irq_to_desc(irq); | |
229 | } | |
230 | #endif /* !CONFIG_SPARSE_IRQ */ | |
0b8f1efa | 231 | |
1da177e4 | 232 | /* |
77a5afec IM |
233 | * What should we do if we get a hw irq event on an illegal vector? |
234 | * Each architecture has to answer this themself. | |
1da177e4 | 235 | */ |
77a5afec | 236 | static void ack_bad(unsigned int irq) |
1da177e4 | 237 | { |
d3c60047 | 238 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 239 | |
08678b08 | 240 | print_irq_desc(irq, desc); |
1da177e4 LT |
241 | ack_bad_irq(irq); |
242 | } | |
243 | ||
77a5afec IM |
244 | /* |
245 | * NOP functions | |
246 | */ | |
247 | static void noop(unsigned int irq) | |
248 | { | |
249 | } | |
250 | ||
251 | static unsigned int noop_ret(unsigned int irq) | |
252 | { | |
253 | return 0; | |
254 | } | |
255 | ||
256 | /* | |
257 | * Generic no controller implementation | |
258 | */ | |
f1c2662c IM |
259 | struct irq_chip no_irq_chip = { |
260 | .name = "none", | |
77a5afec IM |
261 | .startup = noop_ret, |
262 | .shutdown = noop, | |
263 | .enable = noop, | |
264 | .disable = noop, | |
265 | .ack = ack_bad, | |
266 | .end = noop, | |
1da177e4 LT |
267 | }; |
268 | ||
f8b5473f TG |
269 | /* |
270 | * Generic dummy implementation which can be used for | |
271 | * real dumb interrupt sources | |
272 | */ | |
273 | struct irq_chip dummy_irq_chip = { | |
274 | .name = "dummy", | |
275 | .startup = noop_ret, | |
276 | .shutdown = noop, | |
277 | .enable = noop, | |
278 | .disable = noop, | |
279 | .ack = noop, | |
280 | .mask = noop, | |
281 | .unmask = noop, | |
282 | .end = noop, | |
283 | }; | |
284 | ||
1da177e4 LT |
285 | /* |
286 | * Special, empty irq handler: | |
287 | */ | |
7d12e780 | 288 | irqreturn_t no_action(int cpl, void *dev_id) |
1da177e4 LT |
289 | { |
290 | return IRQ_NONE; | |
291 | } | |
292 | ||
8d28bc75 IM |
293 | /** |
294 | * handle_IRQ_event - irq action chain handler | |
295 | * @irq: the interrupt number | |
8d28bc75 IM |
296 | * @action: the interrupt action chain for this irq |
297 | * | |
298 | * Handles the action chain of an irq event | |
1da177e4 | 299 | */ |
7d12e780 | 300 | irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action) |
1da177e4 | 301 | { |
908dcecd JB |
302 | irqreturn_t ret, retval = IRQ_NONE; |
303 | unsigned int status = 0; | |
1da177e4 | 304 | |
3cca53b0 | 305 | if (!(action->flags & IRQF_DISABLED)) |
366c7f55 | 306 | local_irq_enable_in_hardirq(); |
1da177e4 LT |
307 | |
308 | do { | |
7d12e780 | 309 | ret = action->handler(irq, action->dev_id); |
1da177e4 LT |
310 | if (ret == IRQ_HANDLED) |
311 | status |= action->flags; | |
312 | retval |= ret; | |
313 | action = action->next; | |
314 | } while (action); | |
315 | ||
3cca53b0 | 316 | if (status & IRQF_SAMPLE_RANDOM) |
1da177e4 LT |
317 | add_interrupt_randomness(irq); |
318 | local_irq_disable(); | |
319 | ||
320 | return retval; | |
321 | } | |
322 | ||
af8c65b5 | 323 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
8d28bc75 IM |
324 | /** |
325 | * __do_IRQ - original all in one highlevel IRQ handler | |
326 | * @irq: the interrupt number | |
8d28bc75 IM |
327 | * |
328 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
329 | * SMP cross-CPU interrupts have their own specific |
330 | * handlers). | |
8d28bc75 IM |
331 | * |
332 | * This is the original x86 implementation which is used for every | |
333 | * interrupt type. | |
1da177e4 | 334 | */ |
7ad5b3a5 | 335 | unsigned int __do_IRQ(unsigned int irq) |
1da177e4 | 336 | { |
08678b08 | 337 | struct irq_desc *desc = irq_to_desc(irq); |
06fcb0c6 | 338 | struct irqaction *action; |
1da177e4 LT |
339 | unsigned int status; |
340 | ||
d6c88a50 TG |
341 | kstat_incr_irqs_this_cpu(irq, desc); |
342 | ||
f26fdd59 | 343 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
344 | irqreturn_t action_ret; |
345 | ||
346 | /* | |
347 | * No locking required for CPU-local interrupts: | |
348 | */ | |
48a1b10a | 349 | if (desc->chip->ack) { |
d1bef4ed | 350 | desc->chip->ack(irq); |
48a1b10a YL |
351 | /* get new one */ |
352 | desc = irq_remap_to_desc(irq, desc); | |
353 | } | |
c642b839 RA |
354 | if (likely(!(desc->status & IRQ_DISABLED))) { |
355 | action_ret = handle_IRQ_event(irq, desc->action); | |
356 | if (!noirqdebug) | |
357 | note_interrupt(irq, desc, action_ret); | |
358 | } | |
d1bef4ed | 359 | desc->chip->end(irq); |
1da177e4 LT |
360 | return 1; |
361 | } | |
362 | ||
363 | spin_lock(&desc->lock); | |
48a1b10a | 364 | if (desc->chip->ack) { |
d1bef4ed | 365 | desc->chip->ack(irq); |
48a1b10a YL |
366 | desc = irq_remap_to_desc(irq, desc); |
367 | } | |
1da177e4 LT |
368 | /* |
369 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
370 | * WAITING is used by probe to mark irqs that are being tested | |
371 | */ | |
372 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
373 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
374 | ||
375 | /* | |
376 | * If the IRQ is disabled for whatever reason, we cannot | |
377 | * use the action we have. | |
378 | */ | |
379 | action = NULL; | |
380 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
381 | action = desc->action; | |
382 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
383 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
384 | } | |
385 | desc->status = status; | |
386 | ||
387 | /* | |
388 | * If there is no IRQ handler or it was disabled, exit early. | |
389 | * Since we set PENDING, if another processor is handling | |
390 | * a different instance of this same irq, the other processor | |
391 | * will take care of it. | |
392 | */ | |
393 | if (unlikely(!action)) | |
394 | goto out; | |
395 | ||
396 | /* | |
397 | * Edge triggered interrupts need to remember | |
398 | * pending events. | |
399 | * This applies to any hw interrupts that allow a second | |
400 | * instance of the same irq to arrive while we are in do_IRQ | |
401 | * or in the handler. But the code here only handles the _second_ | |
402 | * instance of the irq, not the third or fourth. So it is mostly | |
403 | * useful for irq hardware that does not mask cleanly in an | |
404 | * SMP environment. | |
405 | */ | |
406 | for (;;) { | |
407 | irqreturn_t action_ret; | |
408 | ||
409 | spin_unlock(&desc->lock); | |
410 | ||
7d12e780 | 411 | action_ret = handle_IRQ_event(irq, action); |
1da177e4 | 412 | if (!noirqdebug) |
7d12e780 | 413 | note_interrupt(irq, desc, action_ret); |
b42172fc LT |
414 | |
415 | spin_lock(&desc->lock); | |
1da177e4 LT |
416 | if (likely(!(desc->status & IRQ_PENDING))) |
417 | break; | |
418 | desc->status &= ~IRQ_PENDING; | |
419 | } | |
420 | desc->status &= ~IRQ_INPROGRESS; | |
421 | ||
422 | out: | |
423 | /* | |
424 | * The ->end() handler has to deal with interrupts which got | |
425 | * disabled while the handler was running. | |
426 | */ | |
d1bef4ed | 427 | desc->chip->end(irq); |
1da177e4 LT |
428 | spin_unlock(&desc->lock); |
429 | ||
430 | return 1; | |
431 | } | |
af8c65b5 | 432 | #endif |
1da177e4 | 433 | |
243c7621 IM |
434 | void early_init_irq_lock_class(void) |
435 | { | |
10e58084 | 436 | struct irq_desc *desc; |
243c7621 IM |
437 | int i; |
438 | ||
0b8f1efa YL |
439 | for_each_irq_desc(i, desc) { |
440 | if (!desc) | |
441 | continue; | |
442 | ||
10e58084 | 443 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); |
0b8f1efa | 444 | } |
0b8f1efa | 445 | } |
0b8f1efa YL |
446 | |
447 | #ifdef CONFIG_SPARSE_IRQ | |
448 | unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) | |
449 | { | |
450 | struct irq_desc *desc = irq_to_desc(irq); | |
451 | return desc->kstat_irqs[cpu]; | |
243c7621 | 452 | } |
243c7621 | 453 | #endif |
0b8f1efa YL |
454 | EXPORT_SYMBOL(kstat_irqs_cpu); |
455 |