[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / handle.c

/*
 * linux/kernel/irq/handle.c
 *
 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
 *
 * This file contains the core interrupt handling code.
 *
 * Detailed information is available in Documentation/DocBook/genericirq
 *
 */

#include <linux/irq.h>
#include <linux/module.h>
#include <linux/random.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/rculist.h>
#include <linux/hash.h>

#include "internals.h"

/*
 * lockdep: we want to handle all irq_desc locks as a single lock-class:
 */
struct lock_class_key irq_desc_lock_class;

/**
 * handle_bad_irq - handle spurious and unhandled irqs
 * @irq:       the interrupt number
 * @desc:      description of the interrupt
 *
 * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
 */
void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
{
	print_irq_desc(irq, desc);
	kstat_incr_irqs_this_cpu(irq, desc);
	ack_bad_irq(irq);
}

#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
static void __init init_irq_default_affinity(void)
{
	alloc_bootmem_cpumask_var(&irq_default_affinity);
	cpumask_setall(irq_default_affinity);
}
#else
static void __init init_irq_default_affinity(void)
{
}
#endif

/*
 * Linux has a controller-independent interrupt architecture.
 * Every controller has a 'controller-template', that is used
 * by the main code to do the right thing. Each driver-visible
 * interrupt source is transparently wired to the appropriate
 * controller. Thus drivers need not be aware of the
 * interrupt-controller.
 *
 * The code is designed to be easily extended with new/different
 * interrupt controllers, without having to do assembly magic or
 * having to touch the generic code.
 *
 * Controller mappings for all interrupt sources:
 */
int nr_irqs = NR_IRQS;
EXPORT_SYMBOL_GPL(nr_irqs);

#ifdef CONFIG_SPARSE_IRQ
static struct irq_desc irq_desc_init = {
	.irq	    = -1,
	.status	    = IRQ_DISABLED,
	.chip	    = &no_irq_chip,
	.handle_irq = handle_bad_irq,
	.depth      = 1,
	.lock       = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
#ifdef CONFIG_SMP
	.affinity   = CPU_MASK_ALL
#endif
};

void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
{
	unsigned long bytes;
	char *ptr;
	int node;

	/* Compute how many bytes we need per irq and allocate them */
	bytes = nr * sizeof(unsigned int);

	node = cpu_to_node(cpu);
	ptr = kzalloc_node(bytes, GFP_ATOMIC, node);
	printk(KERN_DEBUG "  alloc kstat_irqs on cpu %d node %d\n", cpu, node);

	if (ptr)
		desc->kstat_irqs = (unsigned int *)ptr;
}

static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
{
	memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));

	spin_lock_init(&desc->lock);
	desc->irq = irq;
#ifdef CONFIG_SMP
	desc->cpu = cpu;
#endif
	lockdep_set_class(&desc->lock, &irq_desc_lock_class);
	init_kstat_irqs(desc, cpu, nr_cpu_ids);
	if (!desc->kstat_irqs) {
		printk(KERN_ERR "can not alloc kstat_irqs\n");
		BUG_ON(1);
	}
	arch_init_chip_data(desc, cpu);
}

/*
 * Protect the sparse_irqs:
 */
DEFINE_SPINLOCK(sparse_irq_lock);

struct irq_desc *irq_desc_ptrs[NR_IRQS] __read_mostly;

static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
	[0 ... NR_IRQS_LEGACY-1] = {
		.irq	    = -1,
		.status	    = IRQ_DISABLED,
		.chip	    = &no_irq_chip,
		.handle_irq = handle_bad_irq,
		.depth	    = 1,
		.lock	    = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
#ifdef CONFIG_SMP
		.affinity   = CPU_MASK_ALL
#endif
	}
};

/* FIXME: use bootmem alloc ...*/
static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS];

int __init early_irq_init(void)
{
	struct irq_desc *desc;
	int legacy_count;
	int i;

	init_irq_default_affinity();

	desc = irq_desc_legacy;
	legacy_count = ARRAY_SIZE(irq_desc_legacy);

	for (i = 0; i < legacy_count; i++) {
		desc[i].irq = i;
		desc[i].kstat_irqs = kstat_irqs_legacy[i];
		lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);

		irq_desc_ptrs[i] = desc + i;
	}

	for (i = legacy_count; i < NR_IRQS; i++)
		irq_desc_ptrs[i] = NULL;

	return arch_early_irq_init();
}

struct irq_desc *irq_to_desc(unsigned int irq)
{
	return (irq < NR_IRQS) ? irq_desc_ptrs[irq] : NULL;
}

struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
{
	struct irq_desc *desc;
	unsigned long flags;
	int node;

	if (irq >= NR_IRQS) {
		printk(KERN_WARNING "irq >= NR_IRQS in irq_to_desc_alloc: %d %d\n",
				irq, NR_IRQS);
		WARN_ON(1);
		return NULL;
	}

	desc = irq_desc_ptrs[irq];
	if (desc)
		return desc;

	spin_lock_irqsave(&sparse_irq_lock, flags);

	/* We have to check it to avoid races with another CPU */
	desc = irq_desc_ptrs[irq];
	if (desc)
		goto out_unlock;

	node = cpu_to_node(cpu);
	desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
	printk(KERN_DEBUG "  alloc irq_desc for %d on cpu %d node %d\n",
		 irq, cpu, node);
	if (!desc) {
		printk(KERN_ERR "can not alloc irq_desc\n");
		BUG_ON(1);
	}
	init_one_irq_desc(irq, desc, cpu);

	irq_desc_ptrs[irq] = desc;

out_unlock:
	spin_unlock_irqrestore(&sparse_irq_lock, flags);

	return desc;
}

#else /* !CONFIG_SPARSE_IRQ */

struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
	[0 ... NR_IRQS-1] = {
		.status = IRQ_DISABLED,
		.chip = &no_irq_chip,
		.handle_irq = handle_bad_irq,
		.depth = 1,
		.lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
#ifdef CONFIG_SMP
		.affinity = CPU_MASK_ALL
#endif
	}
};

int __init early_irq_init(void)
{
	struct irq_desc *desc;
	int count;
	int i;

	init_irq_default_affinity();

	desc = irq_desc;
	count = ARRAY_SIZE(irq_desc);

	for (i = 0; i < count; i++)
		desc[i].irq = i;

	return arch_early_irq_init();
}

struct irq_desc *irq_to_desc(unsigned int irq)
{
	return (irq < NR_IRQS) ? irq_desc + irq : NULL;
}

struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
{
	return irq_to_desc(irq);
}
#endif /* !CONFIG_SPARSE_IRQ */

/*
 * What should we do if we get a hw irq event on an illegal vector?
 * Each architecture has to answer this themself.
 */
static void ack_bad(unsigned int irq)
{
	struct irq_desc *desc = irq_to_desc(irq);

	print_irq_desc(irq, desc);
	ack_bad_irq(irq);
}

/*
 * NOP functions
 */
static void noop(unsigned int irq)
{
}

static unsigned int noop_ret(unsigned int irq)
{
	return 0;
}

/*
 * Generic no controller implementation
 */
struct irq_chip no_irq_chip = {
	.name		= "none",
	.startup	= noop_ret,
	.shutdown	= noop,
	.enable		= noop,
	.disable	= noop,
	.ack		= ack_bad,
	.end		= noop,
};

/*
 * Generic dummy implementation which can be used for
 * real dumb interrupt sources
 */
struct irq_chip dummy_irq_chip = {
	.name		= "dummy",
	.startup	= noop_ret,
	.shutdown	= noop,
	.enable		= noop,
	.disable	= noop,
	.ack		= noop,
	.mask		= noop,
	.unmask		= noop,
	.end		= noop,
};

/*
 * Special, empty irq handler:
 */
irqreturn_t no_action(int cpl, void *dev_id)
{
	return IRQ_NONE;
}

/**
 * handle_IRQ_event - irq action chain handler
 * @irq:	the interrupt number
 * @action:	the interrupt action chain for this irq
 *
 * Handles the action chain of an irq event
 */
irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
{
	irqreturn_t ret, retval = IRQ_NONE;
	unsigned int status = 0;

	WARN_ONCE(!in_irq(), "BUG: IRQ handler called from non-hardirq context!");

	if (!(action->flags & IRQF_DISABLED))
		local_irq_enable_in_hardirq();

	do {
		ret = action->handler(irq, action->dev_id);
		if (ret == IRQ_HANDLED)
			status |= action->flags;
		retval |= ret;
		action = action->next;
	} while (action);

	if (status & IRQF_SAMPLE_RANDOM)
		add_interrupt_randomness(irq);
	local_irq_disable();

	return retval;
}

#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
/**
 * __do_IRQ - original all in one highlevel IRQ handler
 * @irq:	the interrupt number
 *
 * __do_IRQ handles all normal device IRQ's (the special
 * SMP cross-CPU interrupts have their own specific
 * handlers).
 *
 * This is the original x86 implementation which is used for every
 * interrupt type.
 */
unsigned int __do_IRQ(unsigned int irq)
{
	struct irq_desc *desc = irq_to_desc(irq);
	struct irqaction *action;
	unsigned int status;

	kstat_incr_irqs_this_cpu(irq, desc);

	if (CHECK_IRQ_PER_CPU(desc->status)) {
		irqreturn_t action_ret;

		/*
		 * No locking required for CPU-local interrupts:
		 */
		if (desc->chip->ack) {
			desc->chip->ack(irq);
			/* get new one */
			desc = irq_remap_to_desc(irq, desc);
		}
		if (likely(!(desc->status & IRQ_DISABLED))) {
			action_ret = handle_IRQ_event(irq, desc->action);
			if (!noirqdebug)
				note_interrupt(irq, desc, action_ret);
		}
		desc->chip->end(irq);
		return 1;
	}

	spin_lock(&desc->lock);
	if (desc->chip->ack) {
		desc->chip->ack(irq);
		desc = irq_remap_to_desc(irq, desc);
	}
	/*
	 * REPLAY is when Linux resends an IRQ that was dropped earlier
	 * WAITING is used by probe to mark irqs that are being tested
	 */
	status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
	status |= IRQ_PENDING; /* we _want_ to handle it */

	/*
	 * If the IRQ is disabled for whatever reason, we cannot
	 * use the action we have.
	 */
	action = NULL;
	if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
		action = desc->action;
		status &= ~IRQ_PENDING; /* we commit to handling */
		status |= IRQ_INPROGRESS; /* we are handling it */
	}
	desc->status = status;

	/*
	 * If there is no IRQ handler or it was disabled, exit early.
	 * Since we set PENDING, if another processor is handling
	 * a different instance of this same irq, the other processor
	 * will take care of it.
	 */
	if (unlikely(!action))
		goto out;

	/*
	 * Edge triggered interrupts need to remember
	 * pending events.
	 * This applies to any hw interrupts that allow a second
	 * instance of the same irq to arrive while we are in do_IRQ
	 * or in the handler. But the code here only handles the _second_
	 * instance of the irq, not the third or fourth. So it is mostly
	 * useful for irq hardware that does not mask cleanly in an
	 * SMP environment.
	 */
	for (;;) {
		irqreturn_t action_ret;

		spin_unlock(&desc->lock);

		action_ret = handle_IRQ_event(irq, action);
		if (!noirqdebug)
			note_interrupt(irq, desc, action_ret);

		spin_lock(&desc->lock);
		if (likely(!(desc->status & IRQ_PENDING)))
			break;
		desc->status &= ~IRQ_PENDING;
	}
	desc->status &= ~IRQ_INPROGRESS;

out:
	/*
	 * The ->end() handler has to deal with interrupts which got
	 * disabled while the handler was running.
	 */
	desc->chip->end(irq);
	spin_unlock(&desc->lock);

	return 1;
}
#endif

void early_init_irq_lock_class(void)
{
	struct irq_desc *desc;
	int i;

	for_each_irq_desc(i, desc) {
		lockdep_set_class(&desc->lock, &irq_desc_lock_class);
	}
}

#ifdef CONFIG_SPARSE_IRQ
unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
{
	struct irq_desc *desc = irq_to_desc(irq);
	return desc ? desc->kstat_irqs[cpu] : 0;
}
#endif
EXPORT_SYMBOL(kstat_irqs_cpu);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/kernel/irq/handle.c
	3	*
a34db9b2 IM	4	* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
a34db9b2 IM	5	* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
1da177e4 LT	6	*
1da177e4 LT	7	* This file contains the core interrupt handling code.
a34db9b2 IM	8	*
	9	* Detailed information is available in Documentation/DocBook/genericirq
	10	*
1da177e4 LT	11	*/
	12
	13	#include <linux/irq.h>
	14	#include <linux/module.h>
	15	#include <linux/random.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/kernel_stat.h>
0b8f1efa YL	18	#include <linux/rculist.h>
0b8f1efa YL	19	#include <linux/hash.h>
1da177e4 LT	20
	21	#include "internals.h"
	22
0b8f1efa YL	23	/*
	24	* lockdep: we want to handle all irq_desc locks as a single lock-class:
	25	*/
48a1b10a	26	struct lock_class_key irq_desc_lock_class;
0b8f1efa	27
6a6de9ef TG	28	/**
6a6de9ef TG	29	* handle_bad_irq - handle spurious and unhandled irqs
43a1dd50 HK	30	* @irq: the interrupt number
43a1dd50 HK	31	* @desc: description of the interrupt
43a1dd50 HK	32	*
43a1dd50 HK	33	* Handles spurious and unhandled IRQ's. It also prints a debugmessage.
6a6de9ef	34	*/
d6c88a50	35	void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
6a6de9ef	36	{
43f77759	37	print_irq_desc(irq, desc);
d6c88a50	38	kstat_incr_irqs_this_cpu(irq, desc);
6a6de9ef TG	39	ack_bad_irq(irq);
	40	}
	41
97179fd4 DD	42	#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
	43	static void __init init_irq_default_affinity(void)
	44	{
	45	alloc_bootmem_cpumask_var(&irq_default_affinity);
	46	cpumask_setall(irq_default_affinity);
	47	}
	48	#else
	49	static void __init init_irq_default_affinity(void)
	50	{
	51	}
	52	#endif
	53
1da177e4 LT	54	/*
	55	* Linux has a controller-independent interrupt architecture.
	56	* Every controller has a 'controller-template', that is used
	57	* by the main code to do the right thing. Each driver-visible
06fcb0c6	58	* interrupt source is transparently wired to the appropriate
1da177e4 LT	59	* controller. Thus drivers need not be aware of the
	60	* interrupt-controller.
	61	*
	62	* The code is designed to be easily extended with new/different
	63	* interrupt controllers, without having to do assembly magic or
	64	* having to touch the generic code.
	65	*
	66	* Controller mappings for all interrupt sources:
	67	*/
85c0f909	68	int nr_irqs = NR_IRQS;
fa42d10d	69	EXPORT_SYMBOL_GPL(nr_irqs);
d60458b2	70
0b8f1efa YL	71	#ifdef CONFIG_SPARSE_IRQ
	72	static struct irq_desc irq_desc_init = {
	73	.irq = -1,
	74	.status = IRQ_DISABLED,
	75	.chip = &no_irq_chip,
	76	.handle_irq = handle_bad_irq,
	77	.depth = 1,
	78	.lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
	79	#ifdef CONFIG_SMP
	80	.affinity = CPU_MASK_ALL
	81	#endif
	82	};
	83
48a1b10a	84	void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
0b8f1efa YL	85	{
	86	unsigned long bytes;
	87	char *ptr;
	88	int node;
	89
	90	/* Compute how many bytes we need per irq and allocate them */
	91	bytes = nr * sizeof(unsigned int);
	92
	93	node = cpu_to_node(cpu);
	94	ptr = kzalloc_node(bytes, GFP_ATOMIC, node);
	95	printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", cpu, node);
	96
	97	if (ptr)
	98	desc->kstat_irqs = (unsigned int *)ptr;
	99	}
	100
0b8f1efa YL	101	static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
	102	{
	103	memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));
793f7b12 IM	104
793f7b12 IM	105	spin_lock_init(&desc->lock);
0b8f1efa YL	106	desc->irq = irq;
	107	#ifdef CONFIG_SMP
	108	desc->cpu = cpu;
	109	#endif
	110	lockdep_set_class(&desc->lock, &irq_desc_lock_class);
	111	init_kstat_irqs(desc, cpu, nr_cpu_ids);
	112	if (!desc->kstat_irqs) {
	113	printk(KERN_ERR "can not alloc kstat_irqs\n");
	114	BUG_ON(1);
	115	}
	116	arch_init_chip_data(desc, cpu);
	117	}
	118
	119	/*
	120	* Protect the sparse_irqs:
	121	*/
48a1b10a	122	DEFINE_SPINLOCK(sparse_irq_lock);
0b8f1efa YL	123
	124	struct irq_desc *irq_desc_ptrs[NR_IRQS] __read_mostly;
	125
99d093d1 YL	126	static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
99d093d1 YL	127	[0 ... NR_IRQS_LEGACY-1] = {
0b8f1efa YL	128	.irq = -1,
	129	.status = IRQ_DISABLED,
	130	.chip = &no_irq_chip,
	131	.handle_irq = handle_bad_irq,
	132	.depth = 1,
	133	.lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
	134	#ifdef CONFIG_SMP
	135	.affinity = CPU_MASK_ALL
	136	#endif
	137	}
	138	};
	139
	140	/* FIXME: use bootmem alloc ...*/
99d093d1	141	static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS];
0b8f1efa	142
13a0c3c2	143	int __init early_irq_init(void)
0b8f1efa YL	144	{
	145	struct irq_desc *desc;
	146	int legacy_count;
	147	int i;
	148
97179fd4 DD	149	init_irq_default_affinity();
97179fd4 DD	150
0b8f1efa YL	151	desc = irq_desc_legacy;
	152	legacy_count = ARRAY_SIZE(irq_desc_legacy);
	153
	154	for (i = 0; i < legacy_count; i++) {
	155	desc[i].irq = i;
	156	desc[i].kstat_irqs = kstat_irqs_legacy[i];
fa6beb37	157	lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
0b8f1efa YL	158
	159	irq_desc_ptrs[i] = desc + i;
	160	}
	161
	162	for (i = legacy_count; i < NR_IRQS; i++)
	163	irq_desc_ptrs[i] = NULL;
	164
13a0c3c2	165	return arch_early_irq_init();
0b8f1efa YL	166	}
	167
	168	struct irq_desc *irq_to_desc(unsigned int irq)
	169	{
	170	return (irq < NR_IRQS) ? irq_desc_ptrs[irq] : NULL;
	171	}
	172
	173	struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
	174	{
	175	struct irq_desc *desc;
	176	unsigned long flags;
	177	int node;
	178
	179	if (irq >= NR_IRQS) {
	180	printk(KERN_WARNING "irq >= NR_IRQS in irq_to_desc_alloc: %d %d\n",
	181	irq, NR_IRQS);
	182	WARN_ON(1);
	183	return NULL;
	184	}
	185
	186	desc = irq_desc_ptrs[irq];
	187	if (desc)
	188	return desc;
	189
	190	spin_lock_irqsave(&sparse_irq_lock, flags);
	191
	192	/* We have to check it to avoid races with another CPU */
	193	desc = irq_desc_ptrs[irq];
	194	if (desc)
	195	goto out_unlock;
	196
	197	node = cpu_to_node(cpu);
	198	desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
	199	printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n",
	200	irq, cpu, node);
	201	if (!desc) {
	202	printk(KERN_ERR "can not alloc irq_desc\n");
	203	BUG_ON(1);
	204	}
	205	init_one_irq_desc(irq, desc, cpu);
	206
	207	irq_desc_ptrs[irq] = desc;
	208
	209	out_unlock:
	210	spin_unlock_irqrestore(&sparse_irq_lock, flags);
	211
	212	return desc;
	213	}
	214
f9af0e70	215	#else /* !CONFIG_SPARSE_IRQ */
0b8f1efa	216
e729aa16	217	struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
1da177e4	218	[0 ... NR_IRQS-1] = {
4f167fb4	219	.status = IRQ_DISABLED,
f1c2662c	220	.chip = &no_irq_chip,
7a55713a	221	.handle_irq = handle_bad_irq,
94d39e1f	222	.depth = 1,
aac3f2b6	223	.lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
a53da52f IM	224	#ifdef CONFIG_SMP
	225	.affinity = CPU_MASK_ALL
	226	#endif
1da177e4 LT	227	}
1da177e4 LT	228	};
08678b08	229
12026ea1 YL	230	int __init early_irq_init(void)
	231	{
	232	struct irq_desc *desc;
	233	int count;
	234	int i;
	235
97179fd4 DD	236	init_irq_default_affinity();
97179fd4 DD	237
12026ea1 YL	238	desc = irq_desc;
	239	count = ARRAY_SIZE(irq_desc);
	240
	241	for (i = 0; i < count; i++)
	242	desc[i].irq = i;
	243
	244	return arch_early_irq_init();
	245	}
	246
f9af0e70 KM	247	struct irq_desc *irq_to_desc(unsigned int irq)
	248	{
	249	return (irq < NR_IRQS) ? irq_desc + irq : NULL;
	250	}
	251
	252	struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
	253	{
	254	return irq_to_desc(irq);
	255	}
	256	#endif /* !CONFIG_SPARSE_IRQ */
0b8f1efa	257
1da177e4	258	/*
77a5afec IM	259	* What should we do if we get a hw irq event on an illegal vector?
77a5afec IM	260	* Each architecture has to answer this themself.
1da177e4	261	*/
77a5afec	262	static void ack_bad(unsigned int irq)
1da177e4	263	{
d3c60047	264	struct irq_desc *desc = irq_to_desc(irq);
08678b08	265
08678b08	266	print_irq_desc(irq, desc);
1da177e4 LT	267	ack_bad_irq(irq);
	268	}
	269
77a5afec IM	270	/*
	271	* NOP functions
	272	*/
	273	static void noop(unsigned int irq)
	274	{
	275	}
	276
	277	static unsigned int noop_ret(unsigned int irq)
	278	{
	279	return 0;
	280	}
	281
	282	/*
	283	* Generic no controller implementation
	284	*/
f1c2662c IM	285	struct irq_chip no_irq_chip = {
f1c2662c IM	286	.name = "none",
77a5afec IM	287	.startup = noop_ret,
	288	.shutdown = noop,
	289	.enable = noop,
	290	.disable = noop,
	291	.ack = ack_bad,
	292	.end = noop,
1da177e4 LT	293	};
1da177e4 LT	294
f8b5473f TG	295	/*
	296	* Generic dummy implementation which can be used for
	297	* real dumb interrupt sources
	298	*/
	299	struct irq_chip dummy_irq_chip = {
	300	.name = "dummy",
	301	.startup = noop_ret,
	302	.shutdown = noop,
	303	.enable = noop,
	304	.disable = noop,
	305	.ack = noop,
	306	.mask = noop,
	307	.unmask = noop,
	308	.end = noop,
	309	};
	310
1da177e4 LT	311	/*
	312	* Special, empty irq handler:
	313	*/
7d12e780	314	irqreturn_t no_action(int cpl, void *dev_id)
1da177e4 LT	315	{
	316	return IRQ_NONE;
	317	}
	318
8d28bc75 IM	319	/**
	320	* handle_IRQ_event - irq action chain handler
	321	* @irq: the interrupt number
8d28bc75 IM	322	* @action: the interrupt action chain for this irq
	323	*
	324	* Handles the action chain of an irq event
1da177e4	325	*/
7d12e780	326	irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
1da177e4	327	{
908dcecd JB	328	irqreturn_t ret, retval = IRQ_NONE;
908dcecd JB	329	unsigned int status = 0;
1da177e4	330
044d4084 PZ	331	WARN_ONCE(!in_irq(), "BUG: IRQ handler called from non-hardirq context!");
044d4084 PZ	332
3cca53b0	333	if (!(action->flags & IRQF_DISABLED))
366c7f55	334	local_irq_enable_in_hardirq();
1da177e4 LT	335
1da177e4 LT	336	do {
7d12e780	337	ret = action->handler(irq, action->dev_id);
1da177e4 LT	338	if (ret == IRQ_HANDLED)
	339	status \|= action->flags;
	340	retval \|= ret;
	341	action = action->next;
	342	} while (action);
	343
3cca53b0	344	if (status & IRQF_SAMPLE_RANDOM)
1da177e4 LT	345	add_interrupt_randomness(irq);
	346	local_irq_disable();
	347
	348	return retval;
	349	}
	350
af8c65b5	351	#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
8d28bc75 IM	352	/**
	353	* __do_IRQ - original all in one highlevel IRQ handler
	354	* @irq: the interrupt number
8d28bc75 IM	355	*
8d28bc75 IM	356	* __do_IRQ handles all normal device IRQ's (the special
1da177e4 LT	357	* SMP cross-CPU interrupts have their own specific
1da177e4 LT	358	* handlers).
8d28bc75 IM	359	*
	360	* This is the original x86 implementation which is used for every
	361	* interrupt type.
1da177e4	362	*/
7ad5b3a5	363	unsigned int __do_IRQ(unsigned int irq)
1da177e4	364	{
08678b08	365	struct irq_desc *desc = irq_to_desc(irq);
06fcb0c6	366	struct irqaction *action;
1da177e4 LT	367	unsigned int status;
1da177e4 LT	368
d6c88a50 TG	369	kstat_incr_irqs_this_cpu(irq, desc);
d6c88a50 TG	370
f26fdd59	371	if (CHECK_IRQ_PER_CPU(desc->status)) {
1da177e4 LT	372	irqreturn_t action_ret;
	373
	374	/*
	375	* No locking required for CPU-local interrupts:
	376	*/
48a1b10a	377	if (desc->chip->ack) {
d1bef4ed	378	desc->chip->ack(irq);
48a1b10a YL	379	/* get new one */
	380	desc = irq_remap_to_desc(irq, desc);
	381	}
c642b839 RA	382	if (likely(!(desc->status & IRQ_DISABLED))) {
	383	action_ret = handle_IRQ_event(irq, desc->action);
	384	if (!noirqdebug)
	385	note_interrupt(irq, desc, action_ret);
	386	}
d1bef4ed	387	desc->chip->end(irq);
1da177e4 LT	388	return 1;
	389	}
	390
	391	spin_lock(&desc->lock);
48a1b10a	392	if (desc->chip->ack) {
d1bef4ed	393	desc->chip->ack(irq);
48a1b10a YL	394	desc = irq_remap_to_desc(irq, desc);
48a1b10a YL	395	}
1da177e4 LT	396	/*
	397	* REPLAY is when Linux resends an IRQ that was dropped earlier
	398	* WAITING is used by probe to mark irqs that are being tested
	399	*/
	400	status = desc->status & ~(IRQ_REPLAY \| IRQ_WAITING);
	401	status \|= IRQ_PENDING; /* we _want_ to handle it */
	402
	403	/*
	404	* If the IRQ is disabled for whatever reason, we cannot
	405	* use the action we have.
	406	*/
	407	action = NULL;
	408	if (likely(!(status & (IRQ_DISABLED \| IRQ_INPROGRESS)))) {
	409	action = desc->action;
	410	status &= ~IRQ_PENDING; /* we commit to handling */
	411	status \|= IRQ_INPROGRESS; /* we are handling it */
	412	}
	413	desc->status = status;
	414
	415	/*
	416	* If there is no IRQ handler or it was disabled, exit early.
	417	* Since we set PENDING, if another processor is handling
	418	* a different instance of this same irq, the other processor
	419	* will take care of it.
	420	*/
	421	if (unlikely(!action))
	422	goto out;
	423
	424	/*
	425	* Edge triggered interrupts need to remember
	426	* pending events.
	427	* This applies to any hw interrupts that allow a second
	428	* instance of the same irq to arrive while we are in do_IRQ
	429	* or in the handler. But the code here only handles the _second_
	430	* instance of the irq, not the third or fourth. So it is mostly
	431	* useful for irq hardware that does not mask cleanly in an
	432	* SMP environment.
	433	*/
	434	for (;;) {
	435	irqreturn_t action_ret;
	436
	437	spin_unlock(&desc->lock);
	438
7d12e780	439	action_ret = handle_IRQ_event(irq, action);
1da177e4	440	if (!noirqdebug)
7d12e780	441	note_interrupt(irq, desc, action_ret);
b42172fc LT	442
b42172fc LT	443	spin_lock(&desc->lock);
1da177e4 LT	444	if (likely(!(desc->status & IRQ_PENDING)))
	445	break;
	446	desc->status &= ~IRQ_PENDING;
	447	}
	448	desc->status &= ~IRQ_INPROGRESS;
	449
	450	out:
	451	/*
	452	* The ->end() handler has to deal with interrupts which got
	453	* disabled while the handler was running.
	454	*/
d1bef4ed	455	desc->chip->end(irq);
1da177e4 LT	456	spin_unlock(&desc->lock);
	457
	458	return 1;
	459	}
af8c65b5	460	#endif
1da177e4	461
243c7621 IM	462	void early_init_irq_lock_class(void)
243c7621 IM	463	{
10e58084	464	struct irq_desc *desc;
243c7621 IM	465	int i;
243c7621 IM	466
0b8f1efa	467	for_each_irq_desc(i, desc) {
10e58084	468	lockdep_set_class(&desc->lock, &irq_desc_lock_class);
0b8f1efa	469	}
0b8f1efa	470	}
0b8f1efa YL	471
	472	#ifdef CONFIG_SPARSE_IRQ
	473	unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
	474	{
	475	struct irq_desc *desc = irq_to_desc(irq);
26ddd8d5	476	return desc ? desc->kstat_irqs[cpu] : 0;
243c7621	477	}
243c7621	478	#endif
0b8f1efa YL	479	EXPORT_SYMBOL(kstat_irqs_cpu);
0b8f1efa YL	480