irq: initialize nr_irqs based on nr_cpu_ids
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / handle.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/handle.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
1da177e4
LT
6 *
7 * This file contains the core interrupt handling code.
a34db9b2
IM
8 *
9 * Detailed information is available in Documentation/DocBook/genericirq
10 *
1da177e4
LT
11 */
12
13#include <linux/irq.h>
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
0b8f1efa
YL
18#include <linux/rculist.h>
19#include <linux/hash.h>
0fa0ebbf 20#include <linux/bootmem.h>
1da177e4
LT
21
22#include "internals.h"
23
0b8f1efa
YL
24/*
25 * lockdep: we want to handle all irq_desc locks as a single lock-class:
26 */
48a1b10a 27struct lock_class_key irq_desc_lock_class;
0b8f1efa 28
6a6de9ef
TG
29/**
30 * handle_bad_irq - handle spurious and unhandled irqs
43a1dd50
HK
31 * @irq: the interrupt number
32 * @desc: description of the interrupt
43a1dd50
HK
33 *
34 * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
6a6de9ef 35 */
d6c88a50 36void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
6a6de9ef 37{
43f77759 38 print_irq_desc(irq, desc);
d6c88a50 39 kstat_incr_irqs_this_cpu(irq, desc);
6a6de9ef
TG
40 ack_bad_irq(irq);
41}
42
1da177e4
LT
43/*
44 * Linux has a controller-independent interrupt architecture.
45 * Every controller has a 'controller-template', that is used
46 * by the main code to do the right thing. Each driver-visible
06fcb0c6 47 * interrupt source is transparently wired to the appropriate
1da177e4
LT
48 * controller. Thus drivers need not be aware of the
49 * interrupt-controller.
50 *
51 * The code is designed to be easily extended with new/different
52 * interrupt controllers, without having to do assembly magic or
53 * having to touch the generic code.
54 *
55 * Controller mappings for all interrupt sources:
56 */
85c0f909 57int nr_irqs = NR_IRQS;
fa42d10d 58EXPORT_SYMBOL_GPL(nr_irqs);
d60458b2 59
0b8f1efa
YL
60#ifdef CONFIG_SPARSE_IRQ
61static struct irq_desc irq_desc_init = {
62 .irq = -1,
63 .status = IRQ_DISABLED,
64 .chip = &no_irq_chip,
65 .handle_irq = handle_bad_irq,
66 .depth = 1,
67 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
0b8f1efa
YL
68};
69
48a1b10a 70void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
0b8f1efa
YL
71{
72 unsigned long bytes;
73 char *ptr;
74 int node;
75
76 /* Compute how many bytes we need per irq and allocate them */
77 bytes = nr * sizeof(unsigned int);
78
79 node = cpu_to_node(cpu);
80 ptr = kzalloc_node(bytes, GFP_ATOMIC, node);
81 printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", cpu, node);
82
83 if (ptr)
84 desc->kstat_irqs = (unsigned int *)ptr;
85}
86
0b8f1efa
YL
87static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
88{
89 memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));
793f7b12
IM
90
91 spin_lock_init(&desc->lock);
0b8f1efa
YL
92 desc->irq = irq;
93#ifdef CONFIG_SMP
94 desc->cpu = cpu;
95#endif
96 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
97 init_kstat_irqs(desc, cpu, nr_cpu_ids);
98 if (!desc->kstat_irqs) {
99 printk(KERN_ERR "can not alloc kstat_irqs\n");
100 BUG_ON(1);
101 }
802bf931 102 if (!init_alloc_desc_masks(desc, cpu, false)) {
7f7ace0c
MT
103 printk(KERN_ERR "can not alloc irq_desc cpumasks\n");
104 BUG_ON(1);
105 }
0b8f1efa
YL
106 arch_init_chip_data(desc, cpu);
107}
108
109/*
110 * Protect the sparse_irqs:
111 */
48a1b10a 112DEFINE_SPINLOCK(sparse_irq_lock);
0b8f1efa 113
0fa0ebbf 114struct irq_desc **irq_desc_ptrs __read_mostly;
0b8f1efa 115
99d093d1
YL
116static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
117 [0 ... NR_IRQS_LEGACY-1] = {
0b8f1efa
YL
118 .irq = -1,
119 .status = IRQ_DISABLED,
120 .chip = &no_irq_chip,
121 .handle_irq = handle_bad_irq,
122 .depth = 1,
123 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
0b8f1efa
YL
124 }
125};
126
127/* FIXME: use bootmem alloc ...*/
99d093d1 128static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS];
0b8f1efa 129
13a0c3c2 130int __init early_irq_init(void)
0b8f1efa
YL
131{
132 struct irq_desc *desc;
133 int legacy_count;
134 int i;
135
9332fccd
MT
136 /* initialize nr_irqs based on nr_cpu_ids */
137 nr_irqs = max_nr_irqs(nr_cpu_ids);
138
9594949b
MT
139 printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d\n", NR_IRQS, nr_irqs);
140
0b8f1efa
YL
141 desc = irq_desc_legacy;
142 legacy_count = ARRAY_SIZE(irq_desc_legacy);
143
0fa0ebbf
MT
144 /* allocate irq_desc_ptrs array based on nr_irqs */
145 irq_desc_ptrs = alloc_bootmem(nr_irqs * sizeof(void *));
146
0b8f1efa
YL
147 for (i = 0; i < legacy_count; i++) {
148 desc[i].irq = i;
149 desc[i].kstat_irqs = kstat_irqs_legacy[i];
fa6beb37 150 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
7f7ace0c 151 init_alloc_desc_masks(&desc[i], 0, true);
0b8f1efa
YL
152 irq_desc_ptrs[i] = desc + i;
153 }
154
9594949b 155 for (i = legacy_count; i < nr_irqs; i++)
0b8f1efa
YL
156 irq_desc_ptrs[i] = NULL;
157
13a0c3c2 158 return arch_early_irq_init();
0b8f1efa
YL
159}
160
161struct irq_desc *irq_to_desc(unsigned int irq)
162{
0fa0ebbf
MT
163 if (irq_desc_ptrs && irq < nr_irqs)
164 return irq_desc_ptrs[irq];
165
166 return NULL;
0b8f1efa
YL
167}
168
169struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
170{
171 struct irq_desc *desc;
172 unsigned long flags;
173 int node;
174
9594949b 175 if (irq >= nr_irqs) {
e2f4d065
MT
176 WARN(1, "irq (%d) >= nr_irqs (%d) in irq_to_desc_alloc\n",
177 irq, nr_irqs);
0b8f1efa
YL
178 return NULL;
179 }
180
181 desc = irq_desc_ptrs[irq];
182 if (desc)
183 return desc;
184
185 spin_lock_irqsave(&sparse_irq_lock, flags);
186
187 /* We have to check it to avoid races with another CPU */
188 desc = irq_desc_ptrs[irq];
189 if (desc)
190 goto out_unlock;
191
192 node = cpu_to_node(cpu);
193 desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
194 printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n",
195 irq, cpu, node);
196 if (!desc) {
197 printk(KERN_ERR "can not alloc irq_desc\n");
198 BUG_ON(1);
199 }
200 init_one_irq_desc(irq, desc, cpu);
201
202 irq_desc_ptrs[irq] = desc;
203
204out_unlock:
205 spin_unlock_irqrestore(&sparse_irq_lock, flags);
206
207 return desc;
208}
209
f9af0e70 210#else /* !CONFIG_SPARSE_IRQ */
0b8f1efa 211
e729aa16 212struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
1da177e4 213 [0 ... NR_IRQS-1] = {
4f167fb4 214 .status = IRQ_DISABLED,
f1c2662c 215 .chip = &no_irq_chip,
7a55713a 216 .handle_irq = handle_bad_irq,
94d39e1f 217 .depth = 1,
aac3f2b6 218 .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
1da177e4
LT
219 }
220};
08678b08 221
12026ea1
YL
222int __init early_irq_init(void)
223{
224 struct irq_desc *desc;
225 int count;
226 int i;
227
9594949b
MT
228 printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);
229
12026ea1
YL
230 desc = irq_desc;
231 count = ARRAY_SIZE(irq_desc);
232
7f7ace0c 233 for (i = 0; i < count; i++) {
12026ea1 234 desc[i].irq = i;
7f7ace0c
MT
235 init_alloc_desc_masks(&desc[i], 0, true);
236 }
12026ea1
YL
237 return arch_early_irq_init();
238}
239
f9af0e70
KM
240struct irq_desc *irq_to_desc(unsigned int irq)
241{
242 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
243}
244
245struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
246{
247 return irq_to_desc(irq);
248}
249#endif /* !CONFIG_SPARSE_IRQ */
0b8f1efa 250
1da177e4 251/*
77a5afec
IM
252 * What should we do if we get a hw irq event on an illegal vector?
253 * Each architecture has to answer this themself.
1da177e4 254 */
77a5afec 255static void ack_bad(unsigned int irq)
1da177e4 256{
d3c60047 257 struct irq_desc *desc = irq_to_desc(irq);
08678b08 258
08678b08 259 print_irq_desc(irq, desc);
1da177e4
LT
260 ack_bad_irq(irq);
261}
262
77a5afec
IM
263/*
264 * NOP functions
265 */
266static void noop(unsigned int irq)
267{
268}
269
270static unsigned int noop_ret(unsigned int irq)
271{
272 return 0;
273}
274
275/*
276 * Generic no controller implementation
277 */
f1c2662c
IM
278struct irq_chip no_irq_chip = {
279 .name = "none",
77a5afec
IM
280 .startup = noop_ret,
281 .shutdown = noop,
282 .enable = noop,
283 .disable = noop,
284 .ack = ack_bad,
285 .end = noop,
1da177e4
LT
286};
287
f8b5473f
TG
288/*
289 * Generic dummy implementation which can be used for
290 * real dumb interrupt sources
291 */
292struct irq_chip dummy_irq_chip = {
293 .name = "dummy",
294 .startup = noop_ret,
295 .shutdown = noop,
296 .enable = noop,
297 .disable = noop,
298 .ack = noop,
299 .mask = noop,
300 .unmask = noop,
301 .end = noop,
302};
303
1da177e4
LT
304/*
305 * Special, empty irq handler:
306 */
7d12e780 307irqreturn_t no_action(int cpl, void *dev_id)
1da177e4
LT
308{
309 return IRQ_NONE;
310}
311
8d28bc75
IM
312/**
313 * handle_IRQ_event - irq action chain handler
314 * @irq: the interrupt number
8d28bc75
IM
315 * @action: the interrupt action chain for this irq
316 *
317 * Handles the action chain of an irq event
1da177e4 318 */
7d12e780 319irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
1da177e4 320{
908dcecd
JB
321 irqreturn_t ret, retval = IRQ_NONE;
322 unsigned int status = 0;
1da177e4 323
3cca53b0 324 if (!(action->flags & IRQF_DISABLED))
366c7f55 325 local_irq_enable_in_hardirq();
1da177e4
LT
326
327 do {
7d12e780 328 ret = action->handler(irq, action->dev_id);
1da177e4
LT
329 if (ret == IRQ_HANDLED)
330 status |= action->flags;
331 retval |= ret;
332 action = action->next;
333 } while (action);
334
3cca53b0 335 if (status & IRQF_SAMPLE_RANDOM)
1da177e4
LT
336 add_interrupt_randomness(irq);
337 local_irq_disable();
338
339 return retval;
340}
341
af8c65b5 342#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
8d28bc75
IM
343/**
344 * __do_IRQ - original all in one highlevel IRQ handler
345 * @irq: the interrupt number
8d28bc75
IM
346 *
347 * __do_IRQ handles all normal device IRQ's (the special
1da177e4
LT
348 * SMP cross-CPU interrupts have their own specific
349 * handlers).
8d28bc75
IM
350 *
351 * This is the original x86 implementation which is used for every
352 * interrupt type.
1da177e4 353 */
7ad5b3a5 354unsigned int __do_IRQ(unsigned int irq)
1da177e4 355{
08678b08 356 struct irq_desc *desc = irq_to_desc(irq);
06fcb0c6 357 struct irqaction *action;
1da177e4
LT
358 unsigned int status;
359
d6c88a50
TG
360 kstat_incr_irqs_this_cpu(irq, desc);
361
f26fdd59 362 if (CHECK_IRQ_PER_CPU(desc->status)) {
1da177e4
LT
363 irqreturn_t action_ret;
364
365 /*
366 * No locking required for CPU-local interrupts:
367 */
48a1b10a 368 if (desc->chip->ack) {
d1bef4ed 369 desc->chip->ack(irq);
48a1b10a
YL
370 /* get new one */
371 desc = irq_remap_to_desc(irq, desc);
372 }
c642b839
RA
373 if (likely(!(desc->status & IRQ_DISABLED))) {
374 action_ret = handle_IRQ_event(irq, desc->action);
375 if (!noirqdebug)
376 note_interrupt(irq, desc, action_ret);
377 }
d1bef4ed 378 desc->chip->end(irq);
1da177e4
LT
379 return 1;
380 }
381
382 spin_lock(&desc->lock);
48a1b10a 383 if (desc->chip->ack) {
d1bef4ed 384 desc->chip->ack(irq);
48a1b10a
YL
385 desc = irq_remap_to_desc(irq, desc);
386 }
1da177e4
LT
387 /*
388 * REPLAY is when Linux resends an IRQ that was dropped earlier
389 * WAITING is used by probe to mark irqs that are being tested
390 */
391 status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
392 status |= IRQ_PENDING; /* we _want_ to handle it */
393
394 /*
395 * If the IRQ is disabled for whatever reason, we cannot
396 * use the action we have.
397 */
398 action = NULL;
399 if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
400 action = desc->action;
401 status &= ~IRQ_PENDING; /* we commit to handling */
402 status |= IRQ_INPROGRESS; /* we are handling it */
403 }
404 desc->status = status;
405
406 /*
407 * If there is no IRQ handler or it was disabled, exit early.
408 * Since we set PENDING, if another processor is handling
409 * a different instance of this same irq, the other processor
410 * will take care of it.
411 */
412 if (unlikely(!action))
413 goto out;
414
415 /*
416 * Edge triggered interrupts need to remember
417 * pending events.
418 * This applies to any hw interrupts that allow a second
419 * instance of the same irq to arrive while we are in do_IRQ
420 * or in the handler. But the code here only handles the _second_
421 * instance of the irq, not the third or fourth. So it is mostly
422 * useful for irq hardware that does not mask cleanly in an
423 * SMP environment.
424 */
425 for (;;) {
426 irqreturn_t action_ret;
427
428 spin_unlock(&desc->lock);
429
7d12e780 430 action_ret = handle_IRQ_event(irq, action);
1da177e4 431 if (!noirqdebug)
7d12e780 432 note_interrupt(irq, desc, action_ret);
b42172fc
LT
433
434 spin_lock(&desc->lock);
1da177e4
LT
435 if (likely(!(desc->status & IRQ_PENDING)))
436 break;
437 desc->status &= ~IRQ_PENDING;
438 }
439 desc->status &= ~IRQ_INPROGRESS;
440
441out:
442 /*
443 * The ->end() handler has to deal with interrupts which got
444 * disabled while the handler was running.
445 */
d1bef4ed 446 desc->chip->end(irq);
1da177e4
LT
447 spin_unlock(&desc->lock);
448
449 return 1;
450}
af8c65b5 451#endif
1da177e4 452
243c7621
IM
453void early_init_irq_lock_class(void)
454{
10e58084 455 struct irq_desc *desc;
243c7621
IM
456 int i;
457
0b8f1efa 458 for_each_irq_desc(i, desc) {
10e58084 459 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
0b8f1efa 460 }
0b8f1efa 461}
0b8f1efa
YL
462
463#ifdef CONFIG_SPARSE_IRQ
464unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
465{
466 struct irq_desc *desc = irq_to_desc(irq);
26ddd8d5 467 return desc ? desc->kstat_irqs[cpu] : 0;
243c7621 468}
243c7621 469#endif
0b8f1efa
YL
470EXPORT_SYMBOL(kstat_irqs_cpu);
471