[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / handle.c

/*
 * linux/kernel/irq/handle.c
 *
 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
 *
 * This file contains the core interrupt handling code.
 *
 * Detailed information is available in Documentation/DocBook/genericirq
 *
 */

#include <linux/irq.h>
#include <linux/module.h>
#include <linux/random.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/rculist.h>
#include <linux/hash.h>

#include "internals.h"

/*
 * lockdep: we want to handle all irq_desc locks as a single lock-class:
 */
struct lock_class_key irq_desc_lock_class;

/**
 * handle_bad_irq - handle spurious and unhandled irqs
 * @irq:       the interrupt number
 * @desc:      description of the interrupt
 *
 * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
 */
void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
{
	print_irq_desc(irq, desc);
	kstat_incr_irqs_this_cpu(irq, desc);
	ack_bad_irq(irq);
}

/*
 * Linux has a controller-independent interrupt architecture.
 * Every controller has a 'controller-template', that is used
 * by the main code to do the right thing. Each driver-visible
 * interrupt source is transparently wired to the appropriate
 * controller. Thus drivers need not be aware of the
 * interrupt-controller.
 *
 * The code is designed to be easily extended with new/different
 * interrupt controllers, without having to do assembly magic or
 * having to touch the generic code.
 *
 * Controller mappings for all interrupt sources:
 */
int nr_irqs = NR_IRQS;
EXPORT_SYMBOL_GPL(nr_irqs);

#ifdef CONFIG_SPARSE_IRQ
static struct irq_desc irq_desc_init = {
	.irq	    = -1,
	.status	    = IRQ_DISABLED,
	.chip	    = &no_irq_chip,
	.handle_irq = handle_bad_irq,
	.depth      = 1,
	.lock       = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
};

void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
{
	unsigned long bytes;
	char *ptr;
	int node;

	/* Compute how many bytes we need per irq and allocate them */
	bytes = nr * sizeof(unsigned int);

	node = cpu_to_node(cpu);
	ptr = kzalloc_node(bytes, GFP_ATOMIC, node);
	printk(KERN_DEBUG "  alloc kstat_irqs on cpu %d node %d\n", cpu, node);

	if (ptr)
		desc->kstat_irqs = (unsigned int *)ptr;
}

static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
{
	int node = cpu_to_node(cpu);

	memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));

	spin_lock_init(&desc->lock);
	desc->irq = irq;
#ifdef CONFIG_SMP
	desc->cpu = cpu;
#endif
	lockdep_set_class(&desc->lock, &irq_desc_lock_class);
	init_kstat_irqs(desc, cpu, nr_cpu_ids);
	if (!desc->kstat_irqs) {
		printk(KERN_ERR "can not alloc kstat_irqs\n");
		BUG_ON(1);
	}
	if (!init_alloc_desc_masks(desc, node, false)) {
		printk(KERN_ERR "can not alloc irq_desc cpumasks\n");
		BUG_ON(1);
	}
	arch_init_chip_data(desc, cpu);
}

/*
 * Protect the sparse_irqs:
 */
DEFINE_SPINLOCK(sparse_irq_lock);

struct irq_desc *irq_desc_ptrs[NR_IRQS] __read_mostly;

static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
	[0 ... NR_IRQS_LEGACY-1] = {
		.irq	    = -1,
		.status	    = IRQ_DISABLED,
		.chip	    = &no_irq_chip,
		.handle_irq = handle_bad_irq,
		.depth	    = 1,
		.lock	    = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
	}
};

/* FIXME: use bootmem alloc ...*/
static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS];

int __init early_irq_init(void)
{
	struct irq_desc *desc;
	int legacy_count;
	int i;

	desc = irq_desc_legacy;
	legacy_count = ARRAY_SIZE(irq_desc_legacy);

	for (i = 0; i < legacy_count; i++) {
		desc[i].irq = i;
		desc[i].kstat_irqs = kstat_irqs_legacy[i];
		lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
		init_alloc_desc_masks(&desc[i], 0, true);
		irq_desc_ptrs[i] = desc + i;
	}

	for (i = legacy_count; i < NR_IRQS; i++)
		irq_desc_ptrs[i] = NULL;

	return arch_early_irq_init();
}

struct irq_desc *irq_to_desc(unsigned int irq)
{
	return (irq < NR_IRQS) ? irq_desc_ptrs[irq] : NULL;
}

struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
{
	struct irq_desc *desc;
	unsigned long flags;
	int node;

	if (irq >= NR_IRQS) {
		printk(KERN_WARNING "irq >= NR_IRQS in irq_to_desc_alloc: %d %d\n",
				irq, NR_IRQS);
		WARN_ON(1);
		return NULL;
	}

	desc = irq_desc_ptrs[irq];
	if (desc)
		return desc;

	spin_lock_irqsave(&sparse_irq_lock, flags);

	/* We have to check it to avoid races with another CPU */
	desc = irq_desc_ptrs[irq];
	if (desc)
		goto out_unlock;

	node = cpu_to_node(cpu);
	desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
	printk(KERN_DEBUG "  alloc irq_desc for %d on cpu %d node %d\n",
		 irq, cpu, node);
	if (!desc) {
		printk(KERN_ERR "can not alloc irq_desc\n");
		BUG_ON(1);
	}
	if (!init_alloc_desc_masks(desc, node, false)) {
		printk(KERN_ERR "can not alloc irq_desc cpumasks\n");
		BUG_ON(1);
	}
	init_one_irq_desc(irq, desc, cpu);

	irq_desc_ptrs[irq] = desc;

out_unlock:
	spin_unlock_irqrestore(&sparse_irq_lock, flags);

	return desc;
}

#else /* !CONFIG_SPARSE_IRQ */

struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
	[0 ... NR_IRQS-1] = {
		.status = IRQ_DISABLED,
		.chip = &no_irq_chip,
		.handle_irq = handle_bad_irq,
		.depth = 1,
		.lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
	}
};

int __init early_irq_init(void)
{
	struct irq_desc *desc;
	int count;
	int i;

	desc = irq_desc;
	count = ARRAY_SIZE(irq_desc);

	for (i = 0; i < count; i++) {
		desc[i].irq = i;
		init_alloc_desc_masks(&desc[i], 0, true);
	}
	return arch_early_irq_init();
}

struct irq_desc *irq_to_desc(unsigned int irq)
{
	return (irq < NR_IRQS) ? irq_desc + irq : NULL;
}

struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
{
	return irq_to_desc(irq);
}
#endif /* !CONFIG_SPARSE_IRQ */

/*
 * What should we do if we get a hw irq event on an illegal vector?
 * Each architecture has to answer this themself.
 */
static void ack_bad(unsigned int irq)
{
	struct irq_desc *desc = irq_to_desc(irq);

	print_irq_desc(irq, desc);
	ack_bad_irq(irq);
}

/*
 * NOP functions
 */
static void noop(unsigned int irq)
{
}

static unsigned int noop_ret(unsigned int irq)
{
	return 0;
}

/*
 * Generic no controller implementation
 */
struct irq_chip no_irq_chip = {
	.name		= "none",
	.startup	= noop_ret,
	.shutdown	= noop,
	.enable		= noop,
	.disable	= noop,
	.ack		= ack_bad,
	.end		= noop,
};

/*
 * Generic dummy implementation which can be used for
 * real dumb interrupt sources
 */
struct irq_chip dummy_irq_chip = {
	.name		= "dummy",
	.startup	= noop_ret,
	.shutdown	= noop,
	.enable		= noop,
	.disable	= noop,
	.ack		= noop,
	.mask		= noop,
	.unmask		= noop,
	.end		= noop,
};

/*
 * Special, empty irq handler:
 */
irqreturn_t no_action(int cpl, void *dev_id)
{
	return IRQ_NONE;
}

/**
 * handle_IRQ_event - irq action chain handler
 * @irq:	the interrupt number
 * @action:	the interrupt action chain for this irq
 *
 * Handles the action chain of an irq event
 */
irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
{
	irqreturn_t ret, retval = IRQ_NONE;
	unsigned int status = 0;

	if (!(action->flags & IRQF_DISABLED))
		local_irq_enable_in_hardirq();

	do {
		ret = action->handler(irq, action->dev_id);
		if (ret == IRQ_HANDLED)
			status |= action->flags;
		retval |= ret;
		action = action->next;
	} while (action);

	if (status & IRQF_SAMPLE_RANDOM)
		add_interrupt_randomness(irq);
	local_irq_disable();

	return retval;
}

#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
/**
 * __do_IRQ - original all in one highlevel IRQ handler
 * @irq:	the interrupt number
 *
 * __do_IRQ handles all normal device IRQ's (the special
 * SMP cross-CPU interrupts have their own specific
 * handlers).
 *
 * This is the original x86 implementation which is used for every
 * interrupt type.
 */
unsigned int __do_IRQ(unsigned int irq)
{
	struct irq_desc *desc = irq_to_desc(irq);
	struct irqaction *action;
	unsigned int status;

	kstat_incr_irqs_this_cpu(irq, desc);

	if (CHECK_IRQ_PER_CPU(desc->status)) {
		irqreturn_t action_ret;

		/*
		 * No locking required for CPU-local interrupts:
		 */
		if (desc->chip->ack) {
			desc->chip->ack(irq);
			/* get new one */
			desc = irq_remap_to_desc(irq, desc);
		}
		if (likely(!(desc->status & IRQ_DISABLED))) {
			action_ret = handle_IRQ_event(irq, desc->action);
			if (!noirqdebug)
				note_interrupt(irq, desc, action_ret);
		}
		desc->chip->end(irq);
		return 1;
	}

	spin_lock(&desc->lock);
	if (desc->chip->ack) {
		desc->chip->ack(irq);
		desc = irq_remap_to_desc(irq, desc);
	}
	/*
	 * REPLAY is when Linux resends an IRQ that was dropped earlier
	 * WAITING is used by probe to mark irqs that are being tested
	 */
	status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
	status |= IRQ_PENDING; /* we _want_ to handle it */

	/*
	 * If the IRQ is disabled for whatever reason, we cannot
	 * use the action we have.
	 */
	action = NULL;
	if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
		action = desc->action;
		status &= ~IRQ_PENDING; /* we commit to handling */
		status |= IRQ_INPROGRESS; /* we are handling it */
	}
	desc->status = status;

	/*
	 * If there is no IRQ handler or it was disabled, exit early.
	 * Since we set PENDING, if another processor is handling
	 * a different instance of this same irq, the other processor
	 * will take care of it.
	 */
	if (unlikely(!action))
		goto out;

	/*
	 * Edge triggered interrupts need to remember
	 * pending events.
	 * This applies to any hw interrupts that allow a second
	 * instance of the same irq to arrive while we are in do_IRQ
	 * or in the handler. But the code here only handles the _second_
	 * instance of the irq, not the third or fourth. So it is mostly
	 * useful for irq hardware that does not mask cleanly in an
	 * SMP environment.
	 */
	for (;;) {
		irqreturn_t action_ret;

		spin_unlock(&desc->lock);

		action_ret = handle_IRQ_event(irq, action);
		if (!noirqdebug)
			note_interrupt(irq, desc, action_ret);

		spin_lock(&desc->lock);
		if (likely(!(desc->status & IRQ_PENDING)))
			break;
		desc->status &= ~IRQ_PENDING;
	}
	desc->status &= ~IRQ_INPROGRESS;

out:
	/*
	 * The ->end() handler has to deal with interrupts which got
	 * disabled while the handler was running.
	 */
	desc->chip->end(irq);
	spin_unlock(&desc->lock);

	return 1;
}
#endif

void early_init_irq_lock_class(void)
{
	struct irq_desc *desc;
	int i;

	for_each_irq_desc(i, desc) {
		lockdep_set_class(&desc->lock, &irq_desc_lock_class);
	}
}

#ifdef CONFIG_SPARSE_IRQ
unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
{
	struct irq_desc *desc = irq_to_desc(irq);
	return desc ? desc->kstat_irqs[cpu] : 0;
}
#endif
EXPORT_SYMBOL(kstat_irqs_cpu);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/kernel/irq/handle.c
	3	*
a34db9b2 IM	4	* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
a34db9b2 IM	5	* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
1da177e4 LT	6	*
1da177e4 LT	7	* This file contains the core interrupt handling code.
a34db9b2 IM	8	*
	9	* Detailed information is available in Documentation/DocBook/genericirq
	10	*
1da177e4 LT	11	*/
	12
	13	#include <linux/irq.h>
	14	#include <linux/module.h>
	15	#include <linux/random.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/kernel_stat.h>
0b8f1efa YL	18	#include <linux/rculist.h>
0b8f1efa YL	19	#include <linux/hash.h>
1da177e4 LT	20
	21	#include "internals.h"
	22
0b8f1efa YL	23	/*
	24	* lockdep: we want to handle all irq_desc locks as a single lock-class:
	25	*/
48a1b10a	26	struct lock_class_key irq_desc_lock_class;
0b8f1efa	27
6a6de9ef TG	28	/**
6a6de9ef TG	29	* handle_bad_irq - handle spurious and unhandled irqs
43a1dd50 HK	30	* @irq: the interrupt number
43a1dd50 HK	31	* @desc: description of the interrupt
43a1dd50 HK	32	*
43a1dd50 HK	33	* Handles spurious and unhandled IRQ's. It also prints a debugmessage.
6a6de9ef	34	*/
d6c88a50	35	void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
6a6de9ef	36	{
43f77759	37	print_irq_desc(irq, desc);
d6c88a50	38	kstat_incr_irqs_this_cpu(irq, desc);
6a6de9ef TG	39	ack_bad_irq(irq);
	40	}
	41
1da177e4 LT	42	/*
	43	* Linux has a controller-independent interrupt architecture.
	44	* Every controller has a 'controller-template', that is used
	45	* by the main code to do the right thing. Each driver-visible
06fcb0c6	46	* interrupt source is transparently wired to the appropriate
1da177e4 LT	47	* controller. Thus drivers need not be aware of the
	48	* interrupt-controller.
	49	*
	50	* The code is designed to be easily extended with new/different
	51	* interrupt controllers, without having to do assembly magic or
	52	* having to touch the generic code.
	53	*
	54	* Controller mappings for all interrupt sources:
	55	*/
85c0f909	56	int nr_irqs = NR_IRQS;
fa42d10d	57	EXPORT_SYMBOL_GPL(nr_irqs);
d60458b2	58
0b8f1efa YL	59	#ifdef CONFIG_SPARSE_IRQ
	60	static struct irq_desc irq_desc_init = {
	61	.irq = -1,
	62	.status = IRQ_DISABLED,
	63	.chip = &no_irq_chip,
	64	.handle_irq = handle_bad_irq,
	65	.depth = 1,
	66	.lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
0b8f1efa YL	67	};
0b8f1efa YL	68
48a1b10a	69	void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
0b8f1efa YL	70	{
	71	unsigned long bytes;
	72	char *ptr;
	73	int node;
	74
	75	/* Compute how many bytes we need per irq and allocate them */
	76	bytes = nr * sizeof(unsigned int);
	77
	78	node = cpu_to_node(cpu);
	79	ptr = kzalloc_node(bytes, GFP_ATOMIC, node);
	80	printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", cpu, node);
	81
	82	if (ptr)
	83	desc->kstat_irqs = (unsigned int *)ptr;
	84	}
	85
0b8f1efa YL	86	static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
0b8f1efa YL	87	{
7f7ace0c MT	88	int node = cpu_to_node(cpu);
7f7ace0c MT	89
0b8f1efa	90	memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));
793f7b12 IM	91
793f7b12 IM	92	spin_lock_init(&desc->lock);
0b8f1efa YL	93	desc->irq = irq;
	94	#ifdef CONFIG_SMP
	95	desc->cpu = cpu;
	96	#endif
	97	lockdep_set_class(&desc->lock, &irq_desc_lock_class);
	98	init_kstat_irqs(desc, cpu, nr_cpu_ids);
	99	if (!desc->kstat_irqs) {
	100	printk(KERN_ERR "can not alloc kstat_irqs\n");
	101	BUG_ON(1);
	102	}
7f7ace0c MT	103	if (!init_alloc_desc_masks(desc, node, false)) {
	104	printk(KERN_ERR "can not alloc irq_desc cpumasks\n");
	105	BUG_ON(1);
	106	}
0b8f1efa YL	107	arch_init_chip_data(desc, cpu);
	108	}
	109
	110	/*
	111	* Protect the sparse_irqs:
	112	*/
48a1b10a	113	DEFINE_SPINLOCK(sparse_irq_lock);
0b8f1efa YL	114
	115	struct irq_desc *irq_desc_ptrs[NR_IRQS] __read_mostly;
	116
99d093d1 YL	117	static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
99d093d1 YL	118	[0 ... NR_IRQS_LEGACY-1] = {
0b8f1efa YL	119	.irq = -1,
	120	.status = IRQ_DISABLED,
	121	.chip = &no_irq_chip,
	122	.handle_irq = handle_bad_irq,
	123	.depth = 1,
	124	.lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
0b8f1efa YL	125	}
	126	};
	127
	128	/* FIXME: use bootmem alloc ...*/
99d093d1	129	static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS];
0b8f1efa	130
13a0c3c2	131	int __init early_irq_init(void)
0b8f1efa YL	132	{
	133	struct irq_desc *desc;
	134	int legacy_count;
	135	int i;
	136
	137	desc = irq_desc_legacy;
	138	legacy_count = ARRAY_SIZE(irq_desc_legacy);
	139
	140	for (i = 0; i < legacy_count; i++) {
	141	desc[i].irq = i;
	142	desc[i].kstat_irqs = kstat_irqs_legacy[i];
fa6beb37	143	lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
7f7ace0c	144	init_alloc_desc_masks(&desc[i], 0, true);
0b8f1efa YL	145	irq_desc_ptrs[i] = desc + i;
	146	}
	147
	148	for (i = legacy_count; i < NR_IRQS; i++)
	149	irq_desc_ptrs[i] = NULL;
	150
13a0c3c2	151	return arch_early_irq_init();
0b8f1efa YL	152	}
	153
	154	struct irq_desc *irq_to_desc(unsigned int irq)
	155	{
	156	return (irq < NR_IRQS) ? irq_desc_ptrs[irq] : NULL;
	157	}
	158
	159	struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
	160	{
	161	struct irq_desc *desc;
	162	unsigned long flags;
	163	int node;
	164
	165	if (irq >= NR_IRQS) {
	166	printk(KERN_WARNING "irq >= NR_IRQS in irq_to_desc_alloc: %d %d\n",
	167	irq, NR_IRQS);
	168	WARN_ON(1);
	169	return NULL;
	170	}
	171
	172	desc = irq_desc_ptrs[irq];
	173	if (desc)
	174	return desc;
	175
	176	spin_lock_irqsave(&sparse_irq_lock, flags);
	177
	178	/* We have to check it to avoid races with another CPU */
	179	desc = irq_desc_ptrs[irq];
	180	if (desc)
	181	goto out_unlock;
	182
	183	node = cpu_to_node(cpu);
	184	desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
	185	printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n",
	186	irq, cpu, node);
	187	if (!desc) {
	188	printk(KERN_ERR "can not alloc irq_desc\n");
	189	BUG_ON(1);
	190	}
7f7ace0c MT	191	if (!init_alloc_desc_masks(desc, node, false)) {
	192	printk(KERN_ERR "can not alloc irq_desc cpumasks\n");
	193	BUG_ON(1);
	194	}
0b8f1efa YL	195	init_one_irq_desc(irq, desc, cpu);
	196
	197	irq_desc_ptrs[irq] = desc;
	198
	199	out_unlock:
	200	spin_unlock_irqrestore(&sparse_irq_lock, flags);
	201
	202	return desc;
	203	}
	204
f9af0e70	205	#else /* !CONFIG_SPARSE_IRQ */
0b8f1efa	206
e729aa16	207	struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
1da177e4	208	[0 ... NR_IRQS-1] = {
4f167fb4	209	.status = IRQ_DISABLED,
f1c2662c	210	.chip = &no_irq_chip,
7a55713a	211	.handle_irq = handle_bad_irq,
94d39e1f	212	.depth = 1,
aac3f2b6	213	.lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
1da177e4 LT	214	}
1da177e4 LT	215	};
08678b08	216
12026ea1 YL	217	int __init early_irq_init(void)
	218	{
	219	struct irq_desc *desc;
	220	int count;
	221	int i;
	222
	223	desc = irq_desc;
	224	count = ARRAY_SIZE(irq_desc);
	225
7f7ace0c	226	for (i = 0; i < count; i++) {
12026ea1	227	desc[i].irq = i;
7f7ace0c MT	228	init_alloc_desc_masks(&desc[i], 0, true);
7f7ace0c MT	229	}
12026ea1 YL	230	return arch_early_irq_init();
	231	}
	232
f9af0e70 KM	233	struct irq_desc *irq_to_desc(unsigned int irq)
	234	{
	235	return (irq < NR_IRQS) ? irq_desc + irq : NULL;
	236	}
	237
	238	struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
	239	{
	240	return irq_to_desc(irq);
	241	}
	242	#endif /* !CONFIG_SPARSE_IRQ */
0b8f1efa	243
1da177e4	244	/*
77a5afec IM	245	* What should we do if we get a hw irq event on an illegal vector?
77a5afec IM	246	* Each architecture has to answer this themself.
1da177e4	247	*/
77a5afec	248	static void ack_bad(unsigned int irq)
1da177e4	249	{
d3c60047	250	struct irq_desc *desc = irq_to_desc(irq);
08678b08	251
08678b08	252	print_irq_desc(irq, desc);
1da177e4 LT	253	ack_bad_irq(irq);
	254	}
	255
77a5afec IM	256	/*
	257	* NOP functions
	258	*/
	259	static void noop(unsigned int irq)
	260	{
	261	}
	262
	263	static unsigned int noop_ret(unsigned int irq)
	264	{
	265	return 0;
	266	}
	267
	268	/*
	269	* Generic no controller implementation
	270	*/
f1c2662c IM	271	struct irq_chip no_irq_chip = {
f1c2662c IM	272	.name = "none",
77a5afec IM	273	.startup = noop_ret,
	274	.shutdown = noop,
	275	.enable = noop,
	276	.disable = noop,
	277	.ack = ack_bad,
	278	.end = noop,
1da177e4 LT	279	};
1da177e4 LT	280
f8b5473f TG	281	/*
	282	* Generic dummy implementation which can be used for
	283	* real dumb interrupt sources
	284	*/
	285	struct irq_chip dummy_irq_chip = {
	286	.name = "dummy",
	287	.startup = noop_ret,
	288	.shutdown = noop,
	289	.enable = noop,
	290	.disable = noop,
	291	.ack = noop,
	292	.mask = noop,
	293	.unmask = noop,
	294	.end = noop,
	295	};
	296
1da177e4 LT	297	/*
	298	* Special, empty irq handler:
	299	*/
7d12e780	300	irqreturn_t no_action(int cpl, void *dev_id)
1da177e4 LT	301	{
	302	return IRQ_NONE;
	303	}
	304
8d28bc75 IM	305	/**
	306	* handle_IRQ_event - irq action chain handler
	307	* @irq: the interrupt number
8d28bc75 IM	308	* @action: the interrupt action chain for this irq
	309	*
	310	* Handles the action chain of an irq event
1da177e4	311	*/
7d12e780	312	irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
1da177e4	313	{
908dcecd JB	314	irqreturn_t ret, retval = IRQ_NONE;
908dcecd JB	315	unsigned int status = 0;
1da177e4	316
3cca53b0	317	if (!(action->flags & IRQF_DISABLED))
366c7f55	318	local_irq_enable_in_hardirq();
1da177e4 LT	319
1da177e4 LT	320	do {
7d12e780	321	ret = action->handler(irq, action->dev_id);
1da177e4 LT	322	if (ret == IRQ_HANDLED)
	323	status \|= action->flags;
	324	retval \|= ret;
	325	action = action->next;
	326	} while (action);
	327
3cca53b0	328	if (status & IRQF_SAMPLE_RANDOM)
1da177e4 LT	329	add_interrupt_randomness(irq);
	330	local_irq_disable();
	331
	332	return retval;
	333	}
	334
af8c65b5	335	#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
8d28bc75 IM	336	/**
	337	* __do_IRQ - original all in one highlevel IRQ handler
	338	* @irq: the interrupt number
8d28bc75 IM	339	*
8d28bc75 IM	340	* __do_IRQ handles all normal device IRQ's (the special
1da177e4 LT	341	* SMP cross-CPU interrupts have their own specific
1da177e4 LT	342	* handlers).
8d28bc75 IM	343	*
	344	* This is the original x86 implementation which is used for every
	345	* interrupt type.
1da177e4	346	*/
7ad5b3a5	347	unsigned int __do_IRQ(unsigned int irq)
1da177e4	348	{
08678b08	349	struct irq_desc *desc = irq_to_desc(irq);
06fcb0c6	350	struct irqaction *action;
1da177e4 LT	351	unsigned int status;
1da177e4 LT	352
d6c88a50 TG	353	kstat_incr_irqs_this_cpu(irq, desc);
d6c88a50 TG	354
f26fdd59	355	if (CHECK_IRQ_PER_CPU(desc->status)) {
1da177e4 LT	356	irqreturn_t action_ret;
	357
	358	/*
	359	* No locking required for CPU-local interrupts:
	360	*/
48a1b10a	361	if (desc->chip->ack) {
d1bef4ed	362	desc->chip->ack(irq);
48a1b10a YL	363	/* get new one */
	364	desc = irq_remap_to_desc(irq, desc);
	365	}
c642b839 RA	366	if (likely(!(desc->status & IRQ_DISABLED))) {
	367	action_ret = handle_IRQ_event(irq, desc->action);
	368	if (!noirqdebug)
	369	note_interrupt(irq, desc, action_ret);
	370	}
d1bef4ed	371	desc->chip->end(irq);
1da177e4 LT	372	return 1;
	373	}
	374
	375	spin_lock(&desc->lock);
48a1b10a	376	if (desc->chip->ack) {
d1bef4ed	377	desc->chip->ack(irq);
48a1b10a YL	378	desc = irq_remap_to_desc(irq, desc);
48a1b10a YL	379	}
1da177e4 LT	380	/*
	381	* REPLAY is when Linux resends an IRQ that was dropped earlier
	382	* WAITING is used by probe to mark irqs that are being tested
	383	*/
	384	status = desc->status & ~(IRQ_REPLAY \| IRQ_WAITING);
	385	status \|= IRQ_PENDING; /* we _want_ to handle it */
	386
	387	/*
	388	* If the IRQ is disabled for whatever reason, we cannot
	389	* use the action we have.
	390	*/
	391	action = NULL;
	392	if (likely(!(status & (IRQ_DISABLED \| IRQ_INPROGRESS)))) {
	393	action = desc->action;
	394	status &= ~IRQ_PENDING; /* we commit to handling */
	395	status \|= IRQ_INPROGRESS; /* we are handling it */
	396	}
	397	desc->status = status;
	398
	399	/*
	400	* If there is no IRQ handler or it was disabled, exit early.
	401	* Since we set PENDING, if another processor is handling
	402	* a different instance of this same irq, the other processor
	403	* will take care of it.
	404	*/
	405	if (unlikely(!action))
	406	goto out;
	407
	408	/*
	409	* Edge triggered interrupts need to remember
	410	* pending events.
	411	* This applies to any hw interrupts that allow a second
	412	* instance of the same irq to arrive while we are in do_IRQ
	413	* or in the handler. But the code here only handles the _second_
	414	* instance of the irq, not the third or fourth. So it is mostly
	415	* useful for irq hardware that does not mask cleanly in an
	416	* SMP environment.
	417	*/
	418	for (;;) {
	419	irqreturn_t action_ret;
	420
	421	spin_unlock(&desc->lock);
	422
7d12e780	423	action_ret = handle_IRQ_event(irq, action);
1da177e4	424	if (!noirqdebug)
7d12e780	425	note_interrupt(irq, desc, action_ret);
b42172fc LT	426
b42172fc LT	427	spin_lock(&desc->lock);
1da177e4 LT	428	if (likely(!(desc->status & IRQ_PENDING)))
	429	break;
	430	desc->status &= ~IRQ_PENDING;
	431	}
	432	desc->status &= ~IRQ_INPROGRESS;
	433
	434	out:
	435	/*
	436	* The ->end() handler has to deal with interrupts which got
	437	* disabled while the handler was running.
	438	*/
d1bef4ed	439	desc->chip->end(irq);
1da177e4 LT	440	spin_unlock(&desc->lock);
	441
	442	return 1;
	443	}
af8c65b5	444	#endif
1da177e4	445
243c7621 IM	446	void early_init_irq_lock_class(void)
243c7621 IM	447	{
10e58084	448	struct irq_desc *desc;
243c7621 IM	449	int i;
243c7621 IM	450
0b8f1efa	451	for_each_irq_desc(i, desc) {
10e58084	452	lockdep_set_class(&desc->lock, &irq_desc_lock_class);
0b8f1efa	453	}
0b8f1efa	454	}
0b8f1efa YL	455
	456	#ifdef CONFIG_SPARSE_IRQ
	457	unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
	458	{
	459	struct irq_desc *desc = irq_to_desc(irq);
26ddd8d5	460	return desc ? desc->kstat_irqs[cpu] : 0;
243c7621	461	}
243c7621	462	#endif
0b8f1efa YL	463	EXPORT_SYMBOL(kstat_irqs_cpu);
0b8f1efa YL	464