hrtimer: remove #include <linux/irq.h>
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / handle.c
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1da177e4
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1/*
2 * linux/kernel/irq/handle.c
3 *
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4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
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6 *
7 * This file contains the core interrupt handling code.
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8 *
9 * Detailed information is available in Documentation/DocBook/genericirq
10 *
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11 */
12
13#include <linux/irq.h>
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
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18#include <linux/rculist.h>
19#include <linux/hash.h>
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20
21#include "internals.h"
22
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23/*
24 * lockdep: we want to handle all irq_desc locks as a single lock-class:
25 */
48a1b10a 26struct lock_class_key irq_desc_lock_class;
0b8f1efa 27
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28/**
29 * handle_bad_irq - handle spurious and unhandled irqs
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30 * @irq: the interrupt number
31 * @desc: description of the interrupt
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32 *
33 * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
6a6de9ef 34 */
d6c88a50 35void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
6a6de9ef 36{
43f77759 37 print_irq_desc(irq, desc);
d6c88a50 38 kstat_incr_irqs_this_cpu(irq, desc);
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39 ack_bad_irq(irq);
40}
41
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42/*
43 * Linux has a controller-independent interrupt architecture.
44 * Every controller has a 'controller-template', that is used
45 * by the main code to do the right thing. Each driver-visible
06fcb0c6 46 * interrupt source is transparently wired to the appropriate
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47 * controller. Thus drivers need not be aware of the
48 * interrupt-controller.
49 *
50 * The code is designed to be easily extended with new/different
51 * interrupt controllers, without having to do assembly magic or
52 * having to touch the generic code.
53 *
54 * Controller mappings for all interrupt sources:
55 */
85c0f909 56int nr_irqs = NR_IRQS;
fa42d10d 57EXPORT_SYMBOL_GPL(nr_irqs);
d60458b2 58
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59void __init __attribute__((weak)) arch_early_irq_init(void)
60{
61}
62
63#ifdef CONFIG_SPARSE_IRQ
64static struct irq_desc irq_desc_init = {
65 .irq = -1,
66 .status = IRQ_DISABLED,
67 .chip = &no_irq_chip,
68 .handle_irq = handle_bad_irq,
69 .depth = 1,
70 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
71#ifdef CONFIG_SMP
72 .affinity = CPU_MASK_ALL
73#endif
74};
75
48a1b10a 76void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
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77{
78 unsigned long bytes;
79 char *ptr;
80 int node;
81
82 /* Compute how many bytes we need per irq and allocate them */
83 bytes = nr * sizeof(unsigned int);
84
85 node = cpu_to_node(cpu);
86 ptr = kzalloc_node(bytes, GFP_ATOMIC, node);
87 printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", cpu, node);
88
89 if (ptr)
90 desc->kstat_irqs = (unsigned int *)ptr;
91}
92
93void __attribute__((weak)) arch_init_chip_data(struct irq_desc *desc, int cpu)
94{
95}
96
97static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
98{
99 memcpy(desc, &irq_desc_init, sizeof(struct irq_desc));
100 desc->irq = irq;
101#ifdef CONFIG_SMP
102 desc->cpu = cpu;
103#endif
104 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
105 init_kstat_irqs(desc, cpu, nr_cpu_ids);
106 if (!desc->kstat_irqs) {
107 printk(KERN_ERR "can not alloc kstat_irqs\n");
108 BUG_ON(1);
109 }
110 arch_init_chip_data(desc, cpu);
111}
112
113/*
114 * Protect the sparse_irqs:
115 */
48a1b10a 116DEFINE_SPINLOCK(sparse_irq_lock);
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117
118struct irq_desc *irq_desc_ptrs[NR_IRQS] __read_mostly;
119
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120static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
121 [0 ... NR_IRQS_LEGACY-1] = {
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122 .irq = -1,
123 .status = IRQ_DISABLED,
124 .chip = &no_irq_chip,
125 .handle_irq = handle_bad_irq,
126 .depth = 1,
127 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
128#ifdef CONFIG_SMP
129 .affinity = CPU_MASK_ALL
130#endif
131 }
132};
133
134/* FIXME: use bootmem alloc ...*/
99d093d1 135static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS];
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136
137void __init early_irq_init(void)
138{
139 struct irq_desc *desc;
140 int legacy_count;
141 int i;
142
143 desc = irq_desc_legacy;
144 legacy_count = ARRAY_SIZE(irq_desc_legacy);
145
146 for (i = 0; i < legacy_count; i++) {
147 desc[i].irq = i;
148 desc[i].kstat_irqs = kstat_irqs_legacy[i];
149
150 irq_desc_ptrs[i] = desc + i;
151 }
152
153 for (i = legacy_count; i < NR_IRQS; i++)
154 irq_desc_ptrs[i] = NULL;
155
156 arch_early_irq_init();
157}
158
159struct irq_desc *irq_to_desc(unsigned int irq)
160{
161 return (irq < NR_IRQS) ? irq_desc_ptrs[irq] : NULL;
162}
163
164struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
165{
166 struct irq_desc *desc;
167 unsigned long flags;
168 int node;
169
170 if (irq >= NR_IRQS) {
171 printk(KERN_WARNING "irq >= NR_IRQS in irq_to_desc_alloc: %d %d\n",
172 irq, NR_IRQS);
173 WARN_ON(1);
174 return NULL;
175 }
176
177 desc = irq_desc_ptrs[irq];
178 if (desc)
179 return desc;
180
181 spin_lock_irqsave(&sparse_irq_lock, flags);
182
183 /* We have to check it to avoid races with another CPU */
184 desc = irq_desc_ptrs[irq];
185 if (desc)
186 goto out_unlock;
187
188 node = cpu_to_node(cpu);
189 desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
190 printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n",
191 irq, cpu, node);
192 if (!desc) {
193 printk(KERN_ERR "can not alloc irq_desc\n");
194 BUG_ON(1);
195 }
196 init_one_irq_desc(irq, desc, cpu);
197
198 irq_desc_ptrs[irq] = desc;
199
200out_unlock:
201 spin_unlock_irqrestore(&sparse_irq_lock, flags);
202
203 return desc;
204}
205
206#else
207
e729aa16 208struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
1da177e4 209 [0 ... NR_IRQS-1] = {
4f167fb4 210 .status = IRQ_DISABLED,
f1c2662c 211 .chip = &no_irq_chip,
7a55713a 212 .handle_irq = handle_bad_irq,
94d39e1f 213 .depth = 1,
aac3f2b6 214 .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
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215#ifdef CONFIG_SMP
216 .affinity = CPU_MASK_ALL
217#endif
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218 }
219};
08678b08 220
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221#endif
222
1da177e4 223/*
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224 * What should we do if we get a hw irq event on an illegal vector?
225 * Each architecture has to answer this themself.
1da177e4 226 */
77a5afec 227static void ack_bad(unsigned int irq)
1da177e4 228{
d3c60047 229 struct irq_desc *desc = irq_to_desc(irq);
08678b08 230
08678b08 231 print_irq_desc(irq, desc);
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232 ack_bad_irq(irq);
233}
234
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235/*
236 * NOP functions
237 */
238static void noop(unsigned int irq)
239{
240}
241
242static unsigned int noop_ret(unsigned int irq)
243{
244 return 0;
245}
246
247/*
248 * Generic no controller implementation
249 */
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250struct irq_chip no_irq_chip = {
251 .name = "none",
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252 .startup = noop_ret,
253 .shutdown = noop,
254 .enable = noop,
255 .disable = noop,
256 .ack = ack_bad,
257 .end = noop,
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258};
259
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260/*
261 * Generic dummy implementation which can be used for
262 * real dumb interrupt sources
263 */
264struct irq_chip dummy_irq_chip = {
265 .name = "dummy",
266 .startup = noop_ret,
267 .shutdown = noop,
268 .enable = noop,
269 .disable = noop,
270 .ack = noop,
271 .mask = noop,
272 .unmask = noop,
273 .end = noop,
274};
275
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276/*
277 * Special, empty irq handler:
278 */
7d12e780 279irqreturn_t no_action(int cpl, void *dev_id)
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280{
281 return IRQ_NONE;
282}
283
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284/**
285 * handle_IRQ_event - irq action chain handler
286 * @irq: the interrupt number
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287 * @action: the interrupt action chain for this irq
288 *
289 * Handles the action chain of an irq event
1da177e4 290 */
7d12e780 291irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action)
1da177e4 292{
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293 irqreturn_t ret, retval = IRQ_NONE;
294 unsigned int status = 0;
1da177e4 295
3cca53b0 296 if (!(action->flags & IRQF_DISABLED))
366c7f55 297 local_irq_enable_in_hardirq();
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298
299 do {
7d12e780 300 ret = action->handler(irq, action->dev_id);
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301 if (ret == IRQ_HANDLED)
302 status |= action->flags;
303 retval |= ret;
304 action = action->next;
305 } while (action);
306
3cca53b0 307 if (status & IRQF_SAMPLE_RANDOM)
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308 add_interrupt_randomness(irq);
309 local_irq_disable();
310
311 return retval;
312}
313
af8c65b5 314#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
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315/**
316 * __do_IRQ - original all in one highlevel IRQ handler
317 * @irq: the interrupt number
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318 *
319 * __do_IRQ handles all normal device IRQ's (the special
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320 * SMP cross-CPU interrupts have their own specific
321 * handlers).
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322 *
323 * This is the original x86 implementation which is used for every
324 * interrupt type.
1da177e4 325 */
7ad5b3a5 326unsigned int __do_IRQ(unsigned int irq)
1da177e4 327{
08678b08 328 struct irq_desc *desc = irq_to_desc(irq);
06fcb0c6 329 struct irqaction *action;
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330 unsigned int status;
331
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332 kstat_incr_irqs_this_cpu(irq, desc);
333
f26fdd59 334 if (CHECK_IRQ_PER_CPU(desc->status)) {
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335 irqreturn_t action_ret;
336
337 /*
338 * No locking required for CPU-local interrupts:
339 */
48a1b10a 340 if (desc->chip->ack) {
d1bef4ed 341 desc->chip->ack(irq);
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342 /* get new one */
343 desc = irq_remap_to_desc(irq, desc);
344 }
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345 if (likely(!(desc->status & IRQ_DISABLED))) {
346 action_ret = handle_IRQ_event(irq, desc->action);
347 if (!noirqdebug)
348 note_interrupt(irq, desc, action_ret);
349 }
d1bef4ed 350 desc->chip->end(irq);
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351 return 1;
352 }
353
354 spin_lock(&desc->lock);
48a1b10a 355 if (desc->chip->ack) {
d1bef4ed 356 desc->chip->ack(irq);
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357 desc = irq_remap_to_desc(irq, desc);
358 }
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359 /*
360 * REPLAY is when Linux resends an IRQ that was dropped earlier
361 * WAITING is used by probe to mark irqs that are being tested
362 */
363 status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
364 status |= IRQ_PENDING; /* we _want_ to handle it */
365
366 /*
367 * If the IRQ is disabled for whatever reason, we cannot
368 * use the action we have.
369 */
370 action = NULL;
371 if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
372 action = desc->action;
373 status &= ~IRQ_PENDING; /* we commit to handling */
374 status |= IRQ_INPROGRESS; /* we are handling it */
375 }
376 desc->status = status;
377
378 /*
379 * If there is no IRQ handler or it was disabled, exit early.
380 * Since we set PENDING, if another processor is handling
381 * a different instance of this same irq, the other processor
382 * will take care of it.
383 */
384 if (unlikely(!action))
385 goto out;
386
387 /*
388 * Edge triggered interrupts need to remember
389 * pending events.
390 * This applies to any hw interrupts that allow a second
391 * instance of the same irq to arrive while we are in do_IRQ
392 * or in the handler. But the code here only handles the _second_
393 * instance of the irq, not the third or fourth. So it is mostly
394 * useful for irq hardware that does not mask cleanly in an
395 * SMP environment.
396 */
397 for (;;) {
398 irqreturn_t action_ret;
399
400 spin_unlock(&desc->lock);
401
7d12e780 402 action_ret = handle_IRQ_event(irq, action);
1da177e4 403 if (!noirqdebug)
7d12e780 404 note_interrupt(irq, desc, action_ret);
b42172fc
LT
405
406 spin_lock(&desc->lock);
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LT
407 if (likely(!(desc->status & IRQ_PENDING)))
408 break;
409 desc->status &= ~IRQ_PENDING;
410 }
411 desc->status &= ~IRQ_INPROGRESS;
412
413out:
414 /*
415 * The ->end() handler has to deal with interrupts which got
416 * disabled while the handler was running.
417 */
d1bef4ed 418 desc->chip->end(irq);
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LT
419 spin_unlock(&desc->lock);
420
421 return 1;
422}
af8c65b5 423#endif
1da177e4 424
243c7621
IM
425void early_init_irq_lock_class(void)
426{
10e58084 427 struct irq_desc *desc;
243c7621
IM
428 int i;
429
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YL
430 for_each_irq_desc(i, desc) {
431 if (!desc)
432 continue;
433
10e58084 434 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
0b8f1efa 435 }
0b8f1efa 436}
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YL
437
438#ifdef CONFIG_SPARSE_IRQ
439unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
440{
441 struct irq_desc *desc = irq_to_desc(irq);
442 return desc->kstat_irqs[cpu];
243c7621 443}
243c7621 444#endif
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445EXPORT_SYMBOL(kstat_irqs_cpu);
446