[PATCH] genirq: irq: document what an IRQ is
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
14#include <linux/module.h>
15#include <linux/interrupt.h>
16#include <linux/kernel_stat.h>
17
18#include "internals.h"
19
20/**
21 * set_irq_chip - set the irq chip for an irq
22 * @irq: irq number
23 * @chip: pointer to irq chip description structure
24 */
25int set_irq_chip(unsigned int irq, struct irq_chip *chip)
26{
27 struct irq_desc *desc;
28 unsigned long flags;
29
30 if (irq >= NR_IRQS) {
31 printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
32 WARN_ON(1);
33 return -EINVAL;
34 }
35
36 if (!chip)
37 chip = &no_irq_chip;
38
39 desc = irq_desc + irq;
40 spin_lock_irqsave(&desc->lock, flags);
41 irq_chip_set_defaults(chip);
42 desc->chip = chip;
43 /*
44 * For compatibility only:
45 */
46 desc->chip = chip;
47 spin_unlock_irqrestore(&desc->lock, flags);
48
49 return 0;
50}
51EXPORT_SYMBOL(set_irq_chip);
52
53/**
54 * set_irq_type - set the irq type for an irq
55 * @irq: irq number
56 * @type: interrupt type - see include/linux/interrupt.h
57 */
58int set_irq_type(unsigned int irq, unsigned int type)
59{
60 struct irq_desc *desc;
61 unsigned long flags;
62 int ret = -ENXIO;
63
64 if (irq >= NR_IRQS) {
65 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
66 return -ENODEV;
67 }
68
69 desc = irq_desc + irq;
70 if (desc->chip->set_type) {
71 spin_lock_irqsave(&desc->lock, flags);
72 ret = desc->chip->set_type(irq, type);
73 spin_unlock_irqrestore(&desc->lock, flags);
74 }
75 return ret;
76}
77EXPORT_SYMBOL(set_irq_type);
78
79/**
80 * set_irq_data - set irq type data for an irq
81 * @irq: Interrupt number
82 * @data: Pointer to interrupt specific data
83 *
84 * Set the hardware irq controller data for an irq
85 */
86int set_irq_data(unsigned int irq, void *data)
87{
88 struct irq_desc *desc;
89 unsigned long flags;
90
91 if (irq >= NR_IRQS) {
92 printk(KERN_ERR
93 "Trying to install controller data for IRQ%d\n", irq);
94 return -EINVAL;
95 }
96
97 desc = irq_desc + irq;
98 spin_lock_irqsave(&desc->lock, flags);
99 desc->handler_data = data;
100 spin_unlock_irqrestore(&desc->lock, flags);
101 return 0;
102}
103EXPORT_SYMBOL(set_irq_data);
104
105/**
106 * set_irq_chip_data - set irq chip data for an irq
107 * @irq: Interrupt number
108 * @data: Pointer to chip specific data
109 *
110 * Set the hardware irq chip data for an irq
111 */
112int set_irq_chip_data(unsigned int irq, void *data)
113{
114 struct irq_desc *desc = irq_desc + irq;
115 unsigned long flags;
116
117 if (irq >= NR_IRQS || !desc->chip) {
118 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
119 return -EINVAL;
120 }
121
122 spin_lock_irqsave(&desc->lock, flags);
123 desc->chip_data = data;
124 spin_unlock_irqrestore(&desc->lock, flags);
125
126 return 0;
127}
128EXPORT_SYMBOL(set_irq_chip_data);
129
130/*
131 * default enable function
132 */
133static void default_enable(unsigned int irq)
134{
135 struct irq_desc *desc = irq_desc + irq;
136
137 desc->chip->unmask(irq);
138 desc->status &= ~IRQ_MASKED;
139}
140
141/*
142 * default disable function
143 */
144static void default_disable(unsigned int irq)
145{
146 struct irq_desc *desc = irq_desc + irq;
147
148 if (!(desc->status & IRQ_DELAYED_DISABLE))
149 irq_desc[irq].chip->mask(irq);
150}
151
152/*
153 * default startup function
154 */
155static unsigned int default_startup(unsigned int irq)
156{
157 irq_desc[irq].chip->enable(irq);
158
159 return 0;
160}
161
162/*
163 * Fixup enable/disable function pointers
164 */
165void irq_chip_set_defaults(struct irq_chip *chip)
166{
167 if (!chip->enable)
168 chip->enable = default_enable;
169 if (!chip->disable)
170 chip->disable = default_disable;
171 if (!chip->startup)
172 chip->startup = default_startup;
173 if (!chip->shutdown)
174 chip->shutdown = chip->disable;
175 if (!chip->name)
176 chip->name = chip->typename;
177}
178
179static inline void mask_ack_irq(struct irq_desc *desc, int irq)
180{
181 if (desc->chip->mask_ack)
182 desc->chip->mask_ack(irq);
183 else {
184 desc->chip->mask(irq);
185 desc->chip->ack(irq);
186 }
187}
188
189/**
190 * handle_simple_irq - Simple and software-decoded IRQs.
191 * @irq: the interrupt number
192 * @desc: the interrupt description structure for this irq
193 * @regs: pointer to a register structure
194 *
195 * Simple interrupts are either sent from a demultiplexing interrupt
196 * handler or come from hardware, where no interrupt hardware control
197 * is necessary.
198 *
199 * Note: The caller is expected to handle the ack, clear, mask and
200 * unmask issues if necessary.
201 */
202void fastcall
203handle_simple_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
204{
205 struct irqaction *action;
206 irqreturn_t action_ret;
207 const unsigned int cpu = smp_processor_id();
208
209 spin_lock(&desc->lock);
210
211 if (unlikely(desc->status & IRQ_INPROGRESS))
212 goto out_unlock;
213 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
214 kstat_cpu(cpu).irqs[irq]++;
215
216 action = desc->action;
217 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
218 goto out_unlock;
219
220 desc->status |= IRQ_INPROGRESS;
221 spin_unlock(&desc->lock);
222
223 action_ret = handle_IRQ_event(irq, regs, action);
224 if (!noirqdebug)
225 note_interrupt(irq, desc, action_ret, regs);
226
227 spin_lock(&desc->lock);
228 desc->status &= ~IRQ_INPROGRESS;
229out_unlock:
230 spin_unlock(&desc->lock);
231}
232
233/**
234 * handle_level_irq - Level type irq handler
235 * @irq: the interrupt number
236 * @desc: the interrupt description structure for this irq
237 * @regs: pointer to a register structure
238 *
239 * Level type interrupts are active as long as the hardware line has
240 * the active level. This may require to mask the interrupt and unmask
241 * it after the associated handler has acknowledged the device, so the
242 * interrupt line is back to inactive.
243 */
244void fastcall
245handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
246{
247 unsigned int cpu = smp_processor_id();
248 struct irqaction *action;
249 irqreturn_t action_ret;
250
251 spin_lock(&desc->lock);
252 mask_ack_irq(desc, irq);
253
254 if (unlikely(desc->status & IRQ_INPROGRESS))
255 goto out;
256 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
257 kstat_cpu(cpu).irqs[irq]++;
258
259 /*
260 * If its disabled or no action available
261 * keep it masked and get out of here
262 */
263 action = desc->action;
264 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
265 goto out;
266
267 desc->status |= IRQ_INPROGRESS;
268 spin_unlock(&desc->lock);
269
270 action_ret = handle_IRQ_event(irq, regs, action);
271 if (!noirqdebug)
272 note_interrupt(irq, desc, action_ret, regs);
273
274 spin_lock(&desc->lock);
275 desc->status &= ~IRQ_INPROGRESS;
276out:
277 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
278 desc->chip->unmask(irq);
279 spin_unlock(&desc->lock);
280}
281
282/**
283 * handle_fastack_irq - irq handler for transparent controllers
284 * @irq: the interrupt number
285 * @desc: the interrupt description structure for this irq
286 * @regs: pointer to a register structure
287 *
288 * Only a single callback will be issued to the chip: an ->ack()
289 * call when the interrupt has been serviced. This enables support
290 * for modern forms of interrupt handlers, which handle the flow
291 * details in hardware, transparently.
292 */
293void fastcall
294handle_fastack_irq(unsigned int irq, struct irq_desc *desc,
295 struct pt_regs *regs)
296{
297 unsigned int cpu = smp_processor_id();
298 struct irqaction *action;
299 irqreturn_t action_ret;
300
301 spin_lock(&desc->lock);
302
303 if (unlikely(desc->status & IRQ_INPROGRESS))
304 goto out;
305
306 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
307 kstat_cpu(cpu).irqs[irq]++;
308
309 /*
310 * If its disabled or no action available
311 * keep it masked and get out of here
312 */
313 action = desc->action;
98bb244b
BH
314 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
315 desc->status |= IRQ_PENDING;
dd87eb3a 316 goto out;
98bb244b 317 }
dd87eb3a
TG
318
319 desc->status |= IRQ_INPROGRESS;
98bb244b 320 desc->status &= ~IRQ_PENDING;
dd87eb3a
TG
321 spin_unlock(&desc->lock);
322
323 action_ret = handle_IRQ_event(irq, regs, action);
324 if (!noirqdebug)
325 note_interrupt(irq, desc, action_ret, regs);
326
327 spin_lock(&desc->lock);
328 desc->status &= ~IRQ_INPROGRESS;
329out:
330 if (!(desc->status & IRQ_DISABLED))
331 desc->chip->ack(irq);
332 else
333 desc->chip->mask(irq);
334
335 spin_unlock(&desc->lock);
336}
337
338/**
339 * handle_edge_irq - edge type IRQ handler
340 * @irq: the interrupt number
341 * @desc: the interrupt description structure for this irq
342 * @regs: pointer to a register structure
343 *
344 * Interrupt occures on the falling and/or rising edge of a hardware
345 * signal. The occurence is latched into the irq controller hardware
346 * and must be acked in order to be reenabled. After the ack another
347 * interrupt can happen on the same source even before the first one
348 * is handled by the assosiacted event handler. If this happens it
349 * might be necessary to disable (mask) the interrupt depending on the
350 * controller hardware. This requires to reenable the interrupt inside
351 * of the loop which handles the interrupts which have arrived while
352 * the handler was running. If all pending interrupts are handled, the
353 * loop is left.
354 */
355void fastcall
356handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
357{
358 const unsigned int cpu = smp_processor_id();
359
360 spin_lock(&desc->lock);
361
362 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
363
364 /*
365 * If we're currently running this IRQ, or its disabled,
366 * we shouldn't process the IRQ. Mark it pending, handle
367 * the necessary masking and go out
368 */
369 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
370 !desc->action)) {
371 desc->status |= (IRQ_PENDING | IRQ_MASKED);
372 mask_ack_irq(desc, irq);
373 goto out_unlock;
374 }
375
376 kstat_cpu(cpu).irqs[irq]++;
377
378 /* Start handling the irq */
379 desc->chip->ack(irq);
380
381 /* Mark the IRQ currently in progress.*/
382 desc->status |= IRQ_INPROGRESS;
383
384 do {
385 struct irqaction *action = desc->action;
386 irqreturn_t action_ret;
387
388 if (unlikely(!action)) {
389 desc->chip->mask(irq);
390 goto out_unlock;
391 }
392
393 /*
394 * When another irq arrived while we were handling
395 * one, we could have masked the irq.
396 * Renable it, if it was not disabled in meantime.
397 */
398 if (unlikely((desc->status &
399 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
400 (IRQ_PENDING | IRQ_MASKED))) {
401 desc->chip->unmask(irq);
402 desc->status &= ~IRQ_MASKED;
403 }
404
405 desc->status &= ~IRQ_PENDING;
406 spin_unlock(&desc->lock);
407 action_ret = handle_IRQ_event(irq, regs, action);
408 if (!noirqdebug)
409 note_interrupt(irq, desc, action_ret, regs);
410 spin_lock(&desc->lock);
411
412 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
413
414 desc->status &= ~IRQ_INPROGRESS;
415out_unlock:
416 spin_unlock(&desc->lock);
417}
418
419#ifdef CONFIG_SMP
420/**
421 * handle_percpu_IRQ - Per CPU local irq handler
422 * @irq: the interrupt number
423 * @desc: the interrupt description structure for this irq
424 * @regs: pointer to a register structure
425 *
426 * Per CPU interrupts on SMP machines without locking requirements
427 */
428void fastcall
429handle_percpu_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
430{
431 irqreturn_t action_ret;
432
433 kstat_this_cpu.irqs[irq]++;
434
435 if (desc->chip->ack)
436 desc->chip->ack(irq);
437
438 action_ret = handle_IRQ_event(irq, regs, desc->action);
439 if (!noirqdebug)
440 note_interrupt(irq, desc, action_ret, regs);
441
442 if (desc->chip->eoi)
443 desc->chip->eoi(irq);
444}
445
446#endif /* CONFIG_SMP */
447
448void
449__set_irq_handler(unsigned int irq,
450 void fastcall (*handle)(unsigned int, irq_desc_t *,
451 struct pt_regs *),
452 int is_chained)
453{
454 struct irq_desc *desc;
455 unsigned long flags;
456
457 if (irq >= NR_IRQS) {
458 printk(KERN_ERR
459 "Trying to install type control for IRQ%d\n", irq);
460 return;
461 }
462
463 desc = irq_desc + irq;
464
465 if (!handle)
466 handle = handle_bad_irq;
467
468 if (is_chained && desc->chip == &no_irq_chip)
469 printk(KERN_WARNING "Trying to install "
470 "chained interrupt type for IRQ%d\n", irq);
471
472 spin_lock_irqsave(&desc->lock, flags);
473
474 /* Uninstall? */
475 if (handle == handle_bad_irq) {
476 if (desc->chip != &no_irq_chip) {
477 desc->chip->mask(irq);
478 desc->chip->ack(irq);
479 }
480 desc->status |= IRQ_DISABLED;
481 desc->depth = 1;
482 }
483 desc->handle_irq = handle;
484
485 if (handle != handle_bad_irq && is_chained) {
486 desc->status &= ~IRQ_DISABLED;
487 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
488 desc->depth = 0;
489 desc->chip->unmask(irq);
490 }
491 spin_unlock_irqrestore(&desc->lock, flags);
492}
493
494void
495set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
496 void fastcall (*handle)(unsigned int,
497 struct irq_desc *,
498 struct pt_regs *))
499{
500 set_irq_chip(irq, chip);
501 __set_irq_handler(irq, handle, 0);
502}
503
504/*
505 * Get a descriptive string for the highlevel handler, for
506 * /proc/interrupts output:
507 */
508const char *
509handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *,
510 struct pt_regs *))
511{
512 if (handle == handle_level_irq)
513 return "level ";
514 if (handle == handle_fastack_irq)
515 return "level ";
516 if (handle == handle_edge_irq)
517 return "edge ";
518 if (handle == handle_simple_irq)
519 return "simple";
520#ifdef CONFIG_SMP
521 if (handle == handle_percpu_irq)
522 return "percpu";
523#endif
524 if (handle == handle_bad_irq)
525 return "bad ";
526
527 return NULL;
528}