Merge branch 'x86-pat-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
3a16d713
EB
21/**
22 * dynamic_irq_init - initialize a dynamically allocated irq
23 * @irq: irq number to initialize
24 */
25void dynamic_irq_init(unsigned int irq)
26{
0b8f1efa 27 struct irq_desc *desc;
3a16d713
EB
28 unsigned long flags;
29
0b8f1efa 30 desc = irq_to_desc(irq);
7d94f7ca 31 if (!desc) {
261c40c1 32 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
33 return;
34 }
35
36 /* Ensure we don't have left over values from a previous use of this irq */
3a16d713
EB
37 spin_lock_irqsave(&desc->lock, flags);
38 desc->status = IRQ_DISABLED;
39 desc->chip = &no_irq_chip;
40 desc->handle_irq = handle_bad_irq;
41 desc->depth = 1;
5b912c10 42 desc->msi_desc = NULL;
3a16d713
EB
43 desc->handler_data = NULL;
44 desc->chip_data = NULL;
45 desc->action = NULL;
46 desc->irq_count = 0;
47 desc->irqs_unhandled = 0;
48#ifdef CONFIG_SMP
0de26520 49 cpumask_setall(&desc->affinity);
3a16d713
EB
50#endif
51 spin_unlock_irqrestore(&desc->lock, flags);
52}
53
54/**
55 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
56 * @irq: irq number to initialize
57 */
58void dynamic_irq_cleanup(unsigned int irq)
59{
d3c60047 60 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
61 unsigned long flags;
62
7d94f7ca 63 if (!desc) {
261c40c1 64 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
65 return;
66 }
67
3a16d713 68 spin_lock_irqsave(&desc->lock, flags);
1f80025e
EB
69 if (desc->action) {
70 spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 71 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 72 irq);
1f80025e
EB
73 return;
74 }
5b912c10
EB
75 desc->msi_desc = NULL;
76 desc->handler_data = NULL;
77 desc->chip_data = NULL;
3a16d713
EB
78 desc->handle_irq = handle_bad_irq;
79 desc->chip = &no_irq_chip;
b6f3b780 80 desc->name = NULL;
3a16d713
EB
81 spin_unlock_irqrestore(&desc->lock, flags);
82}
83
84
dd87eb3a
TG
85/**
86 * set_irq_chip - set the irq chip for an irq
87 * @irq: irq number
88 * @chip: pointer to irq chip description structure
89 */
90int set_irq_chip(unsigned int irq, struct irq_chip *chip)
91{
d3c60047 92 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
93 unsigned long flags;
94
7d94f7ca 95 if (!desc) {
261c40c1 96 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
97 return -EINVAL;
98 }
99
100 if (!chip)
101 chip = &no_irq_chip;
102
dd87eb3a
TG
103 spin_lock_irqsave(&desc->lock, flags);
104 irq_chip_set_defaults(chip);
105 desc->chip = chip;
dd87eb3a
TG
106 spin_unlock_irqrestore(&desc->lock, flags);
107
108 return 0;
109}
110EXPORT_SYMBOL(set_irq_chip);
111
112/**
0c5d1eb7 113 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 114 * @irq: irq number
0c5d1eb7 115 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
116 */
117int set_irq_type(unsigned int irq, unsigned int type)
118{
d3c60047 119 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
120 unsigned long flags;
121 int ret = -ENXIO;
122
7d94f7ca 123 if (!desc) {
dd87eb3a
TG
124 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
125 return -ENODEV;
126 }
127
f2b662da 128 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
129 if (type == IRQ_TYPE_NONE)
130 return 0;
131
132 spin_lock_irqsave(&desc->lock, flags);
0b3682ba 133 ret = __irq_set_trigger(desc, irq, type);
0c5d1eb7 134 spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
135 return ret;
136}
137EXPORT_SYMBOL(set_irq_type);
138
139/**
140 * set_irq_data - set irq type data for an irq
141 * @irq: Interrupt number
142 * @data: Pointer to interrupt specific data
143 *
144 * Set the hardware irq controller data for an irq
145 */
146int set_irq_data(unsigned int irq, void *data)
147{
d3c60047 148 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
149 unsigned long flags;
150
7d94f7ca 151 if (!desc) {
dd87eb3a
TG
152 printk(KERN_ERR
153 "Trying to install controller data for IRQ%d\n", irq);
154 return -EINVAL;
155 }
156
dd87eb3a
TG
157 spin_lock_irqsave(&desc->lock, flags);
158 desc->handler_data = data;
159 spin_unlock_irqrestore(&desc->lock, flags);
160 return 0;
161}
162EXPORT_SYMBOL(set_irq_data);
163
5b912c10
EB
164/**
165 * set_irq_data - set irq type data for an irq
166 * @irq: Interrupt number
472900b8 167 * @entry: Pointer to MSI descriptor data
5b912c10
EB
168 *
169 * Set the hardware irq controller data for an irq
170 */
171int set_irq_msi(unsigned int irq, struct msi_desc *entry)
172{
d3c60047 173 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
174 unsigned long flags;
175
7d94f7ca 176 if (!desc) {
5b912c10
EB
177 printk(KERN_ERR
178 "Trying to install msi data for IRQ%d\n", irq);
179 return -EINVAL;
180 }
7d94f7ca 181
5b912c10
EB
182 spin_lock_irqsave(&desc->lock, flags);
183 desc->msi_desc = entry;
7fe3730d
ME
184 if (entry)
185 entry->irq = irq;
5b912c10
EB
186 spin_unlock_irqrestore(&desc->lock, flags);
187 return 0;
188}
189
dd87eb3a
TG
190/**
191 * set_irq_chip_data - set irq chip data for an irq
192 * @irq: Interrupt number
193 * @data: Pointer to chip specific data
194 *
195 * Set the hardware irq chip data for an irq
196 */
197int set_irq_chip_data(unsigned int irq, void *data)
198{
d3c60047 199 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
200 unsigned long flags;
201
7d94f7ca
YL
202 if (!desc) {
203 printk(KERN_ERR
204 "Trying to install chip data for IRQ%d\n", irq);
205 return -EINVAL;
206 }
207
208 if (!desc->chip) {
dd87eb3a
TG
209 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
210 return -EINVAL;
211 }
212
213 spin_lock_irqsave(&desc->lock, flags);
214 desc->chip_data = data;
215 spin_unlock_irqrestore(&desc->lock, flags);
216
217 return 0;
218}
219EXPORT_SYMBOL(set_irq_chip_data);
220
221/*
222 * default enable function
223 */
224static void default_enable(unsigned int irq)
225{
d3c60047 226 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
227
228 desc->chip->unmask(irq);
229 desc->status &= ~IRQ_MASKED;
230}
231
232/*
233 * default disable function
234 */
235static void default_disable(unsigned int irq)
236{
dd87eb3a
TG
237}
238
239/*
240 * default startup function
241 */
242static unsigned int default_startup(unsigned int irq)
243{
d3c60047 244 struct irq_desc *desc = irq_to_desc(irq);
08678b08 245
08678b08 246 desc->chip->enable(irq);
dd87eb3a
TG
247 return 0;
248}
249
89d694b9
TG
250/*
251 * default shutdown function
252 */
253static void default_shutdown(unsigned int irq)
254{
d3c60047 255 struct irq_desc *desc = irq_to_desc(irq);
89d694b9
TG
256
257 desc->chip->mask(irq);
258 desc->status |= IRQ_MASKED;
259}
260
dd87eb3a
TG
261/*
262 * Fixup enable/disable function pointers
263 */
264void irq_chip_set_defaults(struct irq_chip *chip)
265{
266 if (!chip->enable)
267 chip->enable = default_enable;
268 if (!chip->disable)
269 chip->disable = default_disable;
270 if (!chip->startup)
271 chip->startup = default_startup;
89d694b9
TG
272 /*
273 * We use chip->disable, when the user provided its own. When
274 * we have default_disable set for chip->disable, then we need
275 * to use default_shutdown, otherwise the irq line is not
276 * disabled on free_irq():
277 */
dd87eb3a 278 if (!chip->shutdown)
89d694b9
TG
279 chip->shutdown = chip->disable != default_disable ?
280 chip->disable : default_shutdown;
dd87eb3a
TG
281 if (!chip->name)
282 chip->name = chip->typename;
b86432b4
ZY
283 if (!chip->end)
284 chip->end = dummy_irq_chip.end;
dd87eb3a
TG
285}
286
287static inline void mask_ack_irq(struct irq_desc *desc, int irq)
288{
289 if (desc->chip->mask_ack)
290 desc->chip->mask_ack(irq);
291 else {
292 desc->chip->mask(irq);
293 desc->chip->ack(irq);
294 }
295}
296
297/**
298 * handle_simple_irq - Simple and software-decoded IRQs.
299 * @irq: the interrupt number
300 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
301 *
302 * Simple interrupts are either sent from a demultiplexing interrupt
303 * handler or come from hardware, where no interrupt hardware control
304 * is necessary.
305 *
306 * Note: The caller is expected to handle the ack, clear, mask and
307 * unmask issues if necessary.
308 */
7ad5b3a5 309void
7d12e780 310handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
311{
312 struct irqaction *action;
313 irqreturn_t action_ret;
dd87eb3a
TG
314
315 spin_lock(&desc->lock);
316
317 if (unlikely(desc->status & IRQ_INPROGRESS))
318 goto out_unlock;
971e5b35 319 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 320 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
321
322 action = desc->action;
971e5b35 323 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
324 goto out_unlock;
325
326 desc->status |= IRQ_INPROGRESS;
327 spin_unlock(&desc->lock);
328
7d12e780 329 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 330 if (!noirqdebug)
7d12e780 331 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
332
333 spin_lock(&desc->lock);
334 desc->status &= ~IRQ_INPROGRESS;
335out_unlock:
336 spin_unlock(&desc->lock);
337}
338
339/**
340 * handle_level_irq - Level type irq handler
341 * @irq: the interrupt number
342 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
343 *
344 * Level type interrupts are active as long as the hardware line has
345 * the active level. This may require to mask the interrupt and unmask
346 * it after the associated handler has acknowledged the device, so the
347 * interrupt line is back to inactive.
348 */
7ad5b3a5 349void
7d12e780 350handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 351{
dd87eb3a
TG
352 struct irqaction *action;
353 irqreturn_t action_ret;
354
355 spin_lock(&desc->lock);
356 mask_ack_irq(desc, irq);
48a1b10a 357 desc = irq_remap_to_desc(irq, desc);
dd87eb3a
TG
358
359 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 360 goto out_unlock;
dd87eb3a 361 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 362 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
363
364 /*
365 * If its disabled or no action available
366 * keep it masked and get out of here
367 */
368 action = desc->action;
49663421 369 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 370 goto out_unlock;
dd87eb3a
TG
371
372 desc->status |= IRQ_INPROGRESS;
373 spin_unlock(&desc->lock);
374
7d12e780 375 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 376 if (!noirqdebug)
7d12e780 377 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
378
379 spin_lock(&desc->lock);
380 desc->status &= ~IRQ_INPROGRESS;
dd87eb3a
TG
381 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
382 desc->chip->unmask(irq);
86998aa6 383out_unlock:
dd87eb3a
TG
384 spin_unlock(&desc->lock);
385}
386
387/**
47c2a3aa 388 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
389 * @irq: the interrupt number
390 * @desc: the interrupt description structure for this irq
dd87eb3a 391 *
47c2a3aa 392 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
393 * call when the interrupt has been serviced. This enables support
394 * for modern forms of interrupt handlers, which handle the flow
395 * details in hardware, transparently.
396 */
7ad5b3a5 397void
7d12e780 398handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 399{
dd87eb3a
TG
400 struct irqaction *action;
401 irqreturn_t action_ret;
402
403 spin_lock(&desc->lock);
404
405 if (unlikely(desc->status & IRQ_INPROGRESS))
406 goto out;
407
408 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 409 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
410
411 /*
412 * If its disabled or no action available
76d21601 413 * then mask it and get out of here:
dd87eb3a
TG
414 */
415 action = desc->action;
98bb244b
BH
416 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
417 desc->status |= IRQ_PENDING;
76d21601
IM
418 if (desc->chip->mask)
419 desc->chip->mask(irq);
dd87eb3a 420 goto out;
98bb244b 421 }
dd87eb3a
TG
422
423 desc->status |= IRQ_INPROGRESS;
98bb244b 424 desc->status &= ~IRQ_PENDING;
dd87eb3a
TG
425 spin_unlock(&desc->lock);
426
7d12e780 427 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 428 if (!noirqdebug)
7d12e780 429 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
430
431 spin_lock(&desc->lock);
432 desc->status &= ~IRQ_INPROGRESS;
433out:
47c2a3aa 434 desc->chip->eoi(irq);
48a1b10a 435 desc = irq_remap_to_desc(irq, desc);
dd87eb3a
TG
436
437 spin_unlock(&desc->lock);
438}
439
440/**
441 * handle_edge_irq - edge type IRQ handler
442 * @irq: the interrupt number
443 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
444 *
445 * Interrupt occures on the falling and/or rising edge of a hardware
446 * signal. The occurence is latched into the irq controller hardware
447 * and must be acked in order to be reenabled. After the ack another
448 * interrupt can happen on the same source even before the first one
449 * is handled by the assosiacted event handler. If this happens it
450 * might be necessary to disable (mask) the interrupt depending on the
451 * controller hardware. This requires to reenable the interrupt inside
452 * of the loop which handles the interrupts which have arrived while
453 * the handler was running. If all pending interrupts are handled, the
454 * loop is left.
455 */
7ad5b3a5 456void
7d12e780 457handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 458{
dd87eb3a
TG
459 spin_lock(&desc->lock);
460
461 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
462
463 /*
464 * If we're currently running this IRQ, or its disabled,
465 * we shouldn't process the IRQ. Mark it pending, handle
466 * the necessary masking and go out
467 */
468 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
469 !desc->action)) {
470 desc->status |= (IRQ_PENDING | IRQ_MASKED);
471 mask_ack_irq(desc, irq);
48a1b10a 472 desc = irq_remap_to_desc(irq, desc);
dd87eb3a
TG
473 goto out_unlock;
474 }
d6c88a50 475 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
476
477 /* Start handling the irq */
478 desc->chip->ack(irq);
48a1b10a 479 desc = irq_remap_to_desc(irq, desc);
dd87eb3a
TG
480
481 /* Mark the IRQ currently in progress.*/
482 desc->status |= IRQ_INPROGRESS;
483
484 do {
485 struct irqaction *action = desc->action;
486 irqreturn_t action_ret;
487
488 if (unlikely(!action)) {
489 desc->chip->mask(irq);
490 goto out_unlock;
491 }
492
493 /*
494 * When another irq arrived while we were handling
495 * one, we could have masked the irq.
496 * Renable it, if it was not disabled in meantime.
497 */
498 if (unlikely((desc->status &
499 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
500 (IRQ_PENDING | IRQ_MASKED))) {
501 desc->chip->unmask(irq);
502 desc->status &= ~IRQ_MASKED;
503 }
504
505 desc->status &= ~IRQ_PENDING;
506 spin_unlock(&desc->lock);
7d12e780 507 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 508 if (!noirqdebug)
7d12e780 509 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
510 spin_lock(&desc->lock);
511
512 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
513
514 desc->status &= ~IRQ_INPROGRESS;
515out_unlock:
516 spin_unlock(&desc->lock);
517}
518
dd87eb3a
TG
519/**
520 * handle_percpu_IRQ - Per CPU local irq handler
521 * @irq: the interrupt number
522 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
523 *
524 * Per CPU interrupts on SMP machines without locking requirements
525 */
7ad5b3a5 526void
7d12e780 527handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
528{
529 irqreturn_t action_ret;
530
d6c88a50 531 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
532
533 if (desc->chip->ack)
534 desc->chip->ack(irq);
535
7d12e780 536 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 537 if (!noirqdebug)
7d12e780 538 note_interrupt(irq, desc, action_ret);
dd87eb3a 539
48a1b10a 540 if (desc->chip->eoi) {
dd87eb3a 541 desc->chip->eoi(irq);
48a1b10a
YL
542 desc = irq_remap_to_desc(irq, desc);
543 }
dd87eb3a
TG
544}
545
dd87eb3a 546void
a460e745
IM
547__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
548 const char *name)
dd87eb3a 549{
d3c60047 550 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
551 unsigned long flags;
552
7d94f7ca 553 if (!desc) {
dd87eb3a
TG
554 printk(KERN_ERR
555 "Trying to install type control for IRQ%d\n", irq);
556 return;
557 }
558
dd87eb3a
TG
559 if (!handle)
560 handle = handle_bad_irq;
9d7ac8be 561 else if (desc->chip == &no_irq_chip) {
f8b5473f 562 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 563 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
564 /*
565 * Some ARM implementations install a handler for really dumb
566 * interrupt hardware without setting an irq_chip. This worked
567 * with the ARM no_irq_chip but the check in setup_irq would
568 * prevent us to setup the interrupt at all. Switch it to
569 * dummy_irq_chip for easy transition.
570 */
571 desc->chip = &dummy_irq_chip;
572 }
dd87eb3a
TG
573
574 spin_lock_irqsave(&desc->lock, flags);
575
576 /* Uninstall? */
577 if (handle == handle_bad_irq) {
48a1b10a 578 if (desc->chip != &no_irq_chip) {
5575ddf7 579 mask_ack_irq(desc, irq);
48a1b10a
YL
580 desc = irq_remap_to_desc(irq, desc);
581 }
dd87eb3a
TG
582 desc->status |= IRQ_DISABLED;
583 desc->depth = 1;
584 }
585 desc->handle_irq = handle;
a460e745 586 desc->name = name;
dd87eb3a
TG
587
588 if (handle != handle_bad_irq && is_chained) {
589 desc->status &= ~IRQ_DISABLED;
590 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
591 desc->depth = 0;
7e6e178a 592 desc->chip->startup(irq);
dd87eb3a
TG
593 }
594 spin_unlock_irqrestore(&desc->lock, flags);
595}
596
597void
598set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 599 irq_flow_handler_t handle)
dd87eb3a
TG
600{
601 set_irq_chip(irq, chip);
a460e745 602 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
603}
604
a460e745
IM
605void
606set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
607 irq_flow_handler_t handle, const char *name)
dd87eb3a 608{
a460e745
IM
609 set_irq_chip(irq, chip);
610 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 611}
46f4f8f6
RB
612
613void __init set_irq_noprobe(unsigned int irq)
614{
d3c60047 615 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
616 unsigned long flags;
617
7d94f7ca 618 if (!desc) {
46f4f8f6 619 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
46f4f8f6
RB
620 return;
621 }
622
46f4f8f6
RB
623 spin_lock_irqsave(&desc->lock, flags);
624 desc->status |= IRQ_NOPROBE;
625 spin_unlock_irqrestore(&desc->lock, flags);
626}
627
628void __init set_irq_probe(unsigned int irq)
629{
d3c60047 630 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
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631 unsigned long flags;
632
7d94f7ca 633 if (!desc) {
46f4f8f6 634 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
46f4f8f6
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635 return;
636 }
637
46f4f8f6
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638 spin_lock_irqsave(&desc->lock, flags);
639 desc->status &= ~IRQ_NOPROBE;
640 spin_unlock_irqrestore(&desc->lock, flags);
641}