[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c

/*
 * linux/kernel/irq/chip.c
 *
 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
 *
 * This file contains the core interrupt handling code, for irq-chip
 * based architectures.
 *
 * Detailed information is available in Documentation/DocBook/genericirq
 */

#include <linux/irq.h>
#include <linux/msi.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>

#include "internals.h"

/**
 *	dynamic_irq_init - initialize a dynamically allocated irq
 *	@irq:	irq number to initialize
 */
void dynamic_irq_init(unsigned int irq)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
		WARN_ON(1);
		return;
	}

	/* Ensure we don't have left over values from a previous use of this irq */
	desc = irq_desc + irq;
	spin_lock_irqsave(&desc->lock, flags);
	desc->status = IRQ_DISABLED;
	desc->chip = &no_irq_chip;
	desc->handle_irq = handle_bad_irq;
	desc->depth = 1;
	desc->msi_desc = NULL;
	desc->handler_data = NULL;
	desc->chip_data = NULL;
	desc->action = NULL;
	desc->irq_count = 0;
	desc->irqs_unhandled = 0;
#ifdef CONFIG_SMP
	desc->affinity = CPU_MASK_ALL;
#endif
	spin_unlock_irqrestore(&desc->lock, flags);
}

/**
 *	dynamic_irq_cleanup - cleanup a dynamically allocated irq
 *	@irq:	irq number to initialize
 */
void dynamic_irq_cleanup(unsigned int irq)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
		WARN_ON(1);
		return;
	}

	desc = irq_desc + irq;
	spin_lock_irqsave(&desc->lock, flags);
	if (desc->action) {
		spin_unlock_irqrestore(&desc->lock, flags);
		printk(KERN_ERR "Destroying IRQ%d without calling free_irq\n",
			irq);
		WARN_ON(1);
		return;
	}
	desc->msi_desc = NULL;
	desc->handler_data = NULL;
	desc->chip_data = NULL;
	desc->handle_irq = handle_bad_irq;
	desc->chip = &no_irq_chip;
	spin_unlock_irqrestore(&desc->lock, flags);
}


/**
 *	set_irq_chip - set the irq chip for an irq
 *	@irq:	irq number
 *	@chip:	pointer to irq chip description structure
 */
int set_irq_chip(unsigned int irq, struct irq_chip *chip)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
		WARN_ON(1);
		return -EINVAL;
	}

	if (!chip)
		chip = &no_irq_chip;

	desc = irq_desc + irq;
	spin_lock_irqsave(&desc->lock, flags);
	irq_chip_set_defaults(chip);
	desc->chip = chip;
	spin_unlock_irqrestore(&desc->lock, flags);

	return 0;
}
EXPORT_SYMBOL(set_irq_chip);

/**
 *	set_irq_type - set the irq type for an irq
 *	@irq:	irq number
 *	@type:	interrupt type - see include/linux/interrupt.h
 */
int set_irq_type(unsigned int irq, unsigned int type)
{
	struct irq_desc *desc;
	unsigned long flags;
	int ret = -ENXIO;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
		return -ENODEV;
	}

	desc = irq_desc + irq;
	if (desc->chip->set_type) {
		spin_lock_irqsave(&desc->lock, flags);
		ret = desc->chip->set_type(irq, type);
		spin_unlock_irqrestore(&desc->lock, flags);
	}
	return ret;
}
EXPORT_SYMBOL(set_irq_type);

/**
 *	set_irq_data - set irq type data for an irq
 *	@irq:	Interrupt number
 *	@data:	Pointer to interrupt specific data
 *
 *	Set the hardware irq controller data for an irq
 */
int set_irq_data(unsigned int irq, void *data)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR
		       "Trying to install controller data for IRQ%d\n", irq);
		return -EINVAL;
	}

	desc = irq_desc + irq;
	spin_lock_irqsave(&desc->lock, flags);
	desc->handler_data = data;
	spin_unlock_irqrestore(&desc->lock, flags);
	return 0;
}
EXPORT_SYMBOL(set_irq_data);

/**
 *	set_irq_data - set irq type data for an irq
 *	@irq:	Interrupt number
 *	@entry:	Pointer to MSI descriptor data
 *
 *	Set the hardware irq controller data for an irq
 */
int set_irq_msi(unsigned int irq, struct msi_desc *entry)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR
		       "Trying to install msi data for IRQ%d\n", irq);
		return -EINVAL;
	}
	desc = irq_desc + irq;
	spin_lock_irqsave(&desc->lock, flags);
	desc->msi_desc = entry;
	if (entry)
		entry->irq = irq;
	spin_unlock_irqrestore(&desc->lock, flags);
	return 0;
}

/**
 *	set_irq_chip_data - set irq chip data for an irq
 *	@irq:	Interrupt number
 *	@data:	Pointer to chip specific data
 *
 *	Set the hardware irq chip data for an irq
 */
int set_irq_chip_data(unsigned int irq, void *data)
{
	struct irq_desc *desc = irq_desc + irq;
	unsigned long flags;

	if (irq >= NR_IRQS || !desc->chip) {
		printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
		return -EINVAL;
	}

	spin_lock_irqsave(&desc->lock, flags);
	desc->chip_data = data;
	spin_unlock_irqrestore(&desc->lock, flags);

	return 0;
}
EXPORT_SYMBOL(set_irq_chip_data);

/*
 * default enable function
 */
static void default_enable(unsigned int irq)
{
	struct irq_desc *desc = irq_desc + irq;

	desc->chip->unmask(irq);
	desc->status &= ~IRQ_MASKED;
}

/*
 * default disable function
 */
static void default_disable(unsigned int irq)
{
}

/*
 * default startup function
 */
static unsigned int default_startup(unsigned int irq)
{
	irq_desc[irq].chip->enable(irq);

	return 0;
}

/*
 * Fixup enable/disable function pointers
 */
void irq_chip_set_defaults(struct irq_chip *chip)
{
	if (!chip->enable)
		chip->enable = default_enable;
	if (!chip->disable)
		chip->disable = default_disable;
	if (!chip->startup)
		chip->startup = default_startup;
	if (!chip->shutdown)
		chip->shutdown = chip->disable;
	if (!chip->name)
		chip->name = chip->typename;
	if (!chip->end)
		chip->end = dummy_irq_chip.end;
}

static inline void mask_ack_irq(struct irq_desc *desc, int irq)
{
	if (desc->chip->mask_ack)
		desc->chip->mask_ack(irq);
	else {
		desc->chip->mask(irq);
		desc->chip->ack(irq);
	}
}

/**
 *	handle_simple_irq - Simple and software-decoded IRQs.
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *
 *	Simple interrupts are either sent from a demultiplexing interrupt
 *	handler or come from hardware, where no interrupt hardware control
 *	is necessary.
 *
 *	Note: The caller is expected to handle the ack, clear, mask and
 *	unmask issues if necessary.
 */
void fastcall
handle_simple_irq(unsigned int irq, struct irq_desc *desc)
{
	struct irqaction *action;
	irqreturn_t action_ret;
	const unsigned int cpu = smp_processor_id();

	spin_lock(&desc->lock);

	if (unlikely(desc->status & IRQ_INPROGRESS))
		goto out_unlock;
	kstat_cpu(cpu).irqs[irq]++;

	action = desc->action;
	if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
		if (desc->chip->mask)
			desc->chip->mask(irq);
		desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
		desc->status |= IRQ_PENDING;
		goto out_unlock;
	}

	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING | IRQ_PENDING);
	desc->status |= IRQ_INPROGRESS;
	spin_unlock(&desc->lock);

	action_ret = handle_IRQ_event(irq, action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret);

	spin_lock(&desc->lock);
	desc->status &= ~IRQ_INPROGRESS;
out_unlock:
	spin_unlock(&desc->lock);
}

/**
 *	handle_level_irq - Level type irq handler
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *
 *	Level type interrupts are active as long as the hardware line has
 *	the active level. This may require to mask the interrupt and unmask
 *	it after the associated handler has acknowledged the device, so the
 *	interrupt line is back to inactive.
 */
void fastcall
handle_level_irq(unsigned int irq, struct irq_desc *desc)
{
	unsigned int cpu = smp_processor_id();
	struct irqaction *action;
	irqreturn_t action_ret;

	spin_lock(&desc->lock);
	mask_ack_irq(desc, irq);

	if (unlikely(desc->status & IRQ_INPROGRESS))
		goto out_unlock;
	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
	kstat_cpu(cpu).irqs[irq]++;

	/*
	 * If its disabled or no action available
	 * keep it masked and get out of here
	 */
	action = desc->action;
	if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
		desc->status |= IRQ_PENDING;
		goto out_unlock;
	}

	desc->status |= IRQ_INPROGRESS;
	desc->status &= ~IRQ_PENDING;
	spin_unlock(&desc->lock);

	action_ret = handle_IRQ_event(irq, action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret);

	spin_lock(&desc->lock);
	desc->status &= ~IRQ_INPROGRESS;
	if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
		desc->chip->unmask(irq);
out_unlock:
	spin_unlock(&desc->lock);
}

/**
 *	handle_fasteoi_irq - irq handler for transparent controllers
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *
 *	Only a single callback will be issued to the chip: an ->eoi()
 *	call when the interrupt has been serviced. This enables support
 *	for modern forms of interrupt handlers, which handle the flow
 *	details in hardware, transparently.
 */
void fastcall
handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
{
	unsigned int cpu = smp_processor_id();
	struct irqaction *action;
	irqreturn_t action_ret;

	spin_lock(&desc->lock);

	if (unlikely(desc->status & IRQ_INPROGRESS))
		goto out;

	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
	kstat_cpu(cpu).irqs[irq]++;

	/*
	 * If its disabled or no action available
	 * then mask it and get out of here:
	 */
	action = desc->action;
	if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
		desc->status |= IRQ_PENDING;
		if (desc->chip->mask)
			desc->chip->mask(irq);
		goto out;
	}

	desc->status |= IRQ_INPROGRESS;
	desc->status &= ~IRQ_PENDING;
	spin_unlock(&desc->lock);

	action_ret = handle_IRQ_event(irq, action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret);

	spin_lock(&desc->lock);
	desc->status &= ~IRQ_INPROGRESS;
out:
	desc->chip->eoi(irq);

	spin_unlock(&desc->lock);
}

/**
 *	handle_edge_irq - edge type IRQ handler
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *
 *	Interrupt occures on the falling and/or rising edge of a hardware
 *	signal. The occurence is latched into the irq controller hardware
 *	and must be acked in order to be reenabled. After the ack another
 *	interrupt can happen on the same source even before the first one
 *	is handled by the assosiacted event handler. If this happens it
 *	might be necessary to disable (mask) the interrupt depending on the
 *	controller hardware. This requires to reenable the interrupt inside
 *	of the loop which handles the interrupts which have arrived while
 *	the handler was running. If all pending interrupts are handled, the
 *	loop is left.
 */
void fastcall
handle_edge_irq(unsigned int irq, struct irq_desc *desc)
{
	const unsigned int cpu = smp_processor_id();

	spin_lock(&desc->lock);

	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);

	/*
	 * If we're currently running this IRQ, or its disabled,
	 * we shouldn't process the IRQ. Mark it pending, handle
	 * the necessary masking and go out
	 */
	if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
		    !desc->action)) {
		desc->status |= (IRQ_PENDING | IRQ_MASKED);
		mask_ack_irq(desc, irq);
		goto out_unlock;
	}

	kstat_cpu(cpu).irqs[irq]++;

	/* Start handling the irq */
	desc->chip->ack(irq);

	/* Mark the IRQ currently in progress.*/
	desc->status |= IRQ_INPROGRESS;

	do {
		struct irqaction *action = desc->action;
		irqreturn_t action_ret;

		if (unlikely(!action)) {
			desc->chip->mask(irq);
			goto out_unlock;
		}

		/*
		 * When another irq arrived while we were handling
		 * one, we could have masked the irq.
		 * Renable it, if it was not disabled in meantime.
		 */
		if (unlikely((desc->status &
			       (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
			      (IRQ_PENDING | IRQ_MASKED))) {
			desc->chip->unmask(irq);
			desc->status &= ~IRQ_MASKED;
		}

		desc->status &= ~IRQ_PENDING;
		spin_unlock(&desc->lock);
		action_ret = handle_IRQ_event(irq, action);
		if (!noirqdebug)
			note_interrupt(irq, desc, action_ret);
		spin_lock(&desc->lock);

	} while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);

	desc->status &= ~IRQ_INPROGRESS;
out_unlock:
	spin_unlock(&desc->lock);
}

#ifdef CONFIG_SMP
/**
 *	handle_percpu_IRQ - Per CPU local irq handler
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *
 *	Per CPU interrupts on SMP machines without locking requirements
 */
void fastcall
handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
{
	irqreturn_t action_ret;

	kstat_this_cpu.irqs[irq]++;

	if (desc->chip->ack)
		desc->chip->ack(irq);

	action_ret = handle_IRQ_event(irq, desc->action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret);

	if (desc->chip->eoi)
		desc->chip->eoi(irq);
}

#endif /* CONFIG_SMP */

void
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
		  const char *name)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR
		       "Trying to install type control for IRQ%d\n", irq);
		return;
	}

	desc = irq_desc + irq;

	if (!handle)
		handle = handle_bad_irq;
	else if (desc->chip == &no_irq_chip) {
		printk(KERN_WARNING "Trying to install %sinterrupt handler "
		       "for IRQ%d\n", is_chained ? "chained " : "", irq);
		/*
		 * Some ARM implementations install a handler for really dumb
		 * interrupt hardware without setting an irq_chip. This worked
		 * with the ARM no_irq_chip but the check in setup_irq would
		 * prevent us to setup the interrupt at all. Switch it to
		 * dummy_irq_chip for easy transition.
		 */
		desc->chip = &dummy_irq_chip;
	}

	spin_lock_irqsave(&desc->lock, flags);

	/* Uninstall? */
	if (handle == handle_bad_irq) {
		if (desc->chip != &no_irq_chip)
			mask_ack_irq(desc, irq);
		desc->status |= IRQ_DISABLED;
		desc->depth = 1;
	}
	desc->handle_irq = handle;
	desc->name = name;

	if (handle != handle_bad_irq && is_chained) {
		desc->status &= ~IRQ_DISABLED;
		desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
		desc->depth = 0;
		desc->chip->unmask(irq);
	}
	spin_unlock_irqrestore(&desc->lock, flags);
}

void
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
			 irq_flow_handler_t handle)
{
	set_irq_chip(irq, chip);
	__set_irq_handler(irq, handle, 0, NULL);
}

void
set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
			      irq_flow_handler_t handle, const char *name)
{
	set_irq_chip(irq, chip);
	__set_irq_handler(irq, handle, 0, name);
}
Commit	Line	Data
dd87eb3a TG	1	/*
	2	* linux/kernel/irq/chip.c
	3	*
	4	* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
	5	* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
	6	*
	7	* This file contains the core interrupt handling code, for irq-chip
	8	* based architectures.
	9	*
	10	* Detailed information is available in Documentation/DocBook/genericirq
	11	*/
	12
	13	#include <linux/irq.h>
7fe3730d	14	#include <linux/msi.h>
dd87eb3a TG	15	#include <linux/module.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/kernel_stat.h>
	18
	19	#include "internals.h"
	20
3a16d713 EB	21	/**
	22	* dynamic_irq_init - initialize a dynamically allocated irq
	23	* @irq: irq number to initialize
	24	*/
	25	void dynamic_irq_init(unsigned int irq)
	26	{
	27	struct irq_desc *desc;
	28	unsigned long flags;
	29
	30	if (irq >= NR_IRQS) {
	31	printk(KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
	32	WARN_ON(1);
	33	return;
	34	}
	35
	36	/* Ensure we don't have left over values from a previous use of this irq */
	37	desc = irq_desc + irq;
	38	spin_lock_irqsave(&desc->lock, flags);
	39	desc->status = IRQ_DISABLED;
	40	desc->chip = &no_irq_chip;
	41	desc->handle_irq = handle_bad_irq;
	42	desc->depth = 1;
5b912c10	43	desc->msi_desc = NULL;
3a16d713 EB	44	desc->handler_data = NULL;
	45	desc->chip_data = NULL;
	46	desc->action = NULL;
	47	desc->irq_count = 0;
	48	desc->irqs_unhandled = 0;
	49	#ifdef CONFIG_SMP
	50	desc->affinity = CPU_MASK_ALL;
	51	#endif
	52	spin_unlock_irqrestore(&desc->lock, flags);
	53	}
	54
	55	/**
	56	* dynamic_irq_cleanup - cleanup a dynamically allocated irq
	57	* @irq: irq number to initialize
	58	*/
	59	void dynamic_irq_cleanup(unsigned int irq)
	60	{
	61	struct irq_desc *desc;
	62	unsigned long flags;
	63
	64	if (irq >= NR_IRQS) {
	65	printk(KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
	66	WARN_ON(1);
	67	return;
	68	}
	69
	70	desc = irq_desc + irq;
	71	spin_lock_irqsave(&desc->lock, flags);
1f80025e EB	72	if (desc->action) {
	73	spin_unlock_irqrestore(&desc->lock, flags);
	74	printk(KERN_ERR "Destroying IRQ%d without calling free_irq\n",
	75	irq);
	76	WARN_ON(1);
	77	return;
	78	}
5b912c10 EB	79	desc->msi_desc = NULL;
	80	desc->handler_data = NULL;
	81	desc->chip_data = NULL;
3a16d713 EB	82	desc->handle_irq = handle_bad_irq;
	83	desc->chip = &no_irq_chip;
	84	spin_unlock_irqrestore(&desc->lock, flags);
	85	}
	86
	87
dd87eb3a TG	88	/**
	89	* set_irq_chip - set the irq chip for an irq
	90	* @irq: irq number
	91	* @chip: pointer to irq chip description structure
	92	*/
	93	int set_irq_chip(unsigned int irq, struct irq_chip *chip)
	94	{
	95	struct irq_desc *desc;
	96	unsigned long flags;
	97
	98	if (irq >= NR_IRQS) {
	99	printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
	100	WARN_ON(1);
	101	return -EINVAL;
	102	}
	103
	104	if (!chip)
	105	chip = &no_irq_chip;
	106
	107	desc = irq_desc + irq;
	108	spin_lock_irqsave(&desc->lock, flags);
	109	irq_chip_set_defaults(chip);
	110	desc->chip = chip;
dd87eb3a TG	111	spin_unlock_irqrestore(&desc->lock, flags);
	112
	113	return 0;
	114	}
	115	EXPORT_SYMBOL(set_irq_chip);
	116
	117	/**
	118	* set_irq_type - set the irq type for an irq
	119	* @irq: irq number
	120	* @type: interrupt type - see include/linux/interrupt.h
	121	*/
	122	int set_irq_type(unsigned int irq, unsigned int type)
	123	{
	124	struct irq_desc *desc;
	125	unsigned long flags;
	126	int ret = -ENXIO;
	127
	128	if (irq >= NR_IRQS) {
	129	printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
	130	return -ENODEV;
	131	}
	132
	133	desc = irq_desc + irq;
	134	if (desc->chip->set_type) {
	135	spin_lock_irqsave(&desc->lock, flags);
	136	ret = desc->chip->set_type(irq, type);
	137	spin_unlock_irqrestore(&desc->lock, flags);
	138	}
	139	return ret;
	140	}
	141	EXPORT_SYMBOL(set_irq_type);
	142
	143	/**
	144	* set_irq_data - set irq type data for an irq
	145	* @irq: Interrupt number
	146	* @data: Pointer to interrupt specific data
	147	*
	148	* Set the hardware irq controller data for an irq
	149	*/
	150	int set_irq_data(unsigned int irq, void *data)
	151	{
	152	struct irq_desc *desc;
	153	unsigned long flags;
	154
	155	if (irq >= NR_IRQS) {
	156	printk(KERN_ERR
	157	"Trying to install controller data for IRQ%d\n", irq);
	158	return -EINVAL;
	159	}
	160
	161	desc = irq_desc + irq;
	162	spin_lock_irqsave(&desc->lock, flags);
	163	desc->handler_data = data;
	164	spin_unlock_irqrestore(&desc->lock, flags);
	165	return 0;
	166	}
	167	EXPORT_SYMBOL(set_irq_data);
	168
5b912c10 EB	169	/**
	170	* set_irq_data - set irq type data for an irq
	171	* @irq: Interrupt number
472900b8	172	* @entry: Pointer to MSI descriptor data
5b912c10 EB	173	*
	174	* Set the hardware irq controller data for an irq
	175	*/
	176	int set_irq_msi(unsigned int irq, struct msi_desc *entry)
	177	{
	178	struct irq_desc *desc;
	179	unsigned long flags;
	180
	181	if (irq >= NR_IRQS) {
	182	printk(KERN_ERR
	183	"Trying to install msi data for IRQ%d\n", irq);
	184	return -EINVAL;
	185	}
	186	desc = irq_desc + irq;
	187	spin_lock_irqsave(&desc->lock, flags);
	188	desc->msi_desc = entry;
7fe3730d ME	189	if (entry)
7fe3730d ME	190	entry->irq = irq;
5b912c10 EB	191	spin_unlock_irqrestore(&desc->lock, flags);
	192	return 0;
	193	}
	194
dd87eb3a TG	195	/**
	196	* set_irq_chip_data - set irq chip data for an irq
	197	* @irq: Interrupt number
	198	* @data: Pointer to chip specific data
	199	*
	200	* Set the hardware irq chip data for an irq
	201	*/
	202	int set_irq_chip_data(unsigned int irq, void *data)
	203	{
	204	struct irq_desc *desc = irq_desc + irq;
	205	unsigned long flags;
	206
	207	if (irq >= NR_IRQS \|\| !desc->chip) {
	208	printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
	209	return -EINVAL;
	210	}
	211
	212	spin_lock_irqsave(&desc->lock, flags);
	213	desc->chip_data = data;
	214	spin_unlock_irqrestore(&desc->lock, flags);
	215
	216	return 0;
	217	}
	218	EXPORT_SYMBOL(set_irq_chip_data);
	219
	220	/*
	221	* default enable function
	222	*/
	223	static void default_enable(unsigned int irq)
	224	{
	225	struct irq_desc *desc = irq_desc + irq;
	226
	227	desc->chip->unmask(irq);
	228	desc->status &= ~IRQ_MASKED;
	229	}
	230
	231	/*
	232	* default disable function
	233	*/
	234	static void default_disable(unsigned int irq)
	235	{
dd87eb3a TG	236	}
	237
	238	/*
	239	* default startup function
	240	*/
	241	static unsigned int default_startup(unsigned int irq)
	242	{
	243	irq_desc[irq].chip->enable(irq);
	244
	245	return 0;
	246	}
	247
	248	/*
	249	* Fixup enable/disable function pointers
	250	*/
	251	void irq_chip_set_defaults(struct irq_chip *chip)
	252	{
	253	if (!chip->enable)
	254	chip->enable = default_enable;
	255	if (!chip->disable)
	256	chip->disable = default_disable;
	257	if (!chip->startup)
	258	chip->startup = default_startup;
	259	if (!chip->shutdown)
	260	chip->shutdown = chip->disable;
	261	if (!chip->name)
	262	chip->name = chip->typename;
b86432b4 ZY	263	if (!chip->end)
b86432b4 ZY	264	chip->end = dummy_irq_chip.end;
dd87eb3a TG	265	}
	266
	267	static inline void mask_ack_irq(struct irq_desc *desc, int irq)
	268	{
	269	if (desc->chip->mask_ack)
	270	desc->chip->mask_ack(irq);
	271	else {
	272	desc->chip->mask(irq);
	273	desc->chip->ack(irq);
	274	}
	275	}
	276
	277	/**
	278	* handle_simple_irq - Simple and software-decoded IRQs.
	279	* @irq: the interrupt number
	280	* @desc: the interrupt description structure for this irq
dd87eb3a TG	281	*
	282	* Simple interrupts are either sent from a demultiplexing interrupt
	283	* handler or come from hardware, where no interrupt hardware control
	284	* is necessary.
	285	*
	286	* Note: The caller is expected to handle the ack, clear, mask and
	287	* unmask issues if necessary.
	288	*/
	289	void fastcall
7d12e780	290	handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a TG	291	{
	292	struct irqaction *action;
	293	irqreturn_t action_ret;
	294	const unsigned int cpu = smp_processor_id();
	295
	296	spin_lock(&desc->lock);
	297
	298	if (unlikely(desc->status & IRQ_INPROGRESS))
	299	goto out_unlock;
dd87eb3a TG	300	kstat_cpu(cpu).irqs[irq]++;
	301
	302	action = desc->action;
76d21601 IM	303	if (unlikely(!action \|\| (desc->status & IRQ_DISABLED))) {
	304	if (desc->chip->mask)
	305	desc->chip->mask(irq);
	306	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
	307	desc->status \|= IRQ_PENDING;
dd87eb3a	308	goto out_unlock;
76d21601	309	}
dd87eb3a	310
76d21601	311	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING \| IRQ_PENDING);
dd87eb3a TG	312	desc->status \|= IRQ_INPROGRESS;
	313	spin_unlock(&desc->lock);
	314
7d12e780	315	action_ret = handle_IRQ_event(irq, action);
dd87eb3a	316	if (!noirqdebug)
7d12e780	317	note_interrupt(irq, desc, action_ret);
dd87eb3a TG	318
	319	spin_lock(&desc->lock);
	320	desc->status &= ~IRQ_INPROGRESS;
	321	out_unlock:
	322	spin_unlock(&desc->lock);
	323	}
	324
	325	/**
	326	* handle_level_irq - Level type irq handler
	327	* @irq: the interrupt number
	328	* @desc: the interrupt description structure for this irq
dd87eb3a TG	329	*
	330	* Level type interrupts are active as long as the hardware line has
	331	* the active level. This may require to mask the interrupt and unmask
	332	* it after the associated handler has acknowledged the device, so the
	333	* interrupt line is back to inactive.
	334	*/
	335	void fastcall
7d12e780	336	handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a TG	337	{
	338	unsigned int cpu = smp_processor_id();
	339	struct irqaction *action;
	340	irqreturn_t action_ret;
	341
	342	spin_lock(&desc->lock);
	343	mask_ack_irq(desc, irq);
	344
	345	if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6	346	goto out_unlock;
dd87eb3a TG	347	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
	348	kstat_cpu(cpu).irqs[irq]++;
	349
	350	/*
	351	* If its disabled or no action available
	352	* keep it masked and get out of here
	353	*/
	354	action = desc->action;
5a43a066 BH	355	if (unlikely(!action \|\| (desc->status & IRQ_DISABLED))) {
5a43a066 BH	356	desc->status \|= IRQ_PENDING;
86998aa6	357	goto out_unlock;
5a43a066	358	}
dd87eb3a TG	359
dd87eb3a TG	360	desc->status \|= IRQ_INPROGRESS;
5a43a066	361	desc->status &= ~IRQ_PENDING;
dd87eb3a TG	362	spin_unlock(&desc->lock);
dd87eb3a TG	363
7d12e780	364	action_ret = handle_IRQ_event(irq, action);
dd87eb3a	365	if (!noirqdebug)
7d12e780	366	note_interrupt(irq, desc, action_ret);
dd87eb3a TG	367
	368	spin_lock(&desc->lock);
	369	desc->status &= ~IRQ_INPROGRESS;
dd87eb3a TG	370	if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
dd87eb3a TG	371	desc->chip->unmask(irq);
86998aa6	372	out_unlock:
dd87eb3a TG	373	spin_unlock(&desc->lock);
	374	}
	375
	376	/**
47c2a3aa	377	* handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a TG	378	* @irq: the interrupt number
dd87eb3a TG	379	* @desc: the interrupt description structure for this irq
dd87eb3a	380	*
47c2a3aa	381	* Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a TG	382	* call when the interrupt has been serviced. This enables support
	383	* for modern forms of interrupt handlers, which handle the flow
	384	* details in hardware, transparently.
	385	*/
	386	void fastcall
7d12e780	387	handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a TG	388	{
	389	unsigned int cpu = smp_processor_id();
	390	struct irqaction *action;
	391	irqreturn_t action_ret;
	392
	393	spin_lock(&desc->lock);
	394
	395	if (unlikely(desc->status & IRQ_INPROGRESS))
	396	goto out;
	397
	398	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
	399	kstat_cpu(cpu).irqs[irq]++;
	400
	401	/*
	402	* If its disabled or no action available
76d21601	403	* then mask it and get out of here:
dd87eb3a TG	404	*/
dd87eb3a TG	405	action = desc->action;
98bb244b BH	406	if (unlikely(!action \|\| (desc->status & IRQ_DISABLED))) {
98bb244b BH	407	desc->status \|= IRQ_PENDING;
76d21601 IM	408	if (desc->chip->mask)
76d21601 IM	409	desc->chip->mask(irq);
dd87eb3a	410	goto out;
98bb244b	411	}
dd87eb3a TG	412
dd87eb3a TG	413	desc->status \|= IRQ_INPROGRESS;
98bb244b	414	desc->status &= ~IRQ_PENDING;
dd87eb3a TG	415	spin_unlock(&desc->lock);
dd87eb3a TG	416
7d12e780	417	action_ret = handle_IRQ_event(irq, action);
dd87eb3a	418	if (!noirqdebug)
7d12e780	419	note_interrupt(irq, desc, action_ret);
dd87eb3a TG	420
	421	spin_lock(&desc->lock);
	422	desc->status &= ~IRQ_INPROGRESS;
	423	out:
47c2a3aa	424	desc->chip->eoi(irq);
dd87eb3a TG	425
	426	spin_unlock(&desc->lock);
	427	}
	428
	429	/**
	430	* handle_edge_irq - edge type IRQ handler
	431	* @irq: the interrupt number
	432	* @desc: the interrupt description structure for this irq
dd87eb3a TG	433	*
	434	* Interrupt occures on the falling and/or rising edge of a hardware
	435	* signal. The occurence is latched into the irq controller hardware
	436	* and must be acked in order to be reenabled. After the ack another
	437	* interrupt can happen on the same source even before the first one
	438	* is handled by the assosiacted event handler. If this happens it
	439	* might be necessary to disable (mask) the interrupt depending on the
	440	* controller hardware. This requires to reenable the interrupt inside
	441	* of the loop which handles the interrupts which have arrived while
	442	* the handler was running. If all pending interrupts are handled, the
	443	* loop is left.
	444	*/
	445	void fastcall
7d12e780	446	handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a TG	447	{
	448	const unsigned int cpu = smp_processor_id();
	449
	450	spin_lock(&desc->lock);
	451
	452	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
	453
	454	/*
	455	* If we're currently running this IRQ, or its disabled,
	456	* we shouldn't process the IRQ. Mark it pending, handle
	457	* the necessary masking and go out
	458	*/
	459	if (unlikely((desc->status & (IRQ_INPROGRESS \| IRQ_DISABLED)) \|\|
	460	!desc->action)) {
	461	desc->status \|= (IRQ_PENDING \| IRQ_MASKED);
	462	mask_ack_irq(desc, irq);
	463	goto out_unlock;
	464	}
	465
	466	kstat_cpu(cpu).irqs[irq]++;
	467
	468	/* Start handling the irq */
	469	desc->chip->ack(irq);
	470
	471	/* Mark the IRQ currently in progress.*/
	472	desc->status \|= IRQ_INPROGRESS;
	473
	474	do {
	475	struct irqaction *action = desc->action;
	476	irqreturn_t action_ret;
	477
	478	if (unlikely(!action)) {
	479	desc->chip->mask(irq);
	480	goto out_unlock;
	481	}
	482
	483	/*
	484	* When another irq arrived while we were handling
	485	* one, we could have masked the irq.
	486	* Renable it, if it was not disabled in meantime.
	487	*/
	488	if (unlikely((desc->status &
	489	(IRQ_PENDING \| IRQ_MASKED \| IRQ_DISABLED)) ==
	490	(IRQ_PENDING \| IRQ_MASKED))) {
	491	desc->chip->unmask(irq);
	492	desc->status &= ~IRQ_MASKED;
	493	}
	494
	495	desc->status &= ~IRQ_PENDING;
	496	spin_unlock(&desc->lock);
7d12e780	497	action_ret = handle_IRQ_event(irq, action);
dd87eb3a	498	if (!noirqdebug)
7d12e780	499	note_interrupt(irq, desc, action_ret);
dd87eb3a TG	500	spin_lock(&desc->lock);
	501
	502	} while ((desc->status & (IRQ_PENDING \| IRQ_DISABLED)) == IRQ_PENDING);
	503
	504	desc->status &= ~IRQ_INPROGRESS;
	505	out_unlock:
	506	spin_unlock(&desc->lock);
	507	}
	508
	509	#ifdef CONFIG_SMP
	510	/**
	511	* handle_percpu_IRQ - Per CPU local irq handler
	512	* @irq: the interrupt number
	513	* @desc: the interrupt description structure for this irq
dd87eb3a TG	514	*
	515	* Per CPU interrupts on SMP machines without locking requirements
	516	*/
	517	void fastcall
7d12e780	518	handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a TG	519	{
	520	irqreturn_t action_ret;
	521
	522	kstat_this_cpu.irqs[irq]++;
	523
	524	if (desc->chip->ack)
	525	desc->chip->ack(irq);
	526
7d12e780	527	action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a	528	if (!noirqdebug)
7d12e780	529	note_interrupt(irq, desc, action_ret);
dd87eb3a TG	530
	531	if (desc->chip->eoi)
	532	desc->chip->eoi(irq);
	533	}
	534
	535	#endif /* CONFIG_SMP */
	536
	537	void
a460e745 IM	538	__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
a460e745 IM	539	const char *name)
dd87eb3a TG	540	{
	541	struct irq_desc *desc;
	542	unsigned long flags;
	543
	544	if (irq >= NR_IRQS) {
	545	printk(KERN_ERR
	546	"Trying to install type control for IRQ%d\n", irq);
	547	return;
	548	}
	549
	550	desc = irq_desc + irq;
	551
	552	if (!handle)
	553	handle = handle_bad_irq;
9d7ac8be	554	else if (desc->chip == &no_irq_chip) {
f8b5473f	555	printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e	556	"for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f TG	557	/*
	558	* Some ARM implementations install a handler for really dumb
	559	* interrupt hardware without setting an irq_chip. This worked
	560	* with the ARM no_irq_chip but the check in setup_irq would
	561	* prevent us to setup the interrupt at all. Switch it to
	562	* dummy_irq_chip for easy transition.
	563	*/
	564	desc->chip = &dummy_irq_chip;
	565	}
dd87eb3a TG	566
	567	spin_lock_irqsave(&desc->lock, flags);
	568
	569	/* Uninstall? */
	570	if (handle == handle_bad_irq) {
5575ddf7 JB	571	if (desc->chip != &no_irq_chip)
5575ddf7 JB	572	mask_ack_irq(desc, irq);
dd87eb3a TG	573	desc->status \|= IRQ_DISABLED;
	574	desc->depth = 1;
	575	}
	576	desc->handle_irq = handle;
a460e745	577	desc->name = name;
dd87eb3a TG	578
	579	if (handle != handle_bad_irq && is_chained) {
	580	desc->status &= ~IRQ_DISABLED;
	581	desc->status \|= IRQ_NOREQUEST \| IRQ_NOPROBE;
	582	desc->depth = 0;
	583	desc->chip->unmask(irq);
	584	}
	585	spin_unlock_irqrestore(&desc->lock, flags);
	586	}
	587
	588	void
	589	set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94	590	irq_flow_handler_t handle)
dd87eb3a TG	591	{
dd87eb3a TG	592	set_irq_chip(irq, chip);
a460e745	593	__set_irq_handler(irq, handle, 0, NULL);
dd87eb3a TG	594	}
dd87eb3a TG	595
a460e745 IM	596	void
	597	set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
	598	irq_flow_handler_t handle, const char *name)
dd87eb3a	599	{
a460e745 IM	600	set_irq_chip(irq, chip);
a460e745 IM	601	__set_irq_handler(irq, handle, 0, name);
dd87eb3a	602	}