x86, ioapic: replace loop with nr_irqs with for_each_irq_icfg
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
3a16d713
EB
21/**
22 * dynamic_irq_init - initialize a dynamically allocated irq
23 * @irq: irq number to initialize
24 */
25void dynamic_irq_init(unsigned int irq)
26{
27 struct irq_desc *desc;
28 unsigned long flags;
29
85c0f909 30 if (irq >= nr_irqs) {
261c40c1 31 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
32 return;
33 }
34
35 /* Ensure we don't have left over values from a previous use of this irq */
08678b08 36 desc = irq_to_desc(irq);
3a16d713
EB
37 spin_lock_irqsave(&desc->lock, flags);
38 desc->status = IRQ_DISABLED;
39 desc->chip = &no_irq_chip;
40 desc->handle_irq = handle_bad_irq;
41 desc->depth = 1;
5b912c10 42 desc->msi_desc = NULL;
3a16d713
EB
43 desc->handler_data = NULL;
44 desc->chip_data = NULL;
45 desc->action = NULL;
46 desc->irq_count = 0;
47 desc->irqs_unhandled = 0;
48#ifdef CONFIG_SMP
d366f8cb 49 cpus_setall(desc->affinity);
3a16d713
EB
50#endif
51 spin_unlock_irqrestore(&desc->lock, flags);
52}
53
54/**
55 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
56 * @irq: irq number to initialize
57 */
58void dynamic_irq_cleanup(unsigned int irq)
59{
60 struct irq_desc *desc;
61 unsigned long flags;
62
85c0f909 63 if (irq >= nr_irqs) {
261c40c1 64 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
65 return;
66 }
67
08678b08 68 desc = irq_to_desc(irq);
3a16d713 69 spin_lock_irqsave(&desc->lock, flags);
1f80025e
EB
70 if (desc->action) {
71 spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 72 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 73 irq);
1f80025e
EB
74 return;
75 }
5b912c10
EB
76 desc->msi_desc = NULL;
77 desc->handler_data = NULL;
78 desc->chip_data = NULL;
3a16d713
EB
79 desc->handle_irq = handle_bad_irq;
80 desc->chip = &no_irq_chip;
81 spin_unlock_irqrestore(&desc->lock, flags);
82}
83
84
dd87eb3a
TG
85/**
86 * set_irq_chip - set the irq chip for an irq
87 * @irq: irq number
88 * @chip: pointer to irq chip description structure
89 */
90int set_irq_chip(unsigned int irq, struct irq_chip *chip)
91{
92 struct irq_desc *desc;
93 unsigned long flags;
94
85c0f909 95 if (irq >= nr_irqs) {
261c40c1 96 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
97 return -EINVAL;
98 }
99
100 if (!chip)
101 chip = &no_irq_chip;
102
08678b08 103 desc = irq_to_desc(irq);
dd87eb3a
TG
104 spin_lock_irqsave(&desc->lock, flags);
105 irq_chip_set_defaults(chip);
106 desc->chip = chip;
dd87eb3a
TG
107 spin_unlock_irqrestore(&desc->lock, flags);
108
109 return 0;
110}
111EXPORT_SYMBOL(set_irq_chip);
112
113/**
0c5d1eb7 114 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 115 * @irq: irq number
0c5d1eb7 116 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
117 */
118int set_irq_type(unsigned int irq, unsigned int type)
119{
120 struct irq_desc *desc;
121 unsigned long flags;
122 int ret = -ENXIO;
123
85c0f909 124 if (irq >= nr_irqs) {
dd87eb3a
TG
125 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
126 return -ENODEV;
127 }
128
08678b08 129 desc = irq_to_desc(irq);
0c5d1eb7
DB
130 if (type == IRQ_TYPE_NONE)
131 return 0;
132
133 spin_lock_irqsave(&desc->lock, flags);
134 ret = __irq_set_trigger(desc, irq, flags);
135 spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
136 return ret;
137}
138EXPORT_SYMBOL(set_irq_type);
139
140/**
141 * set_irq_data - set irq type data for an irq
142 * @irq: Interrupt number
143 * @data: Pointer to interrupt specific data
144 *
145 * Set the hardware irq controller data for an irq
146 */
147int set_irq_data(unsigned int irq, void *data)
148{
149 struct irq_desc *desc;
150 unsigned long flags;
151
85c0f909 152 if (irq >= nr_irqs) {
dd87eb3a
TG
153 printk(KERN_ERR
154 "Trying to install controller data for IRQ%d\n", irq);
155 return -EINVAL;
156 }
157
08678b08 158 desc = irq_to_desc(irq);
dd87eb3a
TG
159 spin_lock_irqsave(&desc->lock, flags);
160 desc->handler_data = data;
161 spin_unlock_irqrestore(&desc->lock, flags);
162 return 0;
163}
164EXPORT_SYMBOL(set_irq_data);
165
5b912c10
EB
166/**
167 * set_irq_data - set irq type data for an irq
168 * @irq: Interrupt number
472900b8 169 * @entry: Pointer to MSI descriptor data
5b912c10
EB
170 *
171 * Set the hardware irq controller data for an irq
172 */
173int set_irq_msi(unsigned int irq, struct msi_desc *entry)
174{
175 struct irq_desc *desc;
176 unsigned long flags;
177
85c0f909 178 if (irq >= nr_irqs) {
5b912c10
EB
179 printk(KERN_ERR
180 "Trying to install msi data for IRQ%d\n", irq);
181 return -EINVAL;
182 }
08678b08 183 desc = irq_to_desc(irq);
5b912c10
EB
184 spin_lock_irqsave(&desc->lock, flags);
185 desc->msi_desc = entry;
7fe3730d
ME
186 if (entry)
187 entry->irq = irq;
5b912c10
EB
188 spin_unlock_irqrestore(&desc->lock, flags);
189 return 0;
190}
191
dd87eb3a
TG
192/**
193 * set_irq_chip_data - set irq chip data for an irq
194 * @irq: Interrupt number
195 * @data: Pointer to chip specific data
196 *
197 * Set the hardware irq chip data for an irq
198 */
199int set_irq_chip_data(unsigned int irq, void *data)
200{
08678b08 201 struct irq_desc *desc;
dd87eb3a
TG
202 unsigned long flags;
203
08678b08 204 desc = irq_to_desc(irq);
85c0f909 205 if (irq >= nr_irqs || !desc->chip) {
dd87eb3a
TG
206 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
207 return -EINVAL;
208 }
209
210 spin_lock_irqsave(&desc->lock, flags);
211 desc->chip_data = data;
212 spin_unlock_irqrestore(&desc->lock, flags);
213
214 return 0;
215}
216EXPORT_SYMBOL(set_irq_chip_data);
217
218/*
219 * default enable function
220 */
221static void default_enable(unsigned int irq)
222{
08678b08 223 struct irq_desc *desc;
dd87eb3a 224
08678b08 225 desc = irq_to_desc(irq);
dd87eb3a
TG
226 desc->chip->unmask(irq);
227 desc->status &= ~IRQ_MASKED;
228}
229
230/*
231 * default disable function
232 */
233static void default_disable(unsigned int irq)
234{
dd87eb3a
TG
235}
236
237/*
238 * default startup function
239 */
240static unsigned int default_startup(unsigned int irq)
241{
08678b08
YL
242 struct irq_desc *desc;
243
244 desc = irq_to_desc(irq);
245 desc->chip->enable(irq);
dd87eb3a
TG
246
247 return 0;
248}
249
89d694b9
TG
250/*
251 * default shutdown function
252 */
253static void default_shutdown(unsigned int irq)
254{
08678b08 255 struct irq_desc *desc;
89d694b9 256
08678b08 257 desc = irq_to_desc(irq);
89d694b9
TG
258 desc->chip->mask(irq);
259 desc->status |= IRQ_MASKED;
260}
261
dd87eb3a
TG
262/*
263 * Fixup enable/disable function pointers
264 */
265void irq_chip_set_defaults(struct irq_chip *chip)
266{
267 if (!chip->enable)
268 chip->enable = default_enable;
269 if (!chip->disable)
270 chip->disable = default_disable;
271 if (!chip->startup)
272 chip->startup = default_startup;
89d694b9
TG
273 /*
274 * We use chip->disable, when the user provided its own. When
275 * we have default_disable set for chip->disable, then we need
276 * to use default_shutdown, otherwise the irq line is not
277 * disabled on free_irq():
278 */
dd87eb3a 279 if (!chip->shutdown)
89d694b9
TG
280 chip->shutdown = chip->disable != default_disable ?
281 chip->disable : default_shutdown;
dd87eb3a
TG
282 if (!chip->name)
283 chip->name = chip->typename;
b86432b4
ZY
284 if (!chip->end)
285 chip->end = dummy_irq_chip.end;
dd87eb3a
TG
286}
287
288static inline void mask_ack_irq(struct irq_desc *desc, int irq)
289{
290 if (desc->chip->mask_ack)
291 desc->chip->mask_ack(irq);
292 else {
293 desc->chip->mask(irq);
294 desc->chip->ack(irq);
295 }
296}
297
298/**
299 * handle_simple_irq - Simple and software-decoded IRQs.
300 * @irq: the interrupt number
301 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
302 *
303 * Simple interrupts are either sent from a demultiplexing interrupt
304 * handler or come from hardware, where no interrupt hardware control
305 * is necessary.
306 *
307 * Note: The caller is expected to handle the ack, clear, mask and
308 * unmask issues if necessary.
309 */
7ad5b3a5 310void
7d12e780 311handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
312{
313 struct irqaction *action;
314 irqreturn_t action_ret;
dd87eb3a
TG
315
316 spin_lock(&desc->lock);
317
318 if (unlikely(desc->status & IRQ_INPROGRESS))
319 goto out_unlock;
971e5b35 320 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
7f95ec9e 321 kstat_irqs_this_cpu(desc)++;
dd87eb3a
TG
322
323 action = desc->action;
971e5b35 324 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
325 goto out_unlock;
326
327 desc->status |= IRQ_INPROGRESS;
328 spin_unlock(&desc->lock);
329
7d12e780 330 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 331 if (!noirqdebug)
7d12e780 332 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
333
334 spin_lock(&desc->lock);
335 desc->status &= ~IRQ_INPROGRESS;
336out_unlock:
337 spin_unlock(&desc->lock);
338}
339
340/**
341 * handle_level_irq - Level type irq handler
342 * @irq: the interrupt number
343 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
344 *
345 * Level type interrupts are active as long as the hardware line has
346 * the active level. This may require to mask the interrupt and unmask
347 * it after the associated handler has acknowledged the device, so the
348 * interrupt line is back to inactive.
349 */
7ad5b3a5 350void
7d12e780 351handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 352{
dd87eb3a
TG
353 struct irqaction *action;
354 irqreturn_t action_ret;
355
356 spin_lock(&desc->lock);
357 mask_ack_irq(desc, irq);
358
359 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 360 goto out_unlock;
dd87eb3a 361 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
7f95ec9e 362 kstat_irqs_this_cpu(desc)++;
dd87eb3a
TG
363
364 /*
365 * If its disabled or no action available
366 * keep it masked and get out of here
367 */
368 action = desc->action;
49663421 369 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 370 goto out_unlock;
dd87eb3a
TG
371
372 desc->status |= IRQ_INPROGRESS;
373 spin_unlock(&desc->lock);
374
7d12e780 375 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 376 if (!noirqdebug)
7d12e780 377 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
378
379 spin_lock(&desc->lock);
380 desc->status &= ~IRQ_INPROGRESS;
dd87eb3a
TG
381 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
382 desc->chip->unmask(irq);
86998aa6 383out_unlock:
dd87eb3a
TG
384 spin_unlock(&desc->lock);
385}
386
387/**
47c2a3aa 388 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
389 * @irq: the interrupt number
390 * @desc: the interrupt description structure for this irq
dd87eb3a 391 *
47c2a3aa 392 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
393 * call when the interrupt has been serviced. This enables support
394 * for modern forms of interrupt handlers, which handle the flow
395 * details in hardware, transparently.
396 */
7ad5b3a5 397void
7d12e780 398handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 399{
dd87eb3a
TG
400 struct irqaction *action;
401 irqreturn_t action_ret;
402
403 spin_lock(&desc->lock);
404
405 if (unlikely(desc->status & IRQ_INPROGRESS))
406 goto out;
407
408 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
7f95ec9e 409 kstat_irqs_this_cpu(desc)++;
dd87eb3a
TG
410
411 /*
412 * If its disabled or no action available
76d21601 413 * then mask it and get out of here:
dd87eb3a
TG
414 */
415 action = desc->action;
98bb244b
BH
416 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
417 desc->status |= IRQ_PENDING;
76d21601
IM
418 if (desc->chip->mask)
419 desc->chip->mask(irq);
dd87eb3a 420 goto out;
98bb244b 421 }
dd87eb3a
TG
422
423 desc->status |= IRQ_INPROGRESS;
98bb244b 424 desc->status &= ~IRQ_PENDING;
dd87eb3a
TG
425 spin_unlock(&desc->lock);
426
7d12e780 427 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 428 if (!noirqdebug)
7d12e780 429 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
430
431 spin_lock(&desc->lock);
432 desc->status &= ~IRQ_INPROGRESS;
433out:
47c2a3aa 434 desc->chip->eoi(irq);
dd87eb3a
TG
435
436 spin_unlock(&desc->lock);
437}
438
439/**
440 * handle_edge_irq - edge type IRQ handler
441 * @irq: the interrupt number
442 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
443 *
444 * Interrupt occures on the falling and/or rising edge of a hardware
445 * signal. The occurence is latched into the irq controller hardware
446 * and must be acked in order to be reenabled. After the ack another
447 * interrupt can happen on the same source even before the first one
448 * is handled by the assosiacted event handler. If this happens it
449 * might be necessary to disable (mask) the interrupt depending on the
450 * controller hardware. This requires to reenable the interrupt inside
451 * of the loop which handles the interrupts which have arrived while
452 * the handler was running. If all pending interrupts are handled, the
453 * loop is left.
454 */
7ad5b3a5 455void
7d12e780 456handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 457{
dd87eb3a
TG
458 spin_lock(&desc->lock);
459
460 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
461
462 /*
463 * If we're currently running this IRQ, or its disabled,
464 * we shouldn't process the IRQ. Mark it pending, handle
465 * the necessary masking and go out
466 */
467 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
468 !desc->action)) {
469 desc->status |= (IRQ_PENDING | IRQ_MASKED);
470 mask_ack_irq(desc, irq);
471 goto out_unlock;
472 }
473
7f95ec9e 474 kstat_irqs_this_cpu(desc)++;
dd87eb3a
TG
475
476 /* Start handling the irq */
477 desc->chip->ack(irq);
478
479 /* Mark the IRQ currently in progress.*/
480 desc->status |= IRQ_INPROGRESS;
481
482 do {
483 struct irqaction *action = desc->action;
484 irqreturn_t action_ret;
485
486 if (unlikely(!action)) {
487 desc->chip->mask(irq);
488 goto out_unlock;
489 }
490
491 /*
492 * When another irq arrived while we were handling
493 * one, we could have masked the irq.
494 * Renable it, if it was not disabled in meantime.
495 */
496 if (unlikely((desc->status &
497 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
498 (IRQ_PENDING | IRQ_MASKED))) {
499 desc->chip->unmask(irq);
500 desc->status &= ~IRQ_MASKED;
501 }
502
503 desc->status &= ~IRQ_PENDING;
504 spin_unlock(&desc->lock);
7d12e780 505 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 506 if (!noirqdebug)
7d12e780 507 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
508 spin_lock(&desc->lock);
509
510 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
511
512 desc->status &= ~IRQ_INPROGRESS;
513out_unlock:
514 spin_unlock(&desc->lock);
515}
516
dd87eb3a
TG
517/**
518 * handle_percpu_IRQ - Per CPU local irq handler
519 * @irq: the interrupt number
520 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
521 *
522 * Per CPU interrupts on SMP machines without locking requirements
523 */
7ad5b3a5 524void
7d12e780 525handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
526{
527 irqreturn_t action_ret;
528
7f95ec9e 529 kstat_irqs_this_cpu(desc)++;
dd87eb3a
TG
530
531 if (desc->chip->ack)
532 desc->chip->ack(irq);
533
7d12e780 534 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 535 if (!noirqdebug)
7d12e780 536 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
537
538 if (desc->chip->eoi)
539 desc->chip->eoi(irq);
540}
541
dd87eb3a 542void
a460e745
IM
543__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
544 const char *name)
dd87eb3a
TG
545{
546 struct irq_desc *desc;
547 unsigned long flags;
548
85c0f909 549 if (irq >= nr_irqs) {
dd87eb3a
TG
550 printk(KERN_ERR
551 "Trying to install type control for IRQ%d\n", irq);
552 return;
553 }
554
08678b08 555 desc = irq_to_desc(irq);
dd87eb3a
TG
556
557 if (!handle)
558 handle = handle_bad_irq;
9d7ac8be 559 else if (desc->chip == &no_irq_chip) {
f8b5473f 560 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 561 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
562 /*
563 * Some ARM implementations install a handler for really dumb
564 * interrupt hardware without setting an irq_chip. This worked
565 * with the ARM no_irq_chip but the check in setup_irq would
566 * prevent us to setup the interrupt at all. Switch it to
567 * dummy_irq_chip for easy transition.
568 */
569 desc->chip = &dummy_irq_chip;
570 }
dd87eb3a
TG
571
572 spin_lock_irqsave(&desc->lock, flags);
573
574 /* Uninstall? */
575 if (handle == handle_bad_irq) {
5575ddf7
JB
576 if (desc->chip != &no_irq_chip)
577 mask_ack_irq(desc, irq);
dd87eb3a
TG
578 desc->status |= IRQ_DISABLED;
579 desc->depth = 1;
580 }
581 desc->handle_irq = handle;
a460e745 582 desc->name = name;
dd87eb3a
TG
583
584 if (handle != handle_bad_irq && is_chained) {
585 desc->status &= ~IRQ_DISABLED;
586 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
587 desc->depth = 0;
7e6e178a 588 desc->chip->startup(irq);
dd87eb3a
TG
589 }
590 spin_unlock_irqrestore(&desc->lock, flags);
591}
592
593void
594set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 595 irq_flow_handler_t handle)
dd87eb3a
TG
596{
597 set_irq_chip(irq, chip);
a460e745 598 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
599}
600
a460e745
IM
601void
602set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
603 irq_flow_handler_t handle, const char *name)
dd87eb3a 604{
a460e745
IM
605 set_irq_chip(irq, chip);
606 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 607}
46f4f8f6
RB
608
609void __init set_irq_noprobe(unsigned int irq)
610{
611 struct irq_desc *desc;
612 unsigned long flags;
613
85c0f909 614 if (irq >= nr_irqs) {
46f4f8f6
RB
615 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
616
617 return;
618 }
619
08678b08 620 desc = irq_to_desc(irq);
46f4f8f6
RB
621
622 spin_lock_irqsave(&desc->lock, flags);
623 desc->status |= IRQ_NOPROBE;
624 spin_unlock_irqrestore(&desc->lock, flags);
625}
626
627void __init set_irq_probe(unsigned int irq)
628{
629 struct irq_desc *desc;
630 unsigned long flags;
631
85c0f909 632 if (irq >= nr_irqs) {
46f4f8f6
RB
633 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
634
635 return;
636 }
637
08678b08 638 desc = irq_to_desc(irq);
46f4f8f6
RB
639
640 spin_lock_irqsave(&desc->lock, flags);
641 desc->status &= ~IRQ_NOPROBE;
642 spin_unlock_irqrestore(&desc->lock, flags);
643}