msi: Remove attach_msi_entry.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / kernel / irq / chip.c
CommitLineData
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1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
14#include <linux/module.h>
15#include <linux/interrupt.h>
16#include <linux/kernel_stat.h>
17
18#include "internals.h"
19
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20/**
21 * dynamic_irq_init - initialize a dynamically allocated irq
22 * @irq: irq number to initialize
23 */
24void dynamic_irq_init(unsigned int irq)
25{
26 struct irq_desc *desc;
27 unsigned long flags;
28
29 if (irq >= NR_IRQS) {
30 printk(KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
31 WARN_ON(1);
32 return;
33 }
34
35 /* Ensure we don't have left over values from a previous use of this irq */
36 desc = irq_desc + irq;
37 spin_lock_irqsave(&desc->lock, flags);
38 desc->status = IRQ_DISABLED;
39 desc->chip = &no_irq_chip;
40 desc->handle_irq = handle_bad_irq;
41 desc->depth = 1;
42 desc->handler_data = NULL;
43 desc->chip_data = NULL;
44 desc->action = NULL;
45 desc->irq_count = 0;
46 desc->irqs_unhandled = 0;
47#ifdef CONFIG_SMP
48 desc->affinity = CPU_MASK_ALL;
49#endif
50 spin_unlock_irqrestore(&desc->lock, flags);
51}
52
53/**
54 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
55 * @irq: irq number to initialize
56 */
57void dynamic_irq_cleanup(unsigned int irq)
58{
59 struct irq_desc *desc;
60 unsigned long flags;
61
62 if (irq >= NR_IRQS) {
63 printk(KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
64 WARN_ON(1);
65 return;
66 }
67
68 desc = irq_desc + irq;
69 spin_lock_irqsave(&desc->lock, flags);
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EB
70 if (desc->action) {
71 spin_unlock_irqrestore(&desc->lock, flags);
72 printk(KERN_ERR "Destroying IRQ%d without calling free_irq\n",
73 irq);
74 WARN_ON(1);
75 return;
76 }
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EB
77 desc->handle_irq = handle_bad_irq;
78 desc->chip = &no_irq_chip;
79 spin_unlock_irqrestore(&desc->lock, flags);
80}
81
82
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TG
83/**
84 * set_irq_chip - set the irq chip for an irq
85 * @irq: irq number
86 * @chip: pointer to irq chip description structure
87 */
88int set_irq_chip(unsigned int irq, struct irq_chip *chip)
89{
90 struct irq_desc *desc;
91 unsigned long flags;
92
93 if (irq >= NR_IRQS) {
94 printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
95 WARN_ON(1);
96 return -EINVAL;
97 }
98
99 if (!chip)
100 chip = &no_irq_chip;
101
102 desc = irq_desc + irq;
103 spin_lock_irqsave(&desc->lock, flags);
104 irq_chip_set_defaults(chip);
105 desc->chip = chip;
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106 spin_unlock_irqrestore(&desc->lock, flags);
107
108 return 0;
109}
110EXPORT_SYMBOL(set_irq_chip);
111
112/**
113 * set_irq_type - set the irq type for an irq
114 * @irq: irq number
115 * @type: interrupt type - see include/linux/interrupt.h
116 */
117int set_irq_type(unsigned int irq, unsigned int type)
118{
119 struct irq_desc *desc;
120 unsigned long flags;
121 int ret = -ENXIO;
122
123 if (irq >= NR_IRQS) {
124 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
125 return -ENODEV;
126 }
127
128 desc = irq_desc + irq;
129 if (desc->chip->set_type) {
130 spin_lock_irqsave(&desc->lock, flags);
131 ret = desc->chip->set_type(irq, type);
132 spin_unlock_irqrestore(&desc->lock, flags);
133 }
134 return ret;
135}
136EXPORT_SYMBOL(set_irq_type);
137
138/**
139 * set_irq_data - set irq type data for an irq
140 * @irq: Interrupt number
141 * @data: Pointer to interrupt specific data
142 *
143 * Set the hardware irq controller data for an irq
144 */
145int set_irq_data(unsigned int irq, void *data)
146{
147 struct irq_desc *desc;
148 unsigned long flags;
149
150 if (irq >= NR_IRQS) {
151 printk(KERN_ERR
152 "Trying to install controller data for IRQ%d\n", irq);
153 return -EINVAL;
154 }
155
156 desc = irq_desc + irq;
157 spin_lock_irqsave(&desc->lock, flags);
158 desc->handler_data = data;
159 spin_unlock_irqrestore(&desc->lock, flags);
160 return 0;
161}
162EXPORT_SYMBOL(set_irq_data);
163
164/**
165 * set_irq_chip_data - set irq chip data for an irq
166 * @irq: Interrupt number
167 * @data: Pointer to chip specific data
168 *
169 * Set the hardware irq chip data for an irq
170 */
171int set_irq_chip_data(unsigned int irq, void *data)
172{
173 struct irq_desc *desc = irq_desc + irq;
174 unsigned long flags;
175
176 if (irq >= NR_IRQS || !desc->chip) {
177 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
178 return -EINVAL;
179 }
180
181 spin_lock_irqsave(&desc->lock, flags);
182 desc->chip_data = data;
183 spin_unlock_irqrestore(&desc->lock, flags);
184
185 return 0;
186}
187EXPORT_SYMBOL(set_irq_chip_data);
188
189/*
190 * default enable function
191 */
192static void default_enable(unsigned int irq)
193{
194 struct irq_desc *desc = irq_desc + irq;
195
196 desc->chip->unmask(irq);
197 desc->status &= ~IRQ_MASKED;
198}
199
200/*
201 * default disable function
202 */
203static void default_disable(unsigned int irq)
204{
205 struct irq_desc *desc = irq_desc + irq;
206
207 if (!(desc->status & IRQ_DELAYED_DISABLE))
2ff6fd8f 208 desc->chip->mask(irq);
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209}
210
211/*
212 * default startup function
213 */
214static unsigned int default_startup(unsigned int irq)
215{
216 irq_desc[irq].chip->enable(irq);
217
218 return 0;
219}
220
221/*
222 * Fixup enable/disable function pointers
223 */
224void irq_chip_set_defaults(struct irq_chip *chip)
225{
226 if (!chip->enable)
227 chip->enable = default_enable;
228 if (!chip->disable)
229 chip->disable = default_disable;
230 if (!chip->startup)
231 chip->startup = default_startup;
232 if (!chip->shutdown)
233 chip->shutdown = chip->disable;
234 if (!chip->name)
235 chip->name = chip->typename;
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ZY
236 if (!chip->end)
237 chip->end = dummy_irq_chip.end;
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TG
238}
239
240static inline void mask_ack_irq(struct irq_desc *desc, int irq)
241{
242 if (desc->chip->mask_ack)
243 desc->chip->mask_ack(irq);
244 else {
245 desc->chip->mask(irq);
246 desc->chip->ack(irq);
247 }
248}
249
250/**
251 * handle_simple_irq - Simple and software-decoded IRQs.
252 * @irq: the interrupt number
253 * @desc: the interrupt description structure for this irq
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254 *
255 * Simple interrupts are either sent from a demultiplexing interrupt
256 * handler or come from hardware, where no interrupt hardware control
257 * is necessary.
258 *
259 * Note: The caller is expected to handle the ack, clear, mask and
260 * unmask issues if necessary.
261 */
262void fastcall
7d12e780 263handle_simple_irq(unsigned int irq, struct irq_desc *desc)
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TG
264{
265 struct irqaction *action;
266 irqreturn_t action_ret;
267 const unsigned int cpu = smp_processor_id();
268
269 spin_lock(&desc->lock);
270
271 if (unlikely(desc->status & IRQ_INPROGRESS))
272 goto out_unlock;
273 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
274 kstat_cpu(cpu).irqs[irq]++;
275
276 action = desc->action;
277 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
278 goto out_unlock;
279
280 desc->status |= IRQ_INPROGRESS;
281 spin_unlock(&desc->lock);
282
7d12e780 283 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 284 if (!noirqdebug)
7d12e780 285 note_interrupt(irq, desc, action_ret);
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286
287 spin_lock(&desc->lock);
288 desc->status &= ~IRQ_INPROGRESS;
289out_unlock:
290 spin_unlock(&desc->lock);
291}
292
293/**
294 * handle_level_irq - Level type irq handler
295 * @irq: the interrupt number
296 * @desc: the interrupt description structure for this irq
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297 *
298 * Level type interrupts are active as long as the hardware line has
299 * the active level. This may require to mask the interrupt and unmask
300 * it after the associated handler has acknowledged the device, so the
301 * interrupt line is back to inactive.
302 */
303void fastcall
7d12e780 304handle_level_irq(unsigned int irq, struct irq_desc *desc)
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305{
306 unsigned int cpu = smp_processor_id();
307 struct irqaction *action;
308 irqreturn_t action_ret;
309
310 spin_lock(&desc->lock);
311 mask_ack_irq(desc, irq);
312
313 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 314 goto out_unlock;
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TG
315 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
316 kstat_cpu(cpu).irqs[irq]++;
317
318 /*
319 * If its disabled or no action available
320 * keep it masked and get out of here
321 */
322 action = desc->action;
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BH
323 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
324 desc->status |= IRQ_PENDING;
86998aa6 325 goto out_unlock;
5a43a066 326 }
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TG
327
328 desc->status |= IRQ_INPROGRESS;
5a43a066 329 desc->status &= ~IRQ_PENDING;
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330 spin_unlock(&desc->lock);
331
7d12e780 332 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 333 if (!noirqdebug)
7d12e780 334 note_interrupt(irq, desc, action_ret);
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TG
335
336 spin_lock(&desc->lock);
337 desc->status &= ~IRQ_INPROGRESS;
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TG
338 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
339 desc->chip->unmask(irq);
86998aa6 340out_unlock:
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TG
341 spin_unlock(&desc->lock);
342}
343
344/**
47c2a3aa 345 * handle_fasteoi_irq - irq handler for transparent controllers
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TG
346 * @irq: the interrupt number
347 * @desc: the interrupt description structure for this irq
dd87eb3a 348 *
47c2a3aa 349 * Only a single callback will be issued to the chip: an ->eoi()
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TG
350 * call when the interrupt has been serviced. This enables support
351 * for modern forms of interrupt handlers, which handle the flow
352 * details in hardware, transparently.
353 */
354void fastcall
7d12e780 355handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
356{
357 unsigned int cpu = smp_processor_id();
358 struct irqaction *action;
359 irqreturn_t action_ret;
360
361 spin_lock(&desc->lock);
362
363 if (unlikely(desc->status & IRQ_INPROGRESS))
364 goto out;
365
366 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
367 kstat_cpu(cpu).irqs[irq]++;
368
369 /*
370 * If its disabled or no action available
371 * keep it masked and get out of here
372 */
373 action = desc->action;
98bb244b
BH
374 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
375 desc->status |= IRQ_PENDING;
dd87eb3a 376 goto out;
98bb244b 377 }
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TG
378
379 desc->status |= IRQ_INPROGRESS;
98bb244b 380 desc->status &= ~IRQ_PENDING;
dd87eb3a
TG
381 spin_unlock(&desc->lock);
382
7d12e780 383 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 384 if (!noirqdebug)
7d12e780 385 note_interrupt(irq, desc, action_ret);
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TG
386
387 spin_lock(&desc->lock);
388 desc->status &= ~IRQ_INPROGRESS;
389out:
47c2a3aa 390 desc->chip->eoi(irq);
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TG
391
392 spin_unlock(&desc->lock);
393}
394
395/**
396 * handle_edge_irq - edge type IRQ handler
397 * @irq: the interrupt number
398 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
399 *
400 * Interrupt occures on the falling and/or rising edge of a hardware
401 * signal. The occurence is latched into the irq controller hardware
402 * and must be acked in order to be reenabled. After the ack another
403 * interrupt can happen on the same source even before the first one
404 * is handled by the assosiacted event handler. If this happens it
405 * might be necessary to disable (mask) the interrupt depending on the
406 * controller hardware. This requires to reenable the interrupt inside
407 * of the loop which handles the interrupts which have arrived while
408 * the handler was running. If all pending interrupts are handled, the
409 * loop is left.
410 */
411void fastcall
7d12e780 412handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
413{
414 const unsigned int cpu = smp_processor_id();
415
416 spin_lock(&desc->lock);
417
418 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
419
420 /*
421 * If we're currently running this IRQ, or its disabled,
422 * we shouldn't process the IRQ. Mark it pending, handle
423 * the necessary masking and go out
424 */
425 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
426 !desc->action)) {
427 desc->status |= (IRQ_PENDING | IRQ_MASKED);
428 mask_ack_irq(desc, irq);
429 goto out_unlock;
430 }
431
432 kstat_cpu(cpu).irqs[irq]++;
433
434 /* Start handling the irq */
435 desc->chip->ack(irq);
436
437 /* Mark the IRQ currently in progress.*/
438 desc->status |= IRQ_INPROGRESS;
439
440 do {
441 struct irqaction *action = desc->action;
442 irqreturn_t action_ret;
443
444 if (unlikely(!action)) {
445 desc->chip->mask(irq);
446 goto out_unlock;
447 }
448
449 /*
450 * When another irq arrived while we were handling
451 * one, we could have masked the irq.
452 * Renable it, if it was not disabled in meantime.
453 */
454 if (unlikely((desc->status &
455 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
456 (IRQ_PENDING | IRQ_MASKED))) {
457 desc->chip->unmask(irq);
458 desc->status &= ~IRQ_MASKED;
459 }
460
461 desc->status &= ~IRQ_PENDING;
462 spin_unlock(&desc->lock);
7d12e780 463 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 464 if (!noirqdebug)
7d12e780 465 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
466 spin_lock(&desc->lock);
467
468 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
469
470 desc->status &= ~IRQ_INPROGRESS;
471out_unlock:
472 spin_unlock(&desc->lock);
473}
474
475#ifdef CONFIG_SMP
476/**
477 * handle_percpu_IRQ - Per CPU local irq handler
478 * @irq: the interrupt number
479 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
480 *
481 * Per CPU interrupts on SMP machines without locking requirements
482 */
483void fastcall
7d12e780 484handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
485{
486 irqreturn_t action_ret;
487
488 kstat_this_cpu.irqs[irq]++;
489
490 if (desc->chip->ack)
491 desc->chip->ack(irq);
492
7d12e780 493 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 494 if (!noirqdebug)
7d12e780 495 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
496
497 if (desc->chip->eoi)
498 desc->chip->eoi(irq);
499}
500
501#endif /* CONFIG_SMP */
502
503void
a460e745
IM
504__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
505 const char *name)
dd87eb3a
TG
506{
507 struct irq_desc *desc;
508 unsigned long flags;
509
510 if (irq >= NR_IRQS) {
511 printk(KERN_ERR
512 "Trying to install type control for IRQ%d\n", irq);
513 return;
514 }
515
516 desc = irq_desc + irq;
517
518 if (!handle)
519 handle = handle_bad_irq;
9d7ac8be 520 else if (desc->chip == &no_irq_chip) {
f8b5473f 521 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 522 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
523 /*
524 * Some ARM implementations install a handler for really dumb
525 * interrupt hardware without setting an irq_chip. This worked
526 * with the ARM no_irq_chip but the check in setup_irq would
527 * prevent us to setup the interrupt at all. Switch it to
528 * dummy_irq_chip for easy transition.
529 */
530 desc->chip = &dummy_irq_chip;
531 }
dd87eb3a
TG
532
533 spin_lock_irqsave(&desc->lock, flags);
534
535 /* Uninstall? */
536 if (handle == handle_bad_irq) {
537 if (desc->chip != &no_irq_chip) {
538 desc->chip->mask(irq);
539 desc->chip->ack(irq);
540 }
541 desc->status |= IRQ_DISABLED;
542 desc->depth = 1;
543 }
544 desc->handle_irq = handle;
a460e745 545 desc->name = name;
dd87eb3a
TG
546
547 if (handle != handle_bad_irq && is_chained) {
548 desc->status &= ~IRQ_DISABLED;
549 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
550 desc->depth = 0;
551 desc->chip->unmask(irq);
552 }
553 spin_unlock_irqrestore(&desc->lock, flags);
554}
555
556void
557set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 558 irq_flow_handler_t handle)
dd87eb3a
TG
559{
560 set_irq_chip(irq, chip);
a460e745 561 __set_irq_handler(irq, handle, 0, NULL);
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TG
562}
563
a460e745
IM
564void
565set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
566 irq_flow_handler_t handle, const char *name)
dd87eb3a 567{
a460e745
IM
568 set_irq_chip(irq, chip);
569 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 570}