ASoC: wm8960: add support for big-endian audio samples
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / sound / soc.h
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1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_SND_SOC_H
14#define __LINUX_SND_SOC_H
15
16#include <linux/platform_device.h>
17#include <linux/types.h>
d5021ec9 18#include <linux/notifier.h>
4484bb2e 19#include <linux/workqueue.h>
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20#include <linux/interrupt.h>
21#include <linux/kernel.h>
be3ea3b9 22#include <linux/regmap.h>
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23#include <sound/core.h>
24#include <sound/pcm.h>
49681077 25#include <sound/compress_driver.h>
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26#include <sound/control.h>
27#include <sound/ac97_codec.h>
28
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29/*
30 * Convenience kcontrol builders
31 */
460acbec 32#define SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, xmax, xinvert) \
4eaa9819 33 ((unsigned long)&(struct soc_mixer_control) \
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34 {.reg = xreg, .rreg = xreg, .shift = shift_left, \
35 .rshift = shift_right, .max = xmax, .platform_max = xmax, \
36 .invert = xinvert})
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37#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \
38 SOC_DOUBLE_VALUE(xreg, xshift, xshift, xmax, xinvert)
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39#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
40 ((unsigned long)&(struct soc_mixer_control) \
d11bb4a9 41 {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
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42#define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \
43 ((unsigned long)&(struct soc_mixer_control) \
44 {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
45 .max = xmax, .platform_max = xmax, .invert = xinvert})
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46#define SOC_DOUBLE_R_RANGE_VALUE(xlreg, xrreg, xshift, xmin, xmax, xinvert) \
47 ((unsigned long)&(struct soc_mixer_control) \
48 {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
49 .min = xmin, .max = xmax, .platform_max = xmax, .invert = xinvert})
a7a4ac86 50#define SOC_SINGLE(xname, reg, shift, max, invert) \
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51{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
52 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
53 .put = snd_soc_put_volsw, \
a7a4ac86 54 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
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55#define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \
56{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
57 .info = snd_soc_info_volsw_range, .get = snd_soc_get_volsw_range, \
58 .put = snd_soc_put_volsw_range, \
59 .private_value = (unsigned long)&(struct soc_mixer_control) \
60 {.reg = xreg, .shift = xshift, .min = xmin,\
61 .max = xmax, .platform_max = xmax, .invert = xinvert} }
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62#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
63{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
64 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
65 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
66 .tlv.p = (tlv_array), \
67 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
68 .put = snd_soc_put_volsw, \
69 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
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70#define SOC_SINGLE_SX_TLV(xname, xreg, xshift, xmin, xmax, tlv_array) \
71{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
72 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
73 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
74 .tlv.p = (tlv_array),\
75 .info = snd_soc_info_volsw, \
76 .get = snd_soc_get_volsw_sx,\
77 .put = snd_soc_put_volsw_sx, \
78 .private_value = (unsigned long)&(struct soc_mixer_control) \
79 {.reg = xreg, .rreg = xreg, \
80 .shift = xshift, .rshift = xshift, \
81 .max = xmax, .min = xmin} }
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82#define SOC_SINGLE_RANGE_TLV(xname, xreg, xshift, xmin, xmax, xinvert, tlv_array) \
83{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
84 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
85 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
86 .tlv.p = (tlv_array), \
87 .info = snd_soc_info_volsw_range, \
88 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
89 .private_value = (unsigned long)&(struct soc_mixer_control) \
90 {.reg = xreg, .shift = xshift, .min = xmin,\
91 .max = xmax, .platform_max = xmax, .invert = xinvert} }
460acbec 92#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
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93{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
94 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
95 .put = snd_soc_put_volsw, \
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96 .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
97 max, invert) }
4eaa9819 98#define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \
808db4a4 99{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
e8f5a103 100 .info = snd_soc_info_volsw, \
974815ba 101 .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
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102 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
103 xmax, xinvert) }
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104#define SOC_DOUBLE_R_RANGE(xname, reg_left, reg_right, xshift, xmin, \
105 xmax, xinvert) \
106{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
107 .info = snd_soc_info_volsw_range, \
108 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
109 .private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
110 xshift, xmin, xmax, xinvert) }
460acbec 111#define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \
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112{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
113 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
114 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
115 .tlv.p = (tlv_array), \
116 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
117 .put = snd_soc_put_volsw, \
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118 .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
119 max, invert) }
4eaa9819 120#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
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121{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
122 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
123 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
124 .tlv.p = (tlv_array), \
e8f5a103 125 .info = snd_soc_info_volsw, \
974815ba 126 .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
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127 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
128 xmax, xinvert) }
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129#define SOC_DOUBLE_R_RANGE_TLV(xname, reg_left, reg_right, xshift, xmin, \
130 xmax, xinvert, tlv_array) \
131{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
132 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
133 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
134 .tlv.p = (tlv_array), \
135 .info = snd_soc_info_volsw_range, \
136 .get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
137 .private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
138 xshift, xmin, xmax, xinvert) }
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139#define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_array) \
140{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
141 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
142 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
143 .tlv.p = (tlv_array), \
144 .info = snd_soc_info_volsw, \
145 .get = snd_soc_get_volsw_sx, \
146 .put = snd_soc_put_volsw_sx, \
147 .private_value = (unsigned long)&(struct soc_mixer_control) \
148 {.reg = xreg, .rreg = xrreg, \
149 .shift = xshift, .rshift = xshift, \
150 .max = xmax, .min = xmin} }
4eaa9819 151#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
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152{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
153 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
154 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
155 .tlv.p = (tlv_array), \
156 .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
157 .put = snd_soc_put_volsw_s8, \
4eaa9819 158 .private_value = (unsigned long)&(struct soc_mixer_control) \
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159 {.reg = xreg, .min = xmin, .max = xmax, \
160 .platform_max = xmax} }
f8ba0b7b 161#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \
808db4a4 162{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
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163 .max = xmax, .texts = xtexts }
164#define SOC_ENUM_SINGLE(xreg, xshift, xmax, xtexts) \
165 SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmax, xtexts)
166#define SOC_ENUM_SINGLE_EXT(xmax, xtexts) \
167{ .max = xmax, .texts = xtexts }
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168#define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xmax, xtexts, xvalues) \
169{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
170 .mask = xmask, .max = xmax, .texts = xtexts, .values = xvalues}
171#define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xmax, xtexts, xvalues) \
172 SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xmax, xtexts, xvalues)
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173#define SOC_ENUM(xname, xenum) \
174{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
175 .info = snd_soc_info_enum_double, \
176 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
177 .private_value = (unsigned long)&xenum }
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178#define SOC_VALUE_ENUM(xname, xenum) \
179{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
74155556 180 .info = snd_soc_info_enum_double, \
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181 .get = snd_soc_get_value_enum_double, \
182 .put = snd_soc_put_value_enum_double, \
183 .private_value = (unsigned long)&xenum }
f8ba0b7b 184#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
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185 xhandler_get, xhandler_put) \
186{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1c433fbd 187 .info = snd_soc_info_volsw, \
808db4a4 188 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 189 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
460acbec 190#define SOC_DOUBLE_EXT(xname, reg, shift_left, shift_right, max, invert,\
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191 xhandler_get, xhandler_put) \
192{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
193 .info = snd_soc_info_volsw, \
194 .get = xhandler_get, .put = xhandler_put, \
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195 .private_value = \
196 SOC_DOUBLE_VALUE(reg, shift_left, shift_right, max, invert) }
f8ba0b7b 197#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
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198 xhandler_get, xhandler_put, tlv_array) \
199{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
200 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
201 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
202 .tlv.p = (tlv_array), \
203 .info = snd_soc_info_volsw, \
204 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 205 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
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206#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
207 xhandler_get, xhandler_put, tlv_array) \
208{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
209 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
210 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
211 .tlv.p = (tlv_array), \
212 .info = snd_soc_info_volsw, \
213 .get = xhandler_get, .put = xhandler_put, \
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214 .private_value = SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, \
215 xmax, xinvert) }
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216#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
217 xhandler_get, xhandler_put, tlv_array) \
218{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
219 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
220 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
221 .tlv.p = (tlv_array), \
e8f5a103 222 .info = snd_soc_info_volsw, \
3ce91d5a 223 .get = xhandler_get, .put = xhandler_put, \
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224 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
225 xmax, xinvert) }
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226#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
227{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
228 .info = snd_soc_info_bool_ext, \
229 .get = xhandler_get, .put = xhandler_put, \
230 .private_value = xdata }
231#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
232{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
233 .info = snd_soc_info_enum_ext, \
234 .get = xhandler_get, .put = xhandler_put, \
235 .private_value = (unsigned long)&xenum }
236
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237#define SND_SOC_BYTES(xname, xbase, xregs) \
238{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
239 .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
240 .put = snd_soc_bytes_put, .private_value = \
241 ((unsigned long)&(struct soc_bytes) \
242 {.base = xbase, .num_regs = xregs }) }
b6f4bb38 243
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244#define SND_SOC_BYTES_MASK(xname, xbase, xregs, xmask) \
245{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
246 .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \
247 .put = snd_soc_bytes_put, .private_value = \
248 ((unsigned long)&(struct soc_bytes) \
249 {.base = xbase, .num_regs = xregs, \
250 .mask = xmask }) }
251
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252#define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \
253 xmin, xmax, xinvert) \
254{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
255 .info = snd_soc_info_xr_sx, .get = snd_soc_get_xr_sx, \
256 .put = snd_soc_put_xr_sx, \
257 .private_value = (unsigned long)&(struct soc_mreg_control) \
258 {.regbase = xregbase, .regcount = xregcount, .nbits = xnbits, \
259 .invert = xinvert, .min = xmin, .max = xmax} }
260
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261#define SOC_SINGLE_STROBE(xname, xreg, xshift, xinvert) \
262 SOC_SINGLE_EXT(xname, xreg, xshift, 1, xinvert, \
263 snd_soc_get_strobe, snd_soc_put_strobe)
264
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265/*
266 * Simplified versions of above macros, declaring a struct and calculating
267 * ARRAY_SIZE internally
268 */
269#define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \
270 struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \
271 ARRAY_SIZE(xtexts), xtexts)
272#define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \
273 SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts)
274#define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \
275 struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts)
276#define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \
277 struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \
278 ARRAY_SIZE(xtexts), xtexts, xvalues)
279#define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \
280 SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues)
281
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282/*
283 * Component probe and remove ordering levels for components with runtime
284 * dependencies.
285 */
286#define SND_SOC_COMP_ORDER_FIRST -2
287#define SND_SOC_COMP_ORDER_EARLY -1
288#define SND_SOC_COMP_ORDER_NORMAL 0
289#define SND_SOC_COMP_ORDER_LATE 1
290#define SND_SOC_COMP_ORDER_LAST 2
291
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292/*
293 * Bias levels
294 *
295 * @ON: Bias is fully on for audio playback and capture operations.
296 * @PREPARE: Prepare for audio operations. Called before DAPM switching for
297 * stream start and stop operations.
298 * @STANDBY: Low power standby state when no playback/capture operations are
299 * in progress. NOTE: The transition time between STANDBY and ON
300 * should be as fast as possible and no longer than 10ms.
301 * @OFF: Power Off. No restrictions on transition times.
302 */
303enum snd_soc_bias_level {
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304 SND_SOC_BIAS_OFF = 0,
305 SND_SOC_BIAS_STANDBY = 1,
306 SND_SOC_BIAS_PREPARE = 2,
307 SND_SOC_BIAS_ON = 3,
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308};
309
5a504963 310struct device_node;
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311struct snd_jack;
312struct snd_soc_card;
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313struct snd_soc_pcm_stream;
314struct snd_soc_ops;
808db4a4 315struct snd_soc_pcm_runtime;
3c4b266f 316struct snd_soc_dai;
f0fba2ad 317struct snd_soc_dai_driver;
12a48a8c 318struct snd_soc_platform;
d273ebe7 319struct snd_soc_dai_link;
f0fba2ad 320struct snd_soc_platform_driver;
808db4a4 321struct snd_soc_codec;
f0fba2ad 322struct snd_soc_codec_driver;
808db4a4 323struct soc_enum;
8a2cd618 324struct snd_soc_jack;
fa9879ed 325struct snd_soc_jack_zone;
8a2cd618 326struct snd_soc_jack_pin;
7a30a3db 327struct snd_soc_cache_ops;
ce6120cc 328#include <sound/soc-dapm.h>
01d7584c 329#include <sound/soc-dpcm.h>
f0fba2ad 330
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331#ifdef CONFIG_GPIOLIB
332struct snd_soc_jack_gpio;
333#endif
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334
335typedef int (*hw_write_t)(void *,const char* ,int);
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336
337extern struct snd_ac97_bus_ops soc_ac97_ops;
338
7084a42b 339enum snd_soc_control_type {
e9c03905 340 SND_SOC_I2C = 1,
7084a42b 341 SND_SOC_SPI,
0671da18 342 SND_SOC_REGMAP,
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343};
344
7a30a3db 345enum snd_soc_compress_type {
119bd789 346 SND_SOC_FLAT_COMPRESSION = 1,
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347};
348
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349enum snd_soc_pcm_subclass {
350 SND_SOC_PCM_CLASS_PCM = 0,
351 SND_SOC_PCM_CLASS_BE = 1,
352};
353
01b9d99a 354enum snd_soc_card_subclass {
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355 SND_SOC_CARD_CLASS_INIT = 0,
356 SND_SOC_CARD_CLASS_RUNTIME = 1,
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357};
358
ec4ee52a 359int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
da1c6ea6 360 int source, unsigned int freq, int dir);
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361int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
362 unsigned int freq_in, unsigned int freq_out);
363
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364int snd_soc_register_card(struct snd_soc_card *card);
365int snd_soc_unregister_card(struct snd_soc_card *card);
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366int snd_soc_suspend(struct device *dev);
367int snd_soc_resume(struct device *dev);
368int snd_soc_poweroff(struct device *dev);
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369int snd_soc_register_platform(struct device *dev,
370 struct snd_soc_platform_driver *platform_drv);
371void snd_soc_unregister_platform(struct device *dev);
372int snd_soc_register_codec(struct device *dev,
001ae4c0 373 const struct snd_soc_codec_driver *codec_drv,
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374 struct snd_soc_dai_driver *dai_drv, int num_dai);
375void snd_soc_unregister_codec(struct device *dev);
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376int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
377 unsigned int reg);
239c9706
DP
378int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
379 unsigned int reg);
380int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
381 unsigned int reg);
17a52fd6 382int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
7084a42b
MB
383 int addr_bits, int data_bits,
384 enum snd_soc_control_type control);
7a30a3db
DP
385int snd_soc_cache_sync(struct snd_soc_codec *codec);
386int snd_soc_cache_init(struct snd_soc_codec *codec);
387int snd_soc_cache_exit(struct snd_soc_codec *codec);
388int snd_soc_cache_write(struct snd_soc_codec *codec,
389 unsigned int reg, unsigned int value);
390int snd_soc_cache_read(struct snd_soc_codec *codec,
391 unsigned int reg, unsigned int *value);
066d16c3
DP
392int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
393 unsigned int reg);
394int snd_soc_default_readable_register(struct snd_soc_codec *codec,
395 unsigned int reg);
8020454c
DP
396int snd_soc_default_writable_register(struct snd_soc_codec *codec,
397 unsigned int reg);
f1442bc1
LG
398int snd_soc_platform_read(struct snd_soc_platform *platform,
399 unsigned int reg);
400int snd_soc_platform_write(struct snd_soc_platform *platform,
401 unsigned int reg, unsigned int val);
354a2142 402int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num);
49681077 403int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num);
12a48a8c 404
47c88fff
LG
405struct snd_pcm_substream *snd_soc_get_dai_substream(struct snd_soc_card *card,
406 const char *dai_link, int stream);
407struct snd_soc_pcm_runtime *snd_soc_get_pcm_runtime(struct snd_soc_card *card,
408 const char *dai_link);
409
7aae816d
MB
410/* Utility functions to get clock rates from various things */
411int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
412int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
c0fa59df 413int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
7aae816d
MB
414int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
415
808db4a4
RP
416/* set runtime hw params */
417int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
418 const struct snd_pcm_hardware *hw);
808db4a4 419
07bf84aa
LG
420int snd_soc_platform_trigger(struct snd_pcm_substream *substream,
421 int cmd, struct snd_soc_platform *platform);
422
8a2cd618 423/* Jack reporting */
f0fba2ad 424int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type,
8a2cd618
MB
425 struct snd_soc_jack *jack);
426void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
427int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
428 struct snd_soc_jack_pin *pins);
d5021ec9
MB
429void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
430 struct notifier_block *nb);
431void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
432 struct notifier_block *nb);
fa9879ed
VK
433int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
434 struct snd_soc_jack_zone *zones);
435int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
ec67624d
LCM
436#ifdef CONFIG_GPIOLIB
437int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
438 struct snd_soc_jack_gpio *gpios);
439void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
440 struct snd_soc_jack_gpio *gpios);
441#endif
8a2cd618 442
808db4a4
RP
443/* codec register bit access */
444int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 445 unsigned int mask, unsigned int value);
dd1b3d53
MB
446int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
447 unsigned short reg, unsigned int mask,
448 unsigned int value);
808db4a4 449int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 450 unsigned int mask, unsigned int value);
808db4a4
RP
451
452int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
453 struct snd_ac97_bus_ops *ops, int num);
454void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);
455
456/*
457 *Controls
458 */
459struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
3056557f 460 void *data, const char *long_name,
efb7ac3f 461 const char *prefix);
022658be 462int snd_soc_add_codec_controls(struct snd_soc_codec *codec,
3e8e1952 463 const struct snd_kcontrol_new *controls, int num_controls);
a491a5c8
LG
464int snd_soc_add_platform_controls(struct snd_soc_platform *platform,
465 const struct snd_kcontrol_new *controls, int num_controls);
022658be
LG
466int snd_soc_add_card_controls(struct snd_soc_card *soc_card,
467 const struct snd_kcontrol_new *controls, int num_controls);
468int snd_soc_add_dai_controls(struct snd_soc_dai *dai,
469 const struct snd_kcontrol_new *controls, int num_controls);
808db4a4
RP
470int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
471 struct snd_ctl_elem_info *uinfo);
472int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
473 struct snd_ctl_elem_info *uinfo);
474int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
475 struct snd_ctl_elem_value *ucontrol);
476int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
477 struct snd_ctl_elem_value *ucontrol);
2e72f8e3
PU
478int snd_soc_get_value_enum_double(struct snd_kcontrol *kcontrol,
479 struct snd_ctl_elem_value *ucontrol);
480int snd_soc_put_value_enum_double(struct snd_kcontrol *kcontrol,
481 struct snd_ctl_elem_value *ucontrol);
808db4a4
RP
482int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
483 struct snd_ctl_elem_info *uinfo);
484int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
485 struct snd_ctl_elem_info *uinfo);
392abe9c 486#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info
808db4a4
RP
487int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
488 struct snd_ctl_elem_value *ucontrol);
489int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
490 struct snd_ctl_elem_value *ucontrol);
a92f1394
PU
491#define snd_soc_get_volsw_2r snd_soc_get_volsw
492#define snd_soc_put_volsw_2r snd_soc_put_volsw
1d99f243
BA
493int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol,
494 struct snd_ctl_elem_value *ucontrol);
495int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol,
496 struct snd_ctl_elem_value *ucontrol);
e13ac2e9
MB
497int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol,
498 struct snd_ctl_elem_info *uinfo);
499int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
500 struct snd_ctl_elem_value *ucontrol);
501int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
502 struct snd_ctl_elem_value *ucontrol);
6c9d8cf6
AT
503int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol,
504 struct snd_ctl_elem_info *uinfo);
505int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
506 struct snd_ctl_elem_value *ucontrol);
507int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
508 struct snd_ctl_elem_value *ucontrol);
637d3847
PU
509int snd_soc_limit_volume(struct snd_soc_codec *codec,
510 const char *name, int max);
71d08516
MB
511int snd_soc_bytes_info(struct snd_kcontrol *kcontrol,
512 struct snd_ctl_elem_info *uinfo);
513int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
514 struct snd_ctl_elem_value *ucontrol);
515int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
516 struct snd_ctl_elem_value *ucontrol);
4183eed2
KK
517int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol,
518 struct snd_ctl_elem_info *uinfo);
519int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
520 struct snd_ctl_elem_value *ucontrol);
521int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol,
522 struct snd_ctl_elem_value *ucontrol);
dd7b10b3
KK
523int snd_soc_get_strobe(struct snd_kcontrol *kcontrol,
524 struct snd_ctl_elem_value *ucontrol);
525int snd_soc_put_strobe(struct snd_kcontrol *kcontrol,
526 struct snd_ctl_elem_value *ucontrol);
808db4a4 527
066d16c3
DP
528/**
529 * struct snd_soc_reg_access - Describes whether a given register is
530 * readable, writable or volatile.
531 *
532 * @reg: the register number
533 * @read: whether this register is readable
534 * @write: whether this register is writable
535 * @vol: whether this register is volatile
536 */
537struct snd_soc_reg_access {
538 u16 reg;
539 u16 read;
540 u16 write;
541 u16 vol;
542};
543
8a2cd618
MB
544/**
545 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
546 *
547 * @pin: name of the pin to update
548 * @mask: bits to check for in reported jack status
549 * @invert: if non-zero then pin is enabled when status is not reported
550 */
551struct snd_soc_jack_pin {
552 struct list_head list;
553 const char *pin;
554 int mask;
555 bool invert;
556};
557
fa9879ed
VK
558/**
559 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
560 *
561 * @min_mv: start voltage in mv
562 * @max_mv: end voltage in mv
563 * @jack_type: type of jack that is expected for this voltage
564 * @debounce_time: debounce_time for jack, codec driver should wait for this
565 * duration before reading the adc for voltages
566 * @:list: list container
567 */
568struct snd_soc_jack_zone {
569 unsigned int min_mv;
570 unsigned int max_mv;
571 unsigned int jack_type;
572 unsigned int debounce_time;
573 struct list_head list;
574};
575
ec67624d
LCM
576/**
577 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
578 *
579 * @gpio: gpio number
580 * @name: gpio name
581 * @report: value to report when jack detected
582 * @invert: report presence in low state
583 * @debouce_time: debouce time in ms
7887ab3a 584 * @wake: enable as wake source
fadddc87
MB
585 * @jack_status_check: callback function which overrides the detection
586 * to provide more complex checks (eg, reading an
587 * ADC).
ec67624d
LCM
588 */
589#ifdef CONFIG_GPIOLIB
590struct snd_soc_jack_gpio {
591 unsigned int gpio;
592 const char *name;
593 int report;
594 int invert;
595 int debounce_time;
7887ab3a
MB
596 bool wake;
597
ec67624d 598 struct snd_soc_jack *jack;
4c14d78e 599 struct delayed_work work;
c871a053
JS
600
601 int (*jack_status_check)(void);
ec67624d
LCM
602};
603#endif
604
8a2cd618 605struct snd_soc_jack {
2667b4b8 606 struct mutex mutex;
8a2cd618 607 struct snd_jack *jack;
f0fba2ad 608 struct snd_soc_codec *codec;
8a2cd618
MB
609 struct list_head pins;
610 int status;
d5021ec9 611 struct blocking_notifier_head notifier;
fa9879ed 612 struct list_head jack_zones;
8a2cd618
MB
613};
614
808db4a4
RP
615/* SoC PCM stream information */
616struct snd_soc_pcm_stream {
f0fba2ad 617 const char *stream_name;
1c433fbd
GG
618 u64 formats; /* SNDRV_PCM_FMTBIT_* */
619 unsigned int rates; /* SNDRV_PCM_RATE_* */
808db4a4
RP
620 unsigned int rate_min; /* min rate */
621 unsigned int rate_max; /* max rate */
622 unsigned int channels_min; /* min channels */
623 unsigned int channels_max; /* max channels */
58ba9b25 624 unsigned int sig_bits; /* number of bits of content */
808db4a4
RP
625};
626
627/* SoC audio ops */
628struct snd_soc_ops {
629 int (*startup)(struct snd_pcm_substream *);
630 void (*shutdown)(struct snd_pcm_substream *);
631 int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
632 int (*hw_free)(struct snd_pcm_substream *);
633 int (*prepare)(struct snd_pcm_substream *);
634 int (*trigger)(struct snd_pcm_substream *, int);
635};
636
49681077
VK
637struct snd_soc_compr_ops {
638 int (*startup)(struct snd_compr_stream *);
639 void (*shutdown)(struct snd_compr_stream *);
640 int (*set_params)(struct snd_compr_stream *);
641 int (*trigger)(struct snd_compr_stream *);
642};
643
7a30a3db
DP
644/* SoC cache ops */
645struct snd_soc_cache_ops {
0d735eaa 646 const char *name;
7a30a3db
DP
647 enum snd_soc_compress_type id;
648 int (*init)(struct snd_soc_codec *codec);
649 int (*exit)(struct snd_soc_codec *codec);
650 int (*read)(struct snd_soc_codec *codec, unsigned int reg,
651 unsigned int *value);
652 int (*write)(struct snd_soc_codec *codec, unsigned int reg,
653 unsigned int value);
654 int (*sync)(struct snd_soc_codec *codec);
655};
656
f0fba2ad 657/* SoC Audio Codec device */
808db4a4 658struct snd_soc_codec {
f0fba2ad 659 const char *name;
ead9b919 660 const char *name_prefix;
f0fba2ad 661 int id;
0d0cf00a 662 struct device *dev;
001ae4c0 663 const struct snd_soc_codec_driver *driver;
0d0cf00a 664
f0fba2ad
LG
665 struct mutex mutex;
666 struct snd_soc_card *card;
0d0cf00a 667 struct list_head list;
f0fba2ad
LG
668 struct list_head card_list;
669 int num_dai;
23bbce34 670 enum snd_soc_compress_type compress_type;
aea170a0 671 size_t reg_size; /* reg_cache_size * reg_word_size */
1500b7b5
DP
672 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
673 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 674 int (*writable_register)(struct snd_soc_codec *, unsigned int);
808db4a4
RP
675
676 /* runtime */
808db4a4
RP
677 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
678 unsigned int active;
dad8e7ae 679 unsigned int cache_bypass:1; /* Suppress access to the cache */
f0fba2ad
LG
680 unsigned int suspended:1; /* Codec is in suspend PM state */
681 unsigned int probed:1; /* Codec has been probed */
682 unsigned int ac97_registered:1; /* Codec has been AC97 registered */
0562f788 683 unsigned int ac97_created:1; /* Codec has been created by SoC */
f0fba2ad 684 unsigned int sysfs_registered:1; /* codec has been sysfs registered */
fdf0f54d 685 unsigned int cache_init:1; /* codec cache has been initialized */
8a713da8 686 unsigned int using_regmap:1; /* using regmap access */
aaee8ef1
MB
687 u32 cache_only; /* Suppress writes to hardware */
688 u32 cache_sync; /* Cache needs to be synced to hardware */
808db4a4
RP
689
690 /* codec IO */
691 void *control_data; /* codec control (i2c/3wire) data */
67850a89 692 enum snd_soc_control_type control_type;
808db4a4 693 hw_write_t hw_write;
afa2f106 694 unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int);
c3acec26
MB
695 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
696 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
5fb609d4 697 int (*bulk_write_raw)(struct snd_soc_codec *, unsigned int, const void *, size_t);
808db4a4 698 void *reg_cache;
3335ddca 699 const void *reg_def_copy;
7a30a3db
DP
700 const struct snd_soc_cache_ops *cache_ops;
701 struct mutex cache_rw_mutex;
be3ea3b9 702 int val_bytes;
a96ca338 703
808db4a4 704 /* dapm */
ce6120cc 705 struct snd_soc_dapm_context dapm;
1d69c5c5 706 unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
808db4a4 707
384c89e2 708#ifdef CONFIG_DEBUG_FS
88439ac7 709 struct dentry *debugfs_codec_root;
384c89e2 710 struct dentry *debugfs_reg;
79fb9387 711 struct dentry *debugfs_dapm;
384c89e2 712#endif
808db4a4
RP
713};
714
f0fba2ad
LG
715/* codec driver */
716struct snd_soc_codec_driver {
717
718 /* driver ops */
719 int (*probe)(struct snd_soc_codec *);
720 int (*remove)(struct snd_soc_codec *);
84b315ee 721 int (*suspend)(struct snd_soc_codec *);
f0fba2ad
LG
722 int (*resume)(struct snd_soc_codec *);
723
b7af1daf
MB
724 /* Default control and setup, added after probe() is run */
725 const struct snd_kcontrol_new *controls;
726 int num_controls;
89b95ac0
MB
727 const struct snd_soc_dapm_widget *dapm_widgets;
728 int num_dapm_widgets;
729 const struct snd_soc_dapm_route *dapm_routes;
730 int num_dapm_routes;
731
ec4ee52a
MB
732 /* codec wide operations */
733 int (*set_sysclk)(struct snd_soc_codec *codec,
da1c6ea6 734 int clk_id, int source, unsigned int freq, int dir);
ec4ee52a
MB
735 int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
736 unsigned int freq_in, unsigned int freq_out);
737
f0fba2ad
LG
738 /* codec IO */
739 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
740 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
741 int (*display_register)(struct snd_soc_codec *, char *,
742 size_t, unsigned int);
d4754ec9
DP
743 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
744 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 745 int (*writable_register)(struct snd_soc_codec *, unsigned int);
4a8923ba 746 unsigned int reg_cache_size;
f0fba2ad
LG
747 short reg_cache_step;
748 short reg_word_size;
749 const void *reg_cache_default;
066d16c3
DP
750 short reg_access_size;
751 const struct snd_soc_reg_access *reg_access_default;
7a30a3db 752 enum snd_soc_compress_type compress_type;
f0fba2ad
LG
753
754 /* codec bias level */
755 int (*set_bias_level)(struct snd_soc_codec *,
756 enum snd_soc_bias_level level);
33c5f969 757 bool idle_bias_off;
474b62d6
MB
758
759 void (*seq_notifier)(struct snd_soc_dapm_context *,
f85a9e0d 760 enum snd_soc_dapm_type, int);
0168bf0d 761
64a648c2
LG
762 /* codec stream completion event */
763 int (*stream_event)(struct snd_soc_dapm_context *dapm, int event);
764
5124e69e
MB
765 bool ignore_pmdown_time; /* Doesn't benefit from pmdown delay */
766
0168bf0d
LG
767 /* probe ordering - for components with runtime dependencies */
768 int probe_order;
769 int remove_order;
808db4a4
RP
770};
771
772/* SoC platform interface */
f0fba2ad 773struct snd_soc_platform_driver {
808db4a4 774
f0fba2ad
LG
775 int (*probe)(struct snd_soc_platform *);
776 int (*remove)(struct snd_soc_platform *);
777 int (*suspend)(struct snd_soc_dai *dai);
778 int (*resume)(struct snd_soc_dai *dai);
808db4a4
RP
779
780 /* pcm creation and destruction */
552d1ef6 781 int (*pcm_new)(struct snd_soc_pcm_runtime *);
808db4a4
RP
782 void (*pcm_free)(struct snd_pcm *);
783
cb2cf612
LG
784 /* Default control and setup, added after probe() is run */
785 const struct snd_kcontrol_new *controls;
786 int num_controls;
787 const struct snd_soc_dapm_widget *dapm_widgets;
788 int num_dapm_widgets;
789 const struct snd_soc_dapm_route *dapm_routes;
790 int num_dapm_routes;
791
258020d0
PU
792 /*
793 * For platform caused delay reporting.
794 * Optional.
795 */
796 snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
797 struct snd_soc_dai *);
798
49681077 799 /* platform stream pcm ops */
f0fba2ad 800 struct snd_pcm_ops *ops;
0168bf0d 801
49681077
VK
802 /* platform stream compress ops */
803 struct snd_compr_ops *compr_ops;
804
64a648c2
LG
805 /* platform stream completion event */
806 int (*stream_event)(struct snd_soc_dapm_context *dapm, int event);
807
0168bf0d
LG
808 /* probe ordering - for components with runtime dependencies */
809 int probe_order;
810 int remove_order;
f1442bc1
LG
811
812 /* platform IO - used for platform DAPM */
813 unsigned int (*read)(struct snd_soc_platform *, unsigned int);
814 int (*write)(struct snd_soc_platform *, unsigned int, unsigned int);
07bf84aa 815 int (*bespoke_trigger)(struct snd_pcm_substream *, int);
808db4a4
RP
816};
817
f0fba2ad
LG
818struct snd_soc_platform {
819 const char *name;
820 int id;
821 struct device *dev;
822 struct snd_soc_platform_driver *driver;
cc22d37e 823 struct mutex mutex;
808db4a4 824
f0fba2ad
LG
825 unsigned int suspended:1; /* platform is suspended */
826 unsigned int probed:1;
1c433fbd 827
f0fba2ad
LG
828 struct snd_soc_card *card;
829 struct list_head list;
830 struct list_head card_list;
b7950641
LG
831
832 struct snd_soc_dapm_context dapm;
731f1ab2
SG
833
834#ifdef CONFIG_DEBUG_FS
835 struct dentry *debugfs_platform_root;
836 struct dentry *debugfs_dapm;
837#endif
f0fba2ad 838};
808db4a4 839
f0fba2ad
LG
840struct snd_soc_dai_link {
841 /* config - must be set by machine driver */
842 const char *name; /* Codec name */
843 const char *stream_name; /* Stream name */
bc92657a
SW
844 /*
845 * You MAY specify the link's CPU-side device, either by device name,
846 * or by DT/OF node, but not both. If this information is omitted,
847 * the CPU-side DAI is matched using .cpu_dai_name only, which hence
848 * must be globally unique. These fields are currently typically used
849 * only for codec to codec links, or systems using device tree.
850 */
851 const char *cpu_name;
852 const struct device_node *cpu_of_node;
853 /*
854 * You MAY specify the DAI name of the CPU DAI. If this information is
855 * omitted, the CPU-side DAI is matched using .cpu_name/.cpu_of_node
856 * only, which only works well when that device exposes a single DAI.
857 */
f0fba2ad 858 const char *cpu_dai_name;
bc92657a
SW
859 /*
860 * You MUST specify the link's codec, either by device name, or by
861 * DT/OF node, but not both.
862 */
863 const char *codec_name;
864 const struct device_node *codec_of_node;
865 /* You MUST specify the DAI name within the codec */
f0fba2ad 866 const char *codec_dai_name;
bc92657a
SW
867 /*
868 * You MAY specify the link's platform/PCM/DMA driver, either by
869 * device name, or by DT/OF node, but not both. Some forms of link
870 * do not need a platform.
871 */
872 const char *platform_name;
873 const struct device_node *platform_of_node;
01d7584c 874 int be_id; /* optional ID for machine driver BE identification */
4ccab3e7 875
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876 const struct snd_soc_pcm_stream *params;
877
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878 unsigned int dai_fmt; /* format to set on init */
879
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880 enum snd_soc_dpcm_trigger trigger[2]; /* trigger type for DPCM */
881
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882 /* Keep DAI active over suspend */
883 unsigned int ignore_suspend:1;
884
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885 /* Symmetry requirements */
886 unsigned int symmetric_rates:1;
887
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888 /* Do not create a PCM for this DAI link (Backend link) */
889 unsigned int no_pcm:1;
890
891 /* This DAI link can route to other DAI links at runtime (Frontend)*/
892 unsigned int dynamic:1;
893
e50fad4f 894 /* pmdown_time is ignored at stop */
895 unsigned int ignore_pmdown_time:1;
896
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897 /* codec/machine specific init - e.g. add machine controls */
898 int (*init)(struct snd_soc_pcm_runtime *rtd);
06f409d7 899
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900 /* optional hw_params re-writing for BE and FE sync */
901 int (*be_hw_params_fixup)(struct snd_soc_pcm_runtime *rtd,
902 struct snd_pcm_hw_params *params);
903
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904 /* machine stream operations */
905 struct snd_soc_ops *ops;
49681077 906 struct snd_soc_compr_ops *compr_ops;
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RP
907};
908
ff819b83 909struct snd_soc_codec_conf {
ead9b919 910 const char *dev_name;
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DP
911
912 /*
913 * optional map of kcontrol, widget and path name prefixes that are
914 * associated per device
915 */
ead9b919 916 const char *name_prefix;
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DP
917
918 /*
919 * set this to the desired compression type if you want to
920 * override the one supplied in codec->driver->compress_type
921 */
922 enum snd_soc_compress_type compress_type;
ead9b919
JN
923};
924
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JN
925struct snd_soc_aux_dev {
926 const char *name; /* Codec name */
927 const char *codec_name; /* for multi-codec */
928
929 /* codec/machine specific init - e.g. add machine controls */
930 int (*init)(struct snd_soc_dapm_context *dapm);
931};
932
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933/* SoC card */
934struct snd_soc_card {
f0fba2ad 935 const char *name;
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LG
936 const char *long_name;
937 const char *driver_name;
c5af3a2e 938 struct device *dev;
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939 struct snd_card *snd_card;
940 struct module *owner;
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941
942 struct list_head list;
f0fba2ad 943 struct mutex mutex;
a73fb2df 944 struct mutex dapm_mutex;
c5af3a2e 945
f0fba2ad 946 bool instantiated;
808db4a4 947
e7361ec4 948 int (*probe)(struct snd_soc_card *card);
28e9ad92 949 int (*late_probe)(struct snd_soc_card *card);
e7361ec4 950 int (*remove)(struct snd_soc_card *card);
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951
952 /* the pre and post PM functions are used to do any PM work before and
953 * after the codec and DAI's do any PM work. */
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954 int (*suspend_pre)(struct snd_soc_card *card);
955 int (*suspend_post)(struct snd_soc_card *card);
956 int (*resume_pre)(struct snd_soc_card *card);
957 int (*resume_post)(struct snd_soc_card *card);
808db4a4 958
0b4d221b 959 /* callbacks */
87506549 960 int (*set_bias_level)(struct snd_soc_card *,
d4c6005f 961 struct snd_soc_dapm_context *dapm,
0be9898a 962 enum snd_soc_bias_level level);
1badabd9 963 int (*set_bias_level_post)(struct snd_soc_card *,
d4c6005f 964 struct snd_soc_dapm_context *dapm,
1badabd9 965 enum snd_soc_bias_level level);
0b4d221b 966
6c5f1fed 967 long pmdown_time;
96dd3622 968
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969 /* CPU <--> Codec DAI links */
970 struct snd_soc_dai_link *dai_link;
971 int num_links;
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972 struct snd_soc_pcm_runtime *rtd;
973 int num_rtd;
6308419a 974
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975 /* optional codec specific configuration */
976 struct snd_soc_codec_conf *codec_conf;
977 int num_configs;
ead9b919 978
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979 /*
980 * optional auxiliary devices such as amplifiers or codecs with DAI
981 * link unused
982 */
983 struct snd_soc_aux_dev *aux_dev;
984 int num_aux_devs;
985 struct snd_soc_pcm_runtime *rtd_aux;
986 int num_aux_rtd;
987
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988 const struct snd_kcontrol_new *controls;
989 int num_controls;
990
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991 /*
992 * Card-specific routes and widgets.
993 */
d06e48db 994 const struct snd_soc_dapm_widget *dapm_widgets;
b8ad29de 995 int num_dapm_widgets;
d06e48db 996 const struct snd_soc_dapm_route *dapm_routes;
b8ad29de 997 int num_dapm_routes;
1633281b 998 bool fully_routed;
b8ad29de 999
6308419a 1000 struct work_struct deferred_resume_work;
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LG
1001
1002 /* lists of probed devices belonging to this card */
1003 struct list_head codec_dev_list;
1004 struct list_head platform_dev_list;
1005 struct list_head dai_dev_list;
a6052154 1006
97c866de 1007 struct list_head widgets;
8ddab3f5 1008 struct list_head paths;
7be31be8 1009 struct list_head dapm_list;
db432b41 1010 struct list_head dapm_dirty;
8ddab3f5 1011
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1012 /* Generic DAPM context for the card */
1013 struct snd_soc_dapm_context dapm;
de02d078 1014 struct snd_soc_dapm_stats dapm_stats;
e37a4970 1015
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1016#ifdef CONFIG_DEBUG_FS
1017 struct dentry *debugfs_card_root;
3a45b867 1018 struct dentry *debugfs_pop_time;
a6052154 1019#endif
3a45b867 1020 u32 pop_time;
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1021
1022 void *drvdata;
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1023};
1024
f0fba2ad 1025/* SoC machine DAI configuration, glues a codec and cpu DAI together */
d66a327d 1026struct snd_soc_pcm_runtime {
36ae1a96 1027 struct device *dev;
87506549 1028 struct snd_soc_card *card;
f0fba2ad 1029 struct snd_soc_dai_link *dai_link;
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LG
1030 struct mutex pcm_mutex;
1031 enum snd_soc_pcm_subclass pcm_subclass;
1032 struct snd_pcm_ops ops;
f0fba2ad 1033
f0fba2ad 1034 unsigned int dev_registered:1;
808db4a4 1035
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1036 /* Dynamic PCM BE runtime data */
1037 struct snd_soc_dpcm_runtime dpcm[2];
1038
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1039 long pmdown_time;
1040
1041 /* runtime devices */
1042 struct snd_pcm *pcm;
49681077 1043 struct snd_compr *compr;
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1044 struct snd_soc_codec *codec;
1045 struct snd_soc_platform *platform;
1046 struct snd_soc_dai *codec_dai;
1047 struct snd_soc_dai *cpu_dai;
1048
1049 struct delayed_work delayed_work;
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LG
1050#ifdef CONFIG_DEBUG_FS
1051 struct dentry *debugfs_dpcm_root;
1052 struct dentry *debugfs_dpcm_state;
1053#endif
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RP
1054};
1055
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JS
1056/* mixer control */
1057struct soc_mixer_control {
d11bb4a9 1058 int min, max, platform_max;
815ecf8d 1059 unsigned int reg, rreg, shift, rshift, invert;
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1060};
1061
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1062struct soc_bytes {
1063 int base;
1064 int num_regs;
f831b055 1065 u32 mask;
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1066};
1067
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1068/* multi register control */
1069struct soc_mreg_control {
1070 long min, max;
1071 unsigned int regbase, regcount, nbits, invert;
1072};
1073
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RP
1074/* enumerated kcontrol */
1075struct soc_enum {
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PU
1076 unsigned short reg;
1077 unsigned short reg2;
1078 unsigned char shift_l;
1079 unsigned char shift_r;
1080 unsigned int max;
1081 unsigned int mask;
87023ff7 1082 const char * const *texts;
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PU
1083 const unsigned int *values;
1084 void *dapm;
1085};
1086
5c82f567 1087/* codec IO */
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1088unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
1089unsigned int snd_soc_write(struct snd_soc_codec *codec,
1090 unsigned int reg, unsigned int val);
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DP
1091unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec,
1092 unsigned int reg, const void *data, size_t len);
5c82f567 1093
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1094/* device driver data */
1095
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1096static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card,
1097 void *data)
1098{
1099 card->drvdata = data;
1100}
1101
1102static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card)
1103{
1104 return card->drvdata;
1105}
1106
b2c812e2 1107static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec,
f0fba2ad 1108 void *data)
b2c812e2 1109{
f0fba2ad 1110 dev_set_drvdata(codec->dev, data);
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1111}
1112
1113static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec)
1114{
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LG
1115 return dev_get_drvdata(codec->dev);
1116}
1117
1118static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform,
1119 void *data)
1120{
1121 dev_set_drvdata(platform->dev, data);
1122}
1123
1124static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform)
1125{
1126 return dev_get_drvdata(platform->dev);
1127}
1128
1129static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd,
1130 void *data)
1131{
36ae1a96 1132 dev_set_drvdata(rtd->dev, data);
f0fba2ad
LG
1133}
1134
1135static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
1136{
36ae1a96 1137 return dev_get_drvdata(rtd->dev);
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1138}
1139
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1140static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
1141{
1142 INIT_LIST_HEAD(&card->dai_dev_list);
1143 INIT_LIST_HEAD(&card->codec_dev_list);
1144 INIT_LIST_HEAD(&card->platform_dev_list);
1145 INIT_LIST_HEAD(&card->widgets);
1146 INIT_LIST_HEAD(&card->paths);
1147 INIT_LIST_HEAD(&card->dapm_list);
1148}
1149
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PU
1150static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc)
1151{
1152 if (mc->reg == mc->rreg && mc->shift == mc->rshift)
1153 return 0;
1154 /*
1155 * mc->reg == mc->rreg && mc->shift != mc->rshift, or
1156 * mc->reg != mc->rreg means that the control is
1157 * stereo (bits in one register or in two registers)
1158 */
1159 return 1;
1160}
1161
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1162int snd_soc_util_init(void);
1163void snd_soc_util_exit(void);
1164
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1165int snd_soc_of_parse_card_name(struct snd_soc_card *card,
1166 const char *propname);
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1167int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
1168 const char *propname);
bec4fa05 1169
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1170#include <sound/soc-dai.h>
1171
faff4bb0 1172#ifdef CONFIG_DEBUG_FS
8a9dab1a 1173extern struct dentry *snd_soc_debugfs_root;
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SW
1174#endif
1175
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1176extern const struct dev_pm_ops snd_soc_pm_ops;
1177
808db4a4 1178#endif