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[ALSA] [Trivial] Fix spaces in gus.h
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / sound / asound.h
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1da177e4
LT		 1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@suse.cz>,
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
26#if defined(LINUX) || defined(__LINUX__) || defined(__linux__)
27
28#include <linux/ioctl.h>
29
30#ifdef __KERNEL__
31
32#include <linux/types.h>
33#include <linux/time.h>
34#include <asm/byteorder.h>
35
36#ifdef __LITTLE_ENDIAN
37#define SNDRV_LITTLE_ENDIAN
38#else
39#ifdef __BIG_ENDIAN
40#define SNDRV_BIG_ENDIAN
41#else
42#error "Unsupported endian..."
43#endif
44#endif
45
46#else /* !__KERNEL__ */
47
48#include <endian.h>
49#if __BYTE_ORDER == __LITTLE_ENDIAN
50#define SNDRV_LITTLE_ENDIAN
51#elif __BYTE_ORDER == __BIG_ENDIAN
52#define SNDRV_BIG_ENDIAN
53#else
54#error "Unsupported endian..."
55#endif
56
57#endif /* __KERNEL **/
58
59#endif /* LINUX */
60
61#ifndef __KERNEL__
62#include <sys/time.h>
63#include <sys/types.h>
64#endif
65
66/*
67 * protocol version
68 */
69
70#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
71#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
72#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
73#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
74#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
75 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
76 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
77 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
78
79/****************************************************************************
80 * *
81 * Digital audio interface *
82 * *
83 ****************************************************************************/
84
85struct sndrv_aes_iec958 {
86 unsigned char status[24]; /* AES/IEC958 channel status bits */
87 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
88 unsigned char pad; /* nothing */
89 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
90};
91
92/****************************************************************************
93 * *
94 * Section for driver hardware dependent interface - /dev/snd/hw? *
95 * *
96 ****************************************************************************/
97
98#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
99
100enum sndrv_hwdep_iface {
101 SNDRV_HWDEP_IFACE_OPL2 = 0,
102 SNDRV_HWDEP_IFACE_OPL3,
103 SNDRV_HWDEP_IFACE_OPL4,
104 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
105 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
106 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
107 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
108 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
109 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
110 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
111 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
112 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
113 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
114 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
115 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
b259b10c 116 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
1da177e4
LT		 117
118 /* Don't forget to change the following: */
b259b10c 119 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_SB_RC
1da177e4
LT		 120};
121
122struct sndrv_hwdep_info {
123 unsigned int device; /* WR: device number */
124 int card; /* R: card number */
125 unsigned char id[64]; /* ID (user selectable) */
126 unsigned char name[80]; /* hwdep name */
127 enum sndrv_hwdep_iface iface; /* hwdep interface */
128 unsigned char reserved[64]; /* reserved for future */
129};
130
131/* generic DSP loader */
132struct sndrv_hwdep_dsp_status {
133 unsigned int version; /* R: driver-specific version */
134 unsigned char id[32]; /* R: driver-specific ID string */
135 unsigned int num_dsps; /* R: number of DSP images to transfer */
136 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
137 unsigned int chip_ready; /* R: 1 = initialization finished */
138 unsigned char reserved[16]; /* reserved for future use */
139};
140
141struct sndrv_hwdep_dsp_image {
142 unsigned int index; /* W: DSP index */
143 unsigned char name[64]; /* W: ID (e.g. file name) */
144 unsigned char __user *image; /* W: binary image */
145 size_t length; /* W: size of image in bytes */
146 unsigned long driver_data; /* W: driver-specific data */
147};
148
149enum {
150 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
151 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct sndrv_hwdep_info),
152 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct sndrv_hwdep_dsp_status),
153 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct sndrv_hwdep_dsp_image)
154};
155
156/*****************************************************************************
157 * *
158 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
159 * *
160 *****************************************************************************/
161
162#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
163
164typedef unsigned long sndrv_pcm_uframes_t;
165typedef long sndrv_pcm_sframes_t;
166
167enum sndrv_pcm_class {
168 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
169 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
170 SNDRV_PCM_CLASS_MODEM, /* software modem class */
171 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
172 /* Don't forget to change the following: */
173 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
174};
175
176enum sndrv_pcm_subclass {
177 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
178 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
179 /* Don't forget to change the following: */
180 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
181};
182
183enum sndrv_pcm_stream {
184 SNDRV_PCM_STREAM_PLAYBACK = 0,
185 SNDRV_PCM_STREAM_CAPTURE,
186 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
187};
188
189enum sndrv_pcm_access {
190 SNDRV_PCM_ACCESS_MMAP_INTERLEAVED = 0, /* interleaved mmap */
191 SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED, /* noninterleaved mmap */
192 SNDRV_PCM_ACCESS_MMAP_COMPLEX, /* complex mmap */
193 SNDRV_PCM_ACCESS_RW_INTERLEAVED, /* readi/writei */
194 SNDRV_PCM_ACCESS_RW_NONINTERLEAVED, /* readn/writen */
195 SNDRV_PCM_ACCESS_LAST = SNDRV_PCM_ACCESS_RW_NONINTERLEAVED,
196};
197
198enum sndrv_pcm_format {
199 SNDRV_PCM_FORMAT_S8 = 0,
200 SNDRV_PCM_FORMAT_U8,
201 SNDRV_PCM_FORMAT_S16_LE,
202 SNDRV_PCM_FORMAT_S16_BE,
203 SNDRV_PCM_FORMAT_U16_LE,
204 SNDRV_PCM_FORMAT_U16_BE,
205 SNDRV_PCM_FORMAT_S24_LE, /* low three bytes */
206 SNDRV_PCM_FORMAT_S24_BE, /* low three bytes */
207 SNDRV_PCM_FORMAT_U24_LE, /* low three bytes */
208 SNDRV_PCM_FORMAT_U24_BE, /* low three bytes */
209 SNDRV_PCM_FORMAT_S32_LE,
210 SNDRV_PCM_FORMAT_S32_BE,
211 SNDRV_PCM_FORMAT_U32_LE,
212 SNDRV_PCM_FORMAT_U32_BE,
213 SNDRV_PCM_FORMAT_FLOAT_LE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
214 SNDRV_PCM_FORMAT_FLOAT_BE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
215 SNDRV_PCM_FORMAT_FLOAT64_LE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
216 SNDRV_PCM_FORMAT_FLOAT64_BE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
217 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE, /* IEC-958 subframe, Little Endian */
218 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE, /* IEC-958 subframe, Big Endian */
219 SNDRV_PCM_FORMAT_MU_LAW,
220 SNDRV_PCM_FORMAT_A_LAW,
221 SNDRV_PCM_FORMAT_IMA_ADPCM,
222 SNDRV_PCM_FORMAT_MPEG,
223 SNDRV_PCM_FORMAT_GSM,
224 SNDRV_PCM_FORMAT_SPECIAL = 31,
225 SNDRV_PCM_FORMAT_S24_3LE = 32, /* in three bytes */
226 SNDRV_PCM_FORMAT_S24_3BE, /* in three bytes */
227 SNDRV_PCM_FORMAT_U24_3LE, /* in three bytes */
228 SNDRV_PCM_FORMAT_U24_3BE, /* in three bytes */
229 SNDRV_PCM_FORMAT_S20_3LE, /* in three bytes */
230 SNDRV_PCM_FORMAT_S20_3BE, /* in three bytes */
231 SNDRV_PCM_FORMAT_U20_3LE, /* in three bytes */
232 SNDRV_PCM_FORMAT_U20_3BE, /* in three bytes */
233 SNDRV_PCM_FORMAT_S18_3LE, /* in three bytes */
234 SNDRV_PCM_FORMAT_S18_3BE, /* in three bytes */
235 SNDRV_PCM_FORMAT_U18_3LE, /* in three bytes */
236 SNDRV_PCM_FORMAT_U18_3BE, /* in three bytes */
237 SNDRV_PCM_FORMAT_LAST = SNDRV_PCM_FORMAT_U18_3BE,
238
239#ifdef SNDRV_LITTLE_ENDIAN
240 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_LE,
241 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_LE,
242 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_LE,
243 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_LE,
244 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_LE,
245 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_LE,
246 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_LE,
247 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_LE,
248 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE,
249#endif
250#ifdef SNDRV_BIG_ENDIAN
251 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_BE,
252 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_BE,
253 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_BE,
254 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_BE,
255 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_BE,
256 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_BE,
257 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_BE,
258 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_BE,
259 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE,
260#endif
261};
262
263enum sndrv_pcm_subformat {
264 SNDRV_PCM_SUBFORMAT_STD = 0,
265 SNDRV_PCM_SUBFORMAT_LAST = SNDRV_PCM_SUBFORMAT_STD,
266};
267
268#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
269#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
270#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
271#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
272#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
273#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
274#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
275#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
276#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
277#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
278#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
279#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
280#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
281#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
282
283enum sndrv_pcm_state {
284 SNDRV_PCM_STATE_OPEN = 0, /* stream is open */
285 SNDRV_PCM_STATE_SETUP, /* stream has a setup */
286 SNDRV_PCM_STATE_PREPARED, /* stream is ready to start */
287 SNDRV_PCM_STATE_RUNNING, /* stream is running */
288 SNDRV_PCM_STATE_XRUN, /* stream reached an xrun */
289 SNDRV_PCM_STATE_DRAINING, /* stream is draining */
290 SNDRV_PCM_STATE_PAUSED, /* stream is paused */
291 SNDRV_PCM_STATE_SUSPENDED, /* hardware is suspended */
292 SNDRV_PCM_STATE_DISCONNECTED, /* hardware is disconnected */
293 SNDRV_PCM_STATE_LAST = SNDRV_PCM_STATE_DISCONNECTED,
294};
295
296enum {
297 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
298 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
299 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
300};
301
302union sndrv_pcm_sync_id {
303 unsigned char id[16];
304 unsigned short id16[8];
305 unsigned int id32[4];
306};
307
308struct sndrv_pcm_info {
309 unsigned int device; /* RO/WR (control): device number */
310 unsigned int subdevice; /* RO/WR (control): subdevice number */
311 enum sndrv_pcm_stream stream; /* RO/WR (control): stream number */
312 int card; /* R: card number */
313 unsigned char id[64]; /* ID (user selectable) */
314 unsigned char name[80]; /* name of this device */
315 unsigned char subname[32]; /* subdevice name */
316 enum sndrv_pcm_class dev_class; /* SNDRV_PCM_CLASS_* */
317 enum sndrv_pcm_subclass dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
318 unsigned int subdevices_count;
319 unsigned int subdevices_avail;
320 union sndrv_pcm_sync_id sync; /* hardware synchronization ID */
321 unsigned char reserved[64]; /* reserved for future... */
322};
323
324enum sndrv_pcm_hw_param {
325 SNDRV_PCM_HW_PARAM_ACCESS = 0, /* Access type */
326 SNDRV_PCM_HW_PARAM_FIRST_MASK = SNDRV_PCM_HW_PARAM_ACCESS,
327 SNDRV_PCM_HW_PARAM_FORMAT, /* Format */
328 SNDRV_PCM_HW_PARAM_SUBFORMAT, /* Subformat */
329 SNDRV_PCM_HW_PARAM_LAST_MASK = SNDRV_PCM_HW_PARAM_SUBFORMAT,
330
331 SNDRV_PCM_HW_PARAM_SAMPLE_BITS = 8, /* Bits per sample */
332 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL = SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
333 SNDRV_PCM_HW_PARAM_FRAME_BITS, /* Bits per frame */
334 SNDRV_PCM_HW_PARAM_CHANNELS, /* Channels */
335 SNDRV_PCM_HW_PARAM_RATE, /* Approx rate */
336 SNDRV_PCM_HW_PARAM_PERIOD_TIME, /* Approx distance between interrupts
337 in us */
338 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, /* Approx frames between interrupts */
339 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, /* Approx bytes between interrupts */
340 SNDRV_PCM_HW_PARAM_PERIODS, /* Approx interrupts per buffer */
341 SNDRV_PCM_HW_PARAM_BUFFER_TIME, /* Approx duration of buffer in us */
342 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, /* Size of buffer in frames */
343 SNDRV_PCM_HW_PARAM_BUFFER_BYTES, /* Size of buffer in bytes */
344 SNDRV_PCM_HW_PARAM_TICK_TIME, /* Approx tick duration in us */
345 SNDRV_PCM_HW_PARAM_LAST_INTERVAL = SNDRV_PCM_HW_PARAM_TICK_TIME
346};
347
267cdf40 348#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
1da177e4
LT		 349
350struct sndrv_interval {
351 unsigned int min, max;
352 unsigned int openmin:1,
353 openmax:1,
354 integer:1,
355 empty:1;
356};
357
358#define SNDRV_MASK_MAX 256
359
360struct sndrv_mask {
361 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
362};
363
364struct sndrv_pcm_hw_params {
365 unsigned int flags;
366 struct sndrv_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
367 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
368 struct sndrv_mask mres[5]; /* reserved masks */
369 struct sndrv_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
370 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
371 struct sndrv_interval ires[9]; /* reserved intervals */
372 unsigned int rmask; /* W: requested masks */
373 unsigned int cmask; /* R: changed masks */
374 unsigned int info; /* R: Info flags for returned setup */
375 unsigned int msbits; /* R: used most significant bits */
376 unsigned int rate_num; /* R: rate numerator */
377 unsigned int rate_den; /* R: rate denominator */
378 sndrv_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
379 unsigned char reserved[64]; /* reserved for future */
380};
381
382enum sndrv_pcm_tstamp {
383 SNDRV_PCM_TSTAMP_NONE = 0,
384 SNDRV_PCM_TSTAMP_MMAP,
385 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_MMAP,
386};
387
388struct sndrv_pcm_sw_params {
389 enum sndrv_pcm_tstamp tstamp_mode; /* timestamp mode */
390 unsigned int period_step;
391 unsigned int sleep_min; /* min ticks to sleep */
392 sndrv_pcm_uframes_t avail_min; /* min avail frames for wakeup */
393 sndrv_pcm_uframes_t xfer_align; /* xfer size need to be a multiple */
394 sndrv_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
395 sndrv_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
396 sndrv_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
397 sndrv_pcm_uframes_t silence_size; /* silence block size */
398 sndrv_pcm_uframes_t boundary; /* pointers wrap point */
399 unsigned char reserved[64]; /* reserved for future */
400};
401
402struct sndrv_pcm_channel_info {
403 unsigned int channel;
404 off_t offset; /* mmap offset */
405 unsigned int first; /* offset to first sample in bits */
406 unsigned int step; /* samples distance in bits */
407};
408
409struct sndrv_pcm_status {
410 enum sndrv_pcm_state state; /* stream state */
411 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
412 struct timespec tstamp; /* reference timestamp */
413 sndrv_pcm_uframes_t appl_ptr; /* appl ptr */
414 sndrv_pcm_uframes_t hw_ptr; /* hw ptr */
415 sndrv_pcm_sframes_t delay; /* current delay in frames */
416 sndrv_pcm_uframes_t avail; /* number of frames available */
417 sndrv_pcm_uframes_t avail_max; /* max frames available on hw since last status */
418 sndrv_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
419 enum sndrv_pcm_state suspended_state; /* suspended stream state */
420 unsigned char reserved[60]; /* must be filled with zero */
421};
422
423struct sndrv_pcm_mmap_status {
424 enum sndrv_pcm_state state; /* RO: state - SNDRV_PCM_STATE_XXXX */
425 int pad1; /* Needed for 64 bit alignment */
426 sndrv_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
427 struct timespec tstamp; /* Timestamp */
428 enum sndrv_pcm_state suspended_state; /* RO: suspended stream state */
429};
430
431struct sndrv_pcm_mmap_control {
432 sndrv_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
433 sndrv_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
434};
435
436#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
437#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
438#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
439
440struct sndrv_pcm_sync_ptr {
441 unsigned int flags;
442 union {
443 struct sndrv_pcm_mmap_status status;
444 unsigned char reserved[64];
445 } s;
446 union {
447 struct sndrv_pcm_mmap_control control;
448 unsigned char reserved[64];
449 } c;
450};
451
452struct sndrv_xferi {
453 sndrv_pcm_sframes_t result;
454 void __user *buf;
455 sndrv_pcm_uframes_t frames;
456};
457
458struct sndrv_xfern {
459 sndrv_pcm_sframes_t result;
460 void __user * __user *bufs;
461 sndrv_pcm_uframes_t frames;
462};
463
464enum {
465 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
466 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct sndrv_pcm_info),
467 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
468 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct sndrv_pcm_hw_params),
469 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct sndrv_pcm_hw_params),
470 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
471 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct sndrv_pcm_sw_params),
472 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct sndrv_pcm_status),
473 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, sndrv_pcm_sframes_t),
474 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
475 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct sndrv_pcm_sync_ptr),
476 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct sndrv_pcm_channel_info),
477 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
478 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
479 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
480 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
481 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
482 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
483 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, sndrv_pcm_uframes_t),
484 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
485 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
486 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, sndrv_pcm_uframes_t),
487 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct sndrv_xferi),
488 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct sndrv_xferi),
489 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct sndrv_xfern),
490 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct sndrv_xfern),
491 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
492 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
493};
494
495/* Trick to make alsa-lib/acinclude.m4 happy */
496#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
497
498/*****************************************************************************
499 * *
500 * MIDI v1.0 interface *
501 * *
502 *****************************************************************************/
503
504/*
505 * Raw MIDI section - /dev/snd/midi??
506 */
507
508#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
509
510enum sndrv_rawmidi_stream {
511 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
512 SNDRV_RAWMIDI_STREAM_INPUT,
513 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
514};
515
516#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
517#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
518#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
519
520struct sndrv_rawmidi_info {
521 unsigned int device; /* RO/WR (control): device number */
522 unsigned int subdevice; /* RO/WR (control): subdevice number */
523 enum sndrv_rawmidi_stream stream; /* WR: stream */
524 int card; /* R: card number */
525 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
526 unsigned char id[64]; /* ID (user selectable) */
527 unsigned char name[80]; /* name of device */
528 unsigned char subname[32]; /* name of active or selected subdevice */
529 unsigned int subdevices_count;
530 unsigned int subdevices_avail;
531 unsigned char reserved[64]; /* reserved for future use */
532};
533
534struct sndrv_rawmidi_params {
535 enum sndrv_rawmidi_stream stream;
536 size_t buffer_size; /* queue size in bytes */
537 size_t avail_min; /* minimum avail bytes for wakeup */
538 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
539 unsigned char reserved[16]; /* reserved for future use */
540};
541
542struct sndrv_rawmidi_status {
543 enum sndrv_rawmidi_stream stream;
544 struct timespec tstamp; /* Timestamp */
545 size_t avail; /* available bytes */
546 size_t xruns; /* count of overruns since last status (in bytes) */
547 unsigned char reserved[16]; /* reserved for future use */
548};
549
550enum {
551 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
552 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct sndrv_rawmidi_info),
553 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct sndrv_rawmidi_params),
554 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct sndrv_rawmidi_status),
555 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
556 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
557};
558
559/*
560 * Timer section - /dev/snd/timer
561 */
562
a501dfa3 563#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
1da177e4
LT		 564
565enum sndrv_timer_class {
566 SNDRV_TIMER_CLASS_NONE = -1,
567 SNDRV_TIMER_CLASS_SLAVE = 0,
568 SNDRV_TIMER_CLASS_GLOBAL,
569 SNDRV_TIMER_CLASS_CARD,
570 SNDRV_TIMER_CLASS_PCM,
571 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
572};
573
574/* slave timer classes */
575enum sndrv_timer_slave_class {
576 SNDRV_TIMER_SCLASS_NONE = 0,
577 SNDRV_TIMER_SCLASS_APPLICATION,
578 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
579 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
580 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
581};
582
583/* global timers (device member) */
584#define SNDRV_TIMER_GLOBAL_SYSTEM 0
585#define SNDRV_TIMER_GLOBAL_RTC 1
586#define SNDRV_TIMER_GLOBAL_HPET 2
587
588/* info flags */
589#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
590
591struct sndrv_timer_id {
592 enum sndrv_timer_class dev_class;
593 enum sndrv_timer_slave_class dev_sclass;
594 int card;
595 int device;
596 int subdevice;
597};
598
599struct sndrv_timer_ginfo {
600 struct sndrv_timer_id tid; /* requested timer ID */
601 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
602 int card; /* card number */
603 unsigned char id[64]; /* timer identification */
604 unsigned char name[80]; /* timer name */
605 unsigned long reserved0; /* reserved for future use */
606 unsigned long resolution; /* average period resolution in ns */
607 unsigned long resolution_min; /* minimal period resolution in ns */
608 unsigned long resolution_max; /* maximal period resolution in ns */
609 unsigned int clients; /* active timer clients */
610 unsigned char reserved[32];
611};
612
613struct sndrv_timer_gparams {
614 struct sndrv_timer_id tid; /* requested timer ID */
615 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
616 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
617 unsigned char reserved[32];
618};
619
620struct sndrv_timer_gstatus {
621 struct sndrv_timer_id tid; /* requested timer ID */
622 unsigned long resolution; /* current period resolution in ns */
623 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
624 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
625 unsigned char reserved[32];
626};
627
628struct sndrv_timer_select {
629 struct sndrv_timer_id id; /* bind to timer ID */
630 unsigned char reserved[32]; /* reserved */
631};
632
633struct sndrv_timer_info {
634 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
635 int card; /* card number */
636 unsigned char id[64]; /* timer identificator */
637 unsigned char name[80]; /* timer name */
638 unsigned long reserved0; /* reserved for future use */
639 unsigned long resolution; /* average period resolution in ns */
640 unsigned char reserved[64]; /* reserved */
641};
642
643#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
644#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
645#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
646
647struct sndrv_timer_params {
648 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
649 unsigned int ticks; /* requested resolution in ticks */
650 unsigned int queue_size; /* total size of queue (32-1024) */
651 unsigned int reserved0; /* reserved, was: failure locations */
652 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
653 unsigned char reserved[60]; /* reserved */
654};
655
656struct sndrv_timer_status {
657 struct timespec tstamp; /* Timestamp - last update */
658 unsigned int resolution; /* current period resolution in ns */
659 unsigned int lost; /* counter of master tick lost */
660 unsigned int overrun; /* count of read queue overruns */
661 unsigned int queue; /* used queue size */
662 unsigned char reserved[64]; /* reserved */
663};
664
665enum {
666 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
667 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct sndrv_timer_id),
668 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
669 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct sndrv_timer_ginfo),
670 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct sndrv_timer_gparams),
671 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct sndrv_timer_gstatus),
672 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct sndrv_timer_select),
673 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct sndrv_timer_info),
674 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct sndrv_timer_params),
675 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct sndrv_timer_status),
8c50b37c
TI		 676 /* The following four ioctls are changed since 1.0.9 due to confliction */
677 SNDRV_TIMER_IOCTL_START = _IO('T', 0xa0),
678 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0xa1),
679 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0xa2),
680 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0xa3),
1da177e4
LT		 681};
682
683struct sndrv_timer_read {
684 unsigned int resolution;
685 unsigned int ticks;
686};
687
688enum sndrv_timer_event {
689 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
690 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
691 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
692 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
693 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
694 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
695 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
a501dfa3 696 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
5ca307b2 697 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
1da177e4
LT		 698 /* master timer events for slave timer instances */
699 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
700 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
701 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
702 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
a501dfa3
JK		 703 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
704 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
1da177e4
LT		 705};
706
707struct sndrv_timer_tread {
708 enum sndrv_timer_event event;
709 struct timespec tstamp;
710 unsigned int val;
711};
712
713/****************************************************************************
714 * *
715 * Section for driver control interface - /dev/snd/control? *
716 * *
717 ****************************************************************************/
718
719#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 3)
720
721struct sndrv_ctl_card_info {
722 int card; /* card number */
723 int pad; /* reserved for future (was type) */
724 unsigned char id[16]; /* ID of card (user selectable) */
725 unsigned char driver[16]; /* Driver name */
726 unsigned char name[32]; /* Short name of soundcard */
727 unsigned char longname[80]; /* name + info text about soundcard */
728 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
729 unsigned char mixername[80]; /* visual mixer identification */
730 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
731 unsigned char reserved[48]; /* reserved for future */
732};
733
734enum sndrv_ctl_elem_type {
735 SNDRV_CTL_ELEM_TYPE_NONE = 0, /* invalid */
736 SNDRV_CTL_ELEM_TYPE_BOOLEAN, /* boolean type */
737 SNDRV_CTL_ELEM_TYPE_INTEGER, /* integer type */
738 SNDRV_CTL_ELEM_TYPE_ENUMERATED, /* enumerated type */
739 SNDRV_CTL_ELEM_TYPE_BYTES, /* byte array */
740 SNDRV_CTL_ELEM_TYPE_IEC958, /* IEC958 (S/PDIF) setup */
741 SNDRV_CTL_ELEM_TYPE_INTEGER64, /* 64-bit integer type */
742 SNDRV_CTL_ELEM_TYPE_LAST = SNDRV_CTL_ELEM_TYPE_INTEGER64,
743};
744
745enum sndrv_ctl_elem_iface {
746 SNDRV_CTL_ELEM_IFACE_CARD = 0, /* global control */
747 SNDRV_CTL_ELEM_IFACE_HWDEP, /* hardware dependent device */
748 SNDRV_CTL_ELEM_IFACE_MIXER, /* virtual mixer device */
749 SNDRV_CTL_ELEM_IFACE_PCM, /* PCM device */
750 SNDRV_CTL_ELEM_IFACE_RAWMIDI, /* RawMidi device */
751 SNDRV_CTL_ELEM_IFACE_TIMER, /* timer device */
752 SNDRV_CTL_ELEM_IFACE_SEQUENCER, /* sequencer client */
753 SNDRV_CTL_ELEM_IFACE_LAST = SNDRV_CTL_ELEM_IFACE_SEQUENCER,
754};
755
756#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
757#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
758#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
759#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
760#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<2) /* when was control changed */
761#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
762#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
763#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
764#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
765#define SNDRV_CTL_ELEM_ACCESS_DINDIRECT (1<<30) /* indirect access for matrix dimensions in the info structure */
766#define SNDRV_CTL_ELEM_ACCESS_INDIRECT (1<<31) /* indirect access for element value in the value structure */
767
768/* for further details see the ACPI and PCI power management specification */
769#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
770#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
771#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
772#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
773#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
774#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
775
776struct sndrv_ctl_elem_id {
777 unsigned int numid; /* numeric identifier, zero = invalid */
778 enum sndrv_ctl_elem_iface iface; /* interface identifier */
779 unsigned int device; /* device/client number */
780 unsigned int subdevice; /* subdevice (substream) number */
781 unsigned char name[44]; /* ASCII name of item */
782 unsigned int index; /* index of item */
783};
784
785struct sndrv_ctl_elem_list {
786 unsigned int offset; /* W: first element ID to get */
787 unsigned int space; /* W: count of element IDs to get */
788 unsigned int used; /* R: count of element IDs set */
789 unsigned int count; /* R: count of all elements */
790 struct sndrv_ctl_elem_id __user *pids; /* R: IDs */
791 unsigned char reserved[50];
792};
793
794struct sndrv_ctl_elem_info {
795 struct sndrv_ctl_elem_id id; /* W: element ID */
796 enum sndrv_ctl_elem_type type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
797 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
798 unsigned int count; /* count of values */
799 pid_t owner; /* owner's PID of this control */
800 union {
801 struct {
802 long min; /* R: minimum value */
803 long max; /* R: maximum value */
804 long step; /* R: step (0 variable) */
805 } integer;
806 struct {
807 long long min; /* R: minimum value */
808 long long max; /* R: maximum value */
809 long long step; /* R: step (0 variable) */
810 } integer64;
811 struct {
812 unsigned int items; /* R: number of items */
813 unsigned int item; /* W: item number */
814 char name[64]; /* R: value name */
815 } enumerated;
816 unsigned char reserved[128];
817 } value;
818 union {
819 unsigned short d[4]; /* dimensions */
820 unsigned short *d_ptr; /* indirect */
821 } dimen;
822 unsigned char reserved[64-4*sizeof(unsigned short)];
823};
824
825struct sndrv_ctl_elem_value {
826 struct sndrv_ctl_elem_id id; /* W: element ID */
827 unsigned int indirect: 1; /* W: use indirect pointer (xxx_ptr member) */
828 union {
829 union {
830 long value[128];
831 long *value_ptr;
832 } integer;
833 union {
834 long long value[64];
835 long long *value_ptr;
836 } integer64;
837 union {
838 unsigned int item[128];
839 unsigned int *item_ptr;
840 } enumerated;
841 union {
842 unsigned char data[512];
843 unsigned char *data_ptr;
844 } bytes;
845 struct sndrv_aes_iec958 iec958;
846 } value; /* RO */
847 struct timespec tstamp;
848 unsigned char reserved[128-sizeof(struct timespec)];
849};
850
851enum {
852 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
853 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct sndrv_ctl_card_info),
854 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct sndrv_ctl_elem_list),
855 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct sndrv_ctl_elem_info),
856 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct sndrv_ctl_elem_value),
857 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct sndrv_ctl_elem_value),
858 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct sndrv_ctl_elem_id),
859 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct sndrv_ctl_elem_id),
860 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
861 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct sndrv_ctl_elem_info),
862 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct sndrv_ctl_elem_info),
863 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct sndrv_ctl_elem_id),
864 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
865 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct sndrv_hwdep_info),
866 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
867 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct sndrv_pcm_info),
868 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
869 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
870 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct sndrv_rawmidi_info),
871 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
872 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
873 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
874};
875
876/*
877 * Read interface.
878 */
879
880enum sndrv_ctl_event_type {
881 SNDRV_CTL_EVENT_ELEM = 0,
882 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
883};
884
885#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
886#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
887#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
888#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
889
890struct sndrv_ctl_event {
891 enum sndrv_ctl_event_type type; /* event type - SNDRV_CTL_EVENT_* */
892 union {
893 struct {
894 unsigned int mask;
895 struct sndrv_ctl_elem_id id;
896 } elem;
897 unsigned char data8[60];
898 } data;
899};
900
901/*
902 * Control names
903 */
904
905#define SNDRV_CTL_NAME_NONE ""
906#define SNDRV_CTL_NAME_PLAYBACK "Playback "
907#define SNDRV_CTL_NAME_CAPTURE "Capture "
908
909#define SNDRV_CTL_NAME_IEC958_NONE ""
910#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
911#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
912#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
913#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
914#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
915#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
916#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
917#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
918
919/*
920 *
921 */
922
923struct sndrv_xferv {
924 const struct iovec *vector;
925 unsigned long count;
926};
927
928enum {
929 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct sndrv_xferv),
930 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct sndrv_xferv),
931};
932
933#endif /* __SOUND_ASOUND_H */
kernel source for telekom puls (alcatel/mediatek)