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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved. | |
3 | * Copyright (c) 2004 Infinicon Corporation. All rights reserved. | |
4 | * Copyright (c) 2004 Intel Corporation. All rights reserved. | |
5 | * Copyright (c) 2004 Topspin Corporation. All rights reserved. | |
6 | * Copyright (c) 2004 Voltaire Corporation. All rights reserved. | |
2a1d9b7f | 7 | * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. |
33b9b3ee | 8 | * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved. |
1da177e4 LT |
9 | * |
10 | * This software is available to you under a choice of one of two | |
11 | * licenses. You may choose to be licensed under the terms of the GNU | |
12 | * General Public License (GPL) Version 2, available from the file | |
13 | * COPYING in the main directory of this source tree, or the | |
14 | * OpenIB.org BSD license below: | |
15 | * | |
16 | * Redistribution and use in source and binary forms, with or | |
17 | * without modification, are permitted provided that the following | |
18 | * conditions are met: | |
19 | * | |
20 | * - Redistributions of source code must retain the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer. | |
23 | * | |
24 | * - Redistributions in binary form must reproduce the above | |
25 | * copyright notice, this list of conditions and the following | |
26 | * disclaimer in the documentation and/or other materials | |
27 | * provided with the distribution. | |
28 | * | |
29 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
30 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
32 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
33 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
34 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
35 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
36 | * SOFTWARE. | |
37 | * | |
38 | * $Id: ib_verbs.h 1349 2004-12-16 21:09:43Z roland $ | |
39 | */ | |
40 | ||
41 | #if !defined(IB_VERBS_H) | |
42 | #define IB_VERBS_H | |
43 | ||
44 | #include <linux/types.h> | |
45 | #include <linux/device.h> | |
9b513090 RC |
46 | #include <linux/mm.h> |
47 | #include <linux/dma-mapping.h> | |
459d6e2a | 48 | #include <linux/kref.h> |
e2773c06 | 49 | |
1da177e4 | 50 | #include <asm/atomic.h> |
e2773c06 RD |
51 | #include <asm/scatterlist.h> |
52 | #include <asm/uaccess.h> | |
1da177e4 LT |
53 | |
54 | union ib_gid { | |
55 | u8 raw[16]; | |
56 | struct { | |
97f52eb4 SH |
57 | __be64 subnet_prefix; |
58 | __be64 interface_id; | |
1da177e4 LT |
59 | } global; |
60 | }; | |
61 | ||
07ebafba TT |
62 | enum rdma_node_type { |
63 | /* IB values map to NodeInfo:NodeType. */ | |
64 | RDMA_NODE_IB_CA = 1, | |
65 | RDMA_NODE_IB_SWITCH, | |
66 | RDMA_NODE_IB_ROUTER, | |
67 | RDMA_NODE_RNIC | |
1da177e4 LT |
68 | }; |
69 | ||
07ebafba TT |
70 | enum rdma_transport_type { |
71 | RDMA_TRANSPORT_IB, | |
72 | RDMA_TRANSPORT_IWARP | |
73 | }; | |
74 | ||
75 | enum rdma_transport_type | |
76 | rdma_node_get_transport(enum rdma_node_type node_type) __attribute_const__; | |
77 | ||
1da177e4 LT |
78 | enum ib_device_cap_flags { |
79 | IB_DEVICE_RESIZE_MAX_WR = 1, | |
80 | IB_DEVICE_BAD_PKEY_CNTR = (1<<1), | |
81 | IB_DEVICE_BAD_QKEY_CNTR = (1<<2), | |
82 | IB_DEVICE_RAW_MULTI = (1<<3), | |
83 | IB_DEVICE_AUTO_PATH_MIG = (1<<4), | |
84 | IB_DEVICE_CHANGE_PHY_PORT = (1<<5), | |
85 | IB_DEVICE_UD_AV_PORT_ENFORCE = (1<<6), | |
86 | IB_DEVICE_CURR_QP_STATE_MOD = (1<<7), | |
87 | IB_DEVICE_SHUTDOWN_PORT = (1<<8), | |
88 | IB_DEVICE_INIT_TYPE = (1<<9), | |
89 | IB_DEVICE_PORT_ACTIVE_EVENT = (1<<10), | |
90 | IB_DEVICE_SYS_IMAGE_GUID = (1<<11), | |
91 | IB_DEVICE_RC_RNR_NAK_GEN = (1<<12), | |
92 | IB_DEVICE_SRQ_RESIZE = (1<<13), | |
93 | IB_DEVICE_N_NOTIFY_CQ = (1<<14), | |
07ebafba TT |
94 | IB_DEVICE_ZERO_STAG = (1<<15), |
95 | IB_DEVICE_SEND_W_INV = (1<<16), | |
96 | IB_DEVICE_MEM_WINDOW = (1<<17) | |
1da177e4 LT |
97 | }; |
98 | ||
99 | enum ib_atomic_cap { | |
100 | IB_ATOMIC_NONE, | |
101 | IB_ATOMIC_HCA, | |
102 | IB_ATOMIC_GLOB | |
103 | }; | |
104 | ||
105 | struct ib_device_attr { | |
106 | u64 fw_ver; | |
97f52eb4 | 107 | __be64 sys_image_guid; |
1da177e4 LT |
108 | u64 max_mr_size; |
109 | u64 page_size_cap; | |
110 | u32 vendor_id; | |
111 | u32 vendor_part_id; | |
112 | u32 hw_ver; | |
113 | int max_qp; | |
114 | int max_qp_wr; | |
115 | int device_cap_flags; | |
116 | int max_sge; | |
117 | int max_sge_rd; | |
118 | int max_cq; | |
119 | int max_cqe; | |
120 | int max_mr; | |
121 | int max_pd; | |
122 | int max_qp_rd_atom; | |
123 | int max_ee_rd_atom; | |
124 | int max_res_rd_atom; | |
125 | int max_qp_init_rd_atom; | |
126 | int max_ee_init_rd_atom; | |
127 | enum ib_atomic_cap atomic_cap; | |
128 | int max_ee; | |
129 | int max_rdd; | |
130 | int max_mw; | |
131 | int max_raw_ipv6_qp; | |
132 | int max_raw_ethy_qp; | |
133 | int max_mcast_grp; | |
134 | int max_mcast_qp_attach; | |
135 | int max_total_mcast_qp_attach; | |
136 | int max_ah; | |
137 | int max_fmr; | |
138 | int max_map_per_fmr; | |
139 | int max_srq; | |
140 | int max_srq_wr; | |
141 | int max_srq_sge; | |
142 | u16 max_pkeys; | |
143 | u8 local_ca_ack_delay; | |
144 | }; | |
145 | ||
146 | enum ib_mtu { | |
147 | IB_MTU_256 = 1, | |
148 | IB_MTU_512 = 2, | |
149 | IB_MTU_1024 = 3, | |
150 | IB_MTU_2048 = 4, | |
151 | IB_MTU_4096 = 5 | |
152 | }; | |
153 | ||
154 | static inline int ib_mtu_enum_to_int(enum ib_mtu mtu) | |
155 | { | |
156 | switch (mtu) { | |
157 | case IB_MTU_256: return 256; | |
158 | case IB_MTU_512: return 512; | |
159 | case IB_MTU_1024: return 1024; | |
160 | case IB_MTU_2048: return 2048; | |
161 | case IB_MTU_4096: return 4096; | |
162 | default: return -1; | |
163 | } | |
164 | } | |
165 | ||
166 | enum ib_port_state { | |
167 | IB_PORT_NOP = 0, | |
168 | IB_PORT_DOWN = 1, | |
169 | IB_PORT_INIT = 2, | |
170 | IB_PORT_ARMED = 3, | |
171 | IB_PORT_ACTIVE = 4, | |
172 | IB_PORT_ACTIVE_DEFER = 5 | |
173 | }; | |
174 | ||
175 | enum ib_port_cap_flags { | |
176 | IB_PORT_SM = 1 << 1, | |
177 | IB_PORT_NOTICE_SUP = 1 << 2, | |
178 | IB_PORT_TRAP_SUP = 1 << 3, | |
179 | IB_PORT_OPT_IPD_SUP = 1 << 4, | |
180 | IB_PORT_AUTO_MIGR_SUP = 1 << 5, | |
181 | IB_PORT_SL_MAP_SUP = 1 << 6, | |
182 | IB_PORT_MKEY_NVRAM = 1 << 7, | |
183 | IB_PORT_PKEY_NVRAM = 1 << 8, | |
184 | IB_PORT_LED_INFO_SUP = 1 << 9, | |
185 | IB_PORT_SM_DISABLED = 1 << 10, | |
186 | IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11, | |
187 | IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12, | |
188 | IB_PORT_CM_SUP = 1 << 16, | |
189 | IB_PORT_SNMP_TUNNEL_SUP = 1 << 17, | |
190 | IB_PORT_REINIT_SUP = 1 << 18, | |
191 | IB_PORT_DEVICE_MGMT_SUP = 1 << 19, | |
192 | IB_PORT_VENDOR_CLASS_SUP = 1 << 20, | |
193 | IB_PORT_DR_NOTICE_SUP = 1 << 21, | |
194 | IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22, | |
195 | IB_PORT_BOOT_MGMT_SUP = 1 << 23, | |
196 | IB_PORT_LINK_LATENCY_SUP = 1 << 24, | |
197 | IB_PORT_CLIENT_REG_SUP = 1 << 25 | |
198 | }; | |
199 | ||
200 | enum ib_port_width { | |
201 | IB_WIDTH_1X = 1, | |
202 | IB_WIDTH_4X = 2, | |
203 | IB_WIDTH_8X = 4, | |
204 | IB_WIDTH_12X = 8 | |
205 | }; | |
206 | ||
207 | static inline int ib_width_enum_to_int(enum ib_port_width width) | |
208 | { | |
209 | switch (width) { | |
210 | case IB_WIDTH_1X: return 1; | |
211 | case IB_WIDTH_4X: return 4; | |
212 | case IB_WIDTH_8X: return 8; | |
213 | case IB_WIDTH_12X: return 12; | |
214 | default: return -1; | |
215 | } | |
216 | } | |
217 | ||
218 | struct ib_port_attr { | |
219 | enum ib_port_state state; | |
220 | enum ib_mtu max_mtu; | |
221 | enum ib_mtu active_mtu; | |
222 | int gid_tbl_len; | |
223 | u32 port_cap_flags; | |
224 | u32 max_msg_sz; | |
225 | u32 bad_pkey_cntr; | |
226 | u32 qkey_viol_cntr; | |
227 | u16 pkey_tbl_len; | |
228 | u16 lid; | |
229 | u16 sm_lid; | |
230 | u8 lmc; | |
231 | u8 max_vl_num; | |
232 | u8 sm_sl; | |
233 | u8 subnet_timeout; | |
234 | u8 init_type_reply; | |
235 | u8 active_width; | |
236 | u8 active_speed; | |
237 | u8 phys_state; | |
238 | }; | |
239 | ||
240 | enum ib_device_modify_flags { | |
c5bcbbb9 RD |
241 | IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0, |
242 | IB_DEVICE_MODIFY_NODE_DESC = 1 << 1 | |
1da177e4 LT |
243 | }; |
244 | ||
245 | struct ib_device_modify { | |
246 | u64 sys_image_guid; | |
c5bcbbb9 | 247 | char node_desc[64]; |
1da177e4 LT |
248 | }; |
249 | ||
250 | enum ib_port_modify_flags { | |
251 | IB_PORT_SHUTDOWN = 1, | |
252 | IB_PORT_INIT_TYPE = (1<<2), | |
253 | IB_PORT_RESET_QKEY_CNTR = (1<<3) | |
254 | }; | |
255 | ||
256 | struct ib_port_modify { | |
257 | u32 set_port_cap_mask; | |
258 | u32 clr_port_cap_mask; | |
259 | u8 init_type; | |
260 | }; | |
261 | ||
262 | enum ib_event_type { | |
263 | IB_EVENT_CQ_ERR, | |
264 | IB_EVENT_QP_FATAL, | |
265 | IB_EVENT_QP_REQ_ERR, | |
266 | IB_EVENT_QP_ACCESS_ERR, | |
267 | IB_EVENT_COMM_EST, | |
268 | IB_EVENT_SQ_DRAINED, | |
269 | IB_EVENT_PATH_MIG, | |
270 | IB_EVENT_PATH_MIG_ERR, | |
271 | IB_EVENT_DEVICE_FATAL, | |
272 | IB_EVENT_PORT_ACTIVE, | |
273 | IB_EVENT_PORT_ERR, | |
274 | IB_EVENT_LID_CHANGE, | |
275 | IB_EVENT_PKEY_CHANGE, | |
d41fcc67 RD |
276 | IB_EVENT_SM_CHANGE, |
277 | IB_EVENT_SRQ_ERR, | |
278 | IB_EVENT_SRQ_LIMIT_REACHED, | |
63942c9a LA |
279 | IB_EVENT_QP_LAST_WQE_REACHED, |
280 | IB_EVENT_CLIENT_REREGISTER | |
1da177e4 LT |
281 | }; |
282 | ||
283 | struct ib_event { | |
284 | struct ib_device *device; | |
285 | union { | |
286 | struct ib_cq *cq; | |
287 | struct ib_qp *qp; | |
d41fcc67 | 288 | struct ib_srq *srq; |
1da177e4 LT |
289 | u8 port_num; |
290 | } element; | |
291 | enum ib_event_type event; | |
292 | }; | |
293 | ||
294 | struct ib_event_handler { | |
295 | struct ib_device *device; | |
296 | void (*handler)(struct ib_event_handler *, struct ib_event *); | |
297 | struct list_head list; | |
298 | }; | |
299 | ||
300 | #define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \ | |
301 | do { \ | |
302 | (_ptr)->device = _device; \ | |
303 | (_ptr)->handler = _handler; \ | |
304 | INIT_LIST_HEAD(&(_ptr)->list); \ | |
305 | } while (0) | |
306 | ||
307 | struct ib_global_route { | |
308 | union ib_gid dgid; | |
309 | u32 flow_label; | |
310 | u8 sgid_index; | |
311 | u8 hop_limit; | |
312 | u8 traffic_class; | |
313 | }; | |
314 | ||
513789ed | 315 | struct ib_grh { |
97f52eb4 SH |
316 | __be32 version_tclass_flow; |
317 | __be16 paylen; | |
513789ed HR |
318 | u8 next_hdr; |
319 | u8 hop_limit; | |
320 | union ib_gid sgid; | |
321 | union ib_gid dgid; | |
322 | }; | |
323 | ||
1da177e4 LT |
324 | enum { |
325 | IB_MULTICAST_QPN = 0xffffff | |
326 | }; | |
327 | ||
97f52eb4 SH |
328 | #define IB_LID_PERMISSIVE __constant_htons(0xFFFF) |
329 | ||
1da177e4 LT |
330 | enum ib_ah_flags { |
331 | IB_AH_GRH = 1 | |
332 | }; | |
333 | ||
bf6a9e31 JM |
334 | enum ib_rate { |
335 | IB_RATE_PORT_CURRENT = 0, | |
336 | IB_RATE_2_5_GBPS = 2, | |
337 | IB_RATE_5_GBPS = 5, | |
338 | IB_RATE_10_GBPS = 3, | |
339 | IB_RATE_20_GBPS = 6, | |
340 | IB_RATE_30_GBPS = 4, | |
341 | IB_RATE_40_GBPS = 7, | |
342 | IB_RATE_60_GBPS = 8, | |
343 | IB_RATE_80_GBPS = 9, | |
344 | IB_RATE_120_GBPS = 10 | |
345 | }; | |
346 | ||
347 | /** | |
348 | * ib_rate_to_mult - Convert the IB rate enum to a multiple of the | |
349 | * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be | |
350 | * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec. | |
351 | * @rate: rate to convert. | |
352 | */ | |
353 | int ib_rate_to_mult(enum ib_rate rate) __attribute_const__; | |
354 | ||
355 | /** | |
356 | * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate | |
357 | * enum. | |
358 | * @mult: multiple to convert. | |
359 | */ | |
360 | enum ib_rate mult_to_ib_rate(int mult) __attribute_const__; | |
361 | ||
1da177e4 LT |
362 | struct ib_ah_attr { |
363 | struct ib_global_route grh; | |
364 | u16 dlid; | |
365 | u8 sl; | |
366 | u8 src_path_bits; | |
367 | u8 static_rate; | |
368 | u8 ah_flags; | |
369 | u8 port_num; | |
370 | }; | |
371 | ||
372 | enum ib_wc_status { | |
373 | IB_WC_SUCCESS, | |
374 | IB_WC_LOC_LEN_ERR, | |
375 | IB_WC_LOC_QP_OP_ERR, | |
376 | IB_WC_LOC_EEC_OP_ERR, | |
377 | IB_WC_LOC_PROT_ERR, | |
378 | IB_WC_WR_FLUSH_ERR, | |
379 | IB_WC_MW_BIND_ERR, | |
380 | IB_WC_BAD_RESP_ERR, | |
381 | IB_WC_LOC_ACCESS_ERR, | |
382 | IB_WC_REM_INV_REQ_ERR, | |
383 | IB_WC_REM_ACCESS_ERR, | |
384 | IB_WC_REM_OP_ERR, | |
385 | IB_WC_RETRY_EXC_ERR, | |
386 | IB_WC_RNR_RETRY_EXC_ERR, | |
387 | IB_WC_LOC_RDD_VIOL_ERR, | |
388 | IB_WC_REM_INV_RD_REQ_ERR, | |
389 | IB_WC_REM_ABORT_ERR, | |
390 | IB_WC_INV_EECN_ERR, | |
391 | IB_WC_INV_EEC_STATE_ERR, | |
392 | IB_WC_FATAL_ERR, | |
393 | IB_WC_RESP_TIMEOUT_ERR, | |
394 | IB_WC_GENERAL_ERR | |
395 | }; | |
396 | ||
397 | enum ib_wc_opcode { | |
398 | IB_WC_SEND, | |
399 | IB_WC_RDMA_WRITE, | |
400 | IB_WC_RDMA_READ, | |
401 | IB_WC_COMP_SWAP, | |
402 | IB_WC_FETCH_ADD, | |
403 | IB_WC_BIND_MW, | |
404 | /* | |
405 | * Set value of IB_WC_RECV so consumers can test if a completion is a | |
406 | * receive by testing (opcode & IB_WC_RECV). | |
407 | */ | |
408 | IB_WC_RECV = 1 << 7, | |
409 | IB_WC_RECV_RDMA_WITH_IMM | |
410 | }; | |
411 | ||
412 | enum ib_wc_flags { | |
413 | IB_WC_GRH = 1, | |
414 | IB_WC_WITH_IMM = (1<<1) | |
415 | }; | |
416 | ||
417 | struct ib_wc { | |
418 | u64 wr_id; | |
419 | enum ib_wc_status status; | |
420 | enum ib_wc_opcode opcode; | |
421 | u32 vendor_err; | |
422 | u32 byte_len; | |
062dbb69 | 423 | struct ib_qp *qp; |
1da177e4 | 424 | __be32 imm_data; |
1da177e4 LT |
425 | u32 src_qp; |
426 | int wc_flags; | |
427 | u16 pkey_index; | |
428 | u16 slid; | |
429 | u8 sl; | |
430 | u8 dlid_path_bits; | |
431 | u8 port_num; /* valid only for DR SMPs on switches */ | |
432 | }; | |
433 | ||
434 | enum ib_cq_notify { | |
435 | IB_CQ_SOLICITED, | |
436 | IB_CQ_NEXT_COMP | |
437 | }; | |
438 | ||
d41fcc67 RD |
439 | enum ib_srq_attr_mask { |
440 | IB_SRQ_MAX_WR = 1 << 0, | |
441 | IB_SRQ_LIMIT = 1 << 1, | |
442 | }; | |
443 | ||
444 | struct ib_srq_attr { | |
445 | u32 max_wr; | |
446 | u32 max_sge; | |
447 | u32 srq_limit; | |
448 | }; | |
449 | ||
450 | struct ib_srq_init_attr { | |
451 | void (*event_handler)(struct ib_event *, void *); | |
452 | void *srq_context; | |
453 | struct ib_srq_attr attr; | |
454 | }; | |
455 | ||
1da177e4 LT |
456 | struct ib_qp_cap { |
457 | u32 max_send_wr; | |
458 | u32 max_recv_wr; | |
459 | u32 max_send_sge; | |
460 | u32 max_recv_sge; | |
461 | u32 max_inline_data; | |
462 | }; | |
463 | ||
464 | enum ib_sig_type { | |
465 | IB_SIGNAL_ALL_WR, | |
466 | IB_SIGNAL_REQ_WR | |
467 | }; | |
468 | ||
469 | enum ib_qp_type { | |
470 | /* | |
471 | * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries | |
472 | * here (and in that order) since the MAD layer uses them as | |
473 | * indices into a 2-entry table. | |
474 | */ | |
475 | IB_QPT_SMI, | |
476 | IB_QPT_GSI, | |
477 | ||
478 | IB_QPT_RC, | |
479 | IB_QPT_UC, | |
480 | IB_QPT_UD, | |
481 | IB_QPT_RAW_IPV6, | |
482 | IB_QPT_RAW_ETY | |
483 | }; | |
484 | ||
485 | struct ib_qp_init_attr { | |
486 | void (*event_handler)(struct ib_event *, void *); | |
487 | void *qp_context; | |
488 | struct ib_cq *send_cq; | |
489 | struct ib_cq *recv_cq; | |
490 | struct ib_srq *srq; | |
491 | struct ib_qp_cap cap; | |
492 | enum ib_sig_type sq_sig_type; | |
493 | enum ib_qp_type qp_type; | |
494 | u8 port_num; /* special QP types only */ | |
495 | }; | |
496 | ||
497 | enum ib_rnr_timeout { | |
498 | IB_RNR_TIMER_655_36 = 0, | |
499 | IB_RNR_TIMER_000_01 = 1, | |
500 | IB_RNR_TIMER_000_02 = 2, | |
501 | IB_RNR_TIMER_000_03 = 3, | |
502 | IB_RNR_TIMER_000_04 = 4, | |
503 | IB_RNR_TIMER_000_06 = 5, | |
504 | IB_RNR_TIMER_000_08 = 6, | |
505 | IB_RNR_TIMER_000_12 = 7, | |
506 | IB_RNR_TIMER_000_16 = 8, | |
507 | IB_RNR_TIMER_000_24 = 9, | |
508 | IB_RNR_TIMER_000_32 = 10, | |
509 | IB_RNR_TIMER_000_48 = 11, | |
510 | IB_RNR_TIMER_000_64 = 12, | |
511 | IB_RNR_TIMER_000_96 = 13, | |
512 | IB_RNR_TIMER_001_28 = 14, | |
513 | IB_RNR_TIMER_001_92 = 15, | |
514 | IB_RNR_TIMER_002_56 = 16, | |
515 | IB_RNR_TIMER_003_84 = 17, | |
516 | IB_RNR_TIMER_005_12 = 18, | |
517 | IB_RNR_TIMER_007_68 = 19, | |
518 | IB_RNR_TIMER_010_24 = 20, | |
519 | IB_RNR_TIMER_015_36 = 21, | |
520 | IB_RNR_TIMER_020_48 = 22, | |
521 | IB_RNR_TIMER_030_72 = 23, | |
522 | IB_RNR_TIMER_040_96 = 24, | |
523 | IB_RNR_TIMER_061_44 = 25, | |
524 | IB_RNR_TIMER_081_92 = 26, | |
525 | IB_RNR_TIMER_122_88 = 27, | |
526 | IB_RNR_TIMER_163_84 = 28, | |
527 | IB_RNR_TIMER_245_76 = 29, | |
528 | IB_RNR_TIMER_327_68 = 30, | |
529 | IB_RNR_TIMER_491_52 = 31 | |
530 | }; | |
531 | ||
532 | enum ib_qp_attr_mask { | |
533 | IB_QP_STATE = 1, | |
534 | IB_QP_CUR_STATE = (1<<1), | |
535 | IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2), | |
536 | IB_QP_ACCESS_FLAGS = (1<<3), | |
537 | IB_QP_PKEY_INDEX = (1<<4), | |
538 | IB_QP_PORT = (1<<5), | |
539 | IB_QP_QKEY = (1<<6), | |
540 | IB_QP_AV = (1<<7), | |
541 | IB_QP_PATH_MTU = (1<<8), | |
542 | IB_QP_TIMEOUT = (1<<9), | |
543 | IB_QP_RETRY_CNT = (1<<10), | |
544 | IB_QP_RNR_RETRY = (1<<11), | |
545 | IB_QP_RQ_PSN = (1<<12), | |
546 | IB_QP_MAX_QP_RD_ATOMIC = (1<<13), | |
547 | IB_QP_ALT_PATH = (1<<14), | |
548 | IB_QP_MIN_RNR_TIMER = (1<<15), | |
549 | IB_QP_SQ_PSN = (1<<16), | |
550 | IB_QP_MAX_DEST_RD_ATOMIC = (1<<17), | |
551 | IB_QP_PATH_MIG_STATE = (1<<18), | |
552 | IB_QP_CAP = (1<<19), | |
553 | IB_QP_DEST_QPN = (1<<20) | |
554 | }; | |
555 | ||
556 | enum ib_qp_state { | |
557 | IB_QPS_RESET, | |
558 | IB_QPS_INIT, | |
559 | IB_QPS_RTR, | |
560 | IB_QPS_RTS, | |
561 | IB_QPS_SQD, | |
562 | IB_QPS_SQE, | |
563 | IB_QPS_ERR | |
564 | }; | |
565 | ||
566 | enum ib_mig_state { | |
567 | IB_MIG_MIGRATED, | |
568 | IB_MIG_REARM, | |
569 | IB_MIG_ARMED | |
570 | }; | |
571 | ||
572 | struct ib_qp_attr { | |
573 | enum ib_qp_state qp_state; | |
574 | enum ib_qp_state cur_qp_state; | |
575 | enum ib_mtu path_mtu; | |
576 | enum ib_mig_state path_mig_state; | |
577 | u32 qkey; | |
578 | u32 rq_psn; | |
579 | u32 sq_psn; | |
580 | u32 dest_qp_num; | |
581 | int qp_access_flags; | |
582 | struct ib_qp_cap cap; | |
583 | struct ib_ah_attr ah_attr; | |
584 | struct ib_ah_attr alt_ah_attr; | |
585 | u16 pkey_index; | |
586 | u16 alt_pkey_index; | |
587 | u8 en_sqd_async_notify; | |
588 | u8 sq_draining; | |
589 | u8 max_rd_atomic; | |
590 | u8 max_dest_rd_atomic; | |
591 | u8 min_rnr_timer; | |
592 | u8 port_num; | |
593 | u8 timeout; | |
594 | u8 retry_cnt; | |
595 | u8 rnr_retry; | |
596 | u8 alt_port_num; | |
597 | u8 alt_timeout; | |
598 | }; | |
599 | ||
600 | enum ib_wr_opcode { | |
601 | IB_WR_RDMA_WRITE, | |
602 | IB_WR_RDMA_WRITE_WITH_IMM, | |
603 | IB_WR_SEND, | |
604 | IB_WR_SEND_WITH_IMM, | |
605 | IB_WR_RDMA_READ, | |
606 | IB_WR_ATOMIC_CMP_AND_SWP, | |
607 | IB_WR_ATOMIC_FETCH_AND_ADD | |
608 | }; | |
609 | ||
610 | enum ib_send_flags { | |
611 | IB_SEND_FENCE = 1, | |
612 | IB_SEND_SIGNALED = (1<<1), | |
613 | IB_SEND_SOLICITED = (1<<2), | |
614 | IB_SEND_INLINE = (1<<3) | |
615 | }; | |
616 | ||
617 | struct ib_sge { | |
618 | u64 addr; | |
619 | u32 length; | |
620 | u32 lkey; | |
621 | }; | |
622 | ||
623 | struct ib_send_wr { | |
624 | struct ib_send_wr *next; | |
625 | u64 wr_id; | |
626 | struct ib_sge *sg_list; | |
627 | int num_sge; | |
628 | enum ib_wr_opcode opcode; | |
629 | int send_flags; | |
e2773c06 | 630 | __be32 imm_data; |
1da177e4 LT |
631 | union { |
632 | struct { | |
633 | u64 remote_addr; | |
634 | u32 rkey; | |
635 | } rdma; | |
636 | struct { | |
637 | u64 remote_addr; | |
638 | u64 compare_add; | |
639 | u64 swap; | |
640 | u32 rkey; | |
641 | } atomic; | |
642 | struct { | |
643 | struct ib_ah *ah; | |
1da177e4 LT |
644 | u32 remote_qpn; |
645 | u32 remote_qkey; | |
1da177e4 LT |
646 | u16 pkey_index; /* valid for GSI only */ |
647 | u8 port_num; /* valid for DR SMPs on switch only */ | |
648 | } ud; | |
649 | } wr; | |
650 | }; | |
651 | ||
652 | struct ib_recv_wr { | |
653 | struct ib_recv_wr *next; | |
654 | u64 wr_id; | |
655 | struct ib_sge *sg_list; | |
656 | int num_sge; | |
657 | }; | |
658 | ||
659 | enum ib_access_flags { | |
660 | IB_ACCESS_LOCAL_WRITE = 1, | |
661 | IB_ACCESS_REMOTE_WRITE = (1<<1), | |
662 | IB_ACCESS_REMOTE_READ = (1<<2), | |
663 | IB_ACCESS_REMOTE_ATOMIC = (1<<3), | |
664 | IB_ACCESS_MW_BIND = (1<<4) | |
665 | }; | |
666 | ||
667 | struct ib_phys_buf { | |
668 | u64 addr; | |
669 | u64 size; | |
670 | }; | |
671 | ||
672 | struct ib_mr_attr { | |
673 | struct ib_pd *pd; | |
674 | u64 device_virt_addr; | |
675 | u64 size; | |
676 | int mr_access_flags; | |
677 | u32 lkey; | |
678 | u32 rkey; | |
679 | }; | |
680 | ||
681 | enum ib_mr_rereg_flags { | |
682 | IB_MR_REREG_TRANS = 1, | |
683 | IB_MR_REREG_PD = (1<<1), | |
684 | IB_MR_REREG_ACCESS = (1<<2) | |
685 | }; | |
686 | ||
687 | struct ib_mw_bind { | |
688 | struct ib_mr *mr; | |
689 | u64 wr_id; | |
690 | u64 addr; | |
691 | u32 length; | |
692 | int send_flags; | |
693 | int mw_access_flags; | |
694 | }; | |
695 | ||
696 | struct ib_fmr_attr { | |
697 | int max_pages; | |
698 | int max_maps; | |
d36f34aa | 699 | u8 page_shift; |
1da177e4 LT |
700 | }; |
701 | ||
e2773c06 RD |
702 | struct ib_ucontext { |
703 | struct ib_device *device; | |
704 | struct list_head pd_list; | |
705 | struct list_head mr_list; | |
706 | struct list_head mw_list; | |
707 | struct list_head cq_list; | |
708 | struct list_head qp_list; | |
709 | struct list_head srq_list; | |
710 | struct list_head ah_list; | |
e2773c06 RD |
711 | }; |
712 | ||
713 | struct ib_uobject { | |
714 | u64 user_handle; /* handle given to us by userspace */ | |
715 | struct ib_ucontext *context; /* associated user context */ | |
9ead190b | 716 | void *object; /* containing object */ |
e2773c06 RD |
717 | struct list_head list; /* link to context's list */ |
718 | u32 id; /* index into kernel idr */ | |
9ead190b RD |
719 | struct kref ref; |
720 | struct rw_semaphore mutex; /* protects .live */ | |
721 | int live; | |
e2773c06 RD |
722 | }; |
723 | ||
724 | struct ib_umem { | |
725 | unsigned long user_base; | |
726 | unsigned long virt_base; | |
727 | size_t length; | |
728 | int offset; | |
729 | int page_size; | |
730 | int writable; | |
731 | struct list_head chunk_list; | |
732 | }; | |
733 | ||
734 | struct ib_umem_chunk { | |
735 | struct list_head list; | |
736 | int nents; | |
737 | int nmap; | |
738 | struct scatterlist page_list[0]; | |
739 | }; | |
740 | ||
741 | struct ib_udata { | |
742 | void __user *inbuf; | |
743 | void __user *outbuf; | |
744 | size_t inlen; | |
745 | size_t outlen; | |
746 | }; | |
747 | ||
748 | #define IB_UMEM_MAX_PAGE_CHUNK \ | |
749 | ((PAGE_SIZE - offsetof(struct ib_umem_chunk, page_list)) / \ | |
750 | ((void *) &((struct ib_umem_chunk *) 0)->page_list[1] - \ | |
751 | (void *) &((struct ib_umem_chunk *) 0)->page_list[0])) | |
752 | ||
753 | struct ib_umem_object { | |
754 | struct ib_uobject uobject; | |
755 | struct ib_umem umem; | |
756 | }; | |
757 | ||
1da177e4 | 758 | struct ib_pd { |
e2773c06 RD |
759 | struct ib_device *device; |
760 | struct ib_uobject *uobject; | |
761 | atomic_t usecnt; /* count all resources */ | |
1da177e4 LT |
762 | }; |
763 | ||
764 | struct ib_ah { | |
765 | struct ib_device *device; | |
766 | struct ib_pd *pd; | |
e2773c06 | 767 | struct ib_uobject *uobject; |
1da177e4 LT |
768 | }; |
769 | ||
770 | typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context); | |
771 | ||
772 | struct ib_cq { | |
e2773c06 RD |
773 | struct ib_device *device; |
774 | struct ib_uobject *uobject; | |
775 | ib_comp_handler comp_handler; | |
776 | void (*event_handler)(struct ib_event *, void *); | |
777 | void * cq_context; | |
778 | int cqe; | |
779 | atomic_t usecnt; /* count number of work queues */ | |
1da177e4 LT |
780 | }; |
781 | ||
782 | struct ib_srq { | |
d41fcc67 RD |
783 | struct ib_device *device; |
784 | struct ib_pd *pd; | |
785 | struct ib_uobject *uobject; | |
786 | void (*event_handler)(struct ib_event *, void *); | |
787 | void *srq_context; | |
1da177e4 LT |
788 | atomic_t usecnt; |
789 | }; | |
790 | ||
791 | struct ib_qp { | |
792 | struct ib_device *device; | |
793 | struct ib_pd *pd; | |
794 | struct ib_cq *send_cq; | |
795 | struct ib_cq *recv_cq; | |
796 | struct ib_srq *srq; | |
e2773c06 | 797 | struct ib_uobject *uobject; |
1da177e4 LT |
798 | void (*event_handler)(struct ib_event *, void *); |
799 | void *qp_context; | |
800 | u32 qp_num; | |
801 | enum ib_qp_type qp_type; | |
802 | }; | |
803 | ||
804 | struct ib_mr { | |
e2773c06 RD |
805 | struct ib_device *device; |
806 | struct ib_pd *pd; | |
807 | struct ib_uobject *uobject; | |
808 | u32 lkey; | |
809 | u32 rkey; | |
810 | atomic_t usecnt; /* count number of MWs */ | |
1da177e4 LT |
811 | }; |
812 | ||
813 | struct ib_mw { | |
814 | struct ib_device *device; | |
815 | struct ib_pd *pd; | |
e2773c06 | 816 | struct ib_uobject *uobject; |
1da177e4 LT |
817 | u32 rkey; |
818 | }; | |
819 | ||
820 | struct ib_fmr { | |
821 | struct ib_device *device; | |
822 | struct ib_pd *pd; | |
823 | struct list_head list; | |
824 | u32 lkey; | |
825 | u32 rkey; | |
826 | }; | |
827 | ||
828 | struct ib_mad; | |
829 | struct ib_grh; | |
830 | ||
831 | enum ib_process_mad_flags { | |
832 | IB_MAD_IGNORE_MKEY = 1, | |
833 | IB_MAD_IGNORE_BKEY = 2, | |
834 | IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY | |
835 | }; | |
836 | ||
837 | enum ib_mad_result { | |
838 | IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */ | |
839 | IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */ | |
840 | IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */ | |
841 | IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */ | |
842 | }; | |
843 | ||
844 | #define IB_DEVICE_NAME_MAX 64 | |
845 | ||
846 | struct ib_cache { | |
847 | rwlock_t lock; | |
848 | struct ib_event_handler event_handler; | |
849 | struct ib_pkey_cache **pkey_cache; | |
850 | struct ib_gid_cache **gid_cache; | |
6fb9cdbf | 851 | u8 *lmc_cache; |
1da177e4 LT |
852 | }; |
853 | ||
9b513090 RC |
854 | struct ib_dma_mapping_ops { |
855 | int (*mapping_error)(struct ib_device *dev, | |
856 | u64 dma_addr); | |
857 | u64 (*map_single)(struct ib_device *dev, | |
858 | void *ptr, size_t size, | |
859 | enum dma_data_direction direction); | |
860 | void (*unmap_single)(struct ib_device *dev, | |
861 | u64 addr, size_t size, | |
862 | enum dma_data_direction direction); | |
863 | u64 (*map_page)(struct ib_device *dev, | |
864 | struct page *page, unsigned long offset, | |
865 | size_t size, | |
866 | enum dma_data_direction direction); | |
867 | void (*unmap_page)(struct ib_device *dev, | |
868 | u64 addr, size_t size, | |
869 | enum dma_data_direction direction); | |
870 | int (*map_sg)(struct ib_device *dev, | |
871 | struct scatterlist *sg, int nents, | |
872 | enum dma_data_direction direction); | |
873 | void (*unmap_sg)(struct ib_device *dev, | |
874 | struct scatterlist *sg, int nents, | |
875 | enum dma_data_direction direction); | |
876 | u64 (*dma_address)(struct ib_device *dev, | |
877 | struct scatterlist *sg); | |
878 | unsigned int (*dma_len)(struct ib_device *dev, | |
879 | struct scatterlist *sg); | |
880 | void (*sync_single_for_cpu)(struct ib_device *dev, | |
881 | u64 dma_handle, | |
882 | size_t size, | |
883 | enum dma_data_direction dir); | |
884 | void (*sync_single_for_device)(struct ib_device *dev, | |
885 | u64 dma_handle, | |
886 | size_t size, | |
887 | enum dma_data_direction dir); | |
888 | void *(*alloc_coherent)(struct ib_device *dev, | |
889 | size_t size, | |
890 | u64 *dma_handle, | |
891 | gfp_t flag); | |
892 | void (*free_coherent)(struct ib_device *dev, | |
893 | size_t size, void *cpu_addr, | |
894 | u64 dma_handle); | |
895 | }; | |
896 | ||
07ebafba TT |
897 | struct iw_cm_verbs; |
898 | ||
1da177e4 LT |
899 | struct ib_device { |
900 | struct device *dma_device; | |
901 | ||
902 | char name[IB_DEVICE_NAME_MAX]; | |
903 | ||
904 | struct list_head event_handler_list; | |
905 | spinlock_t event_handler_lock; | |
906 | ||
907 | struct list_head core_list; | |
908 | struct list_head client_data_list; | |
909 | spinlock_t client_data_lock; | |
910 | ||
911 | struct ib_cache cache; | |
912 | ||
913 | u32 flags; | |
914 | ||
07ebafba TT |
915 | struct iw_cm_verbs *iwcm; |
916 | ||
1da177e4 LT |
917 | int (*query_device)(struct ib_device *device, |
918 | struct ib_device_attr *device_attr); | |
919 | int (*query_port)(struct ib_device *device, | |
920 | u8 port_num, | |
921 | struct ib_port_attr *port_attr); | |
922 | int (*query_gid)(struct ib_device *device, | |
923 | u8 port_num, int index, | |
924 | union ib_gid *gid); | |
925 | int (*query_pkey)(struct ib_device *device, | |
926 | u8 port_num, u16 index, u16 *pkey); | |
927 | int (*modify_device)(struct ib_device *device, | |
928 | int device_modify_mask, | |
929 | struct ib_device_modify *device_modify); | |
930 | int (*modify_port)(struct ib_device *device, | |
931 | u8 port_num, int port_modify_mask, | |
932 | struct ib_port_modify *port_modify); | |
e2773c06 RD |
933 | struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device, |
934 | struct ib_udata *udata); | |
935 | int (*dealloc_ucontext)(struct ib_ucontext *context); | |
936 | int (*mmap)(struct ib_ucontext *context, | |
937 | struct vm_area_struct *vma); | |
938 | struct ib_pd * (*alloc_pd)(struct ib_device *device, | |
939 | struct ib_ucontext *context, | |
940 | struct ib_udata *udata); | |
1da177e4 LT |
941 | int (*dealloc_pd)(struct ib_pd *pd); |
942 | struct ib_ah * (*create_ah)(struct ib_pd *pd, | |
943 | struct ib_ah_attr *ah_attr); | |
944 | int (*modify_ah)(struct ib_ah *ah, | |
945 | struct ib_ah_attr *ah_attr); | |
946 | int (*query_ah)(struct ib_ah *ah, | |
947 | struct ib_ah_attr *ah_attr); | |
948 | int (*destroy_ah)(struct ib_ah *ah); | |
d41fcc67 RD |
949 | struct ib_srq * (*create_srq)(struct ib_pd *pd, |
950 | struct ib_srq_init_attr *srq_init_attr, | |
951 | struct ib_udata *udata); | |
952 | int (*modify_srq)(struct ib_srq *srq, | |
953 | struct ib_srq_attr *srq_attr, | |
9bc57e2d RC |
954 | enum ib_srq_attr_mask srq_attr_mask, |
955 | struct ib_udata *udata); | |
d41fcc67 RD |
956 | int (*query_srq)(struct ib_srq *srq, |
957 | struct ib_srq_attr *srq_attr); | |
958 | int (*destroy_srq)(struct ib_srq *srq); | |
959 | int (*post_srq_recv)(struct ib_srq *srq, | |
960 | struct ib_recv_wr *recv_wr, | |
961 | struct ib_recv_wr **bad_recv_wr); | |
1da177e4 | 962 | struct ib_qp * (*create_qp)(struct ib_pd *pd, |
e2773c06 RD |
963 | struct ib_qp_init_attr *qp_init_attr, |
964 | struct ib_udata *udata); | |
1da177e4 LT |
965 | int (*modify_qp)(struct ib_qp *qp, |
966 | struct ib_qp_attr *qp_attr, | |
9bc57e2d RC |
967 | int qp_attr_mask, |
968 | struct ib_udata *udata); | |
1da177e4 LT |
969 | int (*query_qp)(struct ib_qp *qp, |
970 | struct ib_qp_attr *qp_attr, | |
971 | int qp_attr_mask, | |
972 | struct ib_qp_init_attr *qp_init_attr); | |
973 | int (*destroy_qp)(struct ib_qp *qp); | |
974 | int (*post_send)(struct ib_qp *qp, | |
975 | struct ib_send_wr *send_wr, | |
976 | struct ib_send_wr **bad_send_wr); | |
977 | int (*post_recv)(struct ib_qp *qp, | |
978 | struct ib_recv_wr *recv_wr, | |
979 | struct ib_recv_wr **bad_recv_wr); | |
e2773c06 RD |
980 | struct ib_cq * (*create_cq)(struct ib_device *device, int cqe, |
981 | struct ib_ucontext *context, | |
982 | struct ib_udata *udata); | |
1da177e4 | 983 | int (*destroy_cq)(struct ib_cq *cq); |
33b9b3ee RD |
984 | int (*resize_cq)(struct ib_cq *cq, int cqe, |
985 | struct ib_udata *udata); | |
1da177e4 LT |
986 | int (*poll_cq)(struct ib_cq *cq, int num_entries, |
987 | struct ib_wc *wc); | |
988 | int (*peek_cq)(struct ib_cq *cq, int wc_cnt); | |
989 | int (*req_notify_cq)(struct ib_cq *cq, | |
990 | enum ib_cq_notify cq_notify); | |
991 | int (*req_ncomp_notif)(struct ib_cq *cq, | |
992 | int wc_cnt); | |
993 | struct ib_mr * (*get_dma_mr)(struct ib_pd *pd, | |
994 | int mr_access_flags); | |
995 | struct ib_mr * (*reg_phys_mr)(struct ib_pd *pd, | |
996 | struct ib_phys_buf *phys_buf_array, | |
997 | int num_phys_buf, | |
998 | int mr_access_flags, | |
999 | u64 *iova_start); | |
e2773c06 RD |
1000 | struct ib_mr * (*reg_user_mr)(struct ib_pd *pd, |
1001 | struct ib_umem *region, | |
1002 | int mr_access_flags, | |
1003 | struct ib_udata *udata); | |
1da177e4 LT |
1004 | int (*query_mr)(struct ib_mr *mr, |
1005 | struct ib_mr_attr *mr_attr); | |
1006 | int (*dereg_mr)(struct ib_mr *mr); | |
1007 | int (*rereg_phys_mr)(struct ib_mr *mr, | |
1008 | int mr_rereg_mask, | |
1009 | struct ib_pd *pd, | |
1010 | struct ib_phys_buf *phys_buf_array, | |
1011 | int num_phys_buf, | |
1012 | int mr_access_flags, | |
1013 | u64 *iova_start); | |
1014 | struct ib_mw * (*alloc_mw)(struct ib_pd *pd); | |
1015 | int (*bind_mw)(struct ib_qp *qp, | |
1016 | struct ib_mw *mw, | |
1017 | struct ib_mw_bind *mw_bind); | |
1018 | int (*dealloc_mw)(struct ib_mw *mw); | |
1019 | struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd, | |
1020 | int mr_access_flags, | |
1021 | struct ib_fmr_attr *fmr_attr); | |
1022 | int (*map_phys_fmr)(struct ib_fmr *fmr, | |
1023 | u64 *page_list, int list_len, | |
1024 | u64 iova); | |
1025 | int (*unmap_fmr)(struct list_head *fmr_list); | |
1026 | int (*dealloc_fmr)(struct ib_fmr *fmr); | |
1027 | int (*attach_mcast)(struct ib_qp *qp, | |
1028 | union ib_gid *gid, | |
1029 | u16 lid); | |
1030 | int (*detach_mcast)(struct ib_qp *qp, | |
1031 | union ib_gid *gid, | |
1032 | u16 lid); | |
1033 | int (*process_mad)(struct ib_device *device, | |
1034 | int process_mad_flags, | |
1035 | u8 port_num, | |
1036 | struct ib_wc *in_wc, | |
1037 | struct ib_grh *in_grh, | |
1038 | struct ib_mad *in_mad, | |
1039 | struct ib_mad *out_mad); | |
1040 | ||
9b513090 RC |
1041 | struct ib_dma_mapping_ops *dma_ops; |
1042 | ||
e2773c06 | 1043 | struct module *owner; |
1da177e4 LT |
1044 | struct class_device class_dev; |
1045 | struct kobject ports_parent; | |
1046 | struct list_head port_list; | |
1047 | ||
1048 | enum { | |
1049 | IB_DEV_UNINITIALIZED, | |
1050 | IB_DEV_REGISTERED, | |
1051 | IB_DEV_UNREGISTERED | |
1052 | } reg_state; | |
1053 | ||
883a99c7 | 1054 | u64 uverbs_cmd_mask; |
274c0891 RD |
1055 | int uverbs_abi_ver; |
1056 | ||
c5bcbbb9 | 1057 | char node_desc[64]; |
cf311cd4 | 1058 | __be64 node_guid; |
1da177e4 LT |
1059 | u8 node_type; |
1060 | u8 phys_port_cnt; | |
1061 | }; | |
1062 | ||
1063 | struct ib_client { | |
1064 | char *name; | |
1065 | void (*add) (struct ib_device *); | |
1066 | void (*remove)(struct ib_device *); | |
1067 | ||
1068 | struct list_head list; | |
1069 | }; | |
1070 | ||
1071 | struct ib_device *ib_alloc_device(size_t size); | |
1072 | void ib_dealloc_device(struct ib_device *device); | |
1073 | ||
1074 | int ib_register_device (struct ib_device *device); | |
1075 | void ib_unregister_device(struct ib_device *device); | |
1076 | ||
1077 | int ib_register_client (struct ib_client *client); | |
1078 | void ib_unregister_client(struct ib_client *client); | |
1079 | ||
1080 | void *ib_get_client_data(struct ib_device *device, struct ib_client *client); | |
1081 | void ib_set_client_data(struct ib_device *device, struct ib_client *client, | |
1082 | void *data); | |
1083 | ||
e2773c06 RD |
1084 | static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len) |
1085 | { | |
1086 | return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0; | |
1087 | } | |
1088 | ||
1089 | static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len) | |
1090 | { | |
1091 | return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0; | |
1092 | } | |
1093 | ||
8a51866f RD |
1094 | /** |
1095 | * ib_modify_qp_is_ok - Check that the supplied attribute mask | |
1096 | * contains all required attributes and no attributes not allowed for | |
1097 | * the given QP state transition. | |
1098 | * @cur_state: Current QP state | |
1099 | * @next_state: Next QP state | |
1100 | * @type: QP type | |
1101 | * @mask: Mask of supplied QP attributes | |
1102 | * | |
1103 | * This function is a helper function that a low-level driver's | |
1104 | * modify_qp method can use to validate the consumer's input. It | |
1105 | * checks that cur_state and next_state are valid QP states, that a | |
1106 | * transition from cur_state to next_state is allowed by the IB spec, | |
1107 | * and that the attribute mask supplied is allowed for the transition. | |
1108 | */ | |
1109 | int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state, | |
1110 | enum ib_qp_type type, enum ib_qp_attr_mask mask); | |
1111 | ||
1da177e4 LT |
1112 | int ib_register_event_handler (struct ib_event_handler *event_handler); |
1113 | int ib_unregister_event_handler(struct ib_event_handler *event_handler); | |
1114 | void ib_dispatch_event(struct ib_event *event); | |
1115 | ||
1116 | int ib_query_device(struct ib_device *device, | |
1117 | struct ib_device_attr *device_attr); | |
1118 | ||
1119 | int ib_query_port(struct ib_device *device, | |
1120 | u8 port_num, struct ib_port_attr *port_attr); | |
1121 | ||
1122 | int ib_query_gid(struct ib_device *device, | |
1123 | u8 port_num, int index, union ib_gid *gid); | |
1124 | ||
1125 | int ib_query_pkey(struct ib_device *device, | |
1126 | u8 port_num, u16 index, u16 *pkey); | |
1127 | ||
1128 | int ib_modify_device(struct ib_device *device, | |
1129 | int device_modify_mask, | |
1130 | struct ib_device_modify *device_modify); | |
1131 | ||
1132 | int ib_modify_port(struct ib_device *device, | |
1133 | u8 port_num, int port_modify_mask, | |
1134 | struct ib_port_modify *port_modify); | |
1135 | ||
1136 | /** | |
1137 | * ib_alloc_pd - Allocates an unused protection domain. | |
1138 | * @device: The device on which to allocate the protection domain. | |
1139 | * | |
1140 | * A protection domain object provides an association between QPs, shared | |
1141 | * receive queues, address handles, memory regions, and memory windows. | |
1142 | */ | |
1143 | struct ib_pd *ib_alloc_pd(struct ib_device *device); | |
1144 | ||
1145 | /** | |
1146 | * ib_dealloc_pd - Deallocates a protection domain. | |
1147 | * @pd: The protection domain to deallocate. | |
1148 | */ | |
1149 | int ib_dealloc_pd(struct ib_pd *pd); | |
1150 | ||
1151 | /** | |
1152 | * ib_create_ah - Creates an address handle for the given address vector. | |
1153 | * @pd: The protection domain associated with the address handle. | |
1154 | * @ah_attr: The attributes of the address vector. | |
1155 | * | |
1156 | * The address handle is used to reference a local or global destination | |
1157 | * in all UD QP post sends. | |
1158 | */ | |
1159 | struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr); | |
1160 | ||
4e00d694 SH |
1161 | /** |
1162 | * ib_init_ah_from_wc - Initializes address handle attributes from a | |
1163 | * work completion. | |
1164 | * @device: Device on which the received message arrived. | |
1165 | * @port_num: Port on which the received message arrived. | |
1166 | * @wc: Work completion associated with the received message. | |
1167 | * @grh: References the received global route header. This parameter is | |
1168 | * ignored unless the work completion indicates that the GRH is valid. | |
1169 | * @ah_attr: Returned attributes that can be used when creating an address | |
1170 | * handle for replying to the message. | |
1171 | */ | |
1172 | int ib_init_ah_from_wc(struct ib_device *device, u8 port_num, struct ib_wc *wc, | |
1173 | struct ib_grh *grh, struct ib_ah_attr *ah_attr); | |
1174 | ||
513789ed HR |
1175 | /** |
1176 | * ib_create_ah_from_wc - Creates an address handle associated with the | |
1177 | * sender of the specified work completion. | |
1178 | * @pd: The protection domain associated with the address handle. | |
1179 | * @wc: Work completion information associated with a received message. | |
1180 | * @grh: References the received global route header. This parameter is | |
1181 | * ignored unless the work completion indicates that the GRH is valid. | |
1182 | * @port_num: The outbound port number to associate with the address. | |
1183 | * | |
1184 | * The address handle is used to reference a local or global destination | |
1185 | * in all UD QP post sends. | |
1186 | */ | |
1187 | struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, struct ib_wc *wc, | |
1188 | struct ib_grh *grh, u8 port_num); | |
1189 | ||
1da177e4 LT |
1190 | /** |
1191 | * ib_modify_ah - Modifies the address vector associated with an address | |
1192 | * handle. | |
1193 | * @ah: The address handle to modify. | |
1194 | * @ah_attr: The new address vector attributes to associate with the | |
1195 | * address handle. | |
1196 | */ | |
1197 | int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr); | |
1198 | ||
1199 | /** | |
1200 | * ib_query_ah - Queries the address vector associated with an address | |
1201 | * handle. | |
1202 | * @ah: The address handle to query. | |
1203 | * @ah_attr: The address vector attributes associated with the address | |
1204 | * handle. | |
1205 | */ | |
1206 | int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr); | |
1207 | ||
1208 | /** | |
1209 | * ib_destroy_ah - Destroys an address handle. | |
1210 | * @ah: The address handle to destroy. | |
1211 | */ | |
1212 | int ib_destroy_ah(struct ib_ah *ah); | |
1213 | ||
d41fcc67 RD |
1214 | /** |
1215 | * ib_create_srq - Creates a SRQ associated with the specified protection | |
1216 | * domain. | |
1217 | * @pd: The protection domain associated with the SRQ. | |
abb6e9ba DB |
1218 | * @srq_init_attr: A list of initial attributes required to create the |
1219 | * SRQ. If SRQ creation succeeds, then the attributes are updated to | |
1220 | * the actual capabilities of the created SRQ. | |
d41fcc67 RD |
1221 | * |
1222 | * srq_attr->max_wr and srq_attr->max_sge are read the determine the | |
1223 | * requested size of the SRQ, and set to the actual values allocated | |
1224 | * on return. If ib_create_srq() succeeds, then max_wr and max_sge | |
1225 | * will always be at least as large as the requested values. | |
1226 | */ | |
1227 | struct ib_srq *ib_create_srq(struct ib_pd *pd, | |
1228 | struct ib_srq_init_attr *srq_init_attr); | |
1229 | ||
1230 | /** | |
1231 | * ib_modify_srq - Modifies the attributes for the specified SRQ. | |
1232 | * @srq: The SRQ to modify. | |
1233 | * @srq_attr: On input, specifies the SRQ attributes to modify. On output, | |
1234 | * the current values of selected SRQ attributes are returned. | |
1235 | * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ | |
1236 | * are being modified. | |
1237 | * | |
1238 | * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or | |
1239 | * IB_SRQ_LIMIT to set the SRQ's limit and request notification when | |
1240 | * the number of receives queued drops below the limit. | |
1241 | */ | |
1242 | int ib_modify_srq(struct ib_srq *srq, | |
1243 | struct ib_srq_attr *srq_attr, | |
1244 | enum ib_srq_attr_mask srq_attr_mask); | |
1245 | ||
1246 | /** | |
1247 | * ib_query_srq - Returns the attribute list and current values for the | |
1248 | * specified SRQ. | |
1249 | * @srq: The SRQ to query. | |
1250 | * @srq_attr: The attributes of the specified SRQ. | |
1251 | */ | |
1252 | int ib_query_srq(struct ib_srq *srq, | |
1253 | struct ib_srq_attr *srq_attr); | |
1254 | ||
1255 | /** | |
1256 | * ib_destroy_srq - Destroys the specified SRQ. | |
1257 | * @srq: The SRQ to destroy. | |
1258 | */ | |
1259 | int ib_destroy_srq(struct ib_srq *srq); | |
1260 | ||
1261 | /** | |
1262 | * ib_post_srq_recv - Posts a list of work requests to the specified SRQ. | |
1263 | * @srq: The SRQ to post the work request on. | |
1264 | * @recv_wr: A list of work requests to post on the receive queue. | |
1265 | * @bad_recv_wr: On an immediate failure, this parameter will reference | |
1266 | * the work request that failed to be posted on the QP. | |
1267 | */ | |
1268 | static inline int ib_post_srq_recv(struct ib_srq *srq, | |
1269 | struct ib_recv_wr *recv_wr, | |
1270 | struct ib_recv_wr **bad_recv_wr) | |
1271 | { | |
1272 | return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr); | |
1273 | } | |
1274 | ||
1da177e4 LT |
1275 | /** |
1276 | * ib_create_qp - Creates a QP associated with the specified protection | |
1277 | * domain. | |
1278 | * @pd: The protection domain associated with the QP. | |
abb6e9ba DB |
1279 | * @qp_init_attr: A list of initial attributes required to create the |
1280 | * QP. If QP creation succeeds, then the attributes are updated to | |
1281 | * the actual capabilities of the created QP. | |
1da177e4 LT |
1282 | */ |
1283 | struct ib_qp *ib_create_qp(struct ib_pd *pd, | |
1284 | struct ib_qp_init_attr *qp_init_attr); | |
1285 | ||
1286 | /** | |
1287 | * ib_modify_qp - Modifies the attributes for the specified QP and then | |
1288 | * transitions the QP to the given state. | |
1289 | * @qp: The QP to modify. | |
1290 | * @qp_attr: On input, specifies the QP attributes to modify. On output, | |
1291 | * the current values of selected QP attributes are returned. | |
1292 | * @qp_attr_mask: A bit-mask used to specify which attributes of the QP | |
1293 | * are being modified. | |
1294 | */ | |
1295 | int ib_modify_qp(struct ib_qp *qp, | |
1296 | struct ib_qp_attr *qp_attr, | |
1297 | int qp_attr_mask); | |
1298 | ||
1299 | /** | |
1300 | * ib_query_qp - Returns the attribute list and current values for the | |
1301 | * specified QP. | |
1302 | * @qp: The QP to query. | |
1303 | * @qp_attr: The attributes of the specified QP. | |
1304 | * @qp_attr_mask: A bit-mask used to select specific attributes to query. | |
1305 | * @qp_init_attr: Additional attributes of the selected QP. | |
1306 | * | |
1307 | * The qp_attr_mask may be used to limit the query to gathering only the | |
1308 | * selected attributes. | |
1309 | */ | |
1310 | int ib_query_qp(struct ib_qp *qp, | |
1311 | struct ib_qp_attr *qp_attr, | |
1312 | int qp_attr_mask, | |
1313 | struct ib_qp_init_attr *qp_init_attr); | |
1314 | ||
1315 | /** | |
1316 | * ib_destroy_qp - Destroys the specified QP. | |
1317 | * @qp: The QP to destroy. | |
1318 | */ | |
1319 | int ib_destroy_qp(struct ib_qp *qp); | |
1320 | ||
1321 | /** | |
1322 | * ib_post_send - Posts a list of work requests to the send queue of | |
1323 | * the specified QP. | |
1324 | * @qp: The QP to post the work request on. | |
1325 | * @send_wr: A list of work requests to post on the send queue. | |
1326 | * @bad_send_wr: On an immediate failure, this parameter will reference | |
1327 | * the work request that failed to be posted on the QP. | |
1328 | */ | |
1329 | static inline int ib_post_send(struct ib_qp *qp, | |
1330 | struct ib_send_wr *send_wr, | |
1331 | struct ib_send_wr **bad_send_wr) | |
1332 | { | |
1333 | return qp->device->post_send(qp, send_wr, bad_send_wr); | |
1334 | } | |
1335 | ||
1336 | /** | |
1337 | * ib_post_recv - Posts a list of work requests to the receive queue of | |
1338 | * the specified QP. | |
1339 | * @qp: The QP to post the work request on. | |
1340 | * @recv_wr: A list of work requests to post on the receive queue. | |
1341 | * @bad_recv_wr: On an immediate failure, this parameter will reference | |
1342 | * the work request that failed to be posted on the QP. | |
1343 | */ | |
1344 | static inline int ib_post_recv(struct ib_qp *qp, | |
1345 | struct ib_recv_wr *recv_wr, | |
1346 | struct ib_recv_wr **bad_recv_wr) | |
1347 | { | |
1348 | return qp->device->post_recv(qp, recv_wr, bad_recv_wr); | |
1349 | } | |
1350 | ||
1351 | /** | |
1352 | * ib_create_cq - Creates a CQ on the specified device. | |
1353 | * @device: The device on which to create the CQ. | |
1354 | * @comp_handler: A user-specified callback that is invoked when a | |
1355 | * completion event occurs on the CQ. | |
1356 | * @event_handler: A user-specified callback that is invoked when an | |
1357 | * asynchronous event not associated with a completion occurs on the CQ. | |
1358 | * @cq_context: Context associated with the CQ returned to the user via | |
1359 | * the associated completion and event handlers. | |
1360 | * @cqe: The minimum size of the CQ. | |
1361 | * | |
1362 | * Users can examine the cq structure to determine the actual CQ size. | |
1363 | */ | |
1364 | struct ib_cq *ib_create_cq(struct ib_device *device, | |
1365 | ib_comp_handler comp_handler, | |
1366 | void (*event_handler)(struct ib_event *, void *), | |
1367 | void *cq_context, int cqe); | |
1368 | ||
1369 | /** | |
1370 | * ib_resize_cq - Modifies the capacity of the CQ. | |
1371 | * @cq: The CQ to resize. | |
1372 | * @cqe: The minimum size of the CQ. | |
1373 | * | |
1374 | * Users can examine the cq structure to determine the actual CQ size. | |
1375 | */ | |
1376 | int ib_resize_cq(struct ib_cq *cq, int cqe); | |
1377 | ||
1378 | /** | |
1379 | * ib_destroy_cq - Destroys the specified CQ. | |
1380 | * @cq: The CQ to destroy. | |
1381 | */ | |
1382 | int ib_destroy_cq(struct ib_cq *cq); | |
1383 | ||
1384 | /** | |
1385 | * ib_poll_cq - poll a CQ for completion(s) | |
1386 | * @cq:the CQ being polled | |
1387 | * @num_entries:maximum number of completions to return | |
1388 | * @wc:array of at least @num_entries &struct ib_wc where completions | |
1389 | * will be returned | |
1390 | * | |
1391 | * Poll a CQ for (possibly multiple) completions. If the return value | |
1392 | * is < 0, an error occurred. If the return value is >= 0, it is the | |
1393 | * number of completions returned. If the return value is | |
1394 | * non-negative and < num_entries, then the CQ was emptied. | |
1395 | */ | |
1396 | static inline int ib_poll_cq(struct ib_cq *cq, int num_entries, | |
1397 | struct ib_wc *wc) | |
1398 | { | |
1399 | return cq->device->poll_cq(cq, num_entries, wc); | |
1400 | } | |
1401 | ||
1402 | /** | |
1403 | * ib_peek_cq - Returns the number of unreaped completions currently | |
1404 | * on the specified CQ. | |
1405 | * @cq: The CQ to peek. | |
1406 | * @wc_cnt: A minimum number of unreaped completions to check for. | |
1407 | * | |
1408 | * If the number of unreaped completions is greater than or equal to wc_cnt, | |
1409 | * this function returns wc_cnt, otherwise, it returns the actual number of | |
1410 | * unreaped completions. | |
1411 | */ | |
1412 | int ib_peek_cq(struct ib_cq *cq, int wc_cnt); | |
1413 | ||
1414 | /** | |
1415 | * ib_req_notify_cq - Request completion notification on a CQ. | |
1416 | * @cq: The CQ to generate an event for. | |
1417 | * @cq_notify: If set to %IB_CQ_SOLICITED, completion notification will | |
1418 | * occur on the next solicited event. If set to %IB_CQ_NEXT_COMP, | |
1419 | * notification will occur on the next completion. | |
1420 | */ | |
1421 | static inline int ib_req_notify_cq(struct ib_cq *cq, | |
1422 | enum ib_cq_notify cq_notify) | |
1423 | { | |
1424 | return cq->device->req_notify_cq(cq, cq_notify); | |
1425 | } | |
1426 | ||
1427 | /** | |
1428 | * ib_req_ncomp_notif - Request completion notification when there are | |
1429 | * at least the specified number of unreaped completions on the CQ. | |
1430 | * @cq: The CQ to generate an event for. | |
1431 | * @wc_cnt: The number of unreaped completions that should be on the | |
1432 | * CQ before an event is generated. | |
1433 | */ | |
1434 | static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt) | |
1435 | { | |
1436 | return cq->device->req_ncomp_notif ? | |
1437 | cq->device->req_ncomp_notif(cq, wc_cnt) : | |
1438 | -ENOSYS; | |
1439 | } | |
1440 | ||
1441 | /** | |
1442 | * ib_get_dma_mr - Returns a memory region for system memory that is | |
1443 | * usable for DMA. | |
1444 | * @pd: The protection domain associated with the memory region. | |
1445 | * @mr_access_flags: Specifies the memory access rights. | |
9b513090 RC |
1446 | * |
1447 | * Note that the ib_dma_*() functions defined below must be used | |
1448 | * to create/destroy addresses used with the Lkey or Rkey returned | |
1449 | * by ib_get_dma_mr(). | |
1da177e4 LT |
1450 | */ |
1451 | struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags); | |
1452 | ||
9b513090 RC |
1453 | /** |
1454 | * ib_dma_mapping_error - check a DMA addr for error | |
1455 | * @dev: The device for which the dma_addr was created | |
1456 | * @dma_addr: The DMA address to check | |
1457 | */ | |
1458 | static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr) | |
1459 | { | |
d1998ef3 BC |
1460 | if (dev->dma_ops) |
1461 | return dev->dma_ops->mapping_error(dev, dma_addr); | |
1462 | return dma_mapping_error(dma_addr); | |
9b513090 RC |
1463 | } |
1464 | ||
1465 | /** | |
1466 | * ib_dma_map_single - Map a kernel virtual address to DMA address | |
1467 | * @dev: The device for which the dma_addr is to be created | |
1468 | * @cpu_addr: The kernel virtual address | |
1469 | * @size: The size of the region in bytes | |
1470 | * @direction: The direction of the DMA | |
1471 | */ | |
1472 | static inline u64 ib_dma_map_single(struct ib_device *dev, | |
1473 | void *cpu_addr, size_t size, | |
1474 | enum dma_data_direction direction) | |
1475 | { | |
d1998ef3 BC |
1476 | if (dev->dma_ops) |
1477 | return dev->dma_ops->map_single(dev, cpu_addr, size, direction); | |
1478 | return dma_map_single(dev->dma_device, cpu_addr, size, direction); | |
9b513090 RC |
1479 | } |
1480 | ||
1481 | /** | |
1482 | * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single() | |
1483 | * @dev: The device for which the DMA address was created | |
1484 | * @addr: The DMA address | |
1485 | * @size: The size of the region in bytes | |
1486 | * @direction: The direction of the DMA | |
1487 | */ | |
1488 | static inline void ib_dma_unmap_single(struct ib_device *dev, | |
1489 | u64 addr, size_t size, | |
1490 | enum dma_data_direction direction) | |
1491 | { | |
d1998ef3 BC |
1492 | if (dev->dma_ops) |
1493 | dev->dma_ops->unmap_single(dev, addr, size, direction); | |
1494 | else | |
9b513090 RC |
1495 | dma_unmap_single(dev->dma_device, addr, size, direction); |
1496 | } | |
1497 | ||
1498 | /** | |
1499 | * ib_dma_map_page - Map a physical page to DMA address | |
1500 | * @dev: The device for which the dma_addr is to be created | |
1501 | * @page: The page to be mapped | |
1502 | * @offset: The offset within the page | |
1503 | * @size: The size of the region in bytes | |
1504 | * @direction: The direction of the DMA | |
1505 | */ | |
1506 | static inline u64 ib_dma_map_page(struct ib_device *dev, | |
1507 | struct page *page, | |
1508 | unsigned long offset, | |
1509 | size_t size, | |
1510 | enum dma_data_direction direction) | |
1511 | { | |
d1998ef3 BC |
1512 | if (dev->dma_ops) |
1513 | return dev->dma_ops->map_page(dev, page, offset, size, direction); | |
1514 | return dma_map_page(dev->dma_device, page, offset, size, direction); | |
9b513090 RC |
1515 | } |
1516 | ||
1517 | /** | |
1518 | * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page() | |
1519 | * @dev: The device for which the DMA address was created | |
1520 | * @addr: The DMA address | |
1521 | * @size: The size of the region in bytes | |
1522 | * @direction: The direction of the DMA | |
1523 | */ | |
1524 | static inline void ib_dma_unmap_page(struct ib_device *dev, | |
1525 | u64 addr, size_t size, | |
1526 | enum dma_data_direction direction) | |
1527 | { | |
d1998ef3 BC |
1528 | if (dev->dma_ops) |
1529 | dev->dma_ops->unmap_page(dev, addr, size, direction); | |
1530 | else | |
9b513090 RC |
1531 | dma_unmap_page(dev->dma_device, addr, size, direction); |
1532 | } | |
1533 | ||
1534 | /** | |
1535 | * ib_dma_map_sg - Map a scatter/gather list to DMA addresses | |
1536 | * @dev: The device for which the DMA addresses are to be created | |
1537 | * @sg: The array of scatter/gather entries | |
1538 | * @nents: The number of scatter/gather entries | |
1539 | * @direction: The direction of the DMA | |
1540 | */ | |
1541 | static inline int ib_dma_map_sg(struct ib_device *dev, | |
1542 | struct scatterlist *sg, int nents, | |
1543 | enum dma_data_direction direction) | |
1544 | { | |
d1998ef3 BC |
1545 | if (dev->dma_ops) |
1546 | return dev->dma_ops->map_sg(dev, sg, nents, direction); | |
1547 | return dma_map_sg(dev->dma_device, sg, nents, direction); | |
9b513090 RC |
1548 | } |
1549 | ||
1550 | /** | |
1551 | * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses | |
1552 | * @dev: The device for which the DMA addresses were created | |
1553 | * @sg: The array of scatter/gather entries | |
1554 | * @nents: The number of scatter/gather entries | |
1555 | * @direction: The direction of the DMA | |
1556 | */ | |
1557 | static inline void ib_dma_unmap_sg(struct ib_device *dev, | |
1558 | struct scatterlist *sg, int nents, | |
1559 | enum dma_data_direction direction) | |
1560 | { | |
d1998ef3 BC |
1561 | if (dev->dma_ops) |
1562 | dev->dma_ops->unmap_sg(dev, sg, nents, direction); | |
1563 | else | |
9b513090 RC |
1564 | dma_unmap_sg(dev->dma_device, sg, nents, direction); |
1565 | } | |
1566 | ||
1567 | /** | |
1568 | * ib_sg_dma_address - Return the DMA address from a scatter/gather entry | |
1569 | * @dev: The device for which the DMA addresses were created | |
1570 | * @sg: The scatter/gather entry | |
1571 | */ | |
1572 | static inline u64 ib_sg_dma_address(struct ib_device *dev, | |
1573 | struct scatterlist *sg) | |
1574 | { | |
d1998ef3 BC |
1575 | if (dev->dma_ops) |
1576 | return dev->dma_ops->dma_address(dev, sg); | |
1577 | return sg_dma_address(sg); | |
9b513090 RC |
1578 | } |
1579 | ||
1580 | /** | |
1581 | * ib_sg_dma_len - Return the DMA length from a scatter/gather entry | |
1582 | * @dev: The device for which the DMA addresses were created | |
1583 | * @sg: The scatter/gather entry | |
1584 | */ | |
1585 | static inline unsigned int ib_sg_dma_len(struct ib_device *dev, | |
1586 | struct scatterlist *sg) | |
1587 | { | |
d1998ef3 BC |
1588 | if (dev->dma_ops) |
1589 | return dev->dma_ops->dma_len(dev, sg); | |
1590 | return sg_dma_len(sg); | |
9b513090 RC |
1591 | } |
1592 | ||
1593 | /** | |
1594 | * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU | |
1595 | * @dev: The device for which the DMA address was created | |
1596 | * @addr: The DMA address | |
1597 | * @size: The size of the region in bytes | |
1598 | * @dir: The direction of the DMA | |
1599 | */ | |
1600 | static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev, | |
1601 | u64 addr, | |
1602 | size_t size, | |
1603 | enum dma_data_direction dir) | |
1604 | { | |
d1998ef3 BC |
1605 | if (dev->dma_ops) |
1606 | dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir); | |
1607 | else | |
9b513090 RC |
1608 | dma_sync_single_for_cpu(dev->dma_device, addr, size, dir); |
1609 | } | |
1610 | ||
1611 | /** | |
1612 | * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device | |
1613 | * @dev: The device for which the DMA address was created | |
1614 | * @addr: The DMA address | |
1615 | * @size: The size of the region in bytes | |
1616 | * @dir: The direction of the DMA | |
1617 | */ | |
1618 | static inline void ib_dma_sync_single_for_device(struct ib_device *dev, | |
1619 | u64 addr, | |
1620 | size_t size, | |
1621 | enum dma_data_direction dir) | |
1622 | { | |
d1998ef3 BC |
1623 | if (dev->dma_ops) |
1624 | dev->dma_ops->sync_single_for_device(dev, addr, size, dir); | |
1625 | else | |
9b513090 RC |
1626 | dma_sync_single_for_device(dev->dma_device, addr, size, dir); |
1627 | } | |
1628 | ||
1629 | /** | |
1630 | * ib_dma_alloc_coherent - Allocate memory and map it for DMA | |
1631 | * @dev: The device for which the DMA address is requested | |
1632 | * @size: The size of the region to allocate in bytes | |
1633 | * @dma_handle: A pointer for returning the DMA address of the region | |
1634 | * @flag: memory allocator flags | |
1635 | */ | |
1636 | static inline void *ib_dma_alloc_coherent(struct ib_device *dev, | |
1637 | size_t size, | |
1638 | u64 *dma_handle, | |
1639 | gfp_t flag) | |
1640 | { | |
d1998ef3 BC |
1641 | if (dev->dma_ops) |
1642 | return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag); | |
c59a3da1 RD |
1643 | else { |
1644 | dma_addr_t handle; | |
1645 | void *ret; | |
1646 | ||
1647 | ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag); | |
1648 | *dma_handle = handle; | |
1649 | return ret; | |
1650 | } | |
9b513090 RC |
1651 | } |
1652 | ||
1653 | /** | |
1654 | * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent() | |
1655 | * @dev: The device for which the DMA addresses were allocated | |
1656 | * @size: The size of the region | |
1657 | * @cpu_addr: the address returned by ib_dma_alloc_coherent() | |
1658 | * @dma_handle: the DMA address returned by ib_dma_alloc_coherent() | |
1659 | */ | |
1660 | static inline void ib_dma_free_coherent(struct ib_device *dev, | |
1661 | size_t size, void *cpu_addr, | |
1662 | u64 dma_handle) | |
1663 | { | |
d1998ef3 BC |
1664 | if (dev->dma_ops) |
1665 | dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); | |
1666 | else | |
9b513090 RC |
1667 | dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle); |
1668 | } | |
1669 | ||
1da177e4 LT |
1670 | /** |
1671 | * ib_reg_phys_mr - Prepares a virtually addressed memory region for use | |
1672 | * by an HCA. | |
1673 | * @pd: The protection domain associated assigned to the registered region. | |
1674 | * @phys_buf_array: Specifies a list of physical buffers to use in the | |
1675 | * memory region. | |
1676 | * @num_phys_buf: Specifies the size of the phys_buf_array. | |
1677 | * @mr_access_flags: Specifies the memory access rights. | |
1678 | * @iova_start: The offset of the region's starting I/O virtual address. | |
1679 | */ | |
1680 | struct ib_mr *ib_reg_phys_mr(struct ib_pd *pd, | |
1681 | struct ib_phys_buf *phys_buf_array, | |
1682 | int num_phys_buf, | |
1683 | int mr_access_flags, | |
1684 | u64 *iova_start); | |
1685 | ||
1686 | /** | |
1687 | * ib_rereg_phys_mr - Modifies the attributes of an existing memory region. | |
1688 | * Conceptually, this call performs the functions deregister memory region | |
1689 | * followed by register physical memory region. Where possible, | |
1690 | * resources are reused instead of deallocated and reallocated. | |
1691 | * @mr: The memory region to modify. | |
1692 | * @mr_rereg_mask: A bit-mask used to indicate which of the following | |
1693 | * properties of the memory region are being modified. | |
1694 | * @pd: If %IB_MR_REREG_PD is set in mr_rereg_mask, this field specifies | |
1695 | * the new protection domain to associated with the memory region, | |
1696 | * otherwise, this parameter is ignored. | |
1697 | * @phys_buf_array: If %IB_MR_REREG_TRANS is set in mr_rereg_mask, this | |
1698 | * field specifies a list of physical buffers to use in the new | |
1699 | * translation, otherwise, this parameter is ignored. | |
1700 | * @num_phys_buf: If %IB_MR_REREG_TRANS is set in mr_rereg_mask, this | |
1701 | * field specifies the size of the phys_buf_array, otherwise, this | |
1702 | * parameter is ignored. | |
1703 | * @mr_access_flags: If %IB_MR_REREG_ACCESS is set in mr_rereg_mask, this | |
1704 | * field specifies the new memory access rights, otherwise, this | |
1705 | * parameter is ignored. | |
1706 | * @iova_start: The offset of the region's starting I/O virtual address. | |
1707 | */ | |
1708 | int ib_rereg_phys_mr(struct ib_mr *mr, | |
1709 | int mr_rereg_mask, | |
1710 | struct ib_pd *pd, | |
1711 | struct ib_phys_buf *phys_buf_array, | |
1712 | int num_phys_buf, | |
1713 | int mr_access_flags, | |
1714 | u64 *iova_start); | |
1715 | ||
1716 | /** | |
1717 | * ib_query_mr - Retrieves information about a specific memory region. | |
1718 | * @mr: The memory region to retrieve information about. | |
1719 | * @mr_attr: The attributes of the specified memory region. | |
1720 | */ | |
1721 | int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr); | |
1722 | ||
1723 | /** | |
1724 | * ib_dereg_mr - Deregisters a memory region and removes it from the | |
1725 | * HCA translation table. | |
1726 | * @mr: The memory region to deregister. | |
1727 | */ | |
1728 | int ib_dereg_mr(struct ib_mr *mr); | |
1729 | ||
1730 | /** | |
1731 | * ib_alloc_mw - Allocates a memory window. | |
1732 | * @pd: The protection domain associated with the memory window. | |
1733 | */ | |
1734 | struct ib_mw *ib_alloc_mw(struct ib_pd *pd); | |
1735 | ||
1736 | /** | |
1737 | * ib_bind_mw - Posts a work request to the send queue of the specified | |
1738 | * QP, which binds the memory window to the given address range and | |
1739 | * remote access attributes. | |
1740 | * @qp: QP to post the bind work request on. | |
1741 | * @mw: The memory window to bind. | |
1742 | * @mw_bind: Specifies information about the memory window, including | |
1743 | * its address range, remote access rights, and associated memory region. | |
1744 | */ | |
1745 | static inline int ib_bind_mw(struct ib_qp *qp, | |
1746 | struct ib_mw *mw, | |
1747 | struct ib_mw_bind *mw_bind) | |
1748 | { | |
1749 | /* XXX reference counting in corresponding MR? */ | |
1750 | return mw->device->bind_mw ? | |
1751 | mw->device->bind_mw(qp, mw, mw_bind) : | |
1752 | -ENOSYS; | |
1753 | } | |
1754 | ||
1755 | /** | |
1756 | * ib_dealloc_mw - Deallocates a memory window. | |
1757 | * @mw: The memory window to deallocate. | |
1758 | */ | |
1759 | int ib_dealloc_mw(struct ib_mw *mw); | |
1760 | ||
1761 | /** | |
1762 | * ib_alloc_fmr - Allocates a unmapped fast memory region. | |
1763 | * @pd: The protection domain associated with the unmapped region. | |
1764 | * @mr_access_flags: Specifies the memory access rights. | |
1765 | * @fmr_attr: Attributes of the unmapped region. | |
1766 | * | |
1767 | * A fast memory region must be mapped before it can be used as part of | |
1768 | * a work request. | |
1769 | */ | |
1770 | struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd, | |
1771 | int mr_access_flags, | |
1772 | struct ib_fmr_attr *fmr_attr); | |
1773 | ||
1774 | /** | |
1775 | * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region. | |
1776 | * @fmr: The fast memory region to associate with the pages. | |
1777 | * @page_list: An array of physical pages to map to the fast memory region. | |
1778 | * @list_len: The number of pages in page_list. | |
1779 | * @iova: The I/O virtual address to use with the mapped region. | |
1780 | */ | |
1781 | static inline int ib_map_phys_fmr(struct ib_fmr *fmr, | |
1782 | u64 *page_list, int list_len, | |
1783 | u64 iova) | |
1784 | { | |
1785 | return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova); | |
1786 | } | |
1787 | ||
1788 | /** | |
1789 | * ib_unmap_fmr - Removes the mapping from a list of fast memory regions. | |
1790 | * @fmr_list: A linked list of fast memory regions to unmap. | |
1791 | */ | |
1792 | int ib_unmap_fmr(struct list_head *fmr_list); | |
1793 | ||
1794 | /** | |
1795 | * ib_dealloc_fmr - Deallocates a fast memory region. | |
1796 | * @fmr: The fast memory region to deallocate. | |
1797 | */ | |
1798 | int ib_dealloc_fmr(struct ib_fmr *fmr); | |
1799 | ||
1800 | /** | |
1801 | * ib_attach_mcast - Attaches the specified QP to a multicast group. | |
1802 | * @qp: QP to attach to the multicast group. The QP must be type | |
1803 | * IB_QPT_UD. | |
1804 | * @gid: Multicast group GID. | |
1805 | * @lid: Multicast group LID in host byte order. | |
1806 | * | |
1807 | * In order to send and receive multicast packets, subnet | |
1808 | * administration must have created the multicast group and configured | |
1809 | * the fabric appropriately. The port associated with the specified | |
1810 | * QP must also be a member of the multicast group. | |
1811 | */ | |
1812 | int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid); | |
1813 | ||
1814 | /** | |
1815 | * ib_detach_mcast - Detaches the specified QP from a multicast group. | |
1816 | * @qp: QP to detach from the multicast group. | |
1817 | * @gid: Multicast group GID. | |
1818 | * @lid: Multicast group LID in host byte order. | |
1819 | */ | |
1820 | int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid); | |
1821 | ||
1822 | #endif /* IB_VERBS_H */ |