[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / media / omap3isp.h

/*
 * omap3isp.h
 *
 * TI OMAP3 ISP - Platform data
 *
 * Copyright (C) 2011 Nokia Corporation
 *
 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 *	     Sakari Ailus <sakari.ailus@iki.fi>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 */

#ifndef __MEDIA_OMAP3ISP_H__
#define __MEDIA_OMAP3ISP_H__

struct i2c_board_info;
struct isp_device;

#define ISP_XCLK_NONE			0
#define ISP_XCLK_A			1
#define ISP_XCLK_B			2

enum isp_interface_type {
	ISP_INTERFACE_PARALLEL,
	ISP_INTERFACE_CSI2A_PHY2,
	ISP_INTERFACE_CCP2B_PHY1,
	ISP_INTERFACE_CCP2B_PHY2,
	ISP_INTERFACE_CSI2C_PHY1,
};

enum {
	ISP_BRIDGE_DISABLE = 0,
	ISP_BRIDGE_LITTLE_ENDIAN = 2,
	ISP_BRIDGE_BIG_ENDIAN = 3,
};

enum {
	ISP_LANE_SHIFT_0 = 0,
	ISP_LANE_SHIFT_2 = 1,
	ISP_LANE_SHIFT_4 = 2,
	ISP_LANE_SHIFT_6 = 3,
};

/**
 * struct isp_parallel_platform_data - Parallel interface platform data
 * @data_lane_shift: Data lane shifter
 *		ISP_LANE_SHIFT_0 - CAMEXT[13:0] -> CAM[13:0]
 *		ISP_LANE_SHIFT_2 - CAMEXT[13:2] -> CAM[11:0]
 *		ISP_LANE_SHIFT_4 - CAMEXT[13:4] -> CAM[9:0]
 *		ISP_LANE_SHIFT_6 - CAMEXT[13:6] -> CAM[7:0]
 * @clk_pol: Pixel clock polarity
 *		0 - Sample on rising edge, 1 - Sample on falling edge
 * @hs_pol: Horizontal synchronization polarity
 *		0 - Active high, 1 - Active low
 * @vs_pol: Vertical synchronization polarity
 *		0 - Active high, 1 - Active low
 * @bridge: CCDC Bridge input control
 *		ISP_BRIDGE_DISABLE - Disable
 *		ISP_BRIDGE_LITTLE_ENDIAN - Little endian
 *		ISP_BRIDGE_BIG_ENDIAN - Big endian
 */
struct isp_parallel_platform_data {
	unsigned int data_lane_shift:2;
	unsigned int clk_pol:1;
	unsigned int hs_pol:1;
	unsigned int vs_pol:1;
	unsigned int bridge:2;
};

enum {
	ISP_CCP2_PHY_DATA_CLOCK = 0,
	ISP_CCP2_PHY_DATA_STROBE = 1,
};

enum {
	ISP_CCP2_MODE_MIPI = 0,
	ISP_CCP2_MODE_CCP2 = 1,
};

/**
 * struct isp_ccp2_platform_data - CCP2 interface platform data
 * @strobe_clk_pol: Strobe/clock polarity
 *		0 - Non Inverted, 1 - Inverted
 * @crc: Enable the cyclic redundancy check
 * @ccp2_mode: Enable CCP2 compatibility mode
 *		ISP_CCP2_MODE_MIPI - MIPI-CSI1 mode
 *		ISP_CCP2_MODE_CCP2 - CCP2 mode
 * @phy_layer: Physical layer selection
 *		ISP_CCP2_PHY_DATA_CLOCK - Data/clock physical layer
 *		ISP_CCP2_PHY_DATA_STROBE - Data/strobe physical layer
 * @vpclk_div: Video port output clock control
 */
struct isp_ccp2_platform_data {
	unsigned int strobe_clk_pol:1;
	unsigned int crc:1;
	unsigned int ccp2_mode:1;
	unsigned int phy_layer:1;
	unsigned int vpclk_div:2;
};

/**
 * struct isp_csi2_platform_data - CSI2 interface platform data
 * @crc: Enable the cyclic redundancy check
 * @vpclk_div: Video port output clock control
 */
struct isp_csi2_platform_data {
	unsigned crc:1;
	unsigned vpclk_div:2;
};

struct isp_subdev_i2c_board_info {
	struct i2c_board_info *board_info;
	int i2c_adapter_id;
};

struct isp_v4l2_subdevs_group {
	struct isp_subdev_i2c_board_info *subdevs;
	enum isp_interface_type interface;
	union {
		struct isp_parallel_platform_data parallel;
		struct isp_ccp2_platform_data ccp2;
		struct isp_csi2_platform_data csi2;
	} bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
};

struct isp_platform_data {
	struct isp_v4l2_subdevs_group *subdevs;
	void (*set_constraints)(struct isp_device *isp, bool enable);
};

#endif	/* __MEDIA_OMAP3ISP_H__ */
Commit	Line	Data
b98d32f7 LP	1	/*
	2	* omap3isp.h
	3	*
	4	* TI OMAP3 ISP - Platform data
	5	*
	6	* Copyright (C) 2011 Nokia Corporation
	7	*
	8	* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
	9	* Sakari Ailus <sakari.ailus@iki.fi>
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*
	15	* This program is distributed in the hope that it will be useful, but
	16	* WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	18	* General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	23	* 02110-1301 USA
	24	*/
	25
	26	#ifndef __MEDIA_OMAP3ISP_H__
	27	#define __MEDIA_OMAP3ISP_H__
	28
	29	struct i2c_board_info;
	30	struct isp_device;
	31
618b055b SA	32	#define ISP_XCLK_NONE 0
	33	#define ISP_XCLK_A 1
	34	#define ISP_XCLK_B 2
	35
b98d32f7 LP	36	enum isp_interface_type {
	37	ISP_INTERFACE_PARALLEL,
	38	ISP_INTERFACE_CSI2A_PHY2,
	39	ISP_INTERFACE_CCP2B_PHY1,
	40	ISP_INTERFACE_CCP2B_PHY2,
	41	ISP_INTERFACE_CSI2C_PHY1,
	42	};
	43
	44	enum {
	45	ISP_BRIDGE_DISABLE = 0,
	46	ISP_BRIDGE_LITTLE_ENDIAN = 2,
	47	ISP_BRIDGE_BIG_ENDIAN = 3,
	48	};
	49
	50	enum {
	51	ISP_LANE_SHIFT_0 = 0,
	52	ISP_LANE_SHIFT_2 = 1,
	53	ISP_LANE_SHIFT_4 = 2,
	54	ISP_LANE_SHIFT_6 = 3,
	55	};
	56
	57	/**
	58	* struct isp_parallel_platform_data - Parallel interface platform data
	59	* @data_lane_shift: Data lane shifter
	60	* ISP_LANE_SHIFT_0 - CAMEXT[13:0] -> CAM[13:0]
	61	* ISP_LANE_SHIFT_2 - CAMEXT[13:2] -> CAM[11:0]
	62	* ISP_LANE_SHIFT_4 - CAMEXT[13:4] -> CAM[9:0]
	63	* ISP_LANE_SHIFT_6 - CAMEXT[13:6] -> CAM[7:0]
	64	* @clk_pol: Pixel clock polarity
c1026c58	65	* 0 - Sample on rising edge, 1 - Sample on falling edge
b98d32f7 LP	66	* @hs_pol: Horizontal synchronization polarity
	67	* 0 - Active high, 1 - Active low
	68	* @vs_pol: Vertical synchronization polarity
	69	* 0 - Active high, 1 - Active low
	70	* @bridge: CCDC Bridge input control
	71	* ISP_BRIDGE_DISABLE - Disable
	72	* ISP_BRIDGE_LITTLE_ENDIAN - Little endian
	73	* ISP_BRIDGE_BIG_ENDIAN - Big endian
	74	*/
	75	struct isp_parallel_platform_data {
	76	unsigned int data_lane_shift:2;
	77	unsigned int clk_pol:1;
	78	unsigned int hs_pol:1;
	79	unsigned int vs_pol:1;
	80	unsigned int bridge:2;
	81	};
	82
	83	enum {
	84	ISP_CCP2_PHY_DATA_CLOCK = 0,
	85	ISP_CCP2_PHY_DATA_STROBE = 1,
	86	};
	87
	88	enum {
	89	ISP_CCP2_MODE_MIPI = 0,
	90	ISP_CCP2_MODE_CCP2 = 1,
	91	};
	92
	93	/**
	94	* struct isp_ccp2_platform_data - CCP2 interface platform data
	95	* @strobe_clk_pol: Strobe/clock polarity
	96	* 0 - Non Inverted, 1 - Inverted
	97	* @crc: Enable the cyclic redundancy check
	98	* @ccp2_mode: Enable CCP2 compatibility mode
	99	* ISP_CCP2_MODE_MIPI - MIPI-CSI1 mode
	100	* ISP_CCP2_MODE_CCP2 - CCP2 mode
	101	* @phy_layer: Physical layer selection
	102	* ISP_CCP2_PHY_DATA_CLOCK - Data/clock physical layer
	103	* ISP_CCP2_PHY_DATA_STROBE - Data/strobe physical layer
	104	* @vpclk_div: Video port output clock control
	105	*/
	106	struct isp_ccp2_platform_data {
	107	unsigned int strobe_clk_pol:1;
	108	unsigned int crc:1;
	109	unsigned int ccp2_mode:1;
	110	unsigned int phy_layer:1;
	111	unsigned int vpclk_div:2;
	112	};
	113
	114	/**
	115	* struct isp_csi2_platform_data - CSI2 interface platform data
	116	* @crc: Enable the cyclic redundancy check
	117	* @vpclk_div: Video port output clock control
	118	*/
	119	struct isp_csi2_platform_data {
	120	unsigned crc:1;
	121	unsigned vpclk_div:2;
	122	};
	123
	124	struct isp_subdev_i2c_board_info {
	125	struct i2c_board_info *board_info;
	126	int i2c_adapter_id;
	127	};
	128
	129	struct isp_v4l2_subdevs_group {
130	struct isp_subdev_i2c_board_info *subdevs;
131	enum isp_interface_type interface;
132	union {
133	struct isp_parallel_platform_data parallel;
134	struct isp_ccp2_platform_data ccp2;
135	struct isp_csi2_platform_data csi2;
136	} bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
137	};
138
139	struct isp_platform_data {
140	struct isp_v4l2_subdevs_group *subdevs;
141	void (set_constraints)(struct isp_device isp, bool enable);
142	};
143
144	#endif /* __MEDIA_OMAP3ISP_H__ */