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2744e8af LW |
1 | /* |
2 | * Interface the pinctrl subsystem | |
3 | * | |
4 | * Copyright (C) 2011 ST-Ericsson SA | |
5 | * Written on behalf of Linaro for ST-Ericsson | |
6 | * This interface is used in the core to keep track of pins. | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
10 | * License terms: GNU General Public License (GPL) version 2 | |
11 | */ | |
12 | #ifndef __LINUX_PINCTRL_PINCTRL_H | |
13 | #define __LINUX_PINCTRL_PINCTRL_H | |
14 | ||
15 | #ifdef CONFIG_PINCTRL | |
16 | ||
17 | #include <linux/radix-tree.h> | |
2744e8af LW |
18 | #include <linux/list.h> |
19 | #include <linux/seq_file.h> | |
a1ce3928 | 20 | #include <linux/pinctrl/pinctrl-state.h> |
46919ae6 | 21 | |
0acfb076 | 22 | struct device; |
2744e8af | 23 | struct pinctrl_dev; |
57291ce2 | 24 | struct pinctrl_map; |
2744e8af | 25 | struct pinmux_ops; |
ae6b4d85 | 26 | struct pinconf_ops; |
2744e8af | 27 | struct gpio_chip; |
57291ce2 | 28 | struct device_node; |
2744e8af LW |
29 | |
30 | /** | |
31 | * struct pinctrl_pin_desc - boards/machines provide information on their | |
32 | * pins, pads or other muxable units in this struct | |
33 | * @number: unique pin number from the global pin number space | |
34 | * @name: a name for this pin | |
35 | */ | |
36 | struct pinctrl_pin_desc { | |
37 | unsigned number; | |
38 | const char *name; | |
39 | }; | |
40 | ||
41 | /* Convenience macro to define a single named or anonymous pin descriptor */ | |
42 | #define PINCTRL_PIN(a, b) { .number = a, .name = b } | |
43 | #define PINCTRL_PIN_ANON(a) { .number = a } | |
44 | ||
45 | /** | |
46 | * struct pinctrl_gpio_range - each pin controller can provide subranges of | |
47 | * the GPIO number space to be handled by the controller | |
48 | * @node: list node for internal use | |
49 | * @name: a name for the chip in this range | |
50 | * @id: an ID number for the chip in this range | |
51 | * @base: base offset of the GPIO range | |
3c739ad0 | 52 | * @pin_base: base pin number of the GPIO range |
2744e8af LW |
53 | * @npins: number of pins in the GPIO range, including the base number |
54 | * @gc: an optional pointer to a gpio_chip | |
55 | */ | |
56 | struct pinctrl_gpio_range { | |
57 | struct list_head node; | |
58 | const char *name; | |
59 | unsigned int id; | |
60 | unsigned int base; | |
3c739ad0 | 61 | unsigned int pin_base; |
2744e8af LW |
62 | unsigned int npins; |
63 | struct gpio_chip *gc; | |
64 | }; | |
65 | ||
66 | /** | |
67 | * struct pinctrl_ops - global pin control operations, to be implemented by | |
68 | * pin controller drivers. | |
d1e90e9e | 69 | * @get_groups_count: Returns the count of total number of groups registered. |
2744e8af LW |
70 | * @get_group_name: return the group name of the pin group |
71 | * @get_group_pins: return an array of pins corresponding to a certain | |
72 | * group selector @pins, and the size of the array in @num_pins | |
73 | * @pin_dbg_show: optional debugfs display hook that will provide per-device | |
74 | * info for a certain pin in debugfs | |
02ae6da2 SW |
75 | * @dt_node_to_map: parse a device tree "pin configuration node", and create |
76 | * mapping table entries for it. These are returned through the @map and | |
77 | * @num_maps output parameters. This function is optional, and may be | |
78 | * omitted for pinctrl drivers that do not support device tree. | |
79 | * @dt_free_map: free mapping table entries created via @dt_node_to_map. The | |
80 | * top-level @map pointer must be freed, along with any dynamically | |
81 | * allocated members of the mapping table entries themselves. This | |
82 | * function is optional, and may be omitted for pinctrl drivers that do | |
83 | * not support device tree. | |
2744e8af LW |
84 | */ |
85 | struct pinctrl_ops { | |
d1e90e9e | 86 | int (*get_groups_count) (struct pinctrl_dev *pctldev); |
2744e8af LW |
87 | const char *(*get_group_name) (struct pinctrl_dev *pctldev, |
88 | unsigned selector); | |
89 | int (*get_group_pins) (struct pinctrl_dev *pctldev, | |
90 | unsigned selector, | |
a5818a8b SW |
91 | const unsigned **pins, |
92 | unsigned *num_pins); | |
2744e8af LW |
93 | void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, |
94 | unsigned offset); | |
57291ce2 SW |
95 | int (*dt_node_to_map) (struct pinctrl_dev *pctldev, |
96 | struct device_node *np_config, | |
97 | struct pinctrl_map **map, unsigned *num_maps); | |
98 | void (*dt_free_map) (struct pinctrl_dev *pctldev, | |
99 | struct pinctrl_map *map, unsigned num_maps); | |
2744e8af LW |
100 | }; |
101 | ||
102 | /** | |
103 | * struct pinctrl_desc - pin controller descriptor, register this to pin | |
104 | * control subsystem | |
105 | * @name: name for the pin controller | |
106 | * @pins: an array of pin descriptors describing all the pins handled by | |
107 | * this pin controller | |
108 | * @npins: number of descriptors in the array, usually just ARRAY_SIZE() | |
109 | * of the pins field above | |
2744e8af LW |
110 | * @pctlops: pin control operation vtable, to support global concepts like |
111 | * grouping of pins, this is optional. | |
ae6b4d85 LW |
112 | * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver |
113 | * @confops: pin config operations vtable, if you support pin configuration in | |
114 | * your driver | |
2744e8af LW |
115 | * @owner: module providing the pin controller, used for refcounting |
116 | */ | |
117 | struct pinctrl_desc { | |
118 | const char *name; | |
119 | struct pinctrl_pin_desc const *pins; | |
120 | unsigned int npins; | |
2744e8af LW |
121 | struct pinctrl_ops *pctlops; |
122 | struct pinmux_ops *pmxops; | |
ae6b4d85 | 123 | struct pinconf_ops *confops; |
2744e8af LW |
124 | struct module *owner; |
125 | }; | |
126 | ||
127 | /* External interface to pin controller */ | |
128 | extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
129 | struct device *dev, void *driver_data); | |
130 | extern void pinctrl_unregister(struct pinctrl_dev *pctldev); | |
131 | extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin); | |
132 | extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
133 | struct pinctrl_gpio_range *range); | |
3e5e00b6 DA |
134 | extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
135 | struct pinctrl_gpio_range *ranges, | |
136 | unsigned nranges); | |
2744e8af LW |
137 | extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); |
138 | extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); | |
139 | #else | |
140 | ||
e0e20753 | 141 | struct pinctrl_dev; |
2744e8af | 142 | |
ae6b4d85 | 143 | /* Sufficiently stupid default functions when pinctrl is not in use */ |
2744e8af LW |
144 | static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) |
145 | { | |
146 | return pin >= 0; | |
147 | } | |
148 | ||
149 | #endif /* !CONFIG_PINCTRL */ | |
150 | ||
151 | #endif /* __LINUX_PINCTRL_PINCTRL_H */ |