perf sched: Add --input=file option to builtin-sched.c
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / perf_counter.h
CommitLineData
0793a61d
TG
1/*
2 * Performance counters:
3 *
a308444c
IM
4 * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5 * Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
6 * Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
0793a61d
TG
7 *
8 * Data type definitions, declarations, prototypes.
9 *
a308444c 10 * Started by: Thomas Gleixner and Ingo Molnar
0793a61d
TG
11 *
12 * For licencing details see kernel-base/COPYING
13 */
14#ifndef _LINUX_PERF_COUNTER_H
15#define _LINUX_PERF_COUNTER_H
16
f3dfd265
PM
17#include <linux/types.h>
18#include <linux/ioctl.h>
9aaa131a 19#include <asm/byteorder.h>
0793a61d
TG
20
21/*
9f66a381
IM
22 * User-space ABI bits:
23 */
24
25/*
0d48696f 26 * attr.type
0793a61d 27 */
1c432d89 28enum perf_type_id {
a308444c
IM
29 PERF_TYPE_HARDWARE = 0,
30 PERF_TYPE_SOFTWARE = 1,
31 PERF_TYPE_TRACEPOINT = 2,
32 PERF_TYPE_HW_CACHE = 3,
33 PERF_TYPE_RAW = 4,
b8e83514 34
a308444c 35 PERF_TYPE_MAX, /* non-ABI */
b8e83514 36};
6c594c21 37
b8e83514 38/*
a308444c
IM
39 * Generalized performance counter event types, used by the
40 * attr.event_id parameter of the sys_perf_counter_open()
41 * syscall:
b8e83514 42 */
1c432d89 43enum perf_hw_id {
9f66a381 44 /*
b8e83514 45 * Common hardware events, generalized by the kernel:
9f66a381 46 */
f4dbfa8f
PZ
47 PERF_COUNT_HW_CPU_CYCLES = 0,
48 PERF_COUNT_HW_INSTRUCTIONS = 1,
49 PERF_COUNT_HW_CACHE_REFERENCES = 2,
50 PERF_COUNT_HW_CACHE_MISSES = 3,
51 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
52 PERF_COUNT_HW_BRANCH_MISSES = 5,
53 PERF_COUNT_HW_BUS_CYCLES = 6,
54
a308444c 55 PERF_COUNT_HW_MAX, /* non-ABI */
b8e83514 56};
e077df4f 57
8326f44d
IM
58/*
59 * Generalized hardware cache counters:
60 *
8be6e8f3 61 * { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
8326f44d
IM
62 * { read, write, prefetch } x
63 * { accesses, misses }
64 */
1c432d89 65enum perf_hw_cache_id {
a308444c
IM
66 PERF_COUNT_HW_CACHE_L1D = 0,
67 PERF_COUNT_HW_CACHE_L1I = 1,
68 PERF_COUNT_HW_CACHE_LL = 2,
69 PERF_COUNT_HW_CACHE_DTLB = 3,
70 PERF_COUNT_HW_CACHE_ITLB = 4,
71 PERF_COUNT_HW_CACHE_BPU = 5,
72
73 PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
8326f44d
IM
74};
75
1c432d89 76enum perf_hw_cache_op_id {
a308444c
IM
77 PERF_COUNT_HW_CACHE_OP_READ = 0,
78 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
79 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
8326f44d 80
a308444c 81 PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
8326f44d
IM
82};
83
1c432d89
PZ
84enum perf_hw_cache_op_result_id {
85 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
86 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
8326f44d 87
a308444c 88 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
8326f44d
IM
89};
90
b8e83514
PZ
91/*
92 * Special "software" counters provided by the kernel, even if the hardware
93 * does not support performance counters. These counters measure various
94 * physical and sw events of the kernel (and allow the profiling of them as
95 * well):
96 */
1c432d89 97enum perf_sw_ids {
a308444c
IM
98 PERF_COUNT_SW_CPU_CLOCK = 0,
99 PERF_COUNT_SW_TASK_CLOCK = 1,
100 PERF_COUNT_SW_PAGE_FAULTS = 2,
101 PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
102 PERF_COUNT_SW_CPU_MIGRATIONS = 4,
103 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
104 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
105
106 PERF_COUNT_SW_MAX, /* non-ABI */
0793a61d
TG
107};
108
8a057d84 109/*
0d48696f 110 * Bits that can be set in attr.sample_type to request information
8a057d84
PZ
111 * in the overflow packets.
112 */
b23f3325 113enum perf_counter_sample_format {
a308444c
IM
114 PERF_SAMPLE_IP = 1U << 0,
115 PERF_SAMPLE_TID = 1U << 1,
116 PERF_SAMPLE_TIME = 1U << 2,
117 PERF_SAMPLE_ADDR = 1U << 3,
3dab77fb 118 PERF_SAMPLE_READ = 1U << 4,
a308444c
IM
119 PERF_SAMPLE_CALLCHAIN = 1U << 5,
120 PERF_SAMPLE_ID = 1U << 6,
121 PERF_SAMPLE_CPU = 1U << 7,
122 PERF_SAMPLE_PERIOD = 1U << 8,
7f453c24 123 PERF_SAMPLE_STREAM_ID = 1U << 9,
3a43ce68 124 PERF_SAMPLE_RAW = 1U << 10,
974802ea 125
f413cdb8 126 PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */
8a057d84
PZ
127};
128
53cfbf59 129/*
3dab77fb
PZ
130 * The format of the data returned by read() on a perf counter fd,
131 * as specified by attr.read_format:
132 *
133 * struct read_format {
134 * { u64 value;
135 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
136 * { u64 time_running; } && PERF_FORMAT_RUNNING
137 * { u64 id; } && PERF_FORMAT_ID
138 * } && !PERF_FORMAT_GROUP
139 *
140 * { u64 nr;
141 * { u64 time_enabled; } && PERF_FORMAT_ENABLED
142 * { u64 time_running; } && PERF_FORMAT_RUNNING
143 * { u64 value;
144 * { u64 id; } && PERF_FORMAT_ID
145 * } cntr[nr];
146 * } && PERF_FORMAT_GROUP
147 * };
53cfbf59
PM
148 */
149enum perf_counter_read_format {
a308444c
IM
150 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
151 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
152 PERF_FORMAT_ID = 1U << 2,
3dab77fb 153 PERF_FORMAT_GROUP = 1U << 3,
974802ea 154
3dab77fb 155 PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
53cfbf59
PM
156};
157
974802ea
PZ
158#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
159
9f66a381
IM
160/*
161 * Hardware event to monitor via a performance monitoring counter:
162 */
0d48696f 163struct perf_counter_attr {
974802ea 164
f4a2deb4 165 /*
a21ca2ca
IM
166 * Major type: hardware/software/tracepoint/etc.
167 */
168 __u32 type;
974802ea
PZ
169
170 /*
171 * Size of the attr structure, for fwd/bwd compat.
172 */
173 __u32 size;
a21ca2ca
IM
174
175 /*
176 * Type specific configuration information.
f4a2deb4
PZ
177 */
178 __u64 config;
9f66a381 179
60db5e09 180 union {
b23f3325
PZ
181 __u64 sample_period;
182 __u64 sample_freq;
60db5e09
PZ
183 };
184
b23f3325
PZ
185 __u64 sample_type;
186 __u64 read_format;
9f66a381 187
2743a5b0 188 __u64 disabled : 1, /* off by default */
0475f9ea
PM
189 inherit : 1, /* children inherit it */
190 pinned : 1, /* must always be on PMU */
191 exclusive : 1, /* only group on PMU */
192 exclude_user : 1, /* don't count user */
193 exclude_kernel : 1, /* ditto kernel */
194 exclude_hv : 1, /* ditto hypervisor */
2743a5b0 195 exclude_idle : 1, /* don't count when idle */
0a4a9391 196 mmap : 1, /* include mmap data */
8d1b2d93 197 comm : 1, /* include comm data */
60db5e09 198 freq : 1, /* use freq, not period */
bfbd3381 199 inherit_stat : 1, /* per task counts */
57e7986e 200 enable_on_exec : 1, /* next exec enables */
9f498cc5 201 task : 1, /* trace fork/exit */
2667de81 202 watermark : 1, /* wakeup_watermark */
0475f9ea 203
2667de81 204 __reserved_1 : 49;
2743a5b0 205
2667de81
PZ
206 union {
207 __u32 wakeup_events; /* wakeup every n events */
208 __u32 wakeup_watermark; /* bytes before wakeup */
209 };
974802ea 210 __u32 __reserved_2;
9f66a381 211
974802ea 212 __u64 __reserved_3;
eab656ae
TG
213};
214
d859e29f
PM
215/*
216 * Ioctls that can be done on a perf counter fd:
217 */
08247e31
PZ
218#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
219#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
220#define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
221#define PERF_COUNTER_IOC_RESET _IO ('$', 3)
222#define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
a4be7c27 223#define PERF_COUNTER_IOC_SET_OUTPUT _IO ('$', 5)
3df5edad
PZ
224
225enum perf_counter_ioc_flags {
226 PERF_IOC_FLAG_GROUP = 1U << 0,
227};
d859e29f 228
37d81828
PM
229/*
230 * Structure of the page that can be mapped via mmap
231 */
232struct perf_counter_mmap_page {
233 __u32 version; /* version number of this structure */
234 __u32 compat_version; /* lowest version this is compat with */
38ff667b
PZ
235
236 /*
237 * Bits needed to read the hw counters in user-space.
238 *
92f22a38
PZ
239 * u32 seq;
240 * s64 count;
38ff667b 241 *
a2e87d06
PZ
242 * do {
243 * seq = pc->lock;
38ff667b 244 *
a2e87d06
PZ
245 * barrier()
246 * if (pc->index) {
247 * count = pmc_read(pc->index - 1);
248 * count += pc->offset;
249 * } else
250 * goto regular_read;
38ff667b 251 *
a2e87d06
PZ
252 * barrier();
253 * } while (pc->lock != seq);
38ff667b 254 *
92f22a38
PZ
255 * NOTE: for obvious reason this only works on self-monitoring
256 * processes.
38ff667b 257 */
37d81828
PM
258 __u32 lock; /* seqlock for synchronization */
259 __u32 index; /* hardware counter identifier */
260 __s64 offset; /* add to hardware counter value */
7f8b4e4e
PZ
261 __u64 time_enabled; /* time counter active */
262 __u64 time_running; /* time counter on cpu */
7b732a75 263
41f95331
PZ
264 /*
265 * Hole for extension of the self monitor capabilities
266 */
267
7f8b4e4e 268 __u64 __reserved[123]; /* align to 1k */
41f95331 269
38ff667b
PZ
270 /*
271 * Control data for the mmap() data buffer.
272 *
43a21ea8
PZ
273 * User-space reading the @data_head value should issue an rmb(), on
274 * SMP capable platforms, after reading this value -- see
275 * perf_counter_wakeup().
276 *
277 * When the mapping is PROT_WRITE the @data_tail value should be
278 * written by userspace to reflect the last read data. In this case
279 * the kernel will not over-write unread data.
38ff667b 280 */
8e3747c1 281 __u64 data_head; /* head in the data section */
43a21ea8 282 __u64 data_tail; /* user-space written tail */
37d81828
PM
283};
284
a308444c
IM
285#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
286#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
287#define PERF_EVENT_MISC_KERNEL (1 << 0)
288#define PERF_EVENT_MISC_USER (2 << 0)
289#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
6fab0192 290
5c148194
PZ
291struct perf_event_header {
292 __u32 type;
6fab0192
PZ
293 __u16 misc;
294 __u16 size;
5c148194
PZ
295};
296
297enum perf_event_type {
5ed00415 298
0c593b34
PZ
299 /*
300 * The MMAP events record the PROT_EXEC mappings so that we can
301 * correlate userspace IPs to code. They have the following structure:
302 *
303 * struct {
0127c3ea 304 * struct perf_event_header header;
0c593b34 305 *
0127c3ea
IM
306 * u32 pid, tid;
307 * u64 addr;
308 * u64 len;
309 * u64 pgoff;
310 * char filename[];
0c593b34
PZ
311 * };
312 */
8a057d84 313 PERF_EVENT_MMAP = 1,
0a4a9391 314
43a21ea8
PZ
315 /*
316 * struct {
317 * struct perf_event_header header;
318 * u64 id;
319 * u64 lost;
320 * };
321 */
322 PERF_EVENT_LOST = 2,
323
8d1b2d93
PZ
324 /*
325 * struct {
0127c3ea 326 * struct perf_event_header header;
8d1b2d93 327 *
0127c3ea
IM
328 * u32 pid, tid;
329 * char comm[];
8d1b2d93
PZ
330 * };
331 */
332 PERF_EVENT_COMM = 3,
333
9f498cc5
PZ
334 /*
335 * struct {
336 * struct perf_event_header header;
337 * u32 pid, ppid;
338 * u32 tid, ptid;
339 * };
340 */
341 PERF_EVENT_EXIT = 4,
342
26b119bc
PZ
343 /*
344 * struct {
0127c3ea
IM
345 * struct perf_event_header header;
346 * u64 time;
689802b2 347 * u64 id;
7f453c24 348 * u64 stream_id;
a78ac325
PZ
349 * };
350 */
351 PERF_EVENT_THROTTLE = 5,
352 PERF_EVENT_UNTHROTTLE = 6,
353
60313ebe
PZ
354 /*
355 * struct {
a21ca2ca
IM
356 * struct perf_event_header header;
357 * u32 pid, ppid;
9f498cc5 358 * u32 tid, ptid;
60313ebe
PZ
359 * };
360 */
361 PERF_EVENT_FORK = 7,
362
38b200d6
PZ
363 /*
364 * struct {
365 * struct perf_event_header header;
366 * u32 pid, tid;
3dab77fb
PZ
367 *
368 * struct read_format values;
38b200d6
PZ
369 * };
370 */
371 PERF_EVENT_READ = 8,
372
8a057d84 373 /*
0c593b34 374 * struct {
0127c3ea 375 * struct perf_event_header header;
0c593b34 376 *
43a21ea8
PZ
377 * { u64 ip; } && PERF_SAMPLE_IP
378 * { u32 pid, tid; } && PERF_SAMPLE_TID
379 * { u64 time; } && PERF_SAMPLE_TIME
380 * { u64 addr; } && PERF_SAMPLE_ADDR
e6e18ec7 381 * { u64 id; } && PERF_SAMPLE_ID
7f453c24 382 * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
43a21ea8 383 * { u32 cpu, res; } && PERF_SAMPLE_CPU
e6e18ec7 384 * { u64 period; } && PERF_SAMPLE_PERIOD
0c593b34 385 *
3dab77fb 386 * { struct read_format values; } && PERF_SAMPLE_READ
0c593b34 387 *
f9188e02 388 * { u64 nr,
43a21ea8 389 * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
3dab77fb
PZ
390 *
391 * #
392 * # The RAW record below is opaque data wrt the ABI
393 * #
394 * # That is, the ABI doesn't make any promises wrt to
395 * # the stability of its content, it may vary depending
396 * # on event, hardware, kernel version and phase of
397 * # the moon.
398 * #
399 * # In other words, PERF_SAMPLE_RAW contents are not an ABI.
400 * #
401 *
a044560c
PZ
402 * { u32 size;
403 * char data[size];}&& PERF_SAMPLE_RAW
0c593b34 404 * };
8a057d84 405 */
e6e18ec7
PZ
406 PERF_EVENT_SAMPLE = 9,
407
408 PERF_EVENT_MAX, /* non-ABI */
5c148194
PZ
409};
410
f9188e02
PZ
411enum perf_callchain_context {
412 PERF_CONTEXT_HV = (__u64)-32,
413 PERF_CONTEXT_KERNEL = (__u64)-128,
414 PERF_CONTEXT_USER = (__u64)-512,
7522060c 415
f9188e02
PZ
416 PERF_CONTEXT_GUEST = (__u64)-2048,
417 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
418 PERF_CONTEXT_GUEST_USER = (__u64)-2560,
419
420 PERF_CONTEXT_MAX = (__u64)-4095,
7522060c
IM
421};
422
a4be7c27
PZ
423#define PERF_FLAG_FD_NO_GROUP (1U << 0)
424#define PERF_FLAG_FD_OUTPUT (1U << 1)
425
f3dfd265 426#ifdef __KERNEL__
9f66a381 427/*
f3dfd265 428 * Kernel-internal data types and definitions:
9f66a381
IM
429 */
430
f3dfd265
PM
431#ifdef CONFIG_PERF_COUNTERS
432# include <asm/perf_counter.h>
433#endif
434
435#include <linux/list.h>
436#include <linux/mutex.h>
437#include <linux/rculist.h>
438#include <linux/rcupdate.h>
439#include <linux/spinlock.h>
d6d020e9 440#include <linux/hrtimer.h>
3c446b3d 441#include <linux/fs.h>
709e50cf 442#include <linux/pid_namespace.h>
f3dfd265
PM
443#include <asm/atomic.h>
444
f9188e02
PZ
445#define PERF_MAX_STACK_DEPTH 255
446
447struct perf_callchain_entry {
448 __u64 nr;
449 __u64 ip[PERF_MAX_STACK_DEPTH];
450};
451
3a43ce68
FW
452struct perf_raw_record {
453 u32 size;
454 void *data;
f413cdb8
FW
455};
456
f3dfd265
PM
457struct task_struct;
458
0793a61d 459/**
9f66a381 460 * struct hw_perf_counter - performance counter hardware details:
0793a61d
TG
461 */
462struct hw_perf_counter {
ee06094f 463#ifdef CONFIG_PERF_COUNTERS
d6d020e9
PZ
464 union {
465 struct { /* hardware */
a308444c
IM
466 u64 config;
467 unsigned long config_base;
468 unsigned long counter_base;
469 int idx;
d6d020e9
PZ
470 };
471 union { /* software */
a308444c
IM
472 atomic64_t count;
473 struct hrtimer hrtimer;
d6d020e9
PZ
474 };
475 };
ee06094f 476 atomic64_t prev_count;
b23f3325 477 u64 sample_period;
9e350de3 478 u64 last_period;
ee06094f 479 atomic64_t period_left;
60db5e09 480 u64 interrupts;
6a24ed6c
PZ
481
482 u64 freq_count;
483 u64 freq_interrupts;
bd2b5b12 484 u64 freq_stamp;
ee06094f 485#endif
0793a61d
TG
486};
487
621a01ea
IM
488struct perf_counter;
489
490/**
4aeb0b42 491 * struct pmu - generic performance monitoring unit
621a01ea 492 */
4aeb0b42 493struct pmu {
95cdd2e7 494 int (*enable) (struct perf_counter *counter);
7671581f
IM
495 void (*disable) (struct perf_counter *counter);
496 void (*read) (struct perf_counter *counter);
a78ac325 497 void (*unthrottle) (struct perf_counter *counter);
621a01ea
IM
498};
499
6a930700
IM
500/**
501 * enum perf_counter_active_state - the states of a counter
502 */
503enum perf_counter_active_state {
3b6f9e5c 504 PERF_COUNTER_STATE_ERROR = -2,
6a930700
IM
505 PERF_COUNTER_STATE_OFF = -1,
506 PERF_COUNTER_STATE_INACTIVE = 0,
507 PERF_COUNTER_STATE_ACTIVE = 1,
508};
509
9b51f66d
IM
510struct file;
511
7b732a75
PZ
512struct perf_mmap_data {
513 struct rcu_head rcu_head;
8740f941 514 int nr_pages; /* nr of data pages */
43a21ea8 515 int writable; /* are we writable */
c5078f78 516 int nr_locked; /* nr pages mlocked */
8740f941 517
c33a0bc4 518 atomic_t poll; /* POLL_ for wakeups */
8740f941
PZ
519 atomic_t events; /* event limit */
520
8e3747c1
PZ
521 atomic_long_t head; /* write position */
522 atomic_long_t done_head; /* completed head */
523
c33a0bc4 524 atomic_t lock; /* concurrent writes */
c66de4a5 525 atomic_t wakeup; /* needs a wakeup */
43a21ea8 526 atomic_t lost; /* nr records lost */
c66de4a5 527
2667de81
PZ
528 long watermark; /* wakeup watermark */
529
7b732a75 530 struct perf_counter_mmap_page *user_page;
0127c3ea 531 void *data_pages[0];
7b732a75
PZ
532};
533
671dec5d
PZ
534struct perf_pending_entry {
535 struct perf_pending_entry *next;
536 void (*func)(struct perf_pending_entry *);
925d519a
PZ
537};
538
0793a61d
TG
539/**
540 * struct perf_counter - performance counter kernel representation:
541 */
542struct perf_counter {
ee06094f 543#ifdef CONFIG_PERF_COUNTERS
04289bb9 544 struct list_head list_entry;
592903cd 545 struct list_head event_entry;
04289bb9 546 struct list_head sibling_list;
0127c3ea 547 int nr_siblings;
04289bb9 548 struct perf_counter *group_leader;
a4be7c27 549 struct perf_counter *output;
4aeb0b42 550 const struct pmu *pmu;
04289bb9 551
6a930700 552 enum perf_counter_active_state state;
0793a61d 553 atomic64_t count;
ee06094f 554
53cfbf59
PM
555 /*
556 * These are the total time in nanoseconds that the counter
557 * has been enabled (i.e. eligible to run, and the task has
558 * been scheduled in, if this is a per-task counter)
559 * and running (scheduled onto the CPU), respectively.
560 *
561 * They are computed from tstamp_enabled, tstamp_running and
562 * tstamp_stopped when the counter is in INACTIVE or ACTIVE state.
563 */
564 u64 total_time_enabled;
565 u64 total_time_running;
566
567 /*
568 * These are timestamps used for computing total_time_enabled
569 * and total_time_running when the counter is in INACTIVE or
570 * ACTIVE state, measured in nanoseconds from an arbitrary point
571 * in time.
572 * tstamp_enabled: the notional time when the counter was enabled
573 * tstamp_running: the notional time when the counter was scheduled on
574 * tstamp_stopped: in INACTIVE state, the notional time when the
575 * counter was scheduled off.
576 */
577 u64 tstamp_enabled;
578 u64 tstamp_running;
579 u64 tstamp_stopped;
580
0d48696f 581 struct perf_counter_attr attr;
0793a61d
TG
582 struct hw_perf_counter hw;
583
584 struct perf_counter_context *ctx;
9b51f66d 585 struct file *filp;
0793a61d 586
53cfbf59
PM
587 /*
588 * These accumulate total time (in nanoseconds) that children
589 * counters have been enabled and running, respectively.
590 */
591 atomic64_t child_total_time_enabled;
592 atomic64_t child_total_time_running;
593
0793a61d 594 /*
d859e29f 595 * Protect attach/detach and child_list:
0793a61d 596 */
fccc714b
PZ
597 struct mutex child_mutex;
598 struct list_head child_list;
599 struct perf_counter *parent;
0793a61d
TG
600
601 int oncpu;
602 int cpu;
603
082ff5a2
PZ
604 struct list_head owner_entry;
605 struct task_struct *owner;
606
7b732a75
PZ
607 /* mmap bits */
608 struct mutex mmap_mutex;
609 atomic_t mmap_count;
610 struct perf_mmap_data *data;
37d81828 611
7b732a75 612 /* poll related */
0793a61d 613 wait_queue_head_t waitq;
3c446b3d 614 struct fasync_struct *fasync;
79f14641
PZ
615
616 /* delayed work for NMIs and such */
617 int pending_wakeup;
4c9e2542 618 int pending_kill;
79f14641 619 int pending_disable;
671dec5d 620 struct perf_pending_entry pending;
592903cd 621
79f14641
PZ
622 atomic_t event_limit;
623
e077df4f 624 void (*destroy)(struct perf_counter *);
592903cd 625 struct rcu_head rcu_head;
709e50cf
PZ
626
627 struct pid_namespace *ns;
8e5799b1 628 u64 id;
ee06094f 629#endif
0793a61d
TG
630};
631
632/**
633 * struct perf_counter_context - counter context structure
634 *
635 * Used as a container for task counters and CPU counters as well:
636 */
637struct perf_counter_context {
0793a61d 638 /*
d859e29f
PM
639 * Protect the states of the counters in the list,
640 * nr_active, and the list:
0793a61d 641 */
a308444c 642 spinlock_t lock;
d859e29f
PM
643 /*
644 * Protect the list of counters. Locking either mutex or lock
645 * is sufficient to ensure the list doesn't change; to change
646 * the list you need to lock both the mutex and the spinlock.
647 */
a308444c 648 struct mutex mutex;
04289bb9 649
a308444c
IM
650 struct list_head counter_list;
651 struct list_head event_list;
652 int nr_counters;
653 int nr_active;
654 int is_active;
bfbd3381 655 int nr_stat;
a308444c
IM
656 atomic_t refcount;
657 struct task_struct *task;
53cfbf59
PM
658
659 /*
4af4998b 660 * Context clock, runs when context enabled.
53cfbf59 661 */
a308444c
IM
662 u64 time;
663 u64 timestamp;
564c2b21
PM
664
665 /*
666 * These fields let us detect when two contexts have both
667 * been cloned (inherited) from a common ancestor.
668 */
a308444c
IM
669 struct perf_counter_context *parent_ctx;
670 u64 parent_gen;
671 u64 generation;
672 int pin_count;
673 struct rcu_head rcu_head;
0793a61d
TG
674};
675
676/**
677 * struct perf_counter_cpu_context - per cpu counter context structure
678 */
679struct perf_cpu_context {
680 struct perf_counter_context ctx;
681 struct perf_counter_context *task_ctx;
682 int active_oncpu;
683 int max_pertask;
3b6f9e5c 684 int exclusive;
96f6d444
PZ
685
686 /*
687 * Recursion avoidance:
688 *
689 * task, softirq, irq, nmi context
690 */
22a4f650 691 int recursion[4];
0793a61d
TG
692};
693
829b42dd
RR
694#ifdef CONFIG_PERF_COUNTERS
695
0793a61d
TG
696/*
697 * Set by architecture code:
698 */
699extern int perf_max_counters;
700
4aeb0b42 701extern const struct pmu *hw_perf_counter_init(struct perf_counter *counter);
621a01ea 702
0793a61d 703extern void perf_counter_task_sched_in(struct task_struct *task, int cpu);
564c2b21
PM
704extern void perf_counter_task_sched_out(struct task_struct *task,
705 struct task_struct *next, int cpu);
0793a61d 706extern void perf_counter_task_tick(struct task_struct *task, int cpu);
6ab423e0 707extern int perf_counter_init_task(struct task_struct *child);
9b51f66d 708extern void perf_counter_exit_task(struct task_struct *child);
bbbee908 709extern void perf_counter_free_task(struct task_struct *task);
9974458e 710extern void set_perf_counter_pending(void);
925d519a 711extern void perf_counter_do_pending(void);
0793a61d 712extern void perf_counter_print_debug(void);
9e35ad38
PZ
713extern void __perf_disable(void);
714extern bool __perf_enable(void);
715extern void perf_disable(void);
716extern void perf_enable(void);
1d1c7ddb
IM
717extern int perf_counter_task_disable(void);
718extern int perf_counter_task_enable(void);
3cbed429
PM
719extern int hw_perf_group_sched_in(struct perf_counter *group_leader,
720 struct perf_cpu_context *cpuctx,
721 struct perf_counter_context *ctx, int cpu);
37d81828 722extern void perf_counter_update_userpage(struct perf_counter *counter);
5c92d124 723
df1a132b 724struct perf_sample_data {
a308444c
IM
725 struct pt_regs *regs;
726 u64 addr;
727 u64 period;
3a43ce68 728 struct perf_raw_record *raw;
df1a132b
PZ
729};
730
731extern int perf_counter_overflow(struct perf_counter *counter, int nmi,
732 struct perf_sample_data *data);
28402971
IM
733extern void perf_counter_output(struct perf_counter *counter, int nmi,
734 struct perf_sample_data *data);
df1a132b 735
3b6f9e5c
PM
736/*
737 * Return 1 for a software counter, 0 for a hardware counter
738 */
739static inline int is_software_counter(struct perf_counter *counter)
740{
a21ca2ca 741 return (counter->attr.type != PERF_TYPE_RAW) &&
f1a3c979
PZ
742 (counter->attr.type != PERF_TYPE_HARDWARE) &&
743 (counter->attr.type != PERF_TYPE_HW_CACHE);
3b6f9e5c
PM
744}
745
f29ac756
PZ
746extern atomic_t perf_swcounter_enabled[PERF_COUNT_SW_MAX];
747
748extern void __perf_swcounter_event(u32, u64, int, struct pt_regs *, u64);
749
750static inline void
751perf_swcounter_event(u32 event, u64 nr, int nmi, struct pt_regs *regs, u64 addr)
752{
753 if (atomic_read(&perf_swcounter_enabled[event]))
754 __perf_swcounter_event(event, nr, nmi, regs, addr);
755}
15dbf27c 756
089dd79d
PZ
757extern void __perf_counter_mmap(struct vm_area_struct *vma);
758
759static inline void perf_counter_mmap(struct vm_area_struct *vma)
760{
761 if (vma->vm_flags & VM_EXEC)
762 __perf_counter_mmap(vma);
763}
0a4a9391 764
8d1b2d93 765extern void perf_counter_comm(struct task_struct *tsk);
60313ebe 766extern void perf_counter_fork(struct task_struct *tsk);
8d1b2d93 767
394ee076
PZ
768extern struct perf_callchain_entry *perf_callchain(struct pt_regs *regs);
769
0764771d 770extern int sysctl_perf_counter_paranoid;
c5078f78 771extern int sysctl_perf_counter_mlock;
df58ab24 772extern int sysctl_perf_counter_sample_rate;
1ccd1549 773
0d905bca 774extern void perf_counter_init(void);
f4b5ffcc
JB
775extern void perf_tpcounter_event(int event_id, u64 addr, u64 count,
776 void *record, int entry_size);
0d905bca 777
9d23a90a
PM
778#ifndef perf_misc_flags
779#define perf_misc_flags(regs) (user_mode(regs) ? PERF_EVENT_MISC_USER : \
780 PERF_EVENT_MISC_KERNEL)
781#define perf_instruction_pointer(regs) instruction_pointer(regs)
782#endif
783
0793a61d
TG
784#else
785static inline void
786perf_counter_task_sched_in(struct task_struct *task, int cpu) { }
787static inline void
910431c7
IM
788perf_counter_task_sched_out(struct task_struct *task,
789 struct task_struct *next, int cpu) { }
0793a61d
TG
790static inline void
791perf_counter_task_tick(struct task_struct *task, int cpu) { }
d3e78ee3 792static inline int perf_counter_init_task(struct task_struct *child) { return 0; }
9b51f66d 793static inline void perf_counter_exit_task(struct task_struct *child) { }
bbbee908 794static inline void perf_counter_free_task(struct task_struct *task) { }
925d519a 795static inline void perf_counter_do_pending(void) { }
0793a61d 796static inline void perf_counter_print_debug(void) { }
9e35ad38
PZ
797static inline void perf_disable(void) { }
798static inline void perf_enable(void) { }
1d1c7ddb
IM
799static inline int perf_counter_task_disable(void) { return -EINVAL; }
800static inline int perf_counter_task_enable(void) { return -EINVAL; }
15dbf27c 801
925d519a 802static inline void
78f13e95
PZ
803perf_swcounter_event(u32 event, u64 nr, int nmi,
804 struct pt_regs *regs, u64 addr) { }
0a4a9391 805
089dd79d 806static inline void perf_counter_mmap(struct vm_area_struct *vma) { }
8d1b2d93 807static inline void perf_counter_comm(struct task_struct *tsk) { }
60313ebe 808static inline void perf_counter_fork(struct task_struct *tsk) { }
0d905bca 809static inline void perf_counter_init(void) { }
0793a61d
TG
810#endif
811
f3dfd265 812#endif /* __KERNEL__ */
0793a61d 813#endif /* _LINUX_PERF_COUNTER_H */