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1da177e4 LT |
1 | #ifndef __LINUX_PERCPU_H |
2 | #define __LINUX_PERCPU_H | |
7ff6f082 | 3 | |
0a3021f4 | 4 | #include <linux/preempt.h> |
1da177e4 | 5 | #include <linux/smp.h> |
7ff6f082 | 6 | #include <linux/cpumask.h> |
6a242909 | 7 | #include <linux/pfn.h> |
de380b55 | 8 | #include <linux/init.h> |
7ff6f082 | 9 | |
1da177e4 LT |
10 | #include <asm/percpu.h> |
11 | ||
6a242909 | 12 | /* enough to cover all DEFINE_PER_CPUs in modules */ |
b00742d3 | 13 | #ifdef CONFIG_MODULES |
6a242909 | 14 | #define PERCPU_MODULE_RESERVE (8 << 10) |
b00742d3 | 15 | #else |
6a242909 | 16 | #define PERCPU_MODULE_RESERVE 0 |
1da177e4 LT |
17 | #endif |
18 | ||
6a242909 | 19 | #ifndef PERCPU_ENOUGH_ROOM |
b00742d3 | 20 | #define PERCPU_ENOUGH_ROOM \ |
6a242909 TH |
21 | (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \ |
22 | PERCPU_MODULE_RESERVE) | |
23 | #endif | |
b00742d3 | 24 | |
632bbfee JB |
25 | /* |
26 | * Must be an lvalue. Since @var must be a simple identifier, | |
27 | * we force a syntax error here if it isn't. | |
28 | */ | |
29 | #define get_cpu_var(var) (*({ \ | |
632bbfee JB |
30 | preempt_disable(); \ |
31 | &__get_cpu_var(var); })) | |
f7b64fe8 | 32 | |
e0fdb0e0 RR |
33 | /* |
34 | * The weird & is necessary because sparse considers (void)(var) to be | |
35 | * a direct dereference of percpu variable (var). | |
36 | */ | |
f7b64fe8 | 37 | #define put_cpu_var(var) do { \ |
e0fdb0e0 | 38 | (void)&(var); \ |
f7b64fe8 TH |
39 | preempt_enable(); \ |
40 | } while (0) | |
1da177e4 LT |
41 | |
42 | #ifdef CONFIG_SMP | |
43 | ||
8d408b4b | 44 | /* minimum unit size, also is the maximum supported allocation size */ |
6a242909 | 45 | #define PCPU_MIN_UNIT_SIZE PFN_ALIGN(64 << 10) |
8d408b4b TH |
46 | |
47 | /* | |
48 | * PERCPU_DYNAMIC_RESERVE indicates the amount of free area to piggy | |
6b19b0c2 TH |
49 | * back on the first chunk for dynamic percpu allocation if arch is |
50 | * manually allocating and mapping it for faster access (as a part of | |
51 | * large page mapping for example). | |
8d408b4b | 52 | * |
6b19b0c2 TH |
53 | * The following values give between one and two pages of free space |
54 | * after typical minimal boot (2-way SMP, single disk and NIC) with | |
55 | * both defconfig and a distro config on x86_64 and 32. More | |
56 | * intelligent way to determine this would be nice. | |
8d408b4b | 57 | */ |
6b19b0c2 TH |
58 | #if BITS_PER_LONG > 32 |
59 | #define PERCPU_DYNAMIC_RESERVE (20 << 10) | |
60 | #else | |
61 | #define PERCPU_DYNAMIC_RESERVE (12 << 10) | |
62 | #endif | |
8d408b4b | 63 | |
fbf59bc9 | 64 | extern void *pcpu_base_addr; |
fb435d52 | 65 | extern const unsigned long *pcpu_unit_offsets; |
1da177e4 | 66 | |
fd1e8a1f TH |
67 | struct pcpu_group_info { |
68 | int nr_units; /* aligned # of units */ | |
69 | unsigned long base_offset; /* base address offset */ | |
70 | unsigned int *cpu_map; /* unit->cpu map, empty | |
71 | * entries contain NR_CPUS */ | |
72 | }; | |
73 | ||
74 | struct pcpu_alloc_info { | |
75 | size_t static_size; | |
76 | size_t reserved_size; | |
77 | size_t dyn_size; | |
78 | size_t unit_size; | |
79 | size_t atom_size; | |
80 | size_t alloc_size; | |
81 | size_t __ai_size; /* internal, don't use */ | |
82 | int nr_groups; /* 0 if grouping unnecessary */ | |
83 | struct pcpu_group_info groups[]; | |
84 | }; | |
85 | ||
f58dc01b TH |
86 | enum pcpu_fc { |
87 | PCPU_FC_AUTO, | |
88 | PCPU_FC_EMBED, | |
89 | PCPU_FC_PAGE, | |
f58dc01b TH |
90 | |
91 | PCPU_FC_NR, | |
92 | }; | |
93 | extern const char *pcpu_fc_names[PCPU_FC_NR]; | |
94 | ||
95 | extern enum pcpu_fc pcpu_chosen_fc; | |
96 | ||
3cbc8565 TH |
97 | typedef void * (*pcpu_fc_alloc_fn_t)(unsigned int cpu, size_t size, |
98 | size_t align); | |
d4b95f80 TH |
99 | typedef void (*pcpu_fc_free_fn_t)(void *ptr, size_t size); |
100 | typedef void (*pcpu_fc_populate_pte_fn_t)(unsigned long addr); | |
a530b795 | 101 | typedef int (pcpu_fc_cpu_distance_fn_t)(unsigned int from, unsigned int to); |
fbf59bc9 | 102 | |
fd1e8a1f TH |
103 | extern struct pcpu_alloc_info * __init pcpu_alloc_alloc_info(int nr_groups, |
104 | int nr_units); | |
105 | extern void __init pcpu_free_alloc_info(struct pcpu_alloc_info *ai); | |
106 | ||
fb435d52 TH |
107 | extern int __init pcpu_setup_first_chunk(const struct pcpu_alloc_info *ai, |
108 | void *base_addr); | |
8d408b4b | 109 | |
08fc4580 | 110 | #ifdef CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK |
4ba6ce25 | 111 | extern int __init pcpu_embed_first_chunk(size_t reserved_size, size_t dyn_size, |
c8826dd5 TH |
112 | size_t atom_size, |
113 | pcpu_fc_cpu_distance_fn_t cpu_distance_fn, | |
114 | pcpu_fc_alloc_fn_t alloc_fn, | |
115 | pcpu_fc_free_fn_t free_fn); | |
08fc4580 | 116 | #endif |
66c3a757 | 117 | |
08fc4580 | 118 | #ifdef CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK |
fb435d52 | 119 | extern int __init pcpu_page_first_chunk(size_t reserved_size, |
d4b95f80 TH |
120 | pcpu_fc_alloc_fn_t alloc_fn, |
121 | pcpu_fc_free_fn_t free_fn, | |
122 | pcpu_fc_populate_pte_fn_t populate_pte_fn); | |
08fc4580 | 123 | #endif |
d4b95f80 | 124 | |
f2a8205c TH |
125 | /* |
126 | * Use this to get to a cpu's version of the per-cpu object | |
127 | * dynamically allocated. Non-atomic access to the current CPU's | |
128 | * version should probably be combined with get_cpu()/put_cpu(). | |
129 | */ | |
fbf59bc9 TH |
130 | #define per_cpu_ptr(ptr, cpu) SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu))) |
131 | ||
e0fdb0e0 | 132 | extern void __percpu *__alloc_reserved_percpu(size_t size, size_t align); |
10fad5e4 | 133 | extern bool is_kernel_percpu_address(unsigned long addr); |
1da177e4 | 134 | |
e74e3962 TH |
135 | #ifndef CONFIG_HAVE_SETUP_PER_CPU_AREA |
136 | extern void __init setup_per_cpu_areas(void); | |
137 | #endif | |
138 | ||
1da177e4 LT |
139 | #else /* CONFIG_SMP */ |
140 | ||
b36128c8 | 141 | #define per_cpu_ptr(ptr, cpu) ({ (void)(cpu); (ptr); }) |
7ff6f082 | 142 | |
10fad5e4 TH |
143 | /* can't distinguish from other static vars, always false */ |
144 | static inline bool is_kernel_percpu_address(unsigned long addr) | |
145 | { | |
146 | return false; | |
147 | } | |
148 | ||
e74e3962 TH |
149 | static inline void __init setup_per_cpu_areas(void) { } |
150 | ||
a76761b6 TH |
151 | static inline void *pcpu_lpage_remapped(void *kaddr) |
152 | { | |
153 | return NULL; | |
154 | } | |
155 | ||
1da177e4 LT |
156 | #endif /* CONFIG_SMP */ |
157 | ||
de380b55 TH |
158 | extern void __percpu *__alloc_percpu(size_t size, size_t align); |
159 | extern void free_percpu(void __percpu *__pdata); | |
160 | extern phys_addr_t per_cpu_ptr_to_phys(void *addr); | |
161 | ||
64ef291f | 162 | #define alloc_percpu(type) \ |
e0fdb0e0 | 163 | (typeof(type) __percpu *)__alloc_percpu(sizeof(type), __alignof__(type)) |
1da177e4 | 164 | |
066123a5 TH |
165 | /* |
166 | * Optional methods for optimized non-lvalue per-cpu variable access. | |
167 | * | |
168 | * @var can be a percpu variable or a field of it and its size should | |
169 | * equal char, int or long. percpu_read() evaluates to a lvalue and | |
170 | * all others to void. | |
171 | * | |
172 | * These operations are guaranteed to be atomic w.r.t. preemption. | |
173 | * The generic versions use plain get/put_cpu_var(). Archs are | |
174 | * encouraged to implement single-instruction alternatives which don't | |
175 | * require preemption protection. | |
176 | */ | |
177 | #ifndef percpu_read | |
178 | # define percpu_read(var) \ | |
179 | ({ \ | |
f7b64fe8 TH |
180 | typeof(var) *pr_ptr__ = &(var); \ |
181 | typeof(var) pr_ret__; \ | |
182 | pr_ret__ = get_cpu_var(*pr_ptr__); \ | |
183 | put_cpu_var(*pr_ptr__); \ | |
184 | pr_ret__; \ | |
066123a5 TH |
185 | }) |
186 | #endif | |
187 | ||
188 | #define __percpu_generic_to_op(var, val, op) \ | |
189 | do { \ | |
f7b64fe8 TH |
190 | typeof(var) *pgto_ptr__ = &(var); \ |
191 | get_cpu_var(*pgto_ptr__) op val; \ | |
192 | put_cpu_var(*pgto_ptr__); \ | |
066123a5 TH |
193 | } while (0) |
194 | ||
195 | #ifndef percpu_write | |
196 | # define percpu_write(var, val) __percpu_generic_to_op(var, (val), =) | |
197 | #endif | |
198 | ||
199 | #ifndef percpu_add | |
200 | # define percpu_add(var, val) __percpu_generic_to_op(var, (val), +=) | |
201 | #endif | |
202 | ||
203 | #ifndef percpu_sub | |
204 | # define percpu_sub(var, val) __percpu_generic_to_op(var, (val), -=) | |
205 | #endif | |
206 | ||
207 | #ifndef percpu_and | |
208 | # define percpu_and(var, val) __percpu_generic_to_op(var, (val), &=) | |
209 | #endif | |
210 | ||
211 | #ifndef percpu_or | |
212 | # define percpu_or(var, val) __percpu_generic_to_op(var, (val), |=) | |
213 | #endif | |
214 | ||
215 | #ifndef percpu_xor | |
216 | # define percpu_xor(var, val) __percpu_generic_to_op(var, (val), ^=) | |
217 | #endif | |
218 | ||
7340a0b1 CL |
219 | /* |
220 | * Branching function to split up a function into a set of functions that | |
221 | * are called for different scalar sizes of the objects handled. | |
222 | */ | |
223 | ||
224 | extern void __bad_size_call_parameter(void); | |
225 | ||
0f5e4816 TH |
226 | #define __pcpu_size_call_return(stem, variable) \ |
227 | ({ typeof(variable) pscr_ret__; \ | |
545695fb | 228 | __verify_pcpu_ptr(&(variable)); \ |
7340a0b1 | 229 | switch(sizeof(variable)) { \ |
0f5e4816 TH |
230 | case 1: pscr_ret__ = stem##1(variable);break; \ |
231 | case 2: pscr_ret__ = stem##2(variable);break; \ | |
232 | case 4: pscr_ret__ = stem##4(variable);break; \ | |
233 | case 8: pscr_ret__ = stem##8(variable);break; \ | |
7340a0b1 CL |
234 | default: \ |
235 | __bad_size_call_parameter();break; \ | |
236 | } \ | |
0f5e4816 | 237 | pscr_ret__; \ |
7340a0b1 CL |
238 | }) |
239 | ||
0f5e4816 | 240 | #define __pcpu_size_call(stem, variable, ...) \ |
7340a0b1 | 241 | do { \ |
545695fb | 242 | __verify_pcpu_ptr(&(variable)); \ |
7340a0b1 CL |
243 | switch(sizeof(variable)) { \ |
244 | case 1: stem##1(variable, __VA_ARGS__);break; \ | |
245 | case 2: stem##2(variable, __VA_ARGS__);break; \ | |
246 | case 4: stem##4(variable, __VA_ARGS__);break; \ | |
247 | case 8: stem##8(variable, __VA_ARGS__);break; \ | |
248 | default: \ | |
249 | __bad_size_call_parameter();break; \ | |
250 | } \ | |
251 | } while (0) | |
252 | ||
253 | /* | |
254 | * Optimized manipulation for memory allocated through the per cpu | |
dd17c8f7 | 255 | * allocator or for addresses of per cpu variables. |
7340a0b1 CL |
256 | * |
257 | * These operation guarantee exclusivity of access for other operations | |
258 | * on the *same* processor. The assumption is that per cpu data is only | |
259 | * accessed by a single processor instance (the current one). | |
260 | * | |
261 | * The first group is used for accesses that must be done in a | |
262 | * preemption safe way since we know that the context is not preempt | |
263 | * safe. Interrupts may occur. If the interrupt modifies the variable | |
264 | * too then RMW actions will not be reliable. | |
265 | * | |
266 | * The arch code can provide optimized functions in two ways: | |
267 | * | |
268 | * 1. Override the function completely. F.e. define this_cpu_add(). | |
269 | * The arch must then ensure that the various scalar format passed | |
270 | * are handled correctly. | |
271 | * | |
272 | * 2. Provide functions for certain scalar sizes. F.e. provide | |
273 | * this_cpu_add_2() to provide per cpu atomic operations for 2 byte | |
274 | * sized RMW actions. If arch code does not provide operations for | |
275 | * a scalar size then the fallback in the generic code will be | |
276 | * used. | |
277 | */ | |
278 | ||
279 | #define _this_cpu_generic_read(pcp) \ | |
280 | ({ typeof(pcp) ret__; \ | |
281 | preempt_disable(); \ | |
282 | ret__ = *this_cpu_ptr(&(pcp)); \ | |
283 | preempt_enable(); \ | |
284 | ret__; \ | |
285 | }) | |
286 | ||
287 | #ifndef this_cpu_read | |
288 | # ifndef this_cpu_read_1 | |
289 | # define this_cpu_read_1(pcp) _this_cpu_generic_read(pcp) | |
290 | # endif | |
291 | # ifndef this_cpu_read_2 | |
292 | # define this_cpu_read_2(pcp) _this_cpu_generic_read(pcp) | |
293 | # endif | |
294 | # ifndef this_cpu_read_4 | |
295 | # define this_cpu_read_4(pcp) _this_cpu_generic_read(pcp) | |
296 | # endif | |
297 | # ifndef this_cpu_read_8 | |
298 | # define this_cpu_read_8(pcp) _this_cpu_generic_read(pcp) | |
299 | # endif | |
0f5e4816 | 300 | # define this_cpu_read(pcp) __pcpu_size_call_return(this_cpu_read_, (pcp)) |
7340a0b1 CL |
301 | #endif |
302 | ||
303 | #define _this_cpu_generic_to_op(pcp, val, op) \ | |
304 | do { \ | |
305 | preempt_disable(); \ | |
f7b64fe8 | 306 | *__this_cpu_ptr(&(pcp)) op val; \ |
7340a0b1 CL |
307 | preempt_enable(); \ |
308 | } while (0) | |
309 | ||
310 | #ifndef this_cpu_write | |
311 | # ifndef this_cpu_write_1 | |
312 | # define this_cpu_write_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
313 | # endif | |
314 | # ifndef this_cpu_write_2 | |
315 | # define this_cpu_write_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
316 | # endif | |
317 | # ifndef this_cpu_write_4 | |
318 | # define this_cpu_write_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
319 | # endif | |
320 | # ifndef this_cpu_write_8 | |
321 | # define this_cpu_write_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), =) | |
322 | # endif | |
0f5e4816 | 323 | # define this_cpu_write(pcp, val) __pcpu_size_call(this_cpu_write_, (pcp), (val)) |
7340a0b1 CL |
324 | #endif |
325 | ||
326 | #ifndef this_cpu_add | |
327 | # ifndef this_cpu_add_1 | |
328 | # define this_cpu_add_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
329 | # endif | |
330 | # ifndef this_cpu_add_2 | |
331 | # define this_cpu_add_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
332 | # endif | |
333 | # ifndef this_cpu_add_4 | |
334 | # define this_cpu_add_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
335 | # endif | |
336 | # ifndef this_cpu_add_8 | |
337 | # define this_cpu_add_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), +=) | |
338 | # endif | |
0f5e4816 | 339 | # define this_cpu_add(pcp, val) __pcpu_size_call(this_cpu_add_, (pcp), (val)) |
7340a0b1 CL |
340 | #endif |
341 | ||
342 | #ifndef this_cpu_sub | |
343 | # define this_cpu_sub(pcp, val) this_cpu_add((pcp), -(val)) | |
344 | #endif | |
345 | ||
346 | #ifndef this_cpu_inc | |
347 | # define this_cpu_inc(pcp) this_cpu_add((pcp), 1) | |
348 | #endif | |
349 | ||
350 | #ifndef this_cpu_dec | |
351 | # define this_cpu_dec(pcp) this_cpu_sub((pcp), 1) | |
352 | #endif | |
353 | ||
354 | #ifndef this_cpu_and | |
355 | # ifndef this_cpu_and_1 | |
356 | # define this_cpu_and_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
357 | # endif | |
358 | # ifndef this_cpu_and_2 | |
359 | # define this_cpu_and_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
360 | # endif | |
361 | # ifndef this_cpu_and_4 | |
362 | # define this_cpu_and_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
363 | # endif | |
364 | # ifndef this_cpu_and_8 | |
365 | # define this_cpu_and_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), &=) | |
366 | # endif | |
0f5e4816 | 367 | # define this_cpu_and(pcp, val) __pcpu_size_call(this_cpu_and_, (pcp), (val)) |
7340a0b1 CL |
368 | #endif |
369 | ||
370 | #ifndef this_cpu_or | |
371 | # ifndef this_cpu_or_1 | |
372 | # define this_cpu_or_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
373 | # endif | |
374 | # ifndef this_cpu_or_2 | |
375 | # define this_cpu_or_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
376 | # endif | |
377 | # ifndef this_cpu_or_4 | |
378 | # define this_cpu_or_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
379 | # endif | |
380 | # ifndef this_cpu_or_8 | |
381 | # define this_cpu_or_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), |=) | |
382 | # endif | |
0f5e4816 | 383 | # define this_cpu_or(pcp, val) __pcpu_size_call(this_cpu_or_, (pcp), (val)) |
7340a0b1 CL |
384 | #endif |
385 | ||
386 | #ifndef this_cpu_xor | |
387 | # ifndef this_cpu_xor_1 | |
388 | # define this_cpu_xor_1(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=) | |
389 | # endif | |
390 | # ifndef this_cpu_xor_2 | |
391 | # define this_cpu_xor_2(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=) | |
392 | # endif | |
393 | # ifndef this_cpu_xor_4 | |
394 | # define this_cpu_xor_4(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=) | |
395 | # endif | |
396 | # ifndef this_cpu_xor_8 | |
397 | # define this_cpu_xor_8(pcp, val) _this_cpu_generic_to_op((pcp), (val), ^=) | |
398 | # endif | |
0f5e4816 | 399 | # define this_cpu_xor(pcp, val) __pcpu_size_call(this_cpu_or_, (pcp), (val)) |
7340a0b1 CL |
400 | #endif |
401 | ||
402 | /* | |
403 | * Generic percpu operations that do not require preemption handling. | |
404 | * Either we do not care about races or the caller has the | |
405 | * responsibility of handling preemptions issues. Arch code can still | |
406 | * override these instructions since the arch per cpu code may be more | |
407 | * efficient and may actually get race freeness for free (that is the | |
408 | * case for x86 for example). | |
409 | * | |
410 | * If there is no other protection through preempt disable and/or | |
411 | * disabling interupts then one of these RMW operations can show unexpected | |
412 | * behavior because the execution thread was rescheduled on another processor | |
413 | * or an interrupt occurred and the same percpu variable was modified from | |
414 | * the interrupt context. | |
415 | */ | |
416 | #ifndef __this_cpu_read | |
417 | # ifndef __this_cpu_read_1 | |
418 | # define __this_cpu_read_1(pcp) (*__this_cpu_ptr(&(pcp))) | |
419 | # endif | |
420 | # ifndef __this_cpu_read_2 | |
421 | # define __this_cpu_read_2(pcp) (*__this_cpu_ptr(&(pcp))) | |
422 | # endif | |
423 | # ifndef __this_cpu_read_4 | |
424 | # define __this_cpu_read_4(pcp) (*__this_cpu_ptr(&(pcp))) | |
425 | # endif | |
426 | # ifndef __this_cpu_read_8 | |
427 | # define __this_cpu_read_8(pcp) (*__this_cpu_ptr(&(pcp))) | |
428 | # endif | |
0f5e4816 | 429 | # define __this_cpu_read(pcp) __pcpu_size_call_return(__this_cpu_read_, (pcp)) |
7340a0b1 CL |
430 | #endif |
431 | ||
432 | #define __this_cpu_generic_to_op(pcp, val, op) \ | |
433 | do { \ | |
434 | *__this_cpu_ptr(&(pcp)) op val; \ | |
435 | } while (0) | |
436 | ||
437 | #ifndef __this_cpu_write | |
438 | # ifndef __this_cpu_write_1 | |
439 | # define __this_cpu_write_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), =) | |
440 | # endif | |
441 | # ifndef __this_cpu_write_2 | |
442 | # define __this_cpu_write_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), =) | |
443 | # endif | |
444 | # ifndef __this_cpu_write_4 | |
445 | # define __this_cpu_write_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), =) | |
446 | # endif | |
447 | # ifndef __this_cpu_write_8 | |
448 | # define __this_cpu_write_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), =) | |
449 | # endif | |
0f5e4816 | 450 | # define __this_cpu_write(pcp, val) __pcpu_size_call(__this_cpu_write_, (pcp), (val)) |
7340a0b1 CL |
451 | #endif |
452 | ||
453 | #ifndef __this_cpu_add | |
454 | # ifndef __this_cpu_add_1 | |
455 | # define __this_cpu_add_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=) | |
456 | # endif | |
457 | # ifndef __this_cpu_add_2 | |
458 | # define __this_cpu_add_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=) | |
459 | # endif | |
460 | # ifndef __this_cpu_add_4 | |
461 | # define __this_cpu_add_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=) | |
462 | # endif | |
463 | # ifndef __this_cpu_add_8 | |
464 | # define __this_cpu_add_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), +=) | |
465 | # endif | |
0f5e4816 | 466 | # define __this_cpu_add(pcp, val) __pcpu_size_call(__this_cpu_add_, (pcp), (val)) |
7340a0b1 CL |
467 | #endif |
468 | ||
469 | #ifndef __this_cpu_sub | |
470 | # define __this_cpu_sub(pcp, val) __this_cpu_add((pcp), -(val)) | |
471 | #endif | |
472 | ||
473 | #ifndef __this_cpu_inc | |
474 | # define __this_cpu_inc(pcp) __this_cpu_add((pcp), 1) | |
475 | #endif | |
476 | ||
477 | #ifndef __this_cpu_dec | |
478 | # define __this_cpu_dec(pcp) __this_cpu_sub((pcp), 1) | |
479 | #endif | |
480 | ||
481 | #ifndef __this_cpu_and | |
482 | # ifndef __this_cpu_and_1 | |
483 | # define __this_cpu_and_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=) | |
484 | # endif | |
485 | # ifndef __this_cpu_and_2 | |
486 | # define __this_cpu_and_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=) | |
487 | # endif | |
488 | # ifndef __this_cpu_and_4 | |
489 | # define __this_cpu_and_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=) | |
490 | # endif | |
491 | # ifndef __this_cpu_and_8 | |
492 | # define __this_cpu_and_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), &=) | |
493 | # endif | |
0f5e4816 | 494 | # define __this_cpu_and(pcp, val) __pcpu_size_call(__this_cpu_and_, (pcp), (val)) |
7340a0b1 CL |
495 | #endif |
496 | ||
497 | #ifndef __this_cpu_or | |
498 | # ifndef __this_cpu_or_1 | |
499 | # define __this_cpu_or_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=) | |
500 | # endif | |
501 | # ifndef __this_cpu_or_2 | |
502 | # define __this_cpu_or_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=) | |
503 | # endif | |
504 | # ifndef __this_cpu_or_4 | |
505 | # define __this_cpu_or_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=) | |
506 | # endif | |
507 | # ifndef __this_cpu_or_8 | |
508 | # define __this_cpu_or_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), |=) | |
509 | # endif | |
0f5e4816 | 510 | # define __this_cpu_or(pcp, val) __pcpu_size_call(__this_cpu_or_, (pcp), (val)) |
7340a0b1 CL |
511 | #endif |
512 | ||
513 | #ifndef __this_cpu_xor | |
514 | # ifndef __this_cpu_xor_1 | |
515 | # define __this_cpu_xor_1(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=) | |
516 | # endif | |
517 | # ifndef __this_cpu_xor_2 | |
518 | # define __this_cpu_xor_2(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=) | |
519 | # endif | |
520 | # ifndef __this_cpu_xor_4 | |
521 | # define __this_cpu_xor_4(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=) | |
522 | # endif | |
523 | # ifndef __this_cpu_xor_8 | |
524 | # define __this_cpu_xor_8(pcp, val) __this_cpu_generic_to_op((pcp), (val), ^=) | |
525 | # endif | |
0f5e4816 | 526 | # define __this_cpu_xor(pcp, val) __pcpu_size_call(__this_cpu_xor_, (pcp), (val)) |
7340a0b1 CL |
527 | #endif |
528 | ||
529 | /* | |
530 | * IRQ safe versions of the per cpu RMW operations. Note that these operations | |
531 | * are *not* safe against modification of the same variable from another | |
532 | * processors (which one gets when using regular atomic operations) | |
533 | . They are guaranteed to be atomic vs. local interrupts and | |
534 | * preemption only. | |
535 | */ | |
536 | #define irqsafe_cpu_generic_to_op(pcp, val, op) \ | |
537 | do { \ | |
538 | unsigned long flags; \ | |
539 | local_irq_save(flags); \ | |
540 | *__this_cpu_ptr(&(pcp)) op val; \ | |
541 | local_irq_restore(flags); \ | |
542 | } while (0) | |
543 | ||
544 | #ifndef irqsafe_cpu_add | |
545 | # ifndef irqsafe_cpu_add_1 | |
546 | # define irqsafe_cpu_add_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=) | |
547 | # endif | |
548 | # ifndef irqsafe_cpu_add_2 | |
549 | # define irqsafe_cpu_add_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=) | |
550 | # endif | |
551 | # ifndef irqsafe_cpu_add_4 | |
552 | # define irqsafe_cpu_add_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=) | |
553 | # endif | |
554 | # ifndef irqsafe_cpu_add_8 | |
555 | # define irqsafe_cpu_add_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), +=) | |
556 | # endif | |
0f5e4816 | 557 | # define irqsafe_cpu_add(pcp, val) __pcpu_size_call(irqsafe_cpu_add_, (pcp), (val)) |
7340a0b1 CL |
558 | #endif |
559 | ||
560 | #ifndef irqsafe_cpu_sub | |
561 | # define irqsafe_cpu_sub(pcp, val) irqsafe_cpu_add((pcp), -(val)) | |
562 | #endif | |
563 | ||
564 | #ifndef irqsafe_cpu_inc | |
565 | # define irqsafe_cpu_inc(pcp) irqsafe_cpu_add((pcp), 1) | |
566 | #endif | |
567 | ||
568 | #ifndef irqsafe_cpu_dec | |
569 | # define irqsafe_cpu_dec(pcp) irqsafe_cpu_sub((pcp), 1) | |
570 | #endif | |
571 | ||
572 | #ifndef irqsafe_cpu_and | |
573 | # ifndef irqsafe_cpu_and_1 | |
574 | # define irqsafe_cpu_and_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=) | |
575 | # endif | |
576 | # ifndef irqsafe_cpu_and_2 | |
577 | # define irqsafe_cpu_and_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=) | |
578 | # endif | |
579 | # ifndef irqsafe_cpu_and_4 | |
580 | # define irqsafe_cpu_and_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=) | |
581 | # endif | |
582 | # ifndef irqsafe_cpu_and_8 | |
583 | # define irqsafe_cpu_and_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), &=) | |
584 | # endif | |
0f5e4816 | 585 | # define irqsafe_cpu_and(pcp, val) __pcpu_size_call(irqsafe_cpu_and_, (val)) |
7340a0b1 CL |
586 | #endif |
587 | ||
588 | #ifndef irqsafe_cpu_or | |
589 | # ifndef irqsafe_cpu_or_1 | |
590 | # define irqsafe_cpu_or_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=) | |
591 | # endif | |
592 | # ifndef irqsafe_cpu_or_2 | |
593 | # define irqsafe_cpu_or_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=) | |
594 | # endif | |
595 | # ifndef irqsafe_cpu_or_4 | |
596 | # define irqsafe_cpu_or_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=) | |
597 | # endif | |
598 | # ifndef irqsafe_cpu_or_8 | |
599 | # define irqsafe_cpu_or_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), |=) | |
600 | # endif | |
0f5e4816 | 601 | # define irqsafe_cpu_or(pcp, val) __pcpu_size_call(irqsafe_cpu_or_, (val)) |
7340a0b1 CL |
602 | #endif |
603 | ||
604 | #ifndef irqsafe_cpu_xor | |
605 | # ifndef irqsafe_cpu_xor_1 | |
606 | # define irqsafe_cpu_xor_1(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=) | |
607 | # endif | |
608 | # ifndef irqsafe_cpu_xor_2 | |
609 | # define irqsafe_cpu_xor_2(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=) | |
610 | # endif | |
611 | # ifndef irqsafe_cpu_xor_4 | |
612 | # define irqsafe_cpu_xor_4(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=) | |
613 | # endif | |
614 | # ifndef irqsafe_cpu_xor_8 | |
615 | # define irqsafe_cpu_xor_8(pcp, val) irqsafe_cpu_generic_to_op((pcp), (val), ^=) | |
616 | # endif | |
0f5e4816 | 617 | # define irqsafe_cpu_xor(pcp, val) __pcpu_size_call(irqsafe_cpu_xor_, (val)) |
7340a0b1 CL |
618 | #endif |
619 | ||
1da177e4 | 620 | #endif /* __LINUX_PERCPU_H */ |