Commit | Line | Data |
---|---|---|
c4a6a2ab LB |
1 | /* |
2 | * MV-643XX ethernet platform device data definition file. | |
3 | */ | |
fa3959f4 | 4 | |
c4a6a2ab LB |
5 | #ifndef __LINUX_MV643XX_ETH_H |
6 | #define __LINUX_MV643XX_ETH_H | |
7 | ||
f2ce825d LB |
8 | #include <linux/mbus.h> |
9 | ||
240e4419 LB |
10 | #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" |
11 | #define MV643XX_ETH_NAME "mv643xx_eth_port" | |
c4a6a2ab LB |
12 | #define MV643XX_ETH_SHARED_REGS 0x2000 |
13 | #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 | |
3077d78a DF |
14 | #define MV643XX_ETH_BAR_4 0x2220 |
15 | #define MV643XX_ETH_SIZE_REG_4 0x2224 | |
16 | #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 | |
c4a6a2ab | 17 | |
f2ce825d LB |
18 | struct mv643xx_eth_shared_platform_data { |
19 | struct mbus_dram_target_info *dram; | |
fc0eb9f2 | 20 | struct platform_device *shared_smi; |
9b2c2ff7 SB |
21 | /* |
22 | * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default | |
23 | * limit of 9KiB will be used. | |
24 | */ | |
25 | int tx_csum_limit; | |
f2ce825d LB |
26 | }; |
27 | ||
ac840605 LB |
28 | #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 |
29 | #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) | |
30 | #define MV643XX_ETH_PHY_NONE 0xff | |
31 | ||
c4a6a2ab | 32 | struct mv643xx_eth_platform_data { |
fc32b0e2 LB |
33 | /* |
34 | * Pointer back to our parent instance, and our port number. | |
35 | */ | |
fa3959f4 | 36 | struct platform_device *shared; |
fc32b0e2 | 37 | int port_number; |
fa3959f4 | 38 | |
fc32b0e2 LB |
39 | /* |
40 | * Whether a PHY is present, and if yes, at which address. | |
41 | */ | |
fc32b0e2 | 42 | int phy_addr; |
ce4e2e45 | 43 | |
fc32b0e2 LB |
44 | /* |
45 | * Use this MAC address if it is valid, overriding the | |
46 | * address that is already in the hardware. | |
47 | */ | |
48 | u8 mac_addr[6]; | |
49 | ||
50 | /* | |
51 | * If speed is 0, autonegotiation is enabled. | |
52 | * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. | |
53 | * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. | |
54 | */ | |
55 | int speed; | |
56 | int duplex; | |
57 | ||
64da80a2 | 58 | /* |
f7981c1c | 59 | * How many RX/TX queues to use. |
64da80a2 | 60 | */ |
f7981c1c LB |
61 | int rx_queue_count; |
62 | int tx_queue_count; | |
64da80a2 | 63 | |
fc32b0e2 LB |
64 | /* |
65 | * Override default RX/TX queue sizes if nonzero. | |
66 | */ | |
67 | int rx_queue_size; | |
68 | int tx_queue_size; | |
69 | ||
70 | /* | |
71 | * Use on-chip SRAM for RX/TX descriptors if size is nonzero | |
72 | * and sufficient to contain all descriptors for the requested | |
73 | * ring sizes. | |
74 | */ | |
75 | unsigned long rx_sram_addr; | |
76 | int rx_sram_size; | |
77 | unsigned long tx_sram_addr; | |
78 | int tx_sram_size; | |
c4a6a2ab LB |
79 | }; |
80 | ||
fc32b0e2 LB |
81 | |
82 | #endif |