[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / mii.h

/*
 * linux/mii.h: definitions for MII-compatible transceivers
 * Originally drivers/net/sunhme.h.
 *
 * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
 */

#ifndef __LINUX_MII_H__
#define __LINUX_MII_H__

#include <linux/types.h>
#include <linux/ethtool.h>

/* Generic MII registers. */
#define MII_BMCR		0x00	/* Basic mode control register */
#define MII_BMSR		0x01	/* Basic mode status register  */
#define MII_PHYSID1		0x02	/* PHYS ID 1                   */
#define MII_PHYSID2		0x03	/* PHYS ID 2                   */
#define MII_ADVERTISE		0x04	/* Advertisement control reg   */
#define MII_LPA			0x05	/* Link partner ability reg    */
#define MII_EXPANSION		0x06	/* Expansion register          */
#define MII_CTRL1000		0x09	/* 1000BASE-T control          */
#define MII_STAT1000		0x0a	/* 1000BASE-T status           */
#define	MII_MMD_CTRL		0x0d	/* MMD Access Control Register */
#define	MII_MMD_DATA		0x0e	/* MMD Access Data Register */
#define MII_ESTATUS		0x0f	/* Extended Status             */
#define MII_DCOUNTER		0x12	/* Disconnect counter          */
#define MII_FCSCOUNTER		0x13	/* False carrier counter       */
#define MII_NWAYTEST		0x14	/* N-way auto-neg test reg     */
#define MII_RERRCOUNTER		0x15	/* Receive error counter       */
#define MII_SREVISION		0x16	/* Silicon revision            */
#define MII_RESV1		0x17	/* Reserved...                 */
#define MII_LBRERROR		0x18	/* Lpback, rx, bypass error    */
#define MII_PHYADDR		0x19	/* PHY address                 */
#define MII_RESV2		0x1a	/* Reserved...                 */
#define MII_TPISTATUS		0x1b	/* TPI status for 10mbps       */
#define MII_NCONFIG		0x1c	/* Network interface config    */

/* Basic mode control register. */
#define BMCR_RESV		0x003f	/* Unused...                   */
#define BMCR_SPEED1000		0x0040	/* MSB of Speed (1000)         */
#define BMCR_CTST		0x0080	/* Collision test              */
#define BMCR_FULLDPLX		0x0100	/* Full duplex                 */
#define BMCR_ANRESTART		0x0200	/* Auto negotiation restart    */
#define BMCR_ISOLATE		0x0400	/* Isolate data paths from MII */
#define BMCR_PDOWN		0x0800	/* Enable low power state      */
#define BMCR_ANENABLE		0x1000	/* Enable auto negotiation     */
#define BMCR_SPEED100		0x2000	/* Select 100Mbps              */
#define BMCR_LOOPBACK		0x4000	/* TXD loopback bits           */
#define BMCR_RESET		0x8000	/* Reset to default state      */

/* Basic mode status register. */
#define BMSR_ERCAP		0x0001	/* Ext-reg capability          */
#define BMSR_JCD		0x0002	/* Jabber detected             */
#define BMSR_LSTATUS		0x0004	/* Link status                 */
#define BMSR_ANEGCAPABLE	0x0008	/* Able to do auto-negotiation */
#define BMSR_RFAULT		0x0010	/* Remote fault detected       */
#define BMSR_ANEGCOMPLETE	0x0020	/* Auto-negotiation complete   */
#define BMSR_RESV		0x00c0	/* Unused...                   */
#define BMSR_ESTATEN		0x0100	/* Extended Status in R15      */
#define BMSR_100HALF2		0x0200	/* Can do 100BASE-T2 HDX       */
#define BMSR_100FULL2		0x0400	/* Can do 100BASE-T2 FDX       */
#define BMSR_10HALF		0x0800	/* Can do 10mbps, half-duplex  */
#define BMSR_10FULL		0x1000	/* Can do 10mbps, full-duplex  */
#define BMSR_100HALF		0x2000	/* Can do 100mbps, half-duplex */
#define BMSR_100FULL		0x4000	/* Can do 100mbps, full-duplex */
#define BMSR_100BASE4		0x8000	/* Can do 100mbps, 4k packets  */

/* Advertisement control register. */
#define ADVERTISE_SLCT		0x001f	/* Selector bits               */
#define ADVERTISE_CSMA		0x0001	/* Only selector supported     */
#define ADVERTISE_10HALF	0x0020	/* Try for 10mbps half-duplex  */
#define ADVERTISE_1000XFULL	0x0020	/* Try for 1000BASE-X full-duplex */
#define ADVERTISE_10FULL	0x0040	/* Try for 10mbps full-duplex  */
#define ADVERTISE_1000XHALF	0x0040	/* Try for 1000BASE-X half-duplex */
#define ADVERTISE_100HALF	0x0080	/* Try for 100mbps half-duplex */
#define ADVERTISE_1000XPAUSE	0x0080	/* Try for 1000BASE-X pause    */
#define ADVERTISE_100FULL	0x0100	/* Try for 100mbps full-duplex */
#define ADVERTISE_1000XPSE_ASYM	0x0100	/* Try for 1000BASE-X asym pause */
#define ADVERTISE_100BASE4	0x0200	/* Try for 100mbps 4k packets  */
#define ADVERTISE_PAUSE_CAP	0x0400	/* Try for pause               */
#define ADVERTISE_PAUSE_ASYM	0x0800	/* Try for asymetric pause     */
#define ADVERTISE_RESV		0x1000	/* Unused...                   */
#define ADVERTISE_RFAULT	0x2000	/* Say we can detect faults    */
#define ADVERTISE_LPACK		0x4000	/* Ack link partners response  */
#define ADVERTISE_NPAGE		0x8000	/* Next page bit               */

#define ADVERTISE_FULL		(ADVERTISE_100FULL | ADVERTISE_10FULL | \
				  ADVERTISE_CSMA)
#define ADVERTISE_ALL		(ADVERTISE_10HALF | ADVERTISE_10FULL | \
				  ADVERTISE_100HALF | ADVERTISE_100FULL)

/* Link partner ability register. */
#define LPA_SLCT		0x001f	/* Same as advertise selector  */
#define LPA_10HALF		0x0020	/* Can do 10mbps half-duplex   */
#define LPA_1000XFULL		0x0020	/* Can do 1000BASE-X full-duplex */
#define LPA_10FULL		0x0040	/* Can do 10mbps full-duplex   */
#define LPA_1000XHALF		0x0040	/* Can do 1000BASE-X half-duplex */
#define LPA_100HALF		0x0080	/* Can do 100mbps half-duplex  */
#define LPA_1000XPAUSE		0x0080	/* Can do 1000BASE-X pause     */
#define LPA_100FULL		0x0100	/* Can do 100mbps full-duplex  */
#define LPA_1000XPAUSE_ASYM	0x0100	/* Can do 1000BASE-X pause asym*/
#define LPA_100BASE4		0x0200	/* Can do 100mbps 4k packets   */
#define LPA_PAUSE_CAP		0x0400	/* Can pause                   */
#define LPA_PAUSE_ASYM		0x0800	/* Can pause asymetrically     */
#define LPA_RESV		0x1000	/* Unused...                   */
#define LPA_RFAULT		0x2000	/* Link partner faulted        */
#define LPA_LPACK		0x4000	/* Link partner acked us       */
#define LPA_NPAGE		0x8000	/* Next page bit               */

#define LPA_DUPLEX		(LPA_10FULL | LPA_100FULL)
#define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)

/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY		0x0001	/* Can do N-way auto-nego      */
#define EXPANSION_LCWP		0x0002	/* Got new RX page code word   */
#define EXPANSION_ENABLENPAGE	0x0004	/* This enables npage words    */
#define EXPANSION_NPCAPABLE	0x0008	/* Link partner supports npage */
#define EXPANSION_MFAULTS	0x0010	/* Multiple faults detected    */
#define EXPANSION_RESV		0xffe0	/* Unused...                   */

#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full          */
#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half          */

/* N-way test register. */
#define NWAYTEST_RESV1		0x00ff	/* Unused...                   */
#define NWAYTEST_LOOPBACK	0x0100	/* Enable loopback for N-way   */
#define NWAYTEST_RESV2		0xfe00	/* Unused...                   */

/* 1000BASE-T Control register */
#define ADVERTISE_1000FULL	0x0200  /* Advertise 1000BASE-T full duplex */
#define ADVERTISE_1000HALF	0x0100  /* Advertise 1000BASE-T half duplex */
#define CTL1000_AS_MASTER	0x0800
#define CTL1000_ENABLE_MASTER	0x1000

/* 1000BASE-T Status register */
#define LPA_1000LOCALRXOK	0x2000	/* Link partner local receiver status */
#define LPA_1000REMRXOK		0x1000	/* Link partner remote receiver status */
#define LPA_1000FULL		0x0800	/* Link partner 1000BASE-T full duplex */
#define LPA_1000HALF		0x0400	/* Link partner 1000BASE-T half duplex */

/* Flow control flags */
#define FLOW_CTRL_TX		0x01
#define FLOW_CTRL_RX		0x02

/* MMD Access Control register fields */
#define MII_MMD_CTRL_DEVAD_MASK	0x1f	/* Mask MMD DEVAD*/
#define MII_MMD_CTRL_ADDR	0x0000	/* Address */
#define MII_MMD_CTRL_NOINCR	0x4000	/* no post increment */
#define MII_MMD_CTRL_INCR_RDWT	0x8000	/* post increment on reads & writes */
#define MII_MMD_CTRL_INCR_ON_WT	0xC000	/* post increment on writes only */

/* This structure is used in all SIOCxMIIxxx ioctl calls */
struct mii_ioctl_data {
	__u16		phy_id;
	__u16		reg_num;
	__u16		val_in;
	__u16		val_out;
};

#ifdef __KERNEL__

#include <linux/if.h>

struct ethtool_cmd;

struct mii_if_info {
	int phy_id;
	int advertising;
	int phy_id_mask;
	int reg_num_mask;

	unsigned int full_duplex : 1;	/* is full duplex? */
	unsigned int force_media : 1;	/* is autoneg. disabled? */
	unsigned int supports_gmii : 1; /* are GMII registers supported? */

	struct net_device *dev;
	int (*mdio_read) (struct net_device *dev, int phy_id, int location);
	void (*mdio_write) (struct net_device *dev, int phy_id, int location, int val);
};

extern int mii_link_ok (struct mii_if_info *mii);
extern int mii_nway_restart (struct mii_if_info *mii);
extern int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd);
extern int mii_check_gmii_support(struct mii_if_info *mii);
extern void mii_check_link (struct mii_if_info *mii);
extern unsigned int mii_check_media (struct mii_if_info *mii,
				     unsigned int ok_to_print,
				     unsigned int init_media);
extern int generic_mii_ioctl(struct mii_if_info *mii_if,
			     struct mii_ioctl_data *mii_data, int cmd,
			     unsigned int *duplex_changed);


static inline struct mii_ioctl_data *if_mii(struct ifreq *rq)
{
	return (struct mii_ioctl_data *) &rq->ifr_ifru;
}

/**
 * mii_nway_result
 * @negotiated: value of MII ANAR and'd with ANLPAR
 *
 * Given a set of MII abilities, check each bit and returns the
 * currently supported media, in the priority order defined by
 * IEEE 802.3u.  We use LPA_xxx constants but note this is not the
 * value of LPA solely, as described above.
 *
 * The one exception to IEEE 802.3u is that 100baseT4 is placed
 * between 100T-full and 100T-half.  If your phy does not support
 * 100T4 this is fine.  If your phy places 100T4 elsewhere in the
 * priority order, you will need to roll your own function.
 */
static inline unsigned int mii_nway_result (unsigned int negotiated)
{
	unsigned int ret;

	if (negotiated & LPA_100FULL)
		ret = LPA_100FULL;
	else if (negotiated & LPA_100BASE4)
		ret = LPA_100BASE4;
	else if (negotiated & LPA_100HALF)
		ret = LPA_100HALF;
	else if (negotiated & LPA_10FULL)
		ret = LPA_10FULL;
	else
		ret = LPA_10HALF;

	return ret;
}

/**
 * mii_duplex
 * @duplex_lock: Non-zero if duplex is locked at full
 * @negotiated: value of MII ANAR and'd with ANLPAR
 *
 * A small helper function for a common case.  Returns one
 * if the media is operating or locked at full duplex, and
 * returns zero otherwise.
 */
static inline unsigned int mii_duplex (unsigned int duplex_lock,
				       unsigned int negotiated)
{
	if (duplex_lock)
		return 1;
	if (mii_nway_result(negotiated) & LPA_DUPLEX)
		return 1;
	return 0;
}

/**
 * ethtool_adv_to_mii_adv_t
 * @ethadv: the ethtool advertisement settings
 *
 * A small helper function that translates ethtool advertisement
 * settings to phy autonegotiation advertisements for the
 * MII_ADVERTISE register.
 */
static inline u32 ethtool_adv_to_mii_adv_t(u32 ethadv)
{
	u32 result = 0;

	if (ethadv & ADVERTISED_10baseT_Half)
		result |= ADVERTISE_10HALF;
	if (ethadv & ADVERTISED_10baseT_Full)
		result |= ADVERTISE_10FULL;
	if (ethadv & ADVERTISED_100baseT_Half)
		result |= ADVERTISE_100HALF;
	if (ethadv & ADVERTISED_100baseT_Full)
		result |= ADVERTISE_100FULL;
	if (ethadv & ADVERTISED_Pause)
		result |= ADVERTISE_PAUSE_CAP;
	if (ethadv & ADVERTISED_Asym_Pause)
		result |= ADVERTISE_PAUSE_ASYM;

	return result;
}

/**
 * mii_adv_to_ethtool_adv_t
 * @adv: value of the MII_ADVERTISE register
 *
 * A small helper function that translates MII_ADVERTISE bits
 * to ethtool advertisement settings.
 */
static inline u32 mii_adv_to_ethtool_adv_t(u32 adv)
{
	u32 result = 0;

	if (adv & ADVERTISE_10HALF)
		result |= ADVERTISED_10baseT_Half;
	if (adv & ADVERTISE_10FULL)
		result |= ADVERTISED_10baseT_Full;
	if (adv & ADVERTISE_100HALF)
		result |= ADVERTISED_100baseT_Half;
	if (adv & ADVERTISE_100FULL)
		result |= ADVERTISED_100baseT_Full;
	if (adv & ADVERTISE_PAUSE_CAP)
		result |= ADVERTISED_Pause;
	if (adv & ADVERTISE_PAUSE_ASYM)
		result |= ADVERTISED_Asym_Pause;

	return result;
}

/**
 * ethtool_adv_to_mii_ctrl1000_t
 * @ethadv: the ethtool advertisement settings
 *
 * A small helper function that translates ethtool advertisement
 * settings to phy autonegotiation advertisements for the
 * MII_CTRL1000 register when in 1000T mode.
 */
static inline u32 ethtool_adv_to_mii_ctrl1000_t(u32 ethadv)
{
	u32 result = 0;

	if (ethadv & ADVERTISED_1000baseT_Half)
		result |= ADVERTISE_1000HALF;
	if (ethadv & ADVERTISED_1000baseT_Full)
		result |= ADVERTISE_1000FULL;

	return result;
}

/**
 * mii_ctrl1000_to_ethtool_adv_t
 * @adv: value of the MII_CTRL1000 register
 *
 * A small helper function that translates MII_CTRL1000
 * bits, when in 1000Base-T mode, to ethtool
 * advertisement settings.
 */
static inline u32 mii_ctrl1000_to_ethtool_adv_t(u32 adv)
{
	u32 result = 0;

	if (adv & ADVERTISE_1000HALF)
		result |= ADVERTISED_1000baseT_Half;
	if (adv & ADVERTISE_1000FULL)
		result |= ADVERTISED_1000baseT_Full;

	return result;
}

/**
 * mii_lpa_to_ethtool_lpa_t
 * @adv: value of the MII_LPA register
 *
 * A small helper function that translates MII_LPA
 * bits, when in 1000Base-T mode, to ethtool
 * LP advertisement settings.
 */
static inline u32 mii_lpa_to_ethtool_lpa_t(u32 lpa)
{
	u32 result = 0;

	if (lpa & LPA_LPACK)
		result |= ADVERTISED_Autoneg;

	return result | mii_adv_to_ethtool_adv_t(lpa);
}

/**
 * mii_stat1000_to_ethtool_lpa_t
 * @adv: value of the MII_STAT1000 register
 *
 * A small helper function that translates MII_STAT1000
 * bits, when in 1000Base-T mode, to ethtool
 * advertisement settings.
 */
static inline u32 mii_stat1000_to_ethtool_lpa_t(u32 lpa)
{
	u32 result = 0;

	if (lpa & LPA_1000HALF)
		result |= ADVERTISED_1000baseT_Half;
	if (lpa & LPA_1000FULL)
		result |= ADVERTISED_1000baseT_Full;

	return result;
}

/**
 * ethtool_adv_to_mii_adv_x
 * @ethadv: the ethtool advertisement settings
 *
 * A small helper function that translates ethtool advertisement
 * settings to phy autonegotiation advertisements for the
 * MII_CTRL1000 register when in 1000Base-X mode.
 */
static inline u32 ethtool_adv_to_mii_adv_x(u32 ethadv)
{
	u32 result = 0;

	if (ethadv & ADVERTISED_1000baseT_Half)
		result |= ADVERTISE_1000XHALF;
	if (ethadv & ADVERTISED_1000baseT_Full)
		result |= ADVERTISE_1000XFULL;
	if (ethadv & ADVERTISED_Pause)
		result |= ADVERTISE_1000XPAUSE;
	if (ethadv & ADVERTISED_Asym_Pause)
		result |= ADVERTISE_1000XPSE_ASYM;

	return result;
}

/**
 * mii_adv_to_ethtool_adv_x
 * @adv: value of the MII_CTRL1000 register
 *
 * A small helper function that translates MII_CTRL1000
 * bits, when in 1000Base-X mode, to ethtool
 * advertisement settings.
 */
static inline u32 mii_adv_to_ethtool_adv_x(u32 adv)
{
	u32 result = 0;

	if (adv & ADVERTISE_1000XHALF)
		result |= ADVERTISED_1000baseT_Half;
	if (adv & ADVERTISE_1000XFULL)
		result |= ADVERTISED_1000baseT_Full;
	if (adv & ADVERTISE_1000XPAUSE)
		result |= ADVERTISED_Pause;
	if (adv & ADVERTISE_1000XPSE_ASYM)
		result |= ADVERTISED_Asym_Pause;

	return result;
}

/**
 * mii_lpa_to_ethtool_lpa_x
 * @adv: value of the MII_LPA register
 *
 * A small helper function that translates MII_LPA
 * bits, when in 1000Base-X mode, to ethtool
 * LP advertisement settings.
 */
static inline u32 mii_lpa_to_ethtool_lpa_x(u32 lpa)
{
	u32 result = 0;

	if (lpa & LPA_LPACK)
		result |= ADVERTISED_Autoneg;

	return result | mii_adv_to_ethtool_adv_x(lpa);
}

/**
 * mii_advertise_flowctrl - get flow control advertisement flags
 * @cap: Flow control capabilities (FLOW_CTRL_RX, FLOW_CTRL_TX or both)
 */
static inline u16 mii_advertise_flowctrl(int cap)
{
	u16 adv = 0;

	if (cap & FLOW_CTRL_RX)
		adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
	if (cap & FLOW_CTRL_TX)
		adv ^= ADVERTISE_PAUSE_ASYM;

	return adv;
}

/**
 * mii_resolve_flowctrl_fdx
 * @lcladv: value of MII ADVERTISE register
 * @rmtadv: value of MII LPA register
 *
 * Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
 */
static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
{
	u8 cap = 0;

	if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
		cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
	} else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
		if (lcladv & ADVERTISE_PAUSE_CAP)
			cap = FLOW_CTRL_RX;
		else if (rmtadv & ADVERTISE_PAUSE_CAP)
			cap = FLOW_CTRL_TX;
	}

	return cap;
}

#endif /* __KERNEL__ */
#endif /* __LINUX_MII_H__ */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/mii.h: definitions for MII-compatible transceivers
	3	* Originally drivers/net/sunhme.h.
	4	*
	5	* Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
	6	*/
	7
	8	#ifndef __LINUX_MII_H__
	9	#define __LINUX_MII_H__
	10
	11	#include <linux/types.h>
28011cf1	12	#include <linux/ethtool.h>
1da177e4 LT	13
1da177e4 LT	14	/* Generic MII registers. */
c44f7eb4 ME	15	#define MII_BMCR 0x00 /* Basic mode control register */
	16	#define MII_BMSR 0x01 /* Basic mode status register */
	17	#define MII_PHYSID1 0x02 /* PHYS ID 1 */
	18	#define MII_PHYSID2 0x03 /* PHYS ID 2 */
	19	#define MII_ADVERTISE 0x04 /* Advertisement control reg */
	20	#define MII_LPA 0x05 /* Link partner ability reg */
	21	#define MII_EXPANSION 0x06 /* Expansion register */
	22	#define MII_CTRL1000 0x09 /* 1000BASE-T control */
	23	#define MII_STAT1000 0x0a /* 1000BASE-T status */
a59a4d19 GC	24	#define MII_MMD_CTRL 0x0d /* MMD Access Control Register */
a59a4d19 GC	25	#define MII_MMD_DATA 0x0e /* MMD Access Data Register */
c44f7eb4 ME	26	#define MII_ESTATUS 0x0f /* Extended Status */
	27	#define MII_DCOUNTER 0x12 /* Disconnect counter */
	28	#define MII_FCSCOUNTER 0x13 /* False carrier counter */
	29	#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
	30	#define MII_RERRCOUNTER 0x15 /* Receive error counter */
	31	#define MII_SREVISION 0x16 /* Silicon revision */
	32	#define MII_RESV1 0x17 /* Reserved... */
	33	#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
	34	#define MII_PHYADDR 0x19 /* PHY address */
	35	#define MII_RESV2 0x1a /* Reserved... */
	36	#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
	37	#define MII_NCONFIG 0x1c /* Network interface config */
1da177e4 LT	38
1da177e4 LT	39	/* Basic mode control register. */
c44f7eb4 ME	40	#define BMCR_RESV 0x003f /* Unused... */
	41	#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
	42	#define BMCR_CTST 0x0080 /* Collision test */
	43	#define BMCR_FULLDPLX 0x0100 /* Full duplex */
	44	#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
e8aaebc6 ME	45	#define BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */
e8aaebc6 ME	46	#define BMCR_PDOWN 0x0800 /* Enable low power state */
c44f7eb4 ME	47	#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
	48	#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
	49	#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
e8aaebc6	50	#define BMCR_RESET 0x8000 /* Reset to default state */
1da177e4 LT	51
1da177e4 LT	52	/* Basic mode status register. */
c44f7eb4 ME	53	#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
	54	#define BMSR_JCD 0x0002 /* Jabber detected */
	55	#define BMSR_LSTATUS 0x0004 /* Link status */
	56	#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
	57	#define BMSR_RFAULT 0x0010 /* Remote fault detected */
	58	#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
	59	#define BMSR_RESV 0x00c0 /* Unused... */
	60	#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
	61	#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
	62	#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
	63	#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
	64	#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
	65	#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
	66	#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
	67	#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
1da177e4 LT	68
1da177e4 LT	69	/* Advertisement control register. */
c44f7eb4 ME	70	#define ADVERTISE_SLCT 0x001f /* Selector bits */
	71	#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
	72	#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
	73	#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
	74	#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
	75	#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
	76	#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
	77	#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
	78	#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
	79	#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
	80	#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
	81	#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
	82	#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
	83	#define ADVERTISE_RESV 0x1000 /* Unused... */
	84	#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
	85	#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
	86	#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
	87
	88	#define ADVERTISE_FULL (ADVERTISE_100FULL \| ADVERTISE_10FULL \| \
	89	ADVERTISE_CSMA)
	90	#define ADVERTISE_ALL (ADVERTISE_10HALF \| ADVERTISE_10FULL \| \
	91	ADVERTISE_100HALF \| ADVERTISE_100FULL)
1da177e4 LT	92
1da177e4 LT	93	/* Link partner ability register. */
c44f7eb4 ME	94	#define LPA_SLCT 0x001f /* Same as advertise selector */
	95	#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
	96	#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
	97	#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
	98	#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
	99	#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
	100	#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
	101	#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
	102	#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
	103	#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
	104	#define LPA_PAUSE_CAP 0x0400 /* Can pause */
	105	#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
	106	#define LPA_RESV 0x1000 /* Unused... */
	107	#define LPA_RFAULT 0x2000 /* Link partner faulted */
	108	#define LPA_LPACK 0x4000 /* Link partner acked us */
	109	#define LPA_NPAGE 0x8000 /* Next page bit */
1da177e4 LT	110
	111	#define LPA_DUPLEX (LPA_10FULL \| LPA_100FULL)
	112	#define LPA_100 (LPA_100FULL \| LPA_100HALF \| LPA_100BASE4)
	113
	114	/* Expansion register for auto-negotiation. */
c44f7eb4 ME	115	#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
	116	#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
	117	#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
	118	#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
	119	#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
	120	#define EXPANSION_RESV 0xffe0 /* Unused... */
1da177e4	121
c44f7eb4 ME	122	#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
c44f7eb4 ME	123	#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
00db8189	124
1da177e4	125	/* N-way test register. */
c44f7eb4 ME	126	#define NWAYTEST_RESV1 0x00ff /* Unused... */
	127	#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
	128	#define NWAYTEST_RESV2 0xfe00 /* Unused... */
1da177e4 LT	129
1da177e4 LT	130	/* 1000BASE-T Control register */
c44f7eb4 ME	131	#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
c44f7eb4 ME	132	#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
221c5637 MC	133	#define CTL1000_AS_MASTER 0x0800
221c5637 MC	134	#define CTL1000_ENABLE_MASTER 0x1000
1da177e4 LT	135
1da177e4 LT	136	/* 1000BASE-T Status register */
c44f7eb4 ME	137	#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
	138	#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
	139	#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
	140	#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
1da177e4	141
e18ce346 SG	142	/* Flow control flags */
	143	#define FLOW_CTRL_TX 0x01
	144	#define FLOW_CTRL_RX 0x02
	145
a59a4d19 GC	146	/* MMD Access Control register fields */
	147	#define MII_MMD_CTRL_DEVAD_MASK 0x1f /* Mask MMD DEVAD*/
	148	#define MII_MMD_CTRL_ADDR 0x0000 /* Address */
	149	#define MII_MMD_CTRL_NOINCR 0x4000 /* no post increment */
	150	#define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */
	151	#define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */
	152
c3ce7e20 DW	153	/* This structure is used in all SIOCxMIIxxx ioctl calls */
	154	struct mii_ioctl_data {
	155	__u16 phy_id;
	156	__u16 reg_num;
	157	__u16 val_in;
	158	__u16 val_out;
	159	};
	160
c44f7eb4	161	#ifdef __KERNEL__
c3ce7e20 DW	162
	163	#include <linux/if.h>
	164
	165	struct ethtool_cmd;
	166
1da177e4 LT	167	struct mii_if_info {
	168	int phy_id;
	169	int advertising;
	170	int phy_id_mask;
	171	int reg_num_mask;
	172
	173	unsigned int full_duplex : 1; /* is full duplex? */
	174	unsigned int force_media : 1; /* is autoneg. disabled? */
	175	unsigned int supports_gmii : 1; /* are GMII registers supported? */
	176
	177	struct net_device *dev;
	178	int (mdio_read) (struct net_device dev, int phy_id, int location);
	179	void (mdio_write) (struct net_device dev, int phy_id, int location, int val);
	180	};
	181
1da177e4 LT	182	extern int mii_link_ok (struct mii_if_info *mii);
	183	extern int mii_nway_restart (struct mii_if_info *mii);
	184	extern int mii_ethtool_gset(struct mii_if_info mii, struct ethtool_cmd ecmd);
	185	extern int mii_ethtool_sset(struct mii_if_info mii, struct ethtool_cmd ecmd);
43ec6e95	186	extern int mii_check_gmii_support(struct mii_if_info *mii);
1da177e4 LT	187	extern void mii_check_link (struct mii_if_info *mii);
	188	extern unsigned int mii_check_media (struct mii_if_info *mii,
	189	unsigned int ok_to_print,
	190	unsigned int init_media);
	191	extern int generic_mii_ioctl(struct mii_if_info *mii_if,
c44f7eb4	192	struct mii_ioctl_data *mii_data, int cmd,
1da177e4 LT	193	unsigned int *duplex_changed);
	194
	195
1da177e4 LT	196	static inline struct mii_ioctl_data if_mii(struct ifreq rq)
	197	{
	198	return (struct mii_ioctl_data *) &rq->ifr_ifru;
	199	}
	200
1da177e4 LT	201	/**
	202	* mii_nway_result
	203	* @negotiated: value of MII ANAR and'd with ANLPAR
	204	*
	205	* Given a set of MII abilities, check each bit and returns the
	206	* currently supported media, in the priority order defined by
	207	* IEEE 802.3u. We use LPA_xxx constants but note this is not the
	208	* value of LPA solely, as described above.
	209	*
	210	* The one exception to IEEE 802.3u is that 100baseT4 is placed
	211	* between 100T-full and 100T-half. If your phy does not support
	212	* 100T4 this is fine. If your phy places 100T4 elsewhere in the
	213	* priority order, you will need to roll your own function.
	214	*/
	215	static inline unsigned int mii_nway_result (unsigned int negotiated)
	216	{
	217	unsigned int ret;
	218
	219	if (negotiated & LPA_100FULL)
	220	ret = LPA_100FULL;
	221	else if (negotiated & LPA_100BASE4)
	222	ret = LPA_100BASE4;
	223	else if (negotiated & LPA_100HALF)
	224	ret = LPA_100HALF;
	225	else if (negotiated & LPA_10FULL)
	226	ret = LPA_10FULL;
	227	else
	228	ret = LPA_10HALF;
	229
	230	return ret;
	231	}
	232
	233	/**
	234	* mii_duplex
	235	* @duplex_lock: Non-zero if duplex is locked at full
	236	* @negotiated: value of MII ANAR and'd with ANLPAR
	237	*
	238	* A small helper function for a common case. Returns one
	239	* if the media is operating or locked at full duplex, and
	240	* returns zero otherwise.
	241	*/
	242	static inline unsigned int mii_duplex (unsigned int duplex_lock,
	243	unsigned int negotiated)
	244	{
	245	if (duplex_lock)
	246	return 1;
	247	if (mii_nway_result(negotiated) & LPA_DUPLEX)
	248	return 1;
	249	return 0;
	250	}
	251
28011cf1	252	/**
37f07023	253	* ethtool_adv_to_mii_adv_t
28011cf1 MC	254	* @ethadv: the ethtool advertisement settings
	255	*
	256	* A small helper function that translates ethtool advertisement
	257	* settings to phy autonegotiation advertisements for the
	258	* MII_ADVERTISE register.
	259	*/
37f07023	260	static inline u32 ethtool_adv_to_mii_adv_t(u32 ethadv)
28011cf1 MC	261	{
	262	u32 result = 0;
	263
	264	if (ethadv & ADVERTISED_10baseT_Half)
	265	result \|= ADVERTISE_10HALF;
	266	if (ethadv & ADVERTISED_10baseT_Full)
	267	result \|= ADVERTISE_10FULL;
	268	if (ethadv & ADVERTISED_100baseT_Half)
	269	result \|= ADVERTISE_100HALF;
	270	if (ethadv & ADVERTISED_100baseT_Full)
	271	result \|= ADVERTISE_100FULL;
	272	if (ethadv & ADVERTISED_Pause)
	273	result \|= ADVERTISE_PAUSE_CAP;
	274	if (ethadv & ADVERTISED_Asym_Pause)
	275	result \|= ADVERTISE_PAUSE_ASYM;
	276
	277	return result;
	278	}
	279
	280	/**
37f07023	281	* mii_adv_to_ethtool_adv_t
28011cf1 MC	282	* @adv: value of the MII_ADVERTISE register
	283	*
	284	* A small helper function that translates MII_ADVERTISE bits
	285	* to ethtool advertisement settings.
	286	*/
37f07023	287	static inline u32 mii_adv_to_ethtool_adv_t(u32 adv)
28011cf1 MC	288	{
	289	u32 result = 0;
	290
	291	if (adv & ADVERTISE_10HALF)
	292	result \|= ADVERTISED_10baseT_Half;
	293	if (adv & ADVERTISE_10FULL)
	294	result \|= ADVERTISED_10baseT_Full;
	295	if (adv & ADVERTISE_100HALF)
	296	result \|= ADVERTISED_100baseT_Half;
	297	if (adv & ADVERTISE_100FULL)
	298	result \|= ADVERTISED_100baseT_Full;
	299	if (adv & ADVERTISE_PAUSE_CAP)
	300	result \|= ADVERTISED_Pause;
	301	if (adv & ADVERTISE_PAUSE_ASYM)
	302	result \|= ADVERTISED_Asym_Pause;
	303
	304	return result;
	305	}
	306
	307	/**
37f07023	308	* ethtool_adv_to_mii_ctrl1000_t
28011cf1 MC	309	* @ethadv: the ethtool advertisement settings
	310	*
	311	* A small helper function that translates ethtool advertisement
	312	* settings to phy autonegotiation advertisements for the
	313	* MII_CTRL1000 register when in 1000T mode.
	314	*/
37f07023	315	static inline u32 ethtool_adv_to_mii_ctrl1000_t(u32 ethadv)
28011cf1 MC	316	{
	317	u32 result = 0;
	318
	319	if (ethadv & ADVERTISED_1000baseT_Half)
	320	result \|= ADVERTISE_1000HALF;
	321	if (ethadv & ADVERTISED_1000baseT_Full)
	322	result \|= ADVERTISE_1000FULL;
	323
	324	return result;
	325	}
	326
	327	/**
37f07023	328	* mii_ctrl1000_to_ethtool_adv_t
28011cf1 MC	329	* @adv: value of the MII_CTRL1000 register
	330	*
	331	* A small helper function that translates MII_CTRL1000
	332	* bits, when in 1000Base-T mode, to ethtool
	333	* advertisement settings.
	334	*/
37f07023	335	static inline u32 mii_ctrl1000_to_ethtool_adv_t(u32 adv)
28011cf1 MC	336	{
	337	u32 result = 0;
	338
	339	if (adv & ADVERTISE_1000HALF)
	340	result \|= ADVERTISED_1000baseT_Half;
	341	if (adv & ADVERTISE_1000FULL)
	342	result \|= ADVERTISED_1000baseT_Full;
	343
	344	return result;
	345	}
	346
37f07023 MC	347	/**
	348	* mii_lpa_to_ethtool_lpa_t
	349	* @adv: value of the MII_LPA register
	350	*
	351	* A small helper function that translates MII_LPA
	352	* bits, when in 1000Base-T mode, to ethtool
	353	* LP advertisement settings.
	354	*/
	355	static inline u32 mii_lpa_to_ethtool_lpa_t(u32 lpa)
	356	{
	357	u32 result = 0;
	358
	359	if (lpa & LPA_LPACK)
	360	result \|= ADVERTISED_Autoneg;
	361
	362	return result \| mii_adv_to_ethtool_adv_t(lpa);
	363	}
28011cf1 MC	364
28011cf1 MC	365	/**
37f07023	366	* mii_stat1000_to_ethtool_lpa_t
28011cf1 MC	367	* @adv: value of the MII_STAT1000 register
	368	*
	369	* A small helper function that translates MII_STAT1000
	370	* bits, when in 1000Base-T mode, to ethtool
	371	* advertisement settings.
	372	*/
37f07023	373	static inline u32 mii_stat1000_to_ethtool_lpa_t(u32 lpa)
28011cf1 MC	374	{
	375	u32 result = 0;
	376
	377	if (lpa & LPA_1000HALF)
	378	result \|= ADVERTISED_1000baseT_Half;
	379	if (lpa & LPA_1000FULL)
	380	result \|= ADVERTISED_1000baseT_Full;
	381
	382	return result;
	383	}
	384
	385	/**
37f07023	386	* ethtool_adv_to_mii_adv_x
28011cf1 MC	387	* @ethadv: the ethtool advertisement settings
	388	*
	389	* A small helper function that translates ethtool advertisement
	390	* settings to phy autonegotiation advertisements for the
	391	* MII_CTRL1000 register when in 1000Base-X mode.
	392	*/
37f07023	393	static inline u32 ethtool_adv_to_mii_adv_x(u32 ethadv)
28011cf1 MC	394	{
	395	u32 result = 0;
	396
	397	if (ethadv & ADVERTISED_1000baseT_Half)
	398	result \|= ADVERTISE_1000XHALF;
	399	if (ethadv & ADVERTISED_1000baseT_Full)
	400	result \|= ADVERTISE_1000XFULL;
	401	if (ethadv & ADVERTISED_Pause)
	402	result \|= ADVERTISE_1000XPAUSE;
	403	if (ethadv & ADVERTISED_Asym_Pause)
	404	result \|= ADVERTISE_1000XPSE_ASYM;
	405
	406	return result;
	407	}
	408
	409	/**
37f07023	410	* mii_adv_to_ethtool_adv_x
28011cf1 MC	411	* @adv: value of the MII_CTRL1000 register
	412	*
	413	* A small helper function that translates MII_CTRL1000
	414	* bits, when in 1000Base-X mode, to ethtool
	415	* advertisement settings.
	416	*/
37f07023	417	static inline u32 mii_adv_to_ethtool_adv_x(u32 adv)
28011cf1 MC	418	{
	419	u32 result = 0;
	420
	421	if (adv & ADVERTISE_1000XHALF)
	422	result \|= ADVERTISED_1000baseT_Half;
	423	if (adv & ADVERTISE_1000XFULL)
	424	result \|= ADVERTISED_1000baseT_Full;
	425	if (adv & ADVERTISE_1000XPAUSE)
	426	result \|= ADVERTISED_Pause;
	427	if (adv & ADVERTISE_1000XPSE_ASYM)
	428	result \|= ADVERTISED_Asym_Pause;
	429
	430	return result;
	431	}
	432
37f07023 MC	433	/**
	434	* mii_lpa_to_ethtool_lpa_x
	435	* @adv: value of the MII_LPA register
	436	*
	437	* A small helper function that translates MII_LPA
	438	* bits, when in 1000Base-X mode, to ethtool
	439	* LP advertisement settings.
	440	*/
	441	static inline u32 mii_lpa_to_ethtool_lpa_x(u32 lpa)
	442	{
	443	u32 result = 0;
	444
	445	if (lpa & LPA_LPACK)
	446	result \|= ADVERTISED_Autoneg;
	447
	448	return result \| mii_adv_to_ethtool_adv_x(lpa);
	449	}
	450
a8c30832 BH	451	/**
	452	* mii_advertise_flowctrl - get flow control advertisement flags
	453	* @cap: Flow control capabilities (FLOW_CTRL_RX, FLOW_CTRL_TX or both)
	454	*/
	455	static inline u16 mii_advertise_flowctrl(int cap)
	456	{
	457	u16 adv = 0;
	458
	459	if (cap & FLOW_CTRL_RX)
	460	adv = ADVERTISE_PAUSE_CAP \| ADVERTISE_PAUSE_ASYM;
	461	if (cap & FLOW_CTRL_TX)
	462	adv ^= ADVERTISE_PAUSE_ASYM;
	463
	464	return adv;
	465	}
	466
bc02ff95 SG	467	/**
	468	* mii_resolve_flowctrl_fdx
	469	* @lcladv: value of MII ADVERTISE register
	470	* @rmtadv: value of MII LPA register
	471	*
	472	* Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
	473	*/
	474	static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
	475	{
	476	u8 cap = 0;
	477
44c22ee9 BH	478	if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
	479	cap = FLOW_CTRL_TX \| FLOW_CTRL_RX;
	480	} else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
	481	if (lcladv & ADVERTISE_PAUSE_CAP)
	482	cap = FLOW_CTRL_RX;
	483	else if (rmtadv & ADVERTISE_PAUSE_CAP)
bc02ff95 SG	484	cap = FLOW_CTRL_TX;
	485	}
	486
	487	return cap;
	488	}
	489
c3ce7e20	490	#endif /* __KERNEL__ */
1da177e4	491	#endif /* __LINUX_MII_H__ */