Commit | Line | Data |
---|---|---|
8f3128e7 DM |
1 | #ifndef __LIS3LV02D_H_ |
2 | #define __LIS3LV02D_H_ | |
3 | ||
4 | struct lis3lv02d_platform_data { | |
5 | /* please note: the 'click' feature is only supported for | |
6 | * LIS[32]02DL variants of the chip and will be ignored for | |
7 | * others */ | |
8 | #define LIS3_CLICK_SINGLE_X (1 << 0) | |
9 | #define LIS3_CLICK_DOUBLE_X (1 << 1) | |
10 | #define LIS3_CLICK_SINGLE_Y (1 << 2) | |
11 | #define LIS3_CLICK_DOUBLE_Y (1 << 3) | |
12 | #define LIS3_CLICK_SINGLE_Z (1 << 4) | |
13 | #define LIS3_CLICK_DOUBLE_Z (1 << 5) | |
14 | unsigned char click_flags; | |
15 | unsigned char click_thresh_x; | |
16 | unsigned char click_thresh_y; | |
17 | unsigned char click_thresh_z; | |
18 | unsigned char click_time_limit; | |
19 | unsigned char click_latency; | |
20 | unsigned char click_window; | |
21 | ||
22 | #define LIS3_IRQ1_DISABLE (0 << 0) | |
23 | #define LIS3_IRQ1_FF_WU_1 (1 << 0) | |
24 | #define LIS3_IRQ1_FF_WU_2 (2 << 0) | |
25 | #define LIS3_IRQ1_FF_WU_12 (3 << 0) | |
26 | #define LIS3_IRQ1_DATA_READY (4 << 0) | |
27 | #define LIS3_IRQ1_CLICK (7 << 0) | |
6d94d408 | 28 | #define LIS3_IRQ1_MASK (7 << 0) |
8f3128e7 DM |
29 | #define LIS3_IRQ2_DISABLE (0 << 3) |
30 | #define LIS3_IRQ2_FF_WU_1 (1 << 3) | |
31 | #define LIS3_IRQ2_FF_WU_2 (2 << 3) | |
32 | #define LIS3_IRQ2_FF_WU_12 (3 << 3) | |
33 | #define LIS3_IRQ2_DATA_READY (4 << 3) | |
34 | #define LIS3_IRQ2_CLICK (7 << 3) | |
6d94d408 | 35 | #define LIS3_IRQ2_MASK (7 << 3) |
8f3128e7 | 36 | #define LIS3_IRQ_OPEN_DRAIN (1 << 6) |
0ec48915 | 37 | #define LIS3_IRQ_ACTIVE_LOW (1 << 7) |
8f3128e7 | 38 | unsigned char irq_cfg; |
8873c334 DM |
39 | |
40 | #define LIS3_WAKEUP_X_LO (1 << 0) | |
41 | #define LIS3_WAKEUP_X_HI (1 << 1) | |
42 | #define LIS3_WAKEUP_Y_LO (1 << 2) | |
43 | #define LIS3_WAKEUP_Y_HI (1 << 3) | |
44 | #define LIS3_WAKEUP_Z_LO (1 << 4) | |
45 | #define LIS3_WAKEUP_Z_HI (1 << 5) | |
46 | unsigned char wakeup_flags; | |
47 | unsigned char wakeup_thresh; | |
342c5f12 SO |
48 | unsigned char wakeup_flags2; |
49 | unsigned char wakeup_thresh2; | |
50 | #define LIS3_HIPASS_CUTFF_8HZ 0 | |
51 | #define LIS3_HIPASS_CUTFF_4HZ 1 | |
52 | #define LIS3_HIPASS_CUTFF_2HZ 2 | |
53 | #define LIS3_HIPASS_CUTFF_1HZ 3 | |
54 | #define LIS3_HIPASS1_DISABLE (1 << 2) | |
55 | #define LIS3_HIPASS2_DISABLE (1 << 3) | |
56 | unsigned char hipass_ctrl; | |
e40d6eaa SO |
57 | #define LIS3_NO_MAP 0 |
58 | #define LIS3_DEV_X 1 | |
59 | #define LIS3_DEV_Y 2 | |
60 | #define LIS3_DEV_Z 3 | |
61 | #define LIS3_INV_DEV_X -1 | |
62 | #define LIS3_INV_DEV_Y -2 | |
63 | #define LIS3_INV_DEV_Z -3 | |
64 | s8 axis_x; | |
65 | s8 axis_y; | |
66 | s8 axis_z; | |
67 | int (*setup_resources)(void); | |
68 | int (*release_resources)(void); | |
2db4a76d SO |
69 | /* Limits for selftest are specified in chip data sheet */ |
70 | s16 st_min_limits[3]; /* min pass limit x, y, z */ | |
71 | s16 st_max_limits[3]; /* max pass limit x, y, z */ | |
92ba4fe4 | 72 | int irq2; |
8f3128e7 DM |
73 | }; |
74 | ||
75 | #endif /* __LIS3LV02D_H_ */ |