[PATCH] libata: reimplement per-dev PM
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / include / linux / libata.h
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT
24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
41542dbe 33#include <asm/scatterlist.h>
1da177e4
LT
34#include <asm/io.h>
35#include <linux/ata.h>
36#include <linux/workqueue.h>
35bb94b1 37#include <scsi/scsi_host.h>
1da177e4
LT
38
39/*
bfd60579
RD
40 * compile-time options: to be removed as soon as all the drivers are
41 * converted to the new debugging mechanism
1da177e4
LT
42 */
43#undef ATA_DEBUG /* debugging output */
44#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
45#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
46#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT
47#undef ATA_ENABLE_PATA /* define to enable PATA support in some
48 * low-level drivers */
1da177e4
LT
49
50
51/* note: prints function name for you */
52#ifdef ATA_DEBUG
53#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
54#ifdef ATA_VERBOSE_DEBUG
55#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
56#else
57#define VPRINTK(fmt, args...)
58#endif /* ATA_VERBOSE_DEBUG */
59#else
60#define DPRINTK(fmt, args...)
61#define VPRINTK(fmt, args...)
62#endif /* ATA_DEBUG */
63
2c13b7ce
JG
64#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
65
bfd60579
RD
66/* NEW: debug levels */
67#define HAVE_LIBATA_MSG 1
68
69enum {
70 ATA_MSG_DRV = 0x0001,
71 ATA_MSG_INFO = 0x0002,
72 ATA_MSG_PROBE = 0x0004,
73 ATA_MSG_WARN = 0x0008,
74 ATA_MSG_MALLOC = 0x0010,
75 ATA_MSG_CTL = 0x0020,
76 ATA_MSG_INTR = 0x0040,
77 ATA_MSG_ERR = 0x0080,
78};
79
80#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
81#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
82#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
83#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
84#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
85#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
86#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
87#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
88
89static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
90{
91 if (dval < 0 || dval >= (sizeof(u32) * 8))
92 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
93 if (!dval)
94 return 0;
95 return (1 << dval) - 1;
96}
97
1da177e4
LT
98/* defines only for the constants which don't work well as enums */
99#define ATA_TAG_POISON 0xfafbfcfdU
100
101/* move to PCI layer? */
102static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
103{
104 return &pdev->dev;
105}
106
107enum {
108 /* various global constants */
109 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
110 ATA_MAX_PORTS = 8,
111 ATA_DEF_QUEUE = 1,
2ab7db1f 112 /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */
a6e6ce8e 113 ATA_MAX_QUEUE = 32,
2ab7db1f 114 ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1,
1da177e4 115 ATA_MAX_SECTORS = 200, /* FIXME */
200d5a76 116 ATA_MAX_SECTORS_LBA48 = 65535,
1da177e4
LT
117 ATA_MAX_BUS = 2,
118 ATA_DEF_BUSY_WAIT = 10000,
119 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
120
121 ATA_SHT_EMULATED = 1,
122 ATA_SHT_CMD_PER_LUN = 1,
123 ATA_SHT_THIS_ID = -1,
cf482935 124 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT
125
126 /* struct ata_device stuff */
949b38af
TH
127 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */
128 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */
029f5468 129 ATA_DFLAG_CDB_INTR = (1 << 2), /* device asserts INTRQ when ready for CDB */
88e49034 130 ATA_DFLAG_NCQ = (1 << 3), /* device supports NCQ */
ea1dd4e1 131 ATA_DFLAG_CFG_MASK = (1 << 8) - 1,
949b38af
TH
132
133 ATA_DFLAG_PIO = (1 << 8), /* device currently in PIO mode */
02670bf3 134 ATA_DFLAG_SUSPENDED = (1 << 9), /* device suspended */
72fa4b74 135 ATA_DFLAG_INIT_MASK = (1 << 16) - 1,
1da177e4 136
abdda733
TH
137 ATA_DFLAG_DETACH = (1 << 16),
138 ATA_DFLAG_DETACHED = (1 << 17),
139
1da177e4
LT
140 ATA_DEV_UNKNOWN = 0, /* unknown device */
141 ATA_DEV_ATA = 1, /* ATA device */
142 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
143 ATA_DEV_ATAPI = 3, /* ATAPI device */
144 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
145 ATA_DEV_NONE = 5, /* no device */
146
147 /* struct ata_port flags */
949b38af 148 ATA_FLAG_SLAVE_POSS = (1 << 0), /* host supports slave dev */
1da177e4 149 /* (doesn't imply presence) */
949b38af
TH
150 ATA_FLAG_SATA = (1 << 1),
151 ATA_FLAG_NO_LEGACY = (1 << 2), /* no legacy mode check */
152 ATA_FLAG_MMIO = (1 << 3), /* use MMIO, not PIO */
153 ATA_FLAG_SRST = (1 << 4), /* (obsolete) use ATA SRST, not E.D.D. */
154 ATA_FLAG_SATA_RESET = (1 << 5), /* (obsolete) use COMRESET */
155 ATA_FLAG_NO_ATAPI = (1 << 6), /* No ATAPI support */
156 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */
157 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */
7395acb2
TH
158 ATA_FLAG_PIO_POLLING = (1 << 9), /* use polling PIO if LLD
159 * doesn't handle PIO interrupts */
160 ATA_FLAG_NCQ = (1 << 10), /* host supports NCQ */
abdda733
TH
161 ATA_FLAG_HRST_TO_RESUME = (1 << 11), /* hardreset to resume phy */
162 ATA_FLAG_SKIP_D2H_BSY = (1 << 12), /* can't wait for the first D2H
163 * Register FIS clearing BSY */
7395acb2 164 ATA_FLAG_DEBUGMSG = (1 << 13),
949b38af 165
b51e9e5d
TH
166 /* The following flag belongs to ap->pflags but is kept in
167 * ap->flags because it's referenced in many LLDs and will be
168 * removed in not-too-distant future.
169 */
170 ATA_FLAG_DISABLED = (1 << 23), /* port is disabled, ignore it */
171
172 /* bits 24:31 of ap->flags are reserved for LLD specific flags */
9ec957f2 173
b51e9e5d
TH
174 /* struct ata_port pflags */
175 ATA_PFLAG_EH_PENDING = (1 << 0), /* EH pending */
176 ATA_PFLAG_EH_IN_PROGRESS = (1 << 1), /* EH in progress */
177 ATA_PFLAG_FROZEN = (1 << 2), /* port is frozen */
178 ATA_PFLAG_RECOVERED = (1 << 3), /* recovery action performed */
179 ATA_PFLAG_LOADING = (1 << 4), /* boot/loading probe */
180 ATA_PFLAG_UNLOADING = (1 << 5), /* module is unloading */
181 ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), /* SCSI hotplug scheduled */
949b38af 182
b51e9e5d
TH
183 ATA_PFLAG_FLUSH_PORT_TASK = (1 << 16), /* flush port task */
184 ATA_PFLAG_SUSPENDED = (1 << 17), /* port is suspended (power) */
949b38af
TH
185
186 /* struct ata_queued_cmd flags */
187 ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */
188 ATA_QCFLAG_SG = (1 << 1), /* have s/g table? */
189 ATA_QCFLAG_SINGLE = (1 << 2), /* no s/g, just a single buffer */
1da177e4 190 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
27197367 191 ATA_QCFLAG_IO = (1 << 3), /* standard IO command */
e61e0672
TH
192 ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */
193
9ec957f2
TH
194 ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */
195 ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */
196 ATA_QCFLAG_EH_SCHEDULED = (1 << 18), /* EH scheduled (obsolete) */
1da177e4 197
4e5ec5db
AC
198 /* host set flags */
199 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */
200
1da177e4 201 /* various lengths of time */
8d238e01
AC
202 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
203 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
a2a7a662
TH
204 ATA_TMOUT_INTERNAL = 30 * HZ,
205 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT
206
207 /* ATA bus states */
208 BUS_UNKNOWN = 0,
209 BUS_DMA = 1,
210 BUS_IDLE = 2,
211 BUS_NOINTR = 3,
212 BUS_NODATA = 4,
213 BUS_TIMER = 5,
214 BUS_PIO = 6,
215 BUS_EDD = 7,
216 BUS_IDENTIFY = 8,
217 BUS_PACKET = 9,
218
219 /* SATA port states */
220 PORT_UNKNOWN = 0,
221 PORT_ENABLED = 1,
222 PORT_DISABLED = 2,
223
224 /* encoding various smaller bitmaps into a single
1da7b0d0 225 * unsigned int bitmap
1da177e4 226 */
1da7b0d0
TH
227 ATA_BITS_PIO = 5,
228 ATA_BITS_MWDMA = 3,
229 ATA_BITS_UDMA = 8,
230
231 ATA_SHIFT_PIO = 0,
232 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO,
233 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA,
234
235 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO,
236 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA,
237 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA,
cedc9a47
JG
238
239 /* size of buffer to pad xfers ending on unaligned boundaries */
240 ATA_DMA_PAD_SZ = 4,
241 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
949b38af
TH
242
243 /* masks for port functions */
47a86593
AC
244 ATA_PORT_PRIMARY = (1 << 0),
245 ATA_PORT_SECONDARY = (1 << 1),
14d2bac1 246
0c247c55
TH
247 /* ering size */
248 ATA_ERING_SIZE = 32,
249
f3e81b19
TH
250 /* desc_len for ata_eh_info and context */
251 ATA_EH_DESC_LEN = 80,
252
9be1e979
TH
253 /* reset / recovery action types */
254 ATA_EH_REVALIDATE = (1 << 0),
255 ATA_EH_SOFTRESET = (1 << 1),
256 ATA_EH_HARDRESET = (1 << 2),
02670bf3
TH
257 ATA_EH_SUSPEND = (1 << 3),
258 ATA_EH_RESUME = (1 << 4),
259 ATA_EH_PM_FREEZE = (1 << 5),
9be1e979
TH
260
261 ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET,
02670bf3
TH
262 ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE | ATA_EH_SUSPEND |
263 ATA_EH_RESUME | ATA_EH_PM_FREEZE,
9be1e979 264
f3e81b19 265 /* ata_eh_info->flags */
abdda733 266 ATA_EHI_HOTPLUGGED = (1 << 0), /* could have been hotplugged */
28324304 267 ATA_EHI_RESUME_LINK = (1 << 1), /* need to resume link */
1cdaf534
TH
268 ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */
269 ATA_EHI_QUIET = (1 << 3), /* be quiet */
abdda733
TH
270
271 ATA_EHI_DID_RESET = (1 << 16), /* already reset this port */
f3e81b19 272
ad9e2762
TH
273 /* max repeat if error condition is still set after ->error_handler */
274 ATA_EH_MAX_REPEAT = 5,
275
14d2bac1
TH
276 /* how hard are we gonna try to probe/recover devices */
277 ATA_PROBE_MAX_TRIES = 3,
022bdb07
TH
278 ATA_EH_RESET_TRIES = 3,
279 ATA_EH_DEV_TRIES = 3,
f5914a46
TH
280
281 /* Drive spinup time (time from power-on to the first D2H FIS)
282 * in msecs - 8s currently. Failing to get ready in this time
283 * isn't critical. It will result in reset failure for
284 * controllers which can't wait for the first D2H FIS. libata
285 * will retry, so it just has to be long enough to spin up
286 * most devices.
287 */
288 ATA_SPINUP_WAIT = 8000,
1da177e4
LT
289};
290
14be71f4 291enum hsm_task_states {
c56b14d2
AL
292 HSM_ST_UNKNOWN, /* state unknown */
293 HSM_ST_IDLE, /* no command on going */
c56b14d2
AL
294 HSM_ST, /* (waiting the device to) transfer data */
295 HSM_ST_LAST, /* (waiting the device to) complete command */
c56b14d2
AL
296 HSM_ST_ERR, /* error */
297 HSM_ST_FIRST, /* (waiting the device to)
298 write CDB or first data block */
1da177e4
LT
299};
300
a7dac447 301enum ata_completion_errors {
11a56d24
TH
302 AC_ERR_DEV = (1 << 0), /* device reported error */
303 AC_ERR_HSM = (1 << 1), /* host state machine violation */
304 AC_ERR_TIMEOUT = (1 << 2), /* timeout */
305 AC_ERR_MEDIA = (1 << 3), /* media error */
306 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */
307 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */
308 AC_ERR_SYSTEM = (1 << 6), /* system error */
309 AC_ERR_INVALID = (1 << 7), /* invalid argument */
310 AC_ERR_OTHER = (1 << 8), /* unknown */
a7dac447
JG
311};
312
1da177e4
LT
313/* forward declarations */
314struct scsi_device;
315struct ata_port_operations;
316struct ata_port;
317struct ata_queued_cmd;
318
319/* typedefs */
77853bf2 320typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
f5914a46
TH
321typedef int (*ata_prereset_fn_t)(struct ata_port *ap);
322typedef int (*ata_reset_fn_t)(struct ata_port *ap, unsigned int *classes);
323typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *classes);
1da177e4
LT
324
325struct ata_ioports {
326 unsigned long cmd_addr;
327 unsigned long data_addr;
328 unsigned long error_addr;
329 unsigned long feature_addr;
330 unsigned long nsect_addr;
331 unsigned long lbal_addr;
332 unsigned long lbam_addr;
333 unsigned long lbah_addr;
334 unsigned long device_addr;
335 unsigned long status_addr;
336 unsigned long command_addr;
337 unsigned long altstatus_addr;
338 unsigned long ctl_addr;
339 unsigned long bmdma_addr;
340 unsigned long scr_addr;
341};
342
343struct ata_probe_ent {
344 struct list_head node;
345 struct device *dev;
057ace5e 346 const struct ata_port_operations *port_ops;
193515d5 347 struct scsi_host_template *sht;
1da177e4
LT
348 struct ata_ioports port[ATA_MAX_PORTS];
349 unsigned int n_ports;
350 unsigned int hard_port_no;
351 unsigned int pio_mask;
352 unsigned int mwdma_mask;
353 unsigned int udma_mask;
354 unsigned int legacy_mode;
355 unsigned long irq;
356 unsigned int irq_flags;
357 unsigned long host_flags;
4e5ec5db 358 unsigned long host_set_flags;
1da177e4
LT
359 void __iomem *mmio_base;
360 void *private_data;
361};
362
363struct ata_host_set {
364 spinlock_t lock;
365 struct device *dev;
366 unsigned long irq;
367 void __iomem *mmio_base;
368 unsigned int n_ports;
369 void *private_data;
057ace5e 370 const struct ata_port_operations *ops;
5444a6f4
AC
371 unsigned long flags;
372 int simplex_claimed; /* Keep seperate in case we
373 ever need to do this locked */
f0eb62b8
TH
374 struct ata_host_set *next; /* for legacy mode */
375 struct ata_port *ports[0];
1da177e4
LT
376};
377
378struct ata_queued_cmd {
379 struct ata_port *ap;
380 struct ata_device *dev;
381
382 struct scsi_cmnd *scsicmd;
383 void (*scsidone)(struct scsi_cmnd *);
384
385 struct ata_taskfile tf;
386 u8 cdb[ATAPI_CDB_LEN];
387
388 unsigned long flags; /* ATA_QCFLAG_xxx */
389 unsigned int tag;
390 unsigned int n_elem;
cedc9a47 391 unsigned int orig_n_elem;
1da177e4
LT
392
393 int dma_dir;
394
cedc9a47
JG
395 unsigned int pad_len;
396
1da177e4
LT
397 unsigned int nsect;
398 unsigned int cursect;
399
400 unsigned int nbytes;
401 unsigned int curbytes;
402
403 unsigned int cursg;
404 unsigned int cursg_ofs;
405
406 struct scatterlist sgent;
cedc9a47 407 struct scatterlist pad_sgent;
1da177e4
LT
408 void *buf_virt;
409
cedc9a47
JG
410 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
411 struct scatterlist *__sg;
1da177e4 412
a22e2eb0 413 unsigned int err_mask;
e61e0672 414 struct ata_taskfile result_tf;
1da177e4
LT
415 ata_qc_cb_t complete_fn;
416
1da177e4
LT
417 void *private_data;
418};
419
420struct ata_host_stats {
421 unsigned long unhandled_irq;
422 unsigned long idle_irq;
423 unsigned long rw_reqbuf;
424};
425
0c247c55
TH
426struct ata_ering_entry {
427 int is_io;
428 unsigned int err_mask;
429 u64 timestamp;
430};
431
432struct ata_ering {
433 int cursor;
434 struct ata_ering_entry ring[ATA_ERING_SIZE];
435};
436
1da177e4 437struct ata_device {
38d87234 438 struct ata_port *ap;
72fa4b74 439 unsigned int devno; /* 0 or 1 */
1da177e4 440 unsigned long flags; /* ATA_DFLAG_xxx */
3edebac4 441 struct scsi_device *sdev; /* attached SCSI device */
72fa4b74
TH
442 /* n_sector is used as CLEAR_OFFSET, read comment above CLEAR_OFFSET */
443 u64 n_sectors; /* size of device, if ATA */
1da177e4 444 unsigned int class; /* ATA_DEV_xxx */
fe635c7e 445 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
1da177e4
LT
446 u8 pio_mode;
447 u8 dma_mode;
448 u8 xfer_mode;
449 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
450
8cbd6df1
AL
451 unsigned int multi_count; /* sectors count for
452 READ/WRITE MULTIPLE */
b00eec1d 453 unsigned int max_sectors; /* per-device max sectors */
6e7846e9 454 unsigned int cdb_len;
8bf62ece 455
acf356b1
TH
456 /* per-dev xfer mask */
457 unsigned int pio_mask;
458 unsigned int mwdma_mask;
459 unsigned int udma_mask;
460
8bf62ece
AL
461 /* for CHS addressing */
462 u16 cylinders; /* Number of cylinders */
463 u16 heads; /* Number of heads */
464 u16 sectors; /* Number of sectors per track */
0c247c55
TH
465
466 /* error history */
467 struct ata_ering ering;
1da177e4
LT
468};
469
72fa4b74
TH
470/* Offset into struct ata_device. Fields above it are maintained
471 * acress device init. Fields below are zeroed.
472 */
473#define ATA_DEVICE_CLEAR_OFFSET offsetof(struct ata_device, n_sectors)
474
f3e81b19
TH
475struct ata_eh_info {
476 struct ata_device *dev; /* offending device */
477 u32 serror; /* SError from LLDD */
478 unsigned int err_mask; /* port-wide err_mask */
479 unsigned int action; /* ATA_EH_* action mask */
47005f25 480 unsigned int dev_action[ATA_MAX_DEVICES]; /* dev EH action */
f3e81b19 481 unsigned int flags; /* ATA_EHI_* flags */
abdda733
TH
482
483 unsigned long hotplug_timestamp;
484 unsigned int probe_mask;
485
f3e81b19
TH
486 char desc[ATA_EH_DESC_LEN];
487 int desc_len;
488};
489
490struct ata_eh_context {
491 struct ata_eh_info i;
492 int tries[ATA_MAX_DEVICES];
abdda733
TH
493 unsigned int classes[ATA_MAX_DEVICES];
494 unsigned int did_probe_mask;
f3e81b19
TH
495};
496
1da177e4
LT
497struct ata_port {
498 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 499 const struct ata_port_operations *ops;
ba6a1308 500 spinlock_t *lock;
1da177e4 501 unsigned long flags; /* ATA_FLAG_xxx */
b51e9e5d 502 unsigned int pflags; /* ATA_PFLAG_xxx */
1da177e4
LT
503 unsigned int id; /* unique id req'd by scsi midlyr */
504 unsigned int port_no; /* unique port #; from zero */
505 unsigned int hard_port_no; /* hardware port #; from zero */
506
507 struct ata_prd *prd; /* our SG list */
508 dma_addr_t prd_dma; /* and its DMA mapping */
509
cedc9a47
JG
510 void *pad; /* array of DMA pad buffers */
511 dma_addr_t pad_dma;
512
1da177e4
LT
513 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
514
515 u8 ctl; /* cache of ATA control register */
516 u8 last_ctl; /* Cache last written value */
1da177e4
LT
517 unsigned int pio_mask;
518 unsigned int mwdma_mask;
519 unsigned int udma_mask;
520 unsigned int cbl; /* cable type; ATA_CBL_xxx */
5a04bf4b 521 unsigned int hw_sata_spd_limit;
1c3fae4d 522 unsigned int sata_spd_limit; /* SATA PHY speed limit */
1da177e4 523
f3e81b19
TH
524 /* record runtime error info, protected by host_set lock */
525 struct ata_eh_info eh_info;
526 /* EH context owned by EH */
527 struct ata_eh_context eh_context;
528
1da177e4
LT
529 struct ata_device device[ATA_MAX_DEVICES];
530
531 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
6cec4a39 532 unsigned long qc_allocated;
dedaf2b0
TH
533 unsigned int qc_active;
534
1da177e4 535 unsigned int active_tag;
dedaf2b0 536 u32 sactive;
1da177e4
LT
537
538 struct ata_host_stats stats;
539 struct ata_host_set *host_set;
2f1f610b 540 struct device *dev;
1da177e4 541
9a9c77dc
TH
542 struct work_struct port_task;
543 struct work_struct hotplug_task;
3b01b8af 544 struct work_struct scsi_rescan_task;
86e45b6b 545
14be71f4 546 unsigned int hsm_task_state;
1da177e4 547
bfd60579 548 u32 msg_enable;
a72ec4ce 549 struct list_head eh_done_q;
c6cf9e99 550 wait_queue_head_t eh_wait_q;
bfd60579 551
1da177e4 552 void *private_data;
fe635c7e
TH
553
554 u8 sector_buf[ATA_SECT_SIZE]; /* owned by EH */
1da177e4
LT
555};
556
557struct ata_port_operations {
558 void (*port_disable) (struct ata_port *);
559
560 void (*dev_config) (struct ata_port *, struct ata_device *);
561
562 void (*set_piomode) (struct ata_port *, struct ata_device *);
563 void (*set_dmamode) (struct ata_port *, struct ata_device *);
5444a6f4 564 unsigned long (*mode_filter) (const struct ata_port *, struct ata_device *, unsigned long);
1da177e4 565
057ace5e 566 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
567 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
568
057ace5e 569 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
570 u8 (*check_status)(struct ata_port *ap);
571 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT
572 void (*dev_select)(struct ata_port *ap, unsigned int device);
573
c19ba8af 574 void (*phy_reset) (struct ata_port *ap); /* obsolete */
e35a9e01 575 void (*set_mode) (struct ata_port *ap);
c19ba8af 576
1da177e4
LT
577 void (*post_set_mode) (struct ata_port *ap);
578
579 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
580
581 void (*bmdma_setup) (struct ata_queued_cmd *qc);
582 void (*bmdma_start) (struct ata_queued_cmd *qc);
583
a6b2c5d4
AC
584 void (*data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
585
1da177e4 586 void (*qc_prep) (struct ata_queued_cmd *qc);
9a3d9eb0 587 unsigned int (*qc_issue) (struct ata_queued_cmd *qc);
1da177e4 588
9ec957f2
TH
589 /* Error handlers. ->error_handler overrides ->eng_timeout and
590 * indicates that new-style EH is in place.
591 */
592 void (*eng_timeout) (struct ata_port *ap); /* obsolete */
593
594 void (*freeze) (struct ata_port *ap);
595 void (*thaw) (struct ata_port *ap);
596 void (*error_handler) (struct ata_port *ap);
597 void (*post_internal_cmd) (struct ata_queued_cmd *qc);
1da177e4
LT
598
599 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
600 void (*irq_clear) (struct ata_port *);
601
602 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
603 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
604 u32 val);
605
606 int (*port_start) (struct ata_port *ap);
607 void (*port_stop) (struct ata_port *ap);
608
609 void (*host_stop) (struct ata_host_set *host_set);
610
b73fc89f 611 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT
612 u8 (*bmdma_status) (struct ata_port *ap);
613};
614
615struct ata_port_info {
d0be4a7d 616 struct scsi_host_template *sht;
1da177e4
LT
617 unsigned long host_flags;
618 unsigned long pio_mask;
619 unsigned long mwdma_mask;
620 unsigned long udma_mask;
057ace5e 621 const struct ata_port_operations *port_ops;
e99f8b5e 622 void *private_data;
1da177e4
LT
623};
624
452503f9
AC
625struct ata_timing {
626 unsigned short mode; /* ATA mode */
627 unsigned short setup; /* t1 */
628 unsigned short act8b; /* t2 for 8-bit I/O */
629 unsigned short rec8b; /* t2i for 8-bit I/O */
630 unsigned short cyc8b; /* t0 for 8-bit I/O */
631 unsigned short active; /* t2 or tD */
632 unsigned short recover; /* t2i or tK */
633 unsigned short cycle; /* t0 */
634 unsigned short udma; /* t2CYCTYP/2 */
635};
636
637#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4 638
e9c83914
TH
639extern const unsigned long sata_deb_timing_normal[];
640extern const unsigned long sata_deb_timing_hotplug[];
641extern const unsigned long sata_deb_timing_long[];
642
643static inline const unsigned long *
644sata_ehc_deb_timing(struct ata_eh_context *ehc)
645{
646 if (ehc->i.flags & ATA_EHI_HOTPLUGGED)
647 return sata_deb_timing_hotplug;
648 else
649 return sata_deb_timing_normal;
650}
d7bb4cc7 651
1da177e4
LT
652extern void ata_port_probe(struct ata_port *);
653extern void __sata_phy_reset(struct ata_port *ap);
654extern void sata_phy_reset(struct ata_port *ap);
655extern void ata_bus_reset(struct ata_port *ap);
3c567b7d 656extern int sata_set_spd(struct ata_port *ap);
d7bb4cc7
TH
657extern int sata_phy_debounce(struct ata_port *ap, const unsigned long *param);
658extern int sata_phy_resume(struct ata_port *ap, const unsigned long *param);
f5914a46 659extern int ata_std_prereset(struct ata_port *ap);
2bf2cb26
TH
660extern int ata_std_softreset(struct ata_port *ap, unsigned int *classes);
661extern int sata_std_hardreset(struct ata_port *ap, unsigned int *class);
c2bd5804 662extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes);
3373efd8 663extern int ata_dev_revalidate(struct ata_device *dev, int post_reset);
1da177e4
LT
664extern void ata_port_disable(struct ata_port *);
665extern void ata_std_ports(struct ata_ioports *ioaddr);
666#ifdef CONFIG_PCI
667extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
668 unsigned int n_ports);
669extern void ata_pci_remove_one (struct pci_dev *pdev);
9b847548
JA
670extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
671extern int ata_pci_device_resume(struct pci_dev *pdev);
17bb34a3 672extern int ata_pci_clear_simplex(struct pci_dev *pdev);
1da177e4 673#endif /* CONFIG_PCI */
057ace5e 674extern int ata_device_add(const struct ata_probe_ent *ent);
720ba126 675extern void ata_port_detach(struct ata_port *ap);
17b14451 676extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 677extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT
678extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
679extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
1da177e4
LT
680extern int ata_scsi_release(struct Scsi_Host *host);
681extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
34bf2170
TH
682extern int sata_scr_valid(struct ata_port *ap);
683extern int sata_scr_read(struct ata_port *ap, int reg, u32 *val);
684extern int sata_scr_write(struct ata_port *ap, int reg, u32 val);
685extern int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val);
686extern int ata_port_online(struct ata_port *ap);
687extern int ata_port_offline(struct ata_port *ap);
9b847548 688extern int ata_scsi_device_resume(struct scsi_device *);
082776e4 689extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state);
67846b30 690extern int ata_ratelimit(void);
6f8b9958
TH
691extern unsigned int ata_busy_sleep(struct ata_port *ap,
692 unsigned long timeout_pat,
693 unsigned long timeout);
86e45b6b
TH
694extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *),
695 void *data, unsigned long delay);
c22daff4
TH
696extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
697 unsigned long interval_msec,
698 unsigned long timeout_msec);
67846b30 699
1da177e4
LT
700/*
701 * Default driver ops implementations
702 */
057ace5e 703extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 704extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG
705extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
706extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT
707extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
708extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
709extern u8 ata_check_status(struct ata_port *ap);
710extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 711extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT
712extern int ata_port_start (struct ata_port *ap);
713extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 714extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4 715extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
a6b2c5d4
AC
716extern void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
717 unsigned int buflen, int write_data);
718extern void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
719 unsigned int buflen, int write_data);
75e99585
AC
720extern void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
721 unsigned int buflen, int write_data);
1da177e4 722extern void ata_qc_prep(struct ata_queued_cmd *qc);
e46834cd 723extern void ata_noop_qc_prep(struct ata_queued_cmd *qc);
9a3d9eb0 724extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
1da177e4
LT
725extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
726 unsigned int buflen);
727extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
728 unsigned int n_elem);
057ace5e 729extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
6a62a04d
TH
730extern void ata_id_string(const u16 *id, unsigned char *s,
731 unsigned int ofs, unsigned int len);
732extern void ata_id_c_string(const u16 *id, unsigned char *s,
733 unsigned int ofs, unsigned int len);
1da177e4
LT
734extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
735extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 736extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT
737extern u8 ata_bmdma_status(struct ata_port *ap);
738extern void ata_bmdma_irq_clear(struct ata_port *ap);
6d97dbd7
TH
739extern void ata_bmdma_freeze(struct ata_port *ap);
740extern void ata_bmdma_thaw(struct ata_port *ap);
f5914a46 741extern void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
6d97dbd7
TH
742 ata_reset_fn_t softreset,
743 ata_reset_fn_t hardreset,
744 ata_postreset_fn_t postreset);
745extern void ata_bmdma_error_handler(struct ata_port *ap);
746extern void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc);
9a1004d0
TH
747extern int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
748 u8 status, int in_wq);
f686bcb8 749extern void ata_qc_complete(struct ata_queued_cmd *qc);
dedaf2b0
TH
750extern int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
751 void (*finish_qc)(struct ata_queued_cmd *));
3373efd8 752extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd,
1da177e4
LT
753 void (*done)(struct scsi_cmnd *));
754extern int ata_std_bios_param(struct scsi_device *sdev,
755 struct block_device *bdev,
756 sector_t capacity, int geom[]);
757extern int ata_scsi_slave_config(struct scsi_device *sdev);
83c47bcb 758extern void ata_scsi_slave_destroy(struct scsi_device *sdev);
a6e6ce8e
TH
759extern int ata_scsi_change_queue_depth(struct scsi_device *sdev,
760 int queue_depth);
3373efd8 761extern struct ata_device *ata_dev_pair(struct ata_device *adev);
1da177e4 762
452503f9
AC
763/*
764 * Timing helpers
765 */
1bc4ccff
AC
766
767extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC
768extern int ata_timing_compute(struct ata_device *, unsigned short,
769 struct ata_timing *, int, int);
770extern void ata_timing_merge(const struct ata_timing *,
771 const struct ata_timing *, struct ata_timing *,
772 unsigned int);
773
774enum {
775 ATA_TIMING_SETUP = (1 << 0),
776 ATA_TIMING_ACT8B = (1 << 1),
777 ATA_TIMING_REC8B = (1 << 2),
778 ATA_TIMING_CYC8B = (1 << 3),
779 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
780 ATA_TIMING_CYC8B,
781 ATA_TIMING_ACTIVE = (1 << 4),
782 ATA_TIMING_RECOVER = (1 << 5),
783 ATA_TIMING_CYCLE = (1 << 6),
784 ATA_TIMING_UDMA = (1 << 7),
785 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
786 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
787 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
788 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
789};
790
1da177e4
LT
791
792#ifdef CONFIG_PCI
793struct pci_bits {
794 unsigned int reg; /* PCI config register to read */
795 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
796 unsigned long mask;
797 unsigned long val;
798};
799
374b1873 800extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 801extern struct ata_probe_ent *
47a86593 802ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 803extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
17bb34a3 804extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long);
1da177e4
LT
805#endif /* CONFIG_PCI */
806
ece1d636
TH
807/*
808 * EH
809 */
ece1d636 810extern void ata_eng_timeout(struct ata_port *ap);
7b70fc03
TH
811
812extern void ata_port_schedule_eh(struct ata_port *ap);
813extern int ata_port_abort(struct ata_port *ap);
e3180499
TH
814extern int ata_port_freeze(struct ata_port *ap);
815
816extern void ata_eh_freeze_port(struct ata_port *ap);
817extern void ata_eh_thaw_port(struct ata_port *ap);
7b70fc03 818
ece1d636
TH
819extern void ata_eh_qc_complete(struct ata_queued_cmd *qc);
820extern void ata_eh_qc_retry(struct ata_queued_cmd *qc);
821
f5914a46
TH
822extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
823 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
824 ata_postreset_fn_t postreset);
022bdb07 825
61440db6
TH
826/*
827 * printk helpers
828 */
829#define ata_port_printk(ap, lv, fmt, args...) \
830 printk(lv"ata%u: "fmt, (ap)->id , ##args)
831
832#define ata_dev_printk(dev, lv, fmt, args...) \
833 printk(lv"ata%u.%02u: "fmt, (dev)->ap->id, (dev)->devno , ##args)
1da177e4 834
f3e81b19
TH
835/*
836 * ata_eh_info helpers
837 */
838#define ata_ehi_push_desc(ehi, fmt, args...) do { \
839 (ehi)->desc_len += scnprintf((ehi)->desc + (ehi)->desc_len, \
840 ATA_EH_DESC_LEN - (ehi)->desc_len, \
841 fmt , ##args); \
842} while (0)
843
844#define ata_ehi_clear_desc(ehi) do { \
845 (ehi)->desc[0] = '\0'; \
846 (ehi)->desc_len = 0; \
847} while (0)
848
c0b6c037 849static inline void __ata_ehi_hotplugged(struct ata_eh_info *ehi)
084fe639
TH
850{
851 if (ehi->flags & ATA_EHI_HOTPLUGGED)
852 return;
853
28324304 854 ehi->flags |= ATA_EHI_HOTPLUGGED | ATA_EHI_RESUME_LINK;
084fe639
TH
855 ehi->hotplug_timestamp = jiffies;
856
084fe639
TH
857 ehi->action |= ATA_EH_SOFTRESET;
858 ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1;
859}
860
c0b6c037
TH
861static inline void ata_ehi_hotplugged(struct ata_eh_info *ehi)
862{
863 __ata_ehi_hotplugged(ehi);
864 ehi->err_mask |= AC_ERR_ATA_BUS;
865}
866
61440db6
TH
867/*
868 * qc helpers
869 */
972c26bd
JG
870static inline int
871ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
872{
873 if (sg == &qc->pad_sgent)
874 return 1;
875 if (qc->pad_len)
876 return 0;
877 if (((sg - qc->__sg) + 1) == qc->n_elem)
878 return 1;
879 return 0;
880}
881
cc1887f3
TH
882static inline struct scatterlist *
883ata_qc_first_sg(struct ata_queued_cmd *qc)
884{
885 if (qc->n_elem)
886 return qc->__sg;
887 if (qc->pad_len)
888 return &qc->pad_sgent;
889 return NULL;
890}
891
cedc9a47
JG
892static inline struct scatterlist *
893ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
894{
895 if (sg == &qc->pad_sgent)
896 return NULL;
897 if (++sg - qc->__sg < qc->n_elem)
898 return sg;
cc1887f3
TH
899 if (qc->pad_len)
900 return &qc->pad_sgent;
901 return NULL;
cedc9a47
JG
902}
903
904#define ata_for_each_sg(sg, qc) \
cc1887f3 905 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc))
cedc9a47 906
1da177e4
LT
907static inline unsigned int ata_tag_valid(unsigned int tag)
908{
909 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
910}
911
2ab7db1f
TH
912static inline unsigned int ata_tag_internal(unsigned int tag)
913{
914 return tag == ATA_MAX_QUEUE - 1;
915}
916
5806db22
TH
917/*
918 * device helpers
919 */
e1211e3f 920static inline unsigned int ata_class_enabled(unsigned int class)
597afd21
TH
921{
922 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
923}
924
e1211e3f 925static inline unsigned int ata_class_disabled(unsigned int class)
1da177e4 926{
e1211e3f
TH
927 return class == ATA_DEV_ATA_UNSUP || class == ATA_DEV_ATAPI_UNSUP;
928}
929
002c8054
TH
930static inline unsigned int ata_class_absent(unsigned int class)
931{
932 return !ata_class_enabled(class) && !ata_class_disabled(class);
933}
934
e1211e3f
TH
935static inline unsigned int ata_dev_enabled(const struct ata_device *dev)
936{
937 return ata_class_enabled(dev->class);
938}
939
940static inline unsigned int ata_dev_disabled(const struct ata_device *dev)
941{
942 return ata_class_disabled(dev->class);
1da177e4
LT
943}
944
002c8054
TH
945static inline unsigned int ata_dev_absent(const struct ata_device *dev)
946{
947 return ata_class_absent(dev->class);
948}
949
02670bf3
TH
950static inline unsigned int ata_dev_ready(const struct ata_device *dev)
951{
952 return ata_dev_enabled(dev) && !(dev->flags & ATA_DFLAG_SUSPENDED);
953}
954
5806db22
TH
955/*
956 * port helpers
957 */
958static inline int ata_port_max_devices(const struct ata_port *ap)
959{
960 if (ap->flags & ATA_FLAG_SLAVE_POSS)
961 return 2;
962 return 1;
963}
964
965
1da177e4
LT
966static inline u8 ata_chk_status(struct ata_port *ap)
967{
968 return ap->ops->check_status(ap);
969}
970
0baab86b
EF
971
972/**
973 * ata_pause - Flush writes and pause 400 nanoseconds.
974 * @ap: Port to wait for.
975 *
976 * LOCKING:
977 * Inherited from caller.
978 */
979
1da177e4
LT
980static inline void ata_pause(struct ata_port *ap)
981{
982 ata_altstatus(ap);
983 ndelay(400);
984}
985
0baab86b
EF
986
987/**
988 * ata_busy_wait - Wait for a port status register
989 * @ap: Port to wait for.
990 *
991 * Waits up to max*10 microseconds for the selected bits in the port's
992 * status register to be cleared.
993 * Returns final value of status register.
994 *
995 * LOCKING:
996 * Inherited from caller.
997 */
998
1da177e4
LT
999static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
1000 unsigned int max)
1001{
1002 u8 status;
1003
1004 do {
1005 udelay(10);
1006 status = ata_chk_status(ap);
1007 max--;
1008 } while ((status & bits) && (max > 0));
1009
1010 return status;
1011}
1012
0baab86b
EF
1013
1014/**
1015 * ata_wait_idle - Wait for a port to be idle.
1016 * @ap: Port to wait for.
1017 *
1018 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
1019 * Returns final value of status register.
1020 *
1021 * LOCKING:
1022 * Inherited from caller.
1023 */
1024
1da177e4
LT
1025static inline u8 ata_wait_idle(struct ata_port *ap)
1026{
1027 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
1028
1029 if (status & (ATA_BUSY | ATA_DRQ)) {
1030 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD
1031 if (ata_msg_warn(ap))
1032 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
1033 status, l);
1da177e4
LT
1034 }
1035
1036 return status;
1037}
1038
1039static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
1040{
1041 qc->tf.ctl |= ATA_NIEN;
1042}
1043
f69499f4
TH
1044static inline struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap,
1045 unsigned int tag)
1da177e4
LT
1046{
1047 if (likely(ata_tag_valid(tag)))
1048 return &ap->qcmd[tag];
1049 return NULL;
1050}
1051
f69499f4
TH
1052static inline struct ata_queued_cmd *ata_qc_from_tag(struct ata_port *ap,
1053 unsigned int tag)
1054{
1055 struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
1056
1057 if (unlikely(!qc) || !ap->ops->error_handler)
1058 return qc;
1059
1060 if ((qc->flags & (ATA_QCFLAG_ACTIVE |
1061 ATA_QCFLAG_FAILED)) == ATA_QCFLAG_ACTIVE)
1062 return qc;
1063
1064 return NULL;
1065}
1066
3373efd8 1067static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf)
1da177e4
LT
1068{
1069 memset(tf, 0, sizeof(*tf));
1070
3373efd8
TH
1071 tf->ctl = dev->ap->ctl;
1072 if (dev->devno == 0)
1da177e4
LT
1073 tf->device = ATA_DEVICE_OBS;
1074 else
1075 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
1076}
1077
2c13b7ce
JG
1078static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
1079{
1080 qc->__sg = NULL;
1081 qc->flags = 0;
1082 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
1083 qc->nsect = 0;
1084 qc->nbytes = qc->curbytes = 0;
a22e2eb0 1085 qc->err_mask = 0;
2c13b7ce 1086
3373efd8 1087 ata_tf_init(qc->dev, &qc->tf);
e61e0672
TH
1088
1089 /* init result_tf such that it indicates normal completion */
1090 qc->result_tf.command = ATA_DRDY;
1091 qc->result_tf.feature = 0;
2c13b7ce
JG
1092}
1093
0baab86b
EF
1094/**
1095 * ata_irq_on - Enable interrupts on a port.
1096 * @ap: Port on which interrupts are enabled.
1097 *
1098 * Enable interrupts on a legacy IDE device using MMIO or PIO,
1099 * wait for idle, clear any pending interrupts.
1100 *
1101 * LOCKING:
1102 * Inherited from caller.
1103 */
1104
1da177e4
LT
1105static inline u8 ata_irq_on(struct ata_port *ap)
1106{
1107 struct ata_ioports *ioaddr = &ap->ioaddr;
1108 u8 tmp;
1109
1110 ap->ctl &= ~ATA_NIEN;
1111 ap->last_ctl = ap->ctl;
1112
1113 if (ap->flags & ATA_FLAG_MMIO)
1114 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1115 else
1116 outb(ap->ctl, ioaddr->ctl_addr);
1117 tmp = ata_wait_idle(ap);
1118
1119 ap->ops->irq_clear(ap);
1120
1121 return tmp;
1122}
1123
0baab86b
EF
1124
1125/**
1126 * ata_irq_ack - Acknowledge a device interrupt.
1127 * @ap: Port on which interrupts are enabled.
1128 *
1129 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
1130 * or BUSY+DRQ clear). Obtain dma status and port status from
1131 * device. Clear the interrupt. Return port status.
1132 *
1133 * LOCKING:
1134 */
1135
1da177e4
LT
1136static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
1137{
1138 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
1139 u8 host_stat, post_stat, status;
1140
1141 status = ata_busy_wait(ap, bits, 1000);
1142 if (status & bits)
bfd60579
RD
1143 if (ata_msg_err(ap))
1144 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT
1145
1146 /* get controller status; clear intr, err bits */
1147 if (ap->flags & ATA_FLAG_MMIO) {
1148 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
1149 host_stat = readb(mmio + ATA_DMA_STATUS);
1150 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
1151 mmio + ATA_DMA_STATUS);
1152
1153 post_stat = readb(mmio + ATA_DMA_STATUS);
1154 } else {
1155 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1156 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
1157 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1158
1159 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1160 }
1161
bfd60579
RD
1162 if (ata_msg_intr(ap))
1163 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
1164 __FUNCTION__,
1165 host_stat, post_stat, status);
1da177e4
LT
1166
1167 return status;
1168}
1169
057ace5e 1170static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT
1171{
1172 return ata_id_wcache_enabled(dev->id) ||
1173 ata_id_has_flush(dev->id) ||
1174 ata_id_has_flush_ext(dev->id);
1175}
1176
a7dac447
JG
1177static inline unsigned int ac_err_mask(u8 status)
1178{
3655d1d3 1179 if (status & (ATA_BUSY | ATA_DRQ))
11a56d24 1180 return AC_ERR_HSM;
a7dac447
JG
1181 if (status & (ATA_ERR | ATA_DF))
1182 return AC_ERR_DEV;
1183 return 0;
1184}
1185
1186static inline unsigned int __ac_err_mask(u8 status)
1187{
1188 unsigned int mask = ac_err_mask(status);
1189 if (mask == 0)
1190 return AC_ERR_OTHER;
1191 return mask;
1192}
1193
6037d6bb
JG
1194static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
1195{
1196 ap->pad_dma = 0;
1197 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
1198 &ap->pad_dma, GFP_KERNEL);
1199 return (ap->pad == NULL) ? -ENOMEM : 0;
1200}
1201
1202static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
1203{
1204 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
1205}
1206
35bb94b1
JG
1207static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host)
1208{
1209 return (struct ata_port *) &host->hostdata[0];
1210}
1211
1da177e4 1212#endif /* __LINUX_LIBATA_H__ */