projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] libata: minor patch before moving err_mask
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / libata.h
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT		 24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
1da177e4
LT		 33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
36
37/*
38 * compile-time options
39 */
40#undef ATA_DEBUG /* debugging output */
41#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
42#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
43#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT		 44#undef ATA_ENABLE_PATA /* define to enable PATA support in some
45 * low-level drivers */
46#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
47
48
49/* note: prints function name for you */
50#ifdef ATA_DEBUG
51#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
52#ifdef ATA_VERBOSE_DEBUG
53#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
54#else
55#define VPRINTK(fmt, args...)
56#endif /* ATA_VERBOSE_DEBUG */
57#else
58#define DPRINTK(fmt, args...)
59#define VPRINTK(fmt, args...)
60#endif /* ATA_DEBUG */
61
2c13b7ce
JG		 62#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
63
1da177e4
LT		 64#ifdef ATA_NDEBUG
65#define assert(expr)
66#else
67#define assert(expr) \
68 if(unlikely(!(expr))) { \
69 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
70 #expr,__FILE__,__FUNCTION__,__LINE__); \
71 }
72#endif
73
74/* defines only for the constants which don't work well as enums */
75#define ATA_TAG_POISON 0xfafbfcfdU
76
77/* move to PCI layer? */
78static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
79{
80 return &pdev->dev;
81}
82
83enum {
84 /* various global constants */
85 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
86 ATA_MAX_PORTS = 8,
87 ATA_DEF_QUEUE = 1,
88 ATA_MAX_QUEUE = 1,
89 ATA_MAX_SECTORS = 200, /* FIXME */
90 ATA_MAX_BUS = 2,
91 ATA_DEF_BUSY_WAIT = 10000,
92 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
93
94 ATA_SHT_EMULATED = 1,
95 ATA_SHT_CMD_PER_LUN = 1,
96 ATA_SHT_THIS_ID = -1,
cf482935 97 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT		 98
99 /* struct ata_device stuff */
100 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
101 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
102 ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */
8bf62ece 103 ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */
1da177e4
LT		 104
105 ATA_DEV_UNKNOWN = 0, /* unknown device */
106 ATA_DEV_ATA = 1, /* ATA device */
107 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
108 ATA_DEV_ATAPI = 3, /* ATAPI device */
109 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
110 ATA_DEV_NONE = 5, /* no device */
111
112 /* struct ata_port flags */
113 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
114 /* (doesn't imply presence) */
115 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
116 ATA_FLAG_SATA = (1 << 3),
117 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
118 ATA_FLAG_SRST = (1 << 5), /* use ATA SRST, not E.D.D. */
119 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
120 ATA_FLAG_SATA_RESET = (1 << 7), /* use COMRESET */
121 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
c1389503
TH		 122 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
123 * proper HSM is in place. */
2c13b7ce 124 ATA_FLAG_DEBUGMSG = (1 << 10),
1da177e4
LT		 125
126 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
127 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
128 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
129 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
130
131 /* various lengths of time */
132 ATA_TMOUT_EDD = 5 * HZ, /* hueristic */
133 ATA_TMOUT_PIO = 30 * HZ,
134 ATA_TMOUT_BOOT = 30 * HZ, /* hueristic */
135 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* hueristic */
136 ATA_TMOUT_CDB = 30 * HZ,
137 ATA_TMOUT_CDB_QUICK = 5 * HZ,
138
139 /* ATA bus states */
140 BUS_UNKNOWN = 0,
141 BUS_DMA = 1,
142 BUS_IDLE = 2,
143 BUS_NOINTR = 3,
144 BUS_NODATA = 4,
145 BUS_TIMER = 5,
146 BUS_PIO = 6,
147 BUS_EDD = 7,
148 BUS_IDENTIFY = 8,
149 BUS_PACKET = 9,
150
151 /* SATA port states */
152 PORT_UNKNOWN = 0,
153 PORT_ENABLED = 1,
154 PORT_DISABLED = 2,
155
156 /* encoding various smaller bitmaps into a single
157 * unsigned long bitmap
158 */
159 ATA_SHIFT_UDMA = 0,
160 ATA_SHIFT_MWDMA = 8,
161 ATA_SHIFT_PIO = 11,
cedc9a47
JG		 162
163 /* size of buffer to pad xfers ending on unaligned boundaries */
164 ATA_DMA_PAD_SZ = 4,
165 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
47a86593
AC		 166
167 /* Masks for port functions */
168 ATA_PORT_PRIMARY = (1 << 0),
169 ATA_PORT_SECONDARY = (1 << 1),
1da177e4
LT		 170};
171
14be71f4
AL		 172enum hsm_task_states {
173 HSM_ST_UNKNOWN,
174 HSM_ST_IDLE,
175 HSM_ST_POLL,
176 HSM_ST_TMOUT,
177 HSM_ST,
178 HSM_ST_LAST,
179 HSM_ST_LAST_POLL,
180 HSM_ST_ERR,
1da177e4
LT		 181};
182
a7dac447
JG		 183enum ata_completion_errors {
184 AC_ERR_OTHER = (1 << 0),
185 AC_ERR_DEV = (1 << 1),
186 AC_ERR_ATA_BUS = (1 << 2),
187 AC_ERR_HOST_BUS = (1 << 3),
188};
189
1da177e4
LT		 190/* forward declarations */
191struct scsi_device;
192struct ata_port_operations;
193struct ata_port;
194struct ata_queued_cmd;
195
196/* typedefs */
a7dac447 197typedef int (*ata_qc_cb_t) (struct ata_queued_cmd *qc, unsigned int err_mask);
1da177e4
LT		 198
199struct ata_ioports {
200 unsigned long cmd_addr;
201 unsigned long data_addr;
202 unsigned long error_addr;
203 unsigned long feature_addr;
204 unsigned long nsect_addr;
205 unsigned long lbal_addr;
206 unsigned long lbam_addr;
207 unsigned long lbah_addr;
208 unsigned long device_addr;
209 unsigned long status_addr;
210 unsigned long command_addr;
211 unsigned long altstatus_addr;
212 unsigned long ctl_addr;
213 unsigned long bmdma_addr;
214 unsigned long scr_addr;
215};
216
217struct ata_probe_ent {
218 struct list_head node;
219 struct device *dev;
057ace5e 220 const struct ata_port_operations *port_ops;
193515d5 221 struct scsi_host_template *sht;
1da177e4
LT		 222 struct ata_ioports port[ATA_MAX_PORTS];
223 unsigned int n_ports;
224 unsigned int hard_port_no;
225 unsigned int pio_mask;
226 unsigned int mwdma_mask;
227 unsigned int udma_mask;
228 unsigned int legacy_mode;
229 unsigned long irq;
230 unsigned int irq_flags;
231 unsigned long host_flags;
232 void __iomem *mmio_base;
233 void *private_data;
234};
235
236struct ata_host_set {
237 spinlock_t lock;
238 struct device *dev;
239 unsigned long irq;
240 void __iomem *mmio_base;
241 unsigned int n_ports;
242 void *private_data;
057ace5e 243 const struct ata_port_operations *ops;
1da177e4
LT		 244 struct ata_port * ports[0];
245};
246
247struct ata_queued_cmd {
248 struct ata_port *ap;
249 struct ata_device *dev;
250
251 struct scsi_cmnd *scsicmd;
252 void (*scsidone)(struct scsi_cmnd *);
253
254 struct ata_taskfile tf;
255 u8 cdb[ATAPI_CDB_LEN];
256
257 unsigned long flags; /* ATA_QCFLAG_xxx */
258 unsigned int tag;
259 unsigned int n_elem;
cedc9a47 260 unsigned int orig_n_elem;
1da177e4
LT		 261
262 int dma_dir;
263
cedc9a47
JG		 264 unsigned int pad_len;
265
1da177e4
LT		 266 unsigned int nsect;
267 unsigned int cursect;
268
269 unsigned int nbytes;
270 unsigned int curbytes;
271
272 unsigned int cursg;
273 unsigned int cursg_ofs;
274
275 struct scatterlist sgent;
cedc9a47 276 struct scatterlist pad_sgent;
1da177e4
LT		 277 void *buf_virt;
278
cedc9a47
JG		 279 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
280 struct scatterlist *__sg;
1da177e4
LT		 281
282 ata_qc_cb_t complete_fn;
283
284 struct completion *waiting;
285
286 void *private_data;
287};
288
289struct ata_host_stats {
290 unsigned long unhandled_irq;
291 unsigned long idle_irq;
292 unsigned long rw_reqbuf;
293};
294
295struct ata_device {
296 u64 n_sectors; /* size of device, if ATA */
297 unsigned long flags; /* ATA_DFLAG_xxx */
298 unsigned int class; /* ATA_DEV_xxx */
299 unsigned int devno; /* 0 or 1 */
300 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
301 u8 pio_mode;
302 u8 dma_mode;
303 u8 xfer_mode;
304 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
305
8cbd6df1
AL		 306 unsigned int multi_count; /* sectors count for
307 READ/WRITE MULTIPLE */
8bf62ece
AL		 308
309 /* for CHS addressing */
310 u16 cylinders; /* Number of cylinders */
311 u16 heads; /* Number of heads */
312 u16 sectors; /* Number of sectors per track */
1da177e4
LT		 313};
314
315struct ata_port {
316 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 317 const struct ata_port_operations *ops;
1da177e4
LT		 318 unsigned long flags; /* ATA_FLAG_xxx */
319 unsigned int id; /* unique id req'd by scsi midlyr */
320 unsigned int port_no; /* unique port #; from zero */
321 unsigned int hard_port_no; /* hardware port #; from zero */
322
323 struct ata_prd *prd; /* our SG list */
324 dma_addr_t prd_dma; /* and its DMA mapping */
325
cedc9a47
JG		 326 void *pad; /* array of DMA pad buffers */
327 dma_addr_t pad_dma;
328
1da177e4
LT		 329 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
330
331 u8 ctl; /* cache of ATA control register */
332 u8 last_ctl; /* Cache last written value */
1da177e4
LT		 333 unsigned int pio_mask;
334 unsigned int mwdma_mask;
335 unsigned int udma_mask;
336 unsigned int cbl; /* cable type; ATA_CBL_xxx */
337 unsigned int cdb_len;
338
339 struct ata_device device[ATA_MAX_DEVICES];
340
341 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
342 unsigned long qactive;
343 unsigned int active_tag;
344
345 struct ata_host_stats stats;
346 struct ata_host_set *host_set;
347
348 struct work_struct packet_task;
349
350 struct work_struct pio_task;
14be71f4 351 unsigned int hsm_task_state;
1da177e4
LT		 352 unsigned long pio_task_timeout;
353
354 void *private_data;
355};
356
357struct ata_port_operations {
358 void (*port_disable) (struct ata_port *);
359
360 void (*dev_config) (struct ata_port *, struct ata_device *);
361
362 void (*set_piomode) (struct ata_port *, struct ata_device *);
363 void (*set_dmamode) (struct ata_port *, struct ata_device *);
364
057ace5e 365 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 366 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
367
057ace5e 368 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 369 u8 (*check_status)(struct ata_port *ap);
370 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT		 371 void (*dev_select)(struct ata_port *ap, unsigned int device);
372
373 void (*phy_reset) (struct ata_port *ap);
374 void (*post_set_mode) (struct ata_port *ap);
375
376 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
377
378 void (*bmdma_setup) (struct ata_queued_cmd *qc);
379 void (*bmdma_start) (struct ata_queued_cmd *qc);
380
381 void (*qc_prep) (struct ata_queued_cmd *qc);
382 int (*qc_issue) (struct ata_queued_cmd *qc);
383
384 void (*eng_timeout) (struct ata_port *ap);
385
386 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
387 void (*irq_clear) (struct ata_port *);
388
389 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
390 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
391 u32 val);
392
393 int (*port_start) (struct ata_port *ap);
394 void (*port_stop) (struct ata_port *ap);
395
396 void (*host_stop) (struct ata_host_set *host_set);
397
b73fc89f 398 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT		 399 u8 (*bmdma_status) (struct ata_port *ap);
400};
401
402struct ata_port_info {
d0be4a7d 403 struct scsi_host_template *sht;
1da177e4
LT		 404 unsigned long host_flags;
405 unsigned long pio_mask;
406 unsigned long mwdma_mask;
407 unsigned long udma_mask;
057ace5e 408 const struct ata_port_operations *port_ops;
e99f8b5e 409 void *private_data;
1da177e4
LT		 410};
411
452503f9
AC		 412struct ata_timing {
413 unsigned short mode; /* ATA mode */
414 unsigned short setup; /* t1 */
415 unsigned short act8b; /* t2 for 8-bit I/O */
416 unsigned short rec8b; /* t2i for 8-bit I/O */
417 unsigned short cyc8b; /* t0 for 8-bit I/O */
418 unsigned short active; /* t2 or tD */
419 unsigned short recover; /* t2i or tK */
420 unsigned short cycle; /* t0 */
421 unsigned short udma; /* t2CYCTYP/2 */
422};
423
424#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4
LT		 425
426extern void ata_port_probe(struct ata_port *);
427extern void __sata_phy_reset(struct ata_port *ap);
428extern void sata_phy_reset(struct ata_port *ap);
429extern void ata_bus_reset(struct ata_port *ap);
430extern void ata_port_disable(struct ata_port *);
431extern void ata_std_ports(struct ata_ioports *ioaddr);
432#ifdef CONFIG_PCI
433extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
434 unsigned int n_ports);
435extern void ata_pci_remove_one (struct pci_dev *pdev);
436#endif /* CONFIG_PCI */
057ace5e 437extern int ata_device_add(const struct ata_probe_ent *ent);
17b14451 438extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 439extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT		 440extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
441extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
442extern int ata_scsi_error(struct Scsi_Host *host);
443extern int ata_scsi_release(struct Scsi_Host *host);
444extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
67846b30
JG		 445extern int ata_ratelimit(void);
446
1da177e4
LT		 447/*
448 * Default driver ops implementations
449 */
057ace5e 450extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 451extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG		 452extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
453extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT		 454extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
455extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
456extern u8 ata_check_status(struct ata_port *ap);
457extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 458extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 459extern int ata_port_start (struct ata_port *ap);
460extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 461extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4
LT		 462extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
463extern void ata_qc_prep(struct ata_queued_cmd *qc);
464extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
465extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
466 unsigned int buflen);
467extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
468 unsigned int n_elem);
057ace5e
JG		 469extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
470extern void ata_dev_id_string(const u16 *id, unsigned char *s,
1da177e4 471 unsigned int ofs, unsigned int len);
6f2f3812 472extern void ata_dev_config(struct ata_port *ap, unsigned int i);
1da177e4
LT		 473extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
474extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 475extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT		 476extern u8 ata_bmdma_status(struct ata_port *ap);
477extern void ata_bmdma_irq_clear(struct ata_port *ap);
a7dac447 478extern void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask);
1da177e4
LT		 479extern void ata_eng_timeout(struct ata_port *ap);
480extern void ata_scsi_simulate(u16 *id, struct scsi_cmnd *cmd,
481 void (*done)(struct scsi_cmnd *));
482extern int ata_std_bios_param(struct scsi_device *sdev,
483 struct block_device *bdev,
484 sector_t capacity, int geom[]);
485extern int ata_scsi_slave_config(struct scsi_device *sdev);
486
452503f9
AC		 487/*
488 * Timing helpers
489 */
490extern int ata_timing_compute(struct ata_device *, unsigned short,
491 struct ata_timing *, int, int);
492extern void ata_timing_merge(const struct ata_timing *,
493 const struct ata_timing *, struct ata_timing *,
494 unsigned int);
495
496enum {
497 ATA_TIMING_SETUP = (1 << 0),
498 ATA_TIMING_ACT8B = (1 << 1),
499 ATA_TIMING_REC8B = (1 << 2),
500 ATA_TIMING_CYC8B = (1 << 3),
501 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
502 ATA_TIMING_CYC8B,
503 ATA_TIMING_ACTIVE = (1 << 4),
504 ATA_TIMING_RECOVER = (1 << 5),
505 ATA_TIMING_CYCLE = (1 << 6),
506 ATA_TIMING_UDMA = (1 << 7),
507 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
508 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
509 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
510 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
511};
512
1da177e4
LT		 513
514#ifdef CONFIG_PCI
515struct pci_bits {
516 unsigned int reg; /* PCI config register to read */
517 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
518 unsigned long mask;
519 unsigned long val;
520};
521
374b1873 522extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 523extern struct ata_probe_ent *
47a86593 524ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 525extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
1da177e4
LT		 526
527#endif /* CONFIG_PCI */
528
529
972c26bd
JG		 530static inline int
531ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
532{
533 if (sg == &qc->pad_sgent)
534 return 1;
535 if (qc->pad_len)
536 return 0;
537 if (((sg - qc->__sg) + 1) == qc->n_elem)
538 return 1;
539 return 0;
540}
541
cedc9a47
JG		 542static inline struct scatterlist *
543ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
544{
545 if (sg == &qc->pad_sgent)
546 return NULL;
547 if (++sg - qc->__sg < qc->n_elem)
548 return sg;
549 return qc->pad_len ? &qc->pad_sgent : NULL;
550}
551
552#define ata_for_each_sg(sg, qc) \
553 for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc))
554
1da177e4
LT		 555static inline unsigned int ata_tag_valid(unsigned int tag)
556{
557 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
558}
559
057ace5e 560static inline unsigned int ata_dev_present(const struct ata_device *dev)
1da177e4
LT		 561{
562 return ((dev->class == ATA_DEV_ATA) ||
563 (dev->class == ATA_DEV_ATAPI));
564}
565
566static inline u8 ata_chk_status(struct ata_port *ap)
567{
568 return ap->ops->check_status(ap);
569}
570
0baab86b
EF		 571
572/**
573 * ata_pause - Flush writes and pause 400 nanoseconds.
574 * @ap: Port to wait for.
575 *
576 * LOCKING:
577 * Inherited from caller.
578 */
579
1da177e4
LT		 580static inline void ata_pause(struct ata_port *ap)
581{
582 ata_altstatus(ap);
583 ndelay(400);
584}
585
0baab86b
EF		 586
587/**
588 * ata_busy_wait - Wait for a port status register
589 * @ap: Port to wait for.
590 *
591 * Waits up to max*10 microseconds for the selected bits in the port's
592 * status register to be cleared.
593 * Returns final value of status register.
594 *
595 * LOCKING:
596 * Inherited from caller.
597 */
598
1da177e4
LT		 599static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
600 unsigned int max)
601{
602 u8 status;
603
604 do {
605 udelay(10);
606 status = ata_chk_status(ap);
607 max--;
608 } while ((status & bits) && (max > 0));
609
610 return status;
611}
612
0baab86b
EF		 613
614/**
615 * ata_wait_idle - Wait for a port to be idle.
616 * @ap: Port to wait for.
617 *
618 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
619 * Returns final value of status register.
620 *
621 * LOCKING:
622 * Inherited from caller.
623 */
624
1da177e4
LT		 625static inline u8 ata_wait_idle(struct ata_port *ap)
626{
627 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
628
629 if (status & (ATA_BUSY | ATA_DRQ)) {
630 unsigned long l = ap->ioaddr.status_addr;
631 printk(KERN_WARNING
632 "ATA: abnormal status 0x%X on port 0x%lX\n",
633 status, l);
634 }
635
636 return status;
637}
638
639static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
640{
641 qc->tf.ctl |= ATA_NIEN;
642}
643
644static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
645 unsigned int tag)
646{
647 if (likely(ata_tag_valid(tag)))
648 return &ap->qcmd[tag];
649 return NULL;
650}
651
652static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
653{
654 memset(tf, 0, sizeof(*tf));
655
656 tf->ctl = ap->ctl;
657 if (device == 0)
658 tf->device = ATA_DEVICE_OBS;
659 else
660 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
661}
662
2c13b7ce
JG		 663static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
664{
665 qc->__sg = NULL;
666 qc->flags = 0;
667 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
668 qc->nsect = 0;
669 qc->nbytes = qc->curbytes = 0;
670
671 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
672}
673
0baab86b
EF		 674
675/**
676 * ata_irq_on - Enable interrupts on a port.
677 * @ap: Port on which interrupts are enabled.
678 *
679 * Enable interrupts on a legacy IDE device using MMIO or PIO,
680 * wait for idle, clear any pending interrupts.
681 *
682 * LOCKING:
683 * Inherited from caller.
684 */
685
1da177e4
LT		 686static inline u8 ata_irq_on(struct ata_port *ap)
687{
688 struct ata_ioports *ioaddr = &ap->ioaddr;
689 u8 tmp;
690
691 ap->ctl &= ~ATA_NIEN;
692 ap->last_ctl = ap->ctl;
693
694 if (ap->flags & ATA_FLAG_MMIO)
695 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
696 else
697 outb(ap->ctl, ioaddr->ctl_addr);
698 tmp = ata_wait_idle(ap);
699
700 ap->ops->irq_clear(ap);
701
702 return tmp;
703}
704
0baab86b
EF		 705
706/**
707 * ata_irq_ack - Acknowledge a device interrupt.
708 * @ap: Port on which interrupts are enabled.
709 *
710 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
711 * or BUSY+DRQ clear). Obtain dma status and port status from
712 * device. Clear the interrupt. Return port status.
713 *
714 * LOCKING:
715 */
716
1da177e4
LT		 717static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
718{
719 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
720 u8 host_stat, post_stat, status;
721
722 status = ata_busy_wait(ap, bits, 1000);
723 if (status & bits)
724 DPRINTK("abnormal status 0x%X\n", status);
725
726 /* get controller status; clear intr, err bits */
727 if (ap->flags & ATA_FLAG_MMIO) {
728 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
729 host_stat = readb(mmio + ATA_DMA_STATUS);
730 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
731 mmio + ATA_DMA_STATUS);
732
733 post_stat = readb(mmio + ATA_DMA_STATUS);
734 } else {
735 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
736 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
737 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
738
739 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
740 }
741
742 VPRINTK("irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
743 host_stat, post_stat, status);
744
745 return status;
746}
747
748static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
749{
750 return ap->ops->scr_read(ap, reg);
751}
752
753static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
754{
755 ap->ops->scr_write(ap, reg, val);
756}
757
8a60a071 758static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
cdcca89e
BR		 759 u32 val)
760{
761 ap->ops->scr_write(ap, reg, val);
762 (void) ap->ops->scr_read(ap, reg);
763}
764
1da177e4
LT		 765static inline unsigned int sata_dev_present(struct ata_port *ap)
766{
767 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
768}
769
057ace5e 770static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT		 771{
772 return ata_id_wcache_enabled(dev->id) ||
773 ata_id_has_flush(dev->id) ||
774 ata_id_has_flush_ext(dev->id);
775}
776
a7dac447
JG		 777static inline unsigned int ac_err_mask(u8 status)
778{
779 if (status & ATA_BUSY)
780 return AC_ERR_ATA_BUS;
781 if (status & (ATA_ERR | ATA_DF))
782 return AC_ERR_DEV;
783 return 0;
784}
785
786static inline unsigned int __ac_err_mask(u8 status)
787{
788 unsigned int mask = ac_err_mask(status);
789 if (mask == 0)
790 return AC_ERR_OTHER;
791 return mask;
792}
793
6037d6bb
JG		 794static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
795{
796 ap->pad_dma = 0;
797 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
798 &ap->pad_dma, GFP_KERNEL);
799 return (ap->pad == NULL) ? -ENOMEM : 0;
800}
801
802static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
803{
804 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
805}
806
1da177e4 807#endif /* __LINUX_LIBATA_H__ */
kernel source for telekom puls (alcatel/mediatek)