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[PATCH] libata: fold __ata_qc_complete() into ata_qc_free()
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / include / linux / libata.h
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1da177e4 1/*
af36d7f0
JG		 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
3 * Copyright 2003-2005 Jeff Garzik
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 *
21 * libata documentation is available via 'make {ps|pdf}docs',
22 * as Documentation/DocBook/libata.*
23 *
1da177e4
LT		 24 */
25
26#ifndef __LINUX_LIBATA_H__
27#define __LINUX_LIBATA_H__
28
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
1c72d8d9 32#include <linux/dma-mapping.h>
1da177e4
LT		 33#include <asm/io.h>
34#include <linux/ata.h>
35#include <linux/workqueue.h>
36
37/*
bfd60579
RD		 38 * compile-time options: to be removed as soon as all the drivers are
39 * converted to the new debugging mechanism
1da177e4
LT		 40 */
41#undef ATA_DEBUG /* debugging output */
42#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
43#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
44#undef ATA_NDEBUG /* define to disable quick runtime checks */
1da177e4
LT		 45#undef ATA_ENABLE_PATA /* define to enable PATA support in some
46 * low-level drivers */
47#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
48
49
50/* note: prints function name for you */
51#ifdef ATA_DEBUG
52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
53#ifdef ATA_VERBOSE_DEBUG
54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
55#else
56#define VPRINTK(fmt, args...)
57#endif /* ATA_VERBOSE_DEBUG */
58#else
59#define DPRINTK(fmt, args...)
60#define VPRINTK(fmt, args...)
61#endif /* ATA_DEBUG */
62
2c13b7ce
JG		 63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
64
1da177e4
LT		 65#ifdef ATA_NDEBUG
66#define assert(expr)
67#else
68#define assert(expr) \
69 if(unlikely(!(expr))) { \
70 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \
71 #expr,__FILE__,__FUNCTION__,__LINE__); \
72 }
73#endif
74
bfd60579
RD		 75/* NEW: debug levels */
76#define HAVE_LIBATA_MSG 1
77
78enum {
79 ATA_MSG_DRV = 0x0001,
80 ATA_MSG_INFO = 0x0002,
81 ATA_MSG_PROBE = 0x0004,
82 ATA_MSG_WARN = 0x0008,
83 ATA_MSG_MALLOC = 0x0010,
84 ATA_MSG_CTL = 0x0020,
85 ATA_MSG_INTR = 0x0040,
86 ATA_MSG_ERR = 0x0080,
87};
88
89#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
90#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
91#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
92#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
93#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
94#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
95#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
96#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
97
98static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
99{
100 if (dval < 0 || dval >= (sizeof(u32) * 8))
101 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
102 if (!dval)
103 return 0;
104 return (1 << dval) - 1;
105}
106
1da177e4
LT		 107/* defines only for the constants which don't work well as enums */
108#define ATA_TAG_POISON 0xfafbfcfdU
109
110/* move to PCI layer? */
111static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
112{
113 return &pdev->dev;
114}
115
116enum {
117 /* various global constants */
118 LIBATA_MAX_PRD = ATA_MAX_PRD / 2,
119 ATA_MAX_PORTS = 8,
120 ATA_DEF_QUEUE = 1,
121 ATA_MAX_QUEUE = 1,
122 ATA_MAX_SECTORS = 200, /* FIXME */
123 ATA_MAX_BUS = 2,
124 ATA_DEF_BUSY_WAIT = 10000,
125 ATA_SHORT_PAUSE = (HZ >> 6) + 1,
126
127 ATA_SHT_EMULATED = 1,
128 ATA_SHT_CMD_PER_LUN = 1,
129 ATA_SHT_THIS_ID = -1,
cf482935 130 ATA_SHT_USE_CLUSTERING = 1,
1da177e4
LT		 131
132 /* struct ata_device stuff */
133 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */
134 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */
135 ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */
8bf62ece 136 ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */
1da177e4
LT		 137
138 ATA_DEV_UNKNOWN = 0, /* unknown device */
139 ATA_DEV_ATA = 1, /* ATA device */
140 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */
141 ATA_DEV_ATAPI = 3, /* ATAPI device */
142 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */
143 ATA_DEV_NONE = 5, /* no device */
144
145 /* struct ata_port flags */
146 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */
147 /* (doesn't imply presence) */
148 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */
149 ATA_FLAG_SATA = (1 << 3),
150 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */
151 ATA_FLAG_SRST = (1 << 5), /* use ATA SRST, not E.D.D. */
152 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
153 ATA_FLAG_SATA_RESET = (1 << 7), /* use COMRESET */
154 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
c1389503
TH		 155 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
156 * proper HSM is in place. */
2c13b7ce 157 ATA_FLAG_DEBUGMSG = (1 << 10),
50630195 158 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
1da177e4 159
9b847548
JA		 160 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */
161
8d238e01
AC		 162 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */
163 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */
164
1da177e4
LT		 165 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
166 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
167 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */
168 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE,
169
170 /* various lengths of time */
8d238e01 171 ATA_TMOUT_EDD = 5 * HZ, /* heuristic */
1da177e4 172 ATA_TMOUT_PIO = 30 * HZ,
8d238e01
AC		 173 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
174 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
1da177e4
LT		 175 ATA_TMOUT_CDB = 30 * HZ,
176 ATA_TMOUT_CDB_QUICK = 5 * HZ,
a2a7a662
TH		 177 ATA_TMOUT_INTERNAL = 30 * HZ,
178 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
1da177e4
LT		 179
180 /* ATA bus states */
181 BUS_UNKNOWN = 0,
182 BUS_DMA = 1,
183 BUS_IDLE = 2,
184 BUS_NOINTR = 3,
185 BUS_NODATA = 4,
186 BUS_TIMER = 5,
187 BUS_PIO = 6,
188 BUS_EDD = 7,
189 BUS_IDENTIFY = 8,
190 BUS_PACKET = 9,
191
192 /* SATA port states */
193 PORT_UNKNOWN = 0,
194 PORT_ENABLED = 1,
195 PORT_DISABLED = 2,
196
197 /* encoding various smaller bitmaps into a single
198 * unsigned long bitmap
199 */
200 ATA_SHIFT_UDMA = 0,
201 ATA_SHIFT_MWDMA = 8,
202 ATA_SHIFT_PIO = 11,
cedc9a47
JG		 203
204 /* size of buffer to pad xfers ending on unaligned boundaries */
205 ATA_DMA_PAD_SZ = 4,
206 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
47a86593
AC		 207
208 /* Masks for port functions */
209 ATA_PORT_PRIMARY = (1 << 0),
210 ATA_PORT_SECONDARY = (1 << 1),
1da177e4
LT		 211};
212
14be71f4
AL		 213enum hsm_task_states {
214 HSM_ST_UNKNOWN,
215 HSM_ST_IDLE,
216 HSM_ST_POLL,
217 HSM_ST_TMOUT,
218 HSM_ST,
219 HSM_ST_LAST,
220 HSM_ST_LAST_POLL,
221 HSM_ST_ERR,
1da177e4
LT		 222};
223
a7dac447
JG		 224enum ata_completion_errors {
225 AC_ERR_OTHER = (1 << 0),
226 AC_ERR_DEV = (1 << 1),
227 AC_ERR_ATA_BUS = (1 << 2),
228 AC_ERR_HOST_BUS = (1 << 3),
229};
230
1da177e4
LT		 231/* forward declarations */
232struct scsi_device;
233struct ata_port_operations;
234struct ata_port;
235struct ata_queued_cmd;
236
237/* typedefs */
a22e2eb0 238typedef int (*ata_qc_cb_t) (struct ata_queued_cmd *qc);
1da177e4
LT		 239
240struct ata_ioports {
241 unsigned long cmd_addr;
242 unsigned long data_addr;
243 unsigned long error_addr;
244 unsigned long feature_addr;
245 unsigned long nsect_addr;
246 unsigned long lbal_addr;
247 unsigned long lbam_addr;
248 unsigned long lbah_addr;
249 unsigned long device_addr;
250 unsigned long status_addr;
251 unsigned long command_addr;
252 unsigned long altstatus_addr;
253 unsigned long ctl_addr;
254 unsigned long bmdma_addr;
255 unsigned long scr_addr;
256};
257
258struct ata_probe_ent {
259 struct list_head node;
260 struct device *dev;
057ace5e 261 const struct ata_port_operations *port_ops;
193515d5 262 struct scsi_host_template *sht;
1da177e4
LT		 263 struct ata_ioports port[ATA_MAX_PORTS];
264 unsigned int n_ports;
265 unsigned int hard_port_no;
266 unsigned int pio_mask;
267 unsigned int mwdma_mask;
268 unsigned int udma_mask;
269 unsigned int legacy_mode;
270 unsigned long irq;
271 unsigned int irq_flags;
272 unsigned long host_flags;
273 void __iomem *mmio_base;
274 void *private_data;
275};
276
277struct ata_host_set {
278 spinlock_t lock;
279 struct device *dev;
280 unsigned long irq;
281 void __iomem *mmio_base;
282 unsigned int n_ports;
283 void *private_data;
057ace5e 284 const struct ata_port_operations *ops;
1da177e4
LT		 285 struct ata_port * ports[0];
286};
287
288struct ata_queued_cmd {
289 struct ata_port *ap;
290 struct ata_device *dev;
291
292 struct scsi_cmnd *scsicmd;
293 void (*scsidone)(struct scsi_cmnd *);
294
295 struct ata_taskfile tf;
296 u8 cdb[ATAPI_CDB_LEN];
297
298 unsigned long flags; /* ATA_QCFLAG_xxx */
299 unsigned int tag;
300 unsigned int n_elem;
cedc9a47 301 unsigned int orig_n_elem;
1da177e4
LT		 302
303 int dma_dir;
304
cedc9a47
JG		 305 unsigned int pad_len;
306
1da177e4
LT		 307 unsigned int nsect;
308 unsigned int cursect;
309
310 unsigned int nbytes;
311 unsigned int curbytes;
312
313 unsigned int cursg;
314 unsigned int cursg_ofs;
315
316 struct scatterlist sgent;
cedc9a47 317 struct scatterlist pad_sgent;
1da177e4
LT		 318 void *buf_virt;
319
cedc9a47
JG		 320 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
321 struct scatterlist *__sg;
1da177e4 322
a22e2eb0
AL		 323 unsigned int err_mask;
324
1da177e4
LT		 325 ata_qc_cb_t complete_fn;
326
1da177e4
LT		 327 void *private_data;
328};
329
330struct ata_host_stats {
331 unsigned long unhandled_irq;
332 unsigned long idle_irq;
333 unsigned long rw_reqbuf;
334};
335
336struct ata_device {
337 u64 n_sectors; /* size of device, if ATA */
338 unsigned long flags; /* ATA_DFLAG_xxx */
339 unsigned int class; /* ATA_DEV_xxx */
340 unsigned int devno; /* 0 or 1 */
341 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
342 u8 pio_mode;
343 u8 dma_mode;
344 u8 xfer_mode;
345 unsigned int xfer_shift; /* ATA_SHIFT_xxx */
346
8cbd6df1
AL		 347 unsigned int multi_count; /* sectors count for
348 READ/WRITE MULTIPLE */
8bf62ece
AL		 349
350 /* for CHS addressing */
351 u16 cylinders; /* Number of cylinders */
352 u16 heads; /* Number of heads */
353 u16 sectors; /* Number of sectors per track */
1da177e4
LT		 354};
355
356struct ata_port {
357 struct Scsi_Host *host; /* our co-allocated scsi host */
057ace5e 358 const struct ata_port_operations *ops;
1da177e4
LT		 359 unsigned long flags; /* ATA_FLAG_xxx */
360 unsigned int id; /* unique id req'd by scsi midlyr */
361 unsigned int port_no; /* unique port #; from zero */
362 unsigned int hard_port_no; /* hardware port #; from zero */
363
364 struct ata_prd *prd; /* our SG list */
365 dma_addr_t prd_dma; /* and its DMA mapping */
366
cedc9a47
JG		 367 void *pad; /* array of DMA pad buffers */
368 dma_addr_t pad_dma;
369
1da177e4
LT		 370 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
371
372 u8 ctl; /* cache of ATA control register */
373 u8 last_ctl; /* Cache last written value */
1da177e4
LT		 374 unsigned int pio_mask;
375 unsigned int mwdma_mask;
376 unsigned int udma_mask;
377 unsigned int cbl; /* cable type; ATA_CBL_xxx */
378 unsigned int cdb_len;
379
380 struct ata_device device[ATA_MAX_DEVICES];
381
382 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE];
383 unsigned long qactive;
384 unsigned int active_tag;
385
386 struct ata_host_stats stats;
387 struct ata_host_set *host_set;
388
389 struct work_struct packet_task;
390
391 struct work_struct pio_task;
14be71f4 392 unsigned int hsm_task_state;
1da177e4
LT		 393 unsigned long pio_task_timeout;
394
bfd60579
RD		 395 u32 msg_enable;
396
1da177e4
LT		 397 void *private_data;
398};
399
400struct ata_port_operations {
401 void (*port_disable) (struct ata_port *);
402
403 void (*dev_config) (struct ata_port *, struct ata_device *);
404
405 void (*set_piomode) (struct ata_port *, struct ata_device *);
406 void (*set_dmamode) (struct ata_port *, struct ata_device *);
407
057ace5e 408 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 409 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
410
057ace5e 411 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 412 u8 (*check_status)(struct ata_port *ap);
413 u8 (*check_altstatus)(struct ata_port *ap);
1da177e4
LT		 414 void (*dev_select)(struct ata_port *ap, unsigned int device);
415
416 void (*phy_reset) (struct ata_port *ap);
417 void (*post_set_mode) (struct ata_port *ap);
418
419 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
420
421 void (*bmdma_setup) (struct ata_queued_cmd *qc);
422 void (*bmdma_start) (struct ata_queued_cmd *qc);
423
424 void (*qc_prep) (struct ata_queued_cmd *qc);
425 int (*qc_issue) (struct ata_queued_cmd *qc);
426
427 void (*eng_timeout) (struct ata_port *ap);
428
429 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
430 void (*irq_clear) (struct ata_port *);
431
432 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg);
433 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
434 u32 val);
435
436 int (*port_start) (struct ata_port *ap);
437 void (*port_stop) (struct ata_port *ap);
438
439 void (*host_stop) (struct ata_host_set *host_set);
440
b73fc89f 441 void (*bmdma_stop) (struct ata_queued_cmd *qc);
1da177e4
LT		 442 u8 (*bmdma_status) (struct ata_port *ap);
443};
444
445struct ata_port_info {
d0be4a7d 446 struct scsi_host_template *sht;
1da177e4
LT		 447 unsigned long host_flags;
448 unsigned long pio_mask;
449 unsigned long mwdma_mask;
450 unsigned long udma_mask;
057ace5e 451 const struct ata_port_operations *port_ops;
e99f8b5e 452 void *private_data;
1da177e4
LT		 453};
454
452503f9
AC		 455struct ata_timing {
456 unsigned short mode; /* ATA mode */
457 unsigned short setup; /* t1 */
458 unsigned short act8b; /* t2 for 8-bit I/O */
459 unsigned short rec8b; /* t2i for 8-bit I/O */
460 unsigned short cyc8b; /* t0 for 8-bit I/O */
461 unsigned short active; /* t2 or tD */
462 unsigned short recover; /* t2i or tK */
463 unsigned short cycle; /* t0 */
464 unsigned short udma; /* t2CYCTYP/2 */
465};
466
467#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
1da177e4
LT		 468
469extern void ata_port_probe(struct ata_port *);
470extern void __sata_phy_reset(struct ata_port *ap);
471extern void sata_phy_reset(struct ata_port *ap);
472extern void ata_bus_reset(struct ata_port *ap);
473extern void ata_port_disable(struct ata_port *);
474extern void ata_std_ports(struct ata_ioports *ioaddr);
475#ifdef CONFIG_PCI
476extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
477 unsigned int n_ports);
478extern void ata_pci_remove_one (struct pci_dev *pdev);
9b847548
JA		 479extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state);
480extern int ata_pci_device_resume(struct pci_dev *pdev);
1da177e4 481#endif /* CONFIG_PCI */
057ace5e 482extern int ata_device_add(const struct ata_probe_ent *ent);
17b14451 483extern void ata_host_set_remove(struct ata_host_set *host_set);
193515d5 484extern int ata_scsi_detect(struct scsi_host_template *sht);
1da177e4
LT		 485extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
486extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *));
487extern int ata_scsi_error(struct Scsi_Host *host);
488extern int ata_scsi_release(struct Scsi_Host *host);
489extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc);
9b847548
JA		 490extern int ata_scsi_device_resume(struct scsi_device *);
491extern int ata_scsi_device_suspend(struct scsi_device *);
492extern int ata_device_resume(struct ata_port *, struct ata_device *);
493extern int ata_device_suspend(struct ata_port *, struct ata_device *);
67846b30
JG		 494extern int ata_ratelimit(void);
495
1da177e4
LT		 496/*
497 * Default driver ops implementations
498 */
057ace5e 499extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4 500extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
057ace5e
JG		 501extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp);
502extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf);
1da177e4
LT		 503extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device);
504extern void ata_std_dev_select (struct ata_port *ap, unsigned int device);
505extern u8 ata_check_status(struct ata_port *ap);
506extern u8 ata_altstatus(struct ata_port *ap);
057ace5e 507extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf);
1da177e4
LT		 508extern int ata_port_start (struct ata_port *ap);
509extern void ata_port_stop (struct ata_port *ap);
aa8f0dc6 510extern void ata_host_stop (struct ata_host_set *host_set);
1da177e4
LT		 511extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
512extern void ata_qc_prep(struct ata_queued_cmd *qc);
513extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
514extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf,
515 unsigned int buflen);
516extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
517 unsigned int n_elem);
057ace5e
JG		 518extern unsigned int ata_dev_classify(const struct ata_taskfile *tf);
519extern void ata_dev_id_string(const u16 *id, unsigned char *s,
1da177e4 520 unsigned int ofs, unsigned int len);
6f2f3812 521extern void ata_dev_config(struct ata_port *ap, unsigned int i);
1da177e4
LT		 522extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
523extern void ata_bmdma_start (struct ata_queued_cmd *qc);
b73fc89f 524extern void ata_bmdma_stop(struct ata_queued_cmd *qc);
1da177e4
LT		 525extern u8 ata_bmdma_status(struct ata_port *ap);
526extern void ata_bmdma_irq_clear(struct ata_port *ap);
a22e2eb0 527extern void ata_qc_complete(struct ata_queued_cmd *qc);
1da177e4 528extern void ata_eng_timeout(struct ata_port *ap);
9a3dccc4
TH		 529extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev,
530 struct scsi_cmnd *cmd,
1da177e4
LT		 531 void (*done)(struct scsi_cmnd *));
532extern int ata_std_bios_param(struct scsi_device *sdev,
533 struct block_device *bdev,
534 sector_t capacity, int geom[]);
535extern int ata_scsi_slave_config(struct scsi_device *sdev);
536
452503f9
AC		 537/*
538 * Timing helpers
539 */
1bc4ccff
AC		 540
541extern unsigned int ata_pio_need_iordy(const struct ata_device *);
452503f9
AC		 542extern int ata_timing_compute(struct ata_device *, unsigned short,
543 struct ata_timing *, int, int);
544extern void ata_timing_merge(const struct ata_timing *,
545 const struct ata_timing *, struct ata_timing *,
546 unsigned int);
547
548enum {
549 ATA_TIMING_SETUP = (1 << 0),
550 ATA_TIMING_ACT8B = (1 << 1),
551 ATA_TIMING_REC8B = (1 << 2),
552 ATA_TIMING_CYC8B = (1 << 3),
553 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
554 ATA_TIMING_CYC8B,
555 ATA_TIMING_ACTIVE = (1 << 4),
556 ATA_TIMING_RECOVER = (1 << 5),
557 ATA_TIMING_CYCLE = (1 << 6),
558 ATA_TIMING_UDMA = (1 << 7),
559 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
560 ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
561 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
562 ATA_TIMING_CYCLE | ATA_TIMING_UDMA,
563};
564
1da177e4
LT		 565
566#ifdef CONFIG_PCI
567struct pci_bits {
568 unsigned int reg; /* PCI config register to read */
569 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */
570 unsigned long mask;
571 unsigned long val;
572};
573
374b1873 574extern void ata_pci_host_stop (struct ata_host_set *host_set);
1da177e4 575extern struct ata_probe_ent *
47a86593 576ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask);
057ace5e 577extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
1da177e4
LT		 578
579#endif /* CONFIG_PCI */
580
581
972c26bd
JG		 582static inline int
583ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
584{
585 if (sg == &qc->pad_sgent)
586 return 1;
587 if (qc->pad_len)
588 return 0;
589 if (((sg - qc->__sg) + 1) == qc->n_elem)
590 return 1;
591 return 0;
592}
593
cedc9a47
JG		 594static inline struct scatterlist *
595ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
596{
597 if (sg == &qc->pad_sgent)
598 return NULL;
599 if (++sg - qc->__sg < qc->n_elem)
600 return sg;
601 return qc->pad_len ? &qc->pad_sgent : NULL;
602}
603
604#define ata_for_each_sg(sg, qc) \
605 for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc))
606
1da177e4
LT		 607static inline unsigned int ata_tag_valid(unsigned int tag)
608{
609 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
610}
611
057ace5e 612static inline unsigned int ata_dev_present(const struct ata_device *dev)
1da177e4
LT		 613{
614 return ((dev->class == ATA_DEV_ATA) ||
615 (dev->class == ATA_DEV_ATAPI));
616}
617
618static inline u8 ata_chk_status(struct ata_port *ap)
619{
620 return ap->ops->check_status(ap);
621}
622
0baab86b
EF		 623
624/**
625 * ata_pause - Flush writes and pause 400 nanoseconds.
626 * @ap: Port to wait for.
627 *
628 * LOCKING:
629 * Inherited from caller.
630 */
631
1da177e4
LT		 632static inline void ata_pause(struct ata_port *ap)
633{
634 ata_altstatus(ap);
635 ndelay(400);
636}
637
0baab86b
EF		 638
639/**
640 * ata_busy_wait - Wait for a port status register
641 * @ap: Port to wait for.
642 *
643 * Waits up to max*10 microseconds for the selected bits in the port's
644 * status register to be cleared.
645 * Returns final value of status register.
646 *
647 * LOCKING:
648 * Inherited from caller.
649 */
650
1da177e4
LT		 651static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
652 unsigned int max)
653{
654 u8 status;
655
656 do {
657 udelay(10);
658 status = ata_chk_status(ap);
659 max--;
660 } while ((status & bits) && (max > 0));
661
662 return status;
663}
664
0baab86b
EF		 665
666/**
667 * ata_wait_idle - Wait for a port to be idle.
668 * @ap: Port to wait for.
669 *
670 * Waits up to 10ms for port's BUSY and DRQ signals to clear.
671 * Returns final value of status register.
672 *
673 * LOCKING:
674 * Inherited from caller.
675 */
676
1da177e4
LT		 677static inline u8 ata_wait_idle(struct ata_port *ap)
678{
679 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
680
681 if (status & (ATA_BUSY | ATA_DRQ)) {
682 unsigned long l = ap->ioaddr.status_addr;
bfd60579
RD		 683 if (ata_msg_warn(ap))
684 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
685 status, l);
1da177e4
LT		 686 }
687
688 return status;
689}
690
691static inline void ata_qc_set_polling(struct ata_queued_cmd *qc)
692{
693 qc->tf.ctl |= ATA_NIEN;
694}
695
696static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap,
697 unsigned int tag)
698{
699 if (likely(ata_tag_valid(tag)))
700 return &ap->qcmd[tag];
701 return NULL;
702}
703
704static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device)
705{
706 memset(tf, 0, sizeof(*tf));
707
708 tf->ctl = ap->ctl;
709 if (device == 0)
710 tf->device = ATA_DEVICE_OBS;
711 else
712 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
713}
714
2c13b7ce
JG		 715static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
716{
717 qc->__sg = NULL;
718 qc->flags = 0;
719 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
720 qc->nsect = 0;
721 qc->nbytes = qc->curbytes = 0;
a22e2eb0 722 qc->err_mask = 0;
2c13b7ce
JG		 723
724 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
725}
726
0baab86b
EF		 727
728/**
729 * ata_irq_on - Enable interrupts on a port.
730 * @ap: Port on which interrupts are enabled.
731 *
732 * Enable interrupts on a legacy IDE device using MMIO or PIO,
733 * wait for idle, clear any pending interrupts.
734 *
735 * LOCKING:
736 * Inherited from caller.
737 */
738
1da177e4
LT		 739static inline u8 ata_irq_on(struct ata_port *ap)
740{
741 struct ata_ioports *ioaddr = &ap->ioaddr;
742 u8 tmp;
743
744 ap->ctl &= ~ATA_NIEN;
745 ap->last_ctl = ap->ctl;
746
747 if (ap->flags & ATA_FLAG_MMIO)
748 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
749 else
750 outb(ap->ctl, ioaddr->ctl_addr);
751 tmp = ata_wait_idle(ap);
752
753 ap->ops->irq_clear(ap);
754
755 return tmp;
756}
757
0baab86b
EF		 758
759/**
760 * ata_irq_ack - Acknowledge a device interrupt.
761 * @ap: Port on which interrupts are enabled.
762 *
763 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
764 * or BUSY+DRQ clear). Obtain dma status and port status from
765 * device. Clear the interrupt. Return port status.
766 *
767 * LOCKING:
768 */
769
1da177e4
LT		 770static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
771{
772 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
773 u8 host_stat, post_stat, status;
774
775 status = ata_busy_wait(ap, bits, 1000);
776 if (status & bits)
bfd60579
RD		 777 if (ata_msg_err(ap))
778 printk(KERN_ERR "abnormal status 0x%X\n", status);
1da177e4
LT		 779
780 /* get controller status; clear intr, err bits */
781 if (ap->flags & ATA_FLAG_MMIO) {
782 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
783 host_stat = readb(mmio + ATA_DMA_STATUS);
784 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
785 mmio + ATA_DMA_STATUS);
786
787 post_stat = readb(mmio + ATA_DMA_STATUS);
788 } else {
789 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
790 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
791 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
792
793 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
794 }
795
bfd60579
RD		 796 if (ata_msg_intr(ap))
797 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
798 __FUNCTION__,
799 host_stat, post_stat, status);
1da177e4
LT		 800
801 return status;
802}
803
804static inline u32 scr_read(struct ata_port *ap, unsigned int reg)
805{
806 return ap->ops->scr_read(ap, reg);
807}
808
809static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val)
810{
811 ap->ops->scr_write(ap, reg, val);
812}
813
8a60a071 814static inline void scr_write_flush(struct ata_port *ap, unsigned int reg,
cdcca89e
BR		 815 u32 val)
816{
817 ap->ops->scr_write(ap, reg, val);
818 (void) ap->ops->scr_read(ap, reg);
819}
820
1da177e4
LT		 821static inline unsigned int sata_dev_present(struct ata_port *ap)
822{
823 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0;
824}
825
057ace5e 826static inline int ata_try_flush_cache(const struct ata_device *dev)
1da177e4
LT		 827{
828 return ata_id_wcache_enabled(dev->id) ||
829 ata_id_has_flush(dev->id) ||
830 ata_id_has_flush_ext(dev->id);
831}
832
a7dac447
JG		 833static inline unsigned int ac_err_mask(u8 status)
834{
835 if (status & ATA_BUSY)
836 return AC_ERR_ATA_BUS;
837 if (status & (ATA_ERR | ATA_DF))
838 return AC_ERR_DEV;
839 return 0;
840}
841
842static inline unsigned int __ac_err_mask(u8 status)
843{
844 unsigned int mask = ac_err_mask(status);
845 if (mask == 0)
846 return AC_ERR_OTHER;
847 return mask;
848}
849
6037d6bb
JG		 850static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
851{
852 ap->pad_dma = 0;
853 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
854 &ap->pad_dma, GFP_KERNEL);
855 return (ap->pad == NULL) ? -ENOMEM : 0;
856}
857
858static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
859{
860 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
861}
862
1da177e4 863#endif /* __LINUX_LIBATA_H__ */