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ide: make ide_unregister() take 'ide_hwif_t *' as an argument (take 2)
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / include / linux / ide.h
CommitLineData
1da177e4
LT		 1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT		 9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
1da177e4
LT		 12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
e3a59b4d
HR		 20#ifdef CONFIG_BLK_DEV_IDEACPI
21#include <acpi/acpi.h>
22#endif
1da177e4
LT		 23#include <asm/byteorder.h>
24#include <asm/system.h>
25#include <asm/io.h>
f9383c42 26#include <asm/mutex.h>
1da177e4 27
729d4de9 28#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
4ee06b7e
BZ		 29# define SUPPORT_VLB_SYNC 0
30#else
31# define SUPPORT_VLB_SYNC 1
1da177e4
LT		 32#endif
33
34/*
35 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
36 * number.
37 */
38
39#define IDE_NO_IRQ (-1)
40
1da177e4
LT		 41typedef unsigned char byte; /* used everywhere */
42
43/*
44 * Probably not wise to fiddle with these
45 */
46#define ERROR_MAX 8 /* Max read/write errors per sector */
47#define ERROR_RESET 3 /* Reset controller every 4th retry */
48#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
49
1da177e4
LT		 50/*
51 * state flags
52 */
53
54#define DMA_PIO_RETRY 1 /* retrying in PIO */
55
56#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
57#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
58
59/*
60 * Definitions for accessing IDE controller registers
61 */
62#define IDE_NR_PORTS (10)
63
64#define IDE_DATA_OFFSET (0)
65#define IDE_ERROR_OFFSET (1)
66#define IDE_NSECTOR_OFFSET (2)
67#define IDE_SECTOR_OFFSET (3)
68#define IDE_LCYL_OFFSET (4)
69#define IDE_HCYL_OFFSET (5)
70#define IDE_SELECT_OFFSET (6)
71#define IDE_STATUS_OFFSET (7)
72#define IDE_CONTROL_OFFSET (8)
73#define IDE_IRQ_OFFSET (9)
74
75#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
76#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
23579a2a
BZ		 77#define IDE_ALTSTATUS_OFFSET IDE_CONTROL_OFFSET
78#define IDE_IREASON_OFFSET IDE_NSECTOR_OFFSET
79#define IDE_BCOUNTL_OFFSET IDE_LCYL_OFFSET
80#define IDE_BCOUNTH_OFFSET IDE_HCYL_OFFSET
1da177e4
LT		 81
82#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
83#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
84#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
85#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
86#define DRIVE_READY (READY_STAT | SEEK_STAT)
1da177e4
LT		 87
88#define BAD_CRC (ABRT_ERR | ICRC_ERR)
89
90#define SATA_NR_PORTS (3) /* 16 possible ?? */
91
92#define SATA_STATUS_OFFSET (0)
1da177e4 93#define SATA_ERROR_OFFSET (1)
1da177e4 94#define SATA_CONTROL_OFFSET (2)
1da177e4 95
1da177e4
LT		 96/*
97 * Our Physical Region Descriptor (PRD) table should be large enough
98 * to handle the biggest I/O request we are likely to see. Since requests
99 * can have no more than 256 sectors, and since the typical blocksize is
100 * two or more sectors, we could get by with a limit of 128 entries here for
101 * the usual worst case. Most requests seem to include some contiguous blocks,
102 * further reducing the number of table entries required.
103 *
104 * The driver reverts to PIO mode for individual requests that exceed
105 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
106 * 100% of all crazy scenarios here is not necessary.
107 *
108 * As it turns out though, we must allocate a full 4KB page for this,
109 * so the two PRD tables (ide0 & ide1) will each get half of that,
110 * allowing each to have about 256 entries (8 bytes each) from this.
111 */
112#define PRD_BYTES 8
113#define PRD_ENTRIES 256
114
115/*
116 * Some more useful definitions
117 */
118#define PARTN_BITS 6 /* number of minor dev bits for partitions */
119#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
120#define SECTOR_SIZE 512
121#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
122#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
123
124/*
125 * Timeouts for various operations:
126 */
127#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
128#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
129#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
130#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
131#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
132#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
133
1da177e4
LT		 134/*
135 * Check for an interrupt and acknowledge the interrupt status
136 */
137struct hwif_s;
138typedef int (ide_ack_intr_t)(struct hwif_s *);
139
1da177e4
LT		 140/*
141 * hwif_chipset_t is used to keep track of the specific hardware
142 * chipset used by each IDE interface, if known.
143 */
528a572d 144enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT		 145 ide_cmd640, ide_dtc2278, ide_ali14xx,
146 ide_qd65xx, ide_umc8672, ide_ht6560b,
147 ide_rz1000, ide_trm290,
148 ide_cmd646, ide_cy82c693, ide_4drives,
149 ide_pmac, ide_etrax100, ide_acorn,
9a0e77f2 150 ide_au1xxx, ide_palm3710
528a572d
BZ		 151};
152
153typedef u8 hwif_chipset_t;
1da177e4
LT		 154
155/*
156 * Structure to hold all information about the location of this port
157 */
158typedef struct hw_regs_s {
159 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
160 int irq; /* our irq number */
1da177e4
LT		 161 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
162 hwif_chipset_t chipset;
4349d5cd 163 struct device *dev;
1da177e4
LT		 164} hw_regs_t;
165
cbb010c1 166void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 167void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 168
1da177e4
LT		 169static inline void ide_std_init_ports(hw_regs_t *hw,
170 unsigned long io_addr,
171 unsigned long ctl_addr)
172{
173 unsigned int i;
174
175 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
176 hw->io_ports[i] = io_addr++;
177
178 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
179}
180
181#include <asm/ide.h>
182
83d7dbc4
MM		 183#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
184#undef MAX_HWIFS
83ae20c8
BH		 185#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
186#endif
187
1da177e4
LT		 188/* Currently only m68k, apus and m8xx need it */
189#ifndef IDE_ARCH_ACK_INTR
190# define ide_ack_intr(hwif) (1)
191#endif
192
193/* Currently only Atari needs it */
194#ifndef IDE_ARCH_LOCK
195# define ide_release_lock() do {} while (0)
196# define ide_get_lock(hdlr, data) do {} while (0)
197#endif /* IDE_ARCH_LOCK */
198
199/*
200 * Now for the data we need to maintain per-drive: ide_drive_t
201 */
202
203#define ide_scsi 0x21
204#define ide_disk 0x20
205#define ide_optical 0x7
206#define ide_cdrom 0x5
207#define ide_tape 0x1
208#define ide_floppy 0x0
209
210/*
211 * Special Driver Flags
212 *
213 * set_geometry : respecify drive geometry
214 * recalibrate : seek to cyl 0
215 * set_multmode : set multmode count
216 * set_tune : tune interface for drive
217 * serviced : service command
218 * reserved : unused
219 */
220typedef union {
221 unsigned all : 8;
222 struct {
1da177e4
LT		 223 unsigned set_geometry : 1;
224 unsigned recalibrate : 1;
225 unsigned set_multmode : 1;
226 unsigned set_tune : 1;
227 unsigned serviced : 1;
228 unsigned reserved : 3;
1da177e4
LT		 229 } b;
230} special_t;
231
1da177e4
LT		 232/*
233 * ATA-IDE Select Register, aka Device-Head
234 *
235 * head : always zeros here
236 * unit : drive select number: 0/1
237 * bit5 : always 1
238 * lba : using LBA instead of CHS
239 * bit7 : always 1
240 */
241typedef union {
242 unsigned all : 8;
243 struct {
244#if defined(__LITTLE_ENDIAN_BITFIELD)
245 unsigned head : 4;
246 unsigned unit : 1;
247 unsigned bit5 : 1;
248 unsigned lba : 1;
249 unsigned bit7 : 1;
250#elif defined(__BIG_ENDIAN_BITFIELD)
251 unsigned bit7 : 1;
252 unsigned lba : 1;
253 unsigned bit5 : 1;
254 unsigned unit : 1;
255 unsigned head : 4;
256#else
257#error "Please fix <asm/byteorder.h>"
258#endif
259 } b;
260} select_t, ata_select_t;
261
1da177e4
LT		 262/*
263 * Status returned from various ide_ functions
264 */
265typedef enum {
266 ide_stopped, /* no drive operation was started */
267 ide_started, /* a drive operation was started, handler was set */
268} ide_startstop_t;
269
270struct ide_driver_s;
271struct ide_settings_s;
272
e3a59b4d
HR		 273#ifdef CONFIG_BLK_DEV_IDEACPI
274struct ide_acpi_drive_link;
275struct ide_acpi_hwif_link;
276#endif
277
1da177e4
LT		 278typedef struct ide_drive_s {
279 char name[4]; /* drive name, such as "hda" */
280 char driver_req[10]; /* requests specific driver */
281
165125e1 282 struct request_queue *queue; /* request queue */
1da177e4
LT		 283
284 struct request *rq; /* current request */
285 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT		 286 void *driver_data; /* extra driver data */
287 struct hd_driveid *id; /* drive model identification info */
7662d046 288#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 289 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
290 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 291#endif
1da177e4
LT		 292 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
293
294 unsigned long sleep; /* sleep until this time */
295 unsigned long service_start; /* time we started last request */
296 unsigned long service_time; /* service time of last request */
297 unsigned long timeout; /* max time to wait for irq */
298
299 special_t special; /* special action flags */
300 select_t select; /* basic drive/head select reg value */
301
302 u8 keep_settings; /* restore settings after drive reset */
1da177e4
LT		 303 u8 using_dma; /* disk is using dma for read/write */
304 u8 retry_pio; /* retrying dma capable host in pio */
305 u8 state; /* retry state */
306 u8 waiting_for_dma; /* dma currently in progress */
307 u8 unmask; /* okay to unmask other irqs */
36193484 308 u8 noflush; /* don't attempt flushes */
1da177e4
LT		 309 u8 dsc_overlap; /* DSC overlap */
310 u8 nice1; /* give potential excess bandwidth */
311
312 unsigned present : 1; /* drive is physically present */
313 unsigned dead : 1; /* device ejected hint */
314 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
315 unsigned noprobe : 1; /* from: hdx=noprobe */
316 unsigned removable : 1; /* 1 if need to do check_media_change */
317 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT		 318 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
319 unsigned no_unmask : 1; /* disallow setting unmask bit */
320 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
321 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
1da177e4 322 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 323 unsigned nodma : 1; /* disallow DMA */
1da177e4
LT		 324 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
325 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
326 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT		 327 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
328 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
329 unsigned post_reset : 1;
7f8f48af 330 unsigned udma33_warned : 1;
1da177e4 331
1497943e 332 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT		 333 u8 quirk_list; /* considered quirky, set for a specific host */
334 u8 init_speed; /* transfer rate set at boot */
1da177e4 335 u8 current_speed; /* current transfer rate set */
513daadd 336 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT		 337 u8 dn; /* now wide spread use */
338 u8 wcache; /* status of write cache */
339 u8 acoustic; /* acoustic management */
340 u8 media; /* disk, cdrom, tape, floppy, ... */
23579a2a 341 u8 ctl; /* "normal" value for Control register */
1da177e4
LT		 342 u8 ready_stat; /* min status value for drive ready */
343 u8 mult_count; /* current multiple sector setting */
344 u8 mult_req; /* requested multiple sector setting */
345 u8 tune_req; /* requested drive tuning setting */
346 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
347 u8 bad_wstat; /* used for ignoring WRERR_STAT */
348 u8 nowerr; /* used for ignoring WRERR_STAT */
349 u8 sect0; /* offset of first sector for DM6:DDO */
350 u8 head; /* "real" number of heads */
351 u8 sect; /* "real" sectors per track */
352 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
353 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
354
355 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
356 unsigned int cyl; /* "real" number of cyls */
26bcb879 357 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT		 358 unsigned int failures; /* current failure count */
359 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 360 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT		 361
362 u64 capacity64; /* total number of sectors */
363
364 int lun; /* logical unit */
365 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR		 366#ifdef CONFIG_BLK_DEV_IDEACPI
367 struct ide_acpi_drive_link *acpidata;
368#endif
1da177e4
LT		 369 struct list_head list;
370 struct device gendev;
f36d4024 371 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT		 372} ide_drive_t;
373
8604affd
BZ		 374#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
375
1da177e4
LT		 376#define IDE_CHIPSET_PCI_MASK \
377 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
378#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
379
039788e1 380struct ide_port_info;
1da177e4 381
ac95beed
BZ		 382struct ide_port_ops {
383 /* host specific initialization of devices on a port */
384 void (*port_init_devs)(struct hwif_s *);
385 /* routine to program host for PIO mode */
386 void (*set_pio_mode)(ide_drive_t *, const u8);
387 /* routine to program host for DMA mode */
388 void (*set_dma_mode)(ide_drive_t *, const u8);
389 /* tweaks hardware to select drive */
390 void (*selectproc)(ide_drive_t *);
391 /* chipset polling based on hba specifics */
392 int (*reset_poll)(ide_drive_t *);
393 /* chipset specific changes to default for device-hba resets */
394 void (*pre_reset)(ide_drive_t *);
395 /* routine to reset controller after a disk reset */
396 void (*resetproc)(ide_drive_t *);
397 /* special host masking for drive selection */
398 void (*maskproc)(ide_drive_t *, int);
399 /* check host's drive quirk list */
400 void (*quirkproc)(ide_drive_t *);
401
402 u8 (*mdma_filter)(ide_drive_t *);
403 u8 (*udma_filter)(ide_drive_t *);
404
405 u8 (*cable_detect)(struct hwif_s *);
406};
407
5e37bdc0
BZ		 408struct ide_dma_ops {
409 void (*dma_host_set)(struct ide_drive_s *, int);
410 int (*dma_setup)(struct ide_drive_s *);
411 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
412 void (*dma_start)(struct ide_drive_s *);
413 int (*dma_end)(struct ide_drive_s *);
414 int (*dma_test_irq)(struct ide_drive_s *);
415 void (*dma_lost_irq)(struct ide_drive_s *);
416 void (*dma_timeout)(struct ide_drive_s *);
417};
418
1da177e4
LT		 419typedef struct hwif_s {
420 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
421 struct hwif_s *mate; /* other hwif from same PCI chip */
422 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
423 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
424
425 char name[6]; /* name of interface, eg. "ide0" */
426
427 /* task file registers for pata and sata */
428 unsigned long io_ports[IDE_NR_PORTS];
429 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 430
1da177e4
LT		 431 ide_drive_t drives[MAX_DRIVES]; /* drive info */
432
433 u8 major; /* our major number */
434 u8 index; /* 0 for ide0; 1 for ide1; ... */
435 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4
LT		 436 u8 bus_state; /* power state of the IDE bus */
437
e95d9c6b 438 u32 host_flags;
6a824c92 439
4099d143
BZ		 440 u8 pio_mask;
441
1da177e4
LT		 442 u8 ultra_mask;
443 u8 mwdma_mask;
444 u8 swdma_mask;
445
49521f97
BZ		 446 u8 cbl; /* cable type */
447
1da177e4
LT		 448 hwif_chipset_t chipset; /* sub-module for tuning.. */
449
36501650
BZ		 450 struct device *dev;
451
18e181fe
BZ		 452 ide_ack_intr_t *ack_intr;
453
1da177e4
LT		 454 void (*rw_disk)(ide_drive_t *, struct request *);
455
ac95beed 456 const struct ide_port_ops *port_ops;
f37afdac 457 const struct ide_dma_ops *dma_ops;
bfa14b42 458
1da177e4
LT		 459 void (*ata_input_data)(ide_drive_t *, void *, u32);
460 void (*ata_output_data)(ide_drive_t *, void *, u32);
461
462 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
463 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
464
f0dd8712 465 void (*ide_dma_clear_irq)(ide_drive_t *drive);
1da177e4
LT		 466
467 void (*OUTB)(u8 addr, unsigned long port);
468 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
469 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT		 470 void (*OUTSW)(unsigned long port, void *addr, u32 count);
471 void (*OUTSL)(unsigned long port, void *addr, u32 count);
472
473 u8 (*INB)(unsigned long port);
474 u16 (*INW)(unsigned long port);
1da177e4
LT		 475 void (*INSW)(unsigned long port, void *addr, u32 count);
476 void (*INSL)(unsigned long port, void *addr, u32 count);
477
478 /* dma physical region descriptor table (cpu view) */
479 unsigned int *dmatable_cpu;
480 /* dma physical region descriptor table (dma view) */
481 dma_addr_t dmatable_dma;
482 /* Scatter-gather list used to build the above */
483 struct scatterlist *sg_table;
484 int sg_max_nents; /* Maximum number of entries in it */
485 int sg_nents; /* Current number of entries in it */
486 int sg_dma_direction; /* dma transfer direction */
487
488 /* data phase of the active command (currently only valid for PIO/DMA) */
489 int data_phase;
490
491 unsigned int nsect;
492 unsigned int nleft;
55c16a70 493 struct scatterlist *cursg;
1da177e4
LT		 494 unsigned int cursg_ofs;
495
1da177e4
LT		 496 int rqsize; /* max sectors per request */
497 int irq; /* our irq number */
498
1da177e4
LT		 499 unsigned long dma_base; /* base addr for dma ports */
500 unsigned long dma_command; /* dma command register */
501 unsigned long dma_vendor1; /* dma vendor 1 register */
502 unsigned long dma_status; /* dma status register */
503 unsigned long dma_vendor3; /* dma vendor 3 register */
504 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 505
1da177e4
LT		 506 unsigned long config_data; /* for use by chipset-specific code */
507 unsigned long select_data; /* for use by chipset-specific code */
508
020e322d
SS		 509 unsigned long extra_base; /* extra addr for dma ports */
510 unsigned extra_ports; /* number of extra dma ports */
511
1da177e4 512 unsigned present : 1; /* this interface exists */
1da177e4
LT		 513 unsigned serialized : 1; /* serialized all channel operation */
514 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
1da177e4 515 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
2ad1e558 516 unsigned mmio : 1; /* host uses MMIO */
1da177e4 517
f74c9141
BZ		 518 struct device gendev;
519 struct device *portdev;
520
f36d4024 521 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT		 522
523 void *hwif_data; /* extra hwif data */
524
525 unsigned dma;
e3a59b4d
HR		 526
527#ifdef CONFIG_BLK_DEV_IDEACPI
528 struct ide_acpi_hwif_link *acpidata;
529#endif
22fc6ecc 530} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT		 531
532/*
533 * internal ide interrupt handler type
534 */
1da177e4
LT		 535typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
536typedef int (ide_expiry_t)(ide_drive_t *);
537
0eea6458
BP		 538/* used by ide-cd, ide-floppy, etc. */
539typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
540
1da177e4
LT		 541typedef struct hwgroup_s {
542 /* irq handler, if active */
543 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 544
1da177e4
LT		 545 /* BOOL: protects all fields below */
546 volatile int busy;
547 /* BOOL: wake us up on timer expiry */
548 unsigned int sleeping : 1;
549 /* BOOL: polling active & poll_timeout field valid */
550 unsigned int polling : 1;
913759ac
AC		 551 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
552 unsigned int resetting : 1;
553
1da177e4
LT		 554 /* current drive */
555 ide_drive_t *drive;
556 /* ptr to current hwif in linked-list */
557 ide_hwif_t *hwif;
558
1da177e4
LT		 559 /* current request */
560 struct request *rq;
a6fbb1c8 561
1da177e4
LT		 562 /* failsafe timer */
563 struct timer_list timer;
1da177e4
LT		 564 /* timeout value during long polls */
565 unsigned long poll_timeout;
566 /* queried upon timeouts */
567 int (*expiry)(ide_drive_t *);
a6fbb1c8 568
23450319
SS		 569 int req_gen;
570 int req_gen_timer;
1da177e4
LT		 571} ide_hwgroup_t;
572
7662d046
BZ		 573typedef struct ide_driver_s ide_driver_t;
574
f9383c42 575extern struct mutex ide_setting_mtx;
1da177e4 576
7662d046
BZ		 577int set_io_32bit(ide_drive_t *, int);
578int set_pio_mode(ide_drive_t *, int);
579int set_using_dma(ide_drive_t *, int);
580
eaec3e7d
BP		 581/* ATAPI packet command flags */
582enum {
583 /* set when an error is considered normal - no retry (ide-tape) */
584 PC_FLAG_ABORT = (1 << 0),
585 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
586 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
587 PC_FLAG_DMA_OK = (1 << 3),
588 PC_FLAG_DMA_RECOMMENDED = (1 << 4),
589 PC_FLAG_DMA_IN_PROGRESS = (1 << 5),
590 PC_FLAG_DMA_ERROR = (1 << 6),
591 PC_FLAG_WRITING = (1 << 7),
592 /* command timed out */
593 PC_FLAG_TIMEDOUT = (1 << 8),
594};
595
8303b46e
BP		 596struct ide_atapi_pc {
597 /* actual packet bytes */
598 u8 c[12];
599 /* incremented on each retry */
600 int retries;
601 int error;
602
603 /* bytes to transfer */
604 int req_xfer;
605 /* bytes actually transferred */
606 int xferred;
607
608 /* data buffer */
609 u8 *buf;
610 /* current buffer position */
611 u8 *cur_pos;
612 int buf_size;
613 /* missing/available data on the current buffer */
614 int b_count;
615
616 /* the corresponding request */
617 struct request *rq;
618
619 unsigned long flags;
620
621 /*
622 * those are more or less driver-specific and some of them are subject
623 * to change/removal later.
624 */
625 u8 pc_buf[256];
626 void (*idefloppy_callback) (ide_drive_t *);
627 ide_startstop_t (*idetape_callback) (ide_drive_t *);
628
629 /* idetape only */
630 struct idetape_bh *bh;
631 char *b_data;
632
633 /* idescsi only for now */
634 struct scatterlist *sg;
635 unsigned int sg_cnt;
636
637 struct scsi_cmnd *scsi_cmd;
638 void (*done) (struct scsi_cmnd *);
639
640 unsigned long timeout;
641};
642
7662d046 643#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT		 644/*
645 * configurable drive settings
646 */
647
648#define TYPE_INT 0
1497943e
BZ		 649#define TYPE_BYTE 1
650#define TYPE_SHORT 2
1da177e4
LT		 651
652#define SETTING_READ (1 << 0)
653#define SETTING_WRITE (1 << 1)
654#define SETTING_RW (SETTING_READ | SETTING_WRITE)
655
656typedef int (ide_procset_t)(ide_drive_t *, int);
657typedef struct ide_settings_s {
658 char *name;
659 int rw;
1da177e4
LT		 660 int data_type;
661 int min;
662 int max;
663 int mul_factor;
664 int div_factor;
665 void *data;
666 ide_procset_t *set;
667 int auto_remove;
668 struct ide_settings_s *next;
669} ide_settings_t;
670
1497943e 671int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT		 672
673/*
674 * /proc/ide interface
675 */
676typedef struct {
677 const char *name;
678 mode_t mode;
679 read_proc_t *read_proc;
680 write_proc_t *write_proc;
681} ide_proc_entry_t;
682
ecfd80e4
BZ		 683void proc_ide_create(void);
684void proc_ide_destroy(void);
5cbf79cd 685void ide_proc_register_port(ide_hwif_t *);
d9270a3f 686void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 687void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 688void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ		 689void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
690void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
691
692void ide_add_generic_settings(ide_drive_t *);
693
1da177e4
LT		 694read_proc_t proc_ide_read_capacity;
695read_proc_t proc_ide_read_geometry;
696
697#ifdef CONFIG_BLK_DEV_IDEPCI
698void ide_pci_create_host_proc(const char *, get_info_t *);
699#endif
700
701/*
702 * Standard exit stuff:
703 */
704#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
705{ \
706 len -= off; \
707 if (len < count) { \
708 *eof = 1; \
709 if (len <= 0) \
710 return 0; \
711 } else \
712 len = count; \
713 *start = page + off; \
714 return len; \
715}
716#else
ecfd80e4
BZ		 717static inline void proc_ide_create(void) { ; }
718static inline void proc_ide_destroy(void) { ; }
5cbf79cd 719static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 720static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 721static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 722static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ		 723static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
724static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
725static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT		 726#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
727#endif
728
729/*
730 * Power Management step value (rq->pm->pm_step).
731 *
732 * The step value starts at 0 (ide_pm_state_start_suspend) for a
733 * suspend operation or 1000 (ide_pm_state_start_resume) for a
734 * resume operation.
735 *
736 * For each step, the core calls the subdriver start_power_step() first.
737 * This can return:
738 * - ide_stopped : In this case, the core calls us back again unless
739 * step have been set to ide_power_state_completed.
740 * - ide_started : In this case, the channel is left busy until an
741 * async event (interrupt) occurs.
742 * Typically, start_power_step() will issue a taskfile request with
743 * do_rw_taskfile().
744 *
745 * Upon reception of the interrupt, the core will call complete_power_step()
746 * with the error code if any. This routine should update the step value
747 * and return. It should not start a new request. The core will call
748 * start_power_step for the new step value, unless step have been set to
749 * ide_power_state_completed.
750 *
751 * Subdrivers are expected to define their own additional power
752 * steps from 1..999 for suspend and from 1001..1999 for resume,
753 * other values are reserved for future use.
754 */
755
756enum {
757 ide_pm_state_completed = -1,
758 ide_pm_state_start_suspend = 0,
759 ide_pm_state_start_resume = 1000,
760};
761
762/*
763 * Subdrivers support.
4ef3b8f4
LR		 764 *
765 * The gendriver.owner field should be set to the module owner of this driver.
766 * The gendriver.name field should be set to the name of this driver
1da177e4 767 */
7662d046 768struct ide_driver_s {
1da177e4
LT		 769 const char *version;
770 u8 media;
1da177e4 771 unsigned supports_dsc_overlap : 1;
1da177e4
LT		 772 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
773 int (*end_request)(ide_drive_t *, int, int);
774 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
775 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 776 struct device_driver gen_driver;
4031bbe4
RK		 777 int (*probe)(ide_drive_t *);
778 void (*remove)(ide_drive_t *);
0d2157f7 779 void (*resume)(ide_drive_t *);
4031bbe4 780 void (*shutdown)(ide_drive_t *);
7662d046
BZ		 781#ifdef CONFIG_IDE_PROC_FS
782 ide_proc_entry_t *proc;
783#endif
784};
1da177e4 785
4031bbe4
RK		 786#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
787
1da177e4
LT		 788int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
789
790/*
791 * ide_hwifs[] is the master data structure used to keep track
792 * of just about everything in ide.c. Whenever possible, routines
793 * should be using pointers to a drive (ide_drive_t *) or
794 * pointers to a hwif (ide_hwif_t *), rather than indexing this
795 * structure directly (the allocation/layout may change!).
796 *
797 */
798#ifndef _IDE_C
799extern ide_hwif_t ide_hwifs[]; /* master data repository */
800#endif
1dbfeb4b
BZ		 801extern int ide_noacpi;
802extern int ide_acpigtf;
803extern int ide_acpionboot;
1da177e4
LT		 804extern int noautodma;
805
ebae41a5
BZ		 806extern int ide_vlb_clk;
807extern int ide_pci_clk;
808
fe80b937
BZ		 809ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
810
811static inline ide_hwif_t *ide_find_port(void)
812{
813 return ide_find_port_slot(NULL);
814}
815
1da177e4 816extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC		 817int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
818 int uptodate, int nr_sectors);
1da177e4 819
1da177e4
LT		 820extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
821
cd2a2d96
BZ		 822void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
823 ide_expiry_t *);
1da177e4
LT		 824
825ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
826
1da177e4
LT		 827ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
828
829ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
830
1da177e4
LT		 831extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
832
833extern void ide_fix_driveid(struct hd_driveid *);
01745112 834
1da177e4
LT		 835extern void ide_fixstring(u8 *, const int, const int);
836
74af21cf 837int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 838
1da177e4
LT		 839extern ide_startstop_t ide_do_reset (ide_drive_t *);
840
1da177e4
LT		 841extern void ide_init_drive_cmd (struct request *rq);
842
1da177e4
LT		 843/*
844 * "action" parameter type for ide_do_drive_cmd() below.
845 */
846typedef enum {
847 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT		 848 ide_preempt, /* insert rq in front of current request */
849 ide_head_wait, /* insert rq in front of current request and wait for it */
850 ide_end /* insert rq at end of list, but don't wait for it */
851} ide_action_t;
852
1da177e4
LT		 853extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
854
1da177e4
LT		 855extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
856
9e42237f
BZ		 857enum {
858 IDE_TFLAG_LBA48 = (1 << 0),
859 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
74095a91
BZ		 860 IDE_TFLAG_FLAGGED = (1 << 2),
861 IDE_TFLAG_OUT_DATA = (1 << 3),
862 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
863 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
864 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
865 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
866 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
867 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
868 IDE_TFLAG_OUT_HOB_NSECT |
869 IDE_TFLAG_OUT_HOB_LBAL |
870 IDE_TFLAG_OUT_HOB_LBAM |
871 IDE_TFLAG_OUT_HOB_LBAH,
872 IDE_TFLAG_OUT_FEATURE = (1 << 9),
873 IDE_TFLAG_OUT_NSECT = (1 << 10),
874 IDE_TFLAG_OUT_LBAL = (1 << 11),
875 IDE_TFLAG_OUT_LBAM = (1 << 12),
876 IDE_TFLAG_OUT_LBAH = (1 << 13),
877 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
878 IDE_TFLAG_OUT_NSECT |
879 IDE_TFLAG_OUT_LBAL |
880 IDE_TFLAG_OUT_LBAM |
881 IDE_TFLAG_OUT_LBAH,
807e35d6 882 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 883 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ		 884 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
885 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 886 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 887 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ		 888 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
889 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
890 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
891 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
892 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
893 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
894 IDE_TFLAG_IN_HOB_LBAM |
895 IDE_TFLAG_IN_HOB_LBAH,
896 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
897 IDE_TFLAG_IN_HOB_NSECT |
898 IDE_TFLAG_IN_HOB_LBA,
899 IDE_TFLAG_IN_NSECT = (1 << 25),
900 IDE_TFLAG_IN_LBAL = (1 << 26),
901 IDE_TFLAG_IN_LBAM = (1 << 27),
902 IDE_TFLAG_IN_LBAH = (1 << 28),
903 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
904 IDE_TFLAG_IN_LBAM |
905 IDE_TFLAG_IN_LBAH,
906 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
907 IDE_TFLAG_IN_LBA,
908 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ		 909 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
910 IDE_TFLAG_IN_HOB,
911 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
912 IDE_TFLAG_IN_TF,
913 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
914 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH		 915 /* force 16-bit I/O operations */
916 IDE_TFLAG_IO_16BIT = (1 << 30),
395d8ef5
BZ		 917 /* ide_task_t was allocated using kmalloc() */
918 IDE_TFLAG_DYN = (1 << 31),
9e42237f
BZ		 919};
920
650d841d
BZ		 921struct ide_taskfile {
922 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
923
924 u8 hob_feature; /* 1-5: additional data to support LBA48 */
925 u8 hob_nsect;
926 u8 hob_lbal;
927 u8 hob_lbam;
928 u8 hob_lbah;
929
930 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
931
932 union { /*  7: */
933 u8 error; /* read: error */
934 u8 feature; /* write: feature */
935 };
936
937 u8 nsect; /* 8: number of sectors */
938 u8 lbal; /* 9: LBA low */
939 u8 lbam; /* 10: LBA mid */
940 u8 lbah; /* 11: LBA high */
941
942 u8 device; /* 12: device select */
943
944 union { /* 13: */
945 u8 status; /*  read: status  */
946 u8 command; /* write: command */
947 };
948};
949
1da177e4 950typedef struct ide_task_s {
650d841d
BZ		 951 union {
952 struct ide_taskfile tf;
953 u8 tf_array[14];
954 };
866e2ec9 955 u32 tf_flags;
1da177e4 956 int data_phase;
1da177e4
LT		 957 struct request *rq; /* copy of request */
958 void *special; /* valid_t generally */
959} ide_task_t;
960
9e42237f 961void ide_tf_load(ide_drive_t *, ide_task_t *);
c2b57cdc 962void ide_tf_read(ide_drive_t *, ide_task_t *);
1da177e4
LT		 963
964extern void SELECT_DRIVE(ide_drive_t *);
1da177e4 965extern void SELECT_MASK(ide_drive_t *, int);
1da177e4
LT		 966
967extern int drive_is_ready(ide_drive_t *);
1da177e4 968
2fc57388
BZ		 969void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
970
f6e29e35 971ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 972
4d7a984b
TH		 973void task_end_request(ide_drive_t *, struct request *, u8);
974
ac026ff2 975int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ		 976int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
977
1da177e4
LT		 978int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
979int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
980int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
981
982extern int system_bus_clock(void);
983
984extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT		 985extern int ide_config_drive_speed(ide_drive_t *, u8);
986extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT		 987extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
988
989extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
990
1da177e4
LT		 991extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
992
993extern int ide_spin_wait_hwgroup(ide_drive_t *);
994extern void ide_timer_expiry(unsigned long);
7d12e780 995extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 996extern void do_ide_request(struct request_queue *);
1da177e4
LT		 997
998void ide_init_disk(struct gendisk *, ide_drive_t *);
999
6d208b39 1000#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH		 1001extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1002#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ		 1003#else
1004#define ide_pci_register_driver(d) pci_register_driver(d)
1005#endif
1006
85620436
BZ		 1007void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1008void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1009
8e882ba1 1010#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ		 1011int ide_pci_set_master(struct pci_dev *, const char *);
1012unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
1013int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1014#else
b123f56e
BZ		 1015static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1016 const struct ide_port_info *d)
1017{
1018 return -EINVAL;
1019}
c413b9b9
BZ		 1020#endif
1021
1da177e4
LT		 1022extern void default_hwif_iops(ide_hwif_t *);
1023extern void default_hwif_mmiops(ide_hwif_t *);
1024extern void default_hwif_transport(ide_hwif_t *);
1025
1da177e4
LT		 1026typedef struct ide_pci_enablebit_s {
1027 u8 reg; /* byte pci reg holding the enable-bit */
1028 u8 mask; /* mask to isolate the enable-bit */
1029 u8 val; /* value of masked reg when "enabled" */
1030} ide_pci_enablebit_t;
1031
1032enum {
1033 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1034 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1035 /* single port device */
a5d8c5c8 1036 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ		 1037 /* don't use legacy PIO blacklist */
1038 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ		 1039 /* set for the second port of QD65xx */
1040 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ		 1041 /* use PIO8/9 for prefetch off/on */
1042 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1043 /* use PIO6/7 for fast-devsel off/on */
1044 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1045 /* use 100-102 and 200-202 PIO values to set DMA modes */
1046 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ		 1047 /*
1048 * keep DMA setting when programming PIO mode, may be used only
1049 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1050 */
1051 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ		 1052 /* program host for the transfer mode after programming device */
1053 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1054 /* don't program host/device for the transfer mode ("smart" hosts) */
1055 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ		 1056 /* trust BIOS for programming chipset/device for DMA */
1057 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
807b90d0 1058 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
0ae2e178 1059 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ		 1060 /* ATAPI DMA is unsupported */
1061 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ		 1062 /* set if host is a "non-bootable" controller */
1063 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ		 1064 /* host doesn't support DMA */
1065 IDE_HFLAG_NO_DMA = (1 << 14),
1066 /* check if host is PCI IDE device before allowing DMA */
1067 IDE_HFLAG_NO_AUTODMA = (1 << 15),
9ffcf364 1068 /* host is CS5510/CS5520 */
807b90d0 1069 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
238e4f14
BZ		 1070 /* no LBA48 */
1071 IDE_HFLAG_NO_LBA48 = (1 << 17),
1072 /* no LBA48 DMA */
1073 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ		 1074 /* data FIFO is cleared by an error */
1075 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ		 1076 /* serialize ports */
1077 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ		 1078 /* use legacy IRQs */
1079 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ		 1080 /* force use of legacy IRQs */
1081 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ		 1082 /* limit LBA48 requests to 256 sectors */
1083 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ		 1084 /* use 32-bit I/O ops */
1085 IDE_HFLAG_IO_32BIT = (1 << 24),
1086 /* unmask IRQs */
1087 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1088 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1fd18905
BZ		 1089 /* serialize ports if DMA is possible (for sl82c105) */
1090 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ		 1091 /* force host out of "simplex" mode */
1092 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ		 1093 /* DSC overlap is unsupported */
1094 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ		 1095 /* never use 32-bit I/O ops */
1096 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1097 /* never unmask IRQs */
1098 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT		 1099};
1100
7cab14a7 1101#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1102# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ		 1103#else
1104# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ		 1105#endif
1106
039788e1 1107struct ide_port_info {
1da177e4 1108 char *name;
1da177e4
LT		 1109 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1110 void (*init_iops)(ide_hwif_t *);
1111 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ		 1112 int (*init_dma)(ide_hwif_t *,
1113 const struct ide_port_info *);
ac95beed
BZ		 1114
1115 const struct ide_port_ops *port_ops;
f37afdac 1116 const struct ide_dma_ops *dma_ops;
ac95beed 1117
1da177e4 1118 ide_pci_enablebit_t enablebits[2];
528a572d 1119 hwif_chipset_t chipset;
9ffcf364 1120 u32 host_flags;
4099d143 1121 u8 pio_mask;
5f8b6c34
BZ		 1122 u8 swdma_mask;
1123 u8 mwdma_mask;
18137207 1124 u8 udma_mask;
039788e1 1125};
1da177e4 1126
85620436
BZ		 1127int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1128int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT		 1129
1130void ide_map_sg(ide_drive_t *, struct request *);
1131void ide_init_sg_cmd(ide_drive_t *, struct request *);
1132
1133#define BAD_DMA_DRIVE 0
1134#define GOOD_DMA_DRIVE 1
1135
65e5f2e3
JC		 1136struct drive_list_entry {
1137 const char *id_model;
1138 const char *id_firmware;
1139};
1140
1141int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ		 1142
1143#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1144int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1145int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ		 1146
1147u8 ide_find_dma_mode(ide_drive_t *, u8);
1148
1149static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1150{
1151 return ide_find_dma_mode(drive, XFER_UDMA_6);
1152}
1153
4a546e04 1154void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1155void ide_dma_off(ide_drive_t *);
4a546e04 1156void ide_dma_on(ide_drive_t *);
3608b5d7 1157int ide_set_dma(ide_drive_t *);
578cfa0d 1158void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT		 1159ide_startstop_t ide_dma_intr(ide_drive_t *);
1160
062f9f02
BZ		 1161int ide_build_sglist(ide_drive_t *, struct request *);
1162void ide_destroy_dmatable(ide_drive_t *);
1163
8e882ba1 1164#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4 1165extern int ide_build_dmatable(ide_drive_t *, struct request *);
b8e73fba
BZ		 1166int ide_allocate_dma_engine(ide_hwif_t *);
1167void ide_release_dma_engine(ide_hwif_t *);
f37afdac 1168void ide_setup_dma(ide_hwif_t *, unsigned long);
1da177e4 1169
15ce926a 1170void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1171extern int ide_dma_setup(ide_drive_t *);
f37afdac 1172void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4
LT		 1173extern void ide_dma_start(ide_drive_t *);
1174extern int __ide_dma_end(ide_drive_t *);
f37afdac 1175int ide_dma_test_irq(ide_drive_t *);
841d2a9b 1176extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1177extern void ide_dma_timeout(ide_drive_t *);
8e882ba1 1178#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4
LT		 1179
1180#else
3ab7efe8 1181static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1182static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1183static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1184static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1185static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1186static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1187static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1188static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1189static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1da177e4
LT		 1190#endif /* CONFIG_BLK_DEV_IDEDMA */
1191
8e882ba1 1192#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
0d1bad21 1193static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1da177e4
LT		 1194#endif
1195
e3a59b4d
HR		 1196#ifdef CONFIG_BLK_DEV_IDEACPI
1197extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1198extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1199extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1200extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1201void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1202extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR		 1203#else
1204static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1205static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1206static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1207static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1208static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1209static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR		 1210#endif
1211
fbd13088 1212void ide_remove_port_from_hwgroup(ide_hwif_t *);
387750c3 1213void ide_unregister(ide_hwif_t *);
1da177e4
LT		 1214
1215void ide_register_region(struct gendisk *);
1216void ide_unregister_region(struct gendisk *);
1217
f01393e4 1218void ide_undecoded_slave(ide_drive_t *);
1da177e4 1219
9fd91d95
BZ		 1220void ide_port_apply_params(ide_hwif_t *);
1221
c413b9b9
BZ		 1222int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1223int ide_device_add(u8 idx[4], const struct ide_port_info *);
0bfeee7d 1224int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ		 1225void ide_port_unregister_devices(ide_hwif_t *);
1226void ide_port_scan(ide_hwif_t *);
1da177e4
LT		 1227
1228static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1229{
1230 return hwif->hwif_data;
1231}
1232
1233static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1234{
1235 hwif->hwif_data = data;
1236}
1237
3ab7efe8 1238const char *ide_xfer_verbose(u8 mode);
1da177e4
LT		 1239extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1240extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1241
2229833c
BZ		 1242static inline int ide_dev_has_iordy(struct hd_driveid *id)
1243{
1244 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1245}
1246
6c3c22f3
SS		 1247static inline int ide_dev_is_sata(struct hd_driveid *id)
1248{
1249 /*
1250 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1251 * verifying that word 80 by casting it to a signed type --
1252 * this trick allows us to filter out the reserved values of
1253 * 0x0000 and 0xffff along with the earlier ATA revisions...
1254 */
1255 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1256 return 1;
1257 return 0;
1258}
1259
a501633c 1260u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT		 1261u8 ide_dump_status(ide_drive_t *, const char *, u8);
1262
1263typedef struct ide_pio_timings_s {
1264 int setup_time; /* Address setup (ns) minimum */
1265 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS		 1266 int cycle_time; /* Cycle time (ns) minimum = */
1267 /* active + recovery (+ setup for some chips) */
1da177e4
LT		 1268} ide_pio_timings_t;
1269
7dd00083 1270unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1271u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT		 1272extern const ide_pio_timings_t ide_pio_timings[6];
1273
88b2b32b
BZ		 1274int ide_set_pio_mode(ide_drive_t *, u8);
1275int ide_set_dma_mode(ide_drive_t *, u8);
1276
26bcb879
BZ		 1277void ide_set_pio(ide_drive_t *, u8);
1278
1279static inline void ide_set_max_pio(ide_drive_t *drive)
1280{
1281 ide_set_pio(drive, 255);
1282}
1da177e4
LT		 1283
1284extern spinlock_t ide_lock;
ef29888e 1285extern struct mutex ide_cfg_mtx;
1da177e4
LT		 1286/*
1287 * Structure locking:
1288 *
ef29888e 1289 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT		 1290 * ide_hwif_t->{next,hwgroup}
1291 * ide_drive_t->next
1292 *
1293 * ide_hwgroup_t->busy: ide_lock
1294 * ide_hwgroup_t->hwif: ide_lock
1295 * ide_hwif_t->mate: constant, no locking
1296 * ide_drive_t->hwif: constant, no locking
1297 */
1298
366c7f55 1299#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT		 1300
1301extern struct bus_type ide_bus_type;
f74c9141 1302extern struct class *ide_port_class;
1da177e4
LT		 1303
1304/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1305#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1306
1307/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1308#define ide_id_has_flush_cache_ext(id) \
1309 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1310
7b9f25b5
BZ		 1311static inline void ide_dump_identify(u8 *id)
1312{
1313 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1314}
1315
86b37860
CL		 1316static inline int hwif_to_node(ide_hwif_t *hwif)
1317{
36501650 1318 struct pci_dev *dev = to_pci_dev(hwif->dev);
1f07e988 1319 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
86b37860
CL		 1320}
1321
1b678347
BH		 1322static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1323{
1324 ide_hwif_t *hwif = HWIF(drive);
1325
1326 return &hwif->drives[(drive->dn ^ 1) & 1];
1327}
1328
81ca6919
BZ		 1329static inline void ide_set_irq(ide_drive_t *drive, int on)
1330{
23579a2a
BZ		 1331 ide_hwif_t *hwif = drive->hwif;
1332
1333 hwif->OUTB(drive->ctl | (on ? 0 : 2),
1334 hwif->io_ports[IDE_CONTROL_OFFSET]);
81ca6919
BZ		 1335}
1336
c47137a9
BZ		 1337static inline u8 ide_read_status(ide_drive_t *drive)
1338{
1339 ide_hwif_t *hwif = drive->hwif;
1340
1341 return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1342}
1343
1344static inline u8 ide_read_altstatus(ide_drive_t *drive)
1345{
1346 ide_hwif_t *hwif = drive->hwif;
1347
1348 return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]);
1349}
1350
64a57fe4
BZ		 1351static inline u8 ide_read_error(ide_drive_t *drive)
1352{
1353 ide_hwif_t *hwif = drive->hwif;
1354
1355 return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]);
1356}
1357
7616c0ad
BZ		 1358/*
1359 * Too bad. The drive wants to send us data which we are not ready to accept.
1360 * Just throw it away.
1361 */
1362static inline void ide_atapi_discard_data(ide_drive_t *drive, unsigned bcount)
1363{
1364 ide_hwif_t *hwif = drive->hwif;
1365
1366 /* FIXME: use ->atapi_input_bytes */
1367 while (bcount--)
1368 (void)hwif->INB(hwif->io_ports[IDE_DATA_OFFSET]);
1369}
1370
1371static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount)
1372{
1373 ide_hwif_t *hwif = drive->hwif;
1374
1375 /* FIXME: use ->atapi_output_bytes */
1376 while (bcount--)
1377 hwif->OUTB(0, hwif->io_ports[IDE_DATA_OFFSET]);
1378}
1379
1da177e4 1380#endif /* _IDE_H */