ide-tape: remove comments markup from Documentation/ide/ide-tape.txt
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / include / linux / ide.h
CommitLineData
1da177e4
LT
1#ifndef _IDE_H
2#define _IDE_H
3/*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
1da177e4
LT
9#include <linux/init.h>
10#include <linux/ioport.h>
11#include <linux/hdreg.h>
1da177e4
LT
12#include <linux/blkdev.h>
13#include <linux/proc_fs.h>
14#include <linux/interrupt.h>
15#include <linux/bitops.h>
16#include <linux/bio.h>
17#include <linux/device.h>
18#include <linux/pci.h>
f36d4024 19#include <linux/completion.h>
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HR
20#ifdef CONFIG_BLK_DEV_IDEACPI
21#include <acpi/acpi.h>
22#endif
1da177e4
LT
23#include <asm/byteorder.h>
24#include <asm/system.h>
25#include <asm/io.h>
f9383c42 26#include <asm/mutex.h>
1da177e4 27
729d4de9 28#if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
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29# define SUPPORT_VLB_SYNC 0
30#else
31# define SUPPORT_VLB_SYNC 1
1da177e4
LT
32#endif
33
34/*
35 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
36 * number.
37 */
38
39#define IDE_NO_IRQ (-1)
40
1da177e4
LT
41typedef unsigned char byte; /* used everywhere */
42
43/*
44 * Probably not wise to fiddle with these
45 */
46#define ERROR_MAX 8 /* Max read/write errors per sector */
47#define ERROR_RESET 3 /* Reset controller every 4th retry */
48#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
49
1da177e4
LT
50/*
51 * state flags
52 */
53
54#define DMA_PIO_RETRY 1 /* retrying in PIO */
55
56#define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
57#define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
58
59/*
60 * Definitions for accessing IDE controller registers
61 */
62#define IDE_NR_PORTS (10)
63
64#define IDE_DATA_OFFSET (0)
65#define IDE_ERROR_OFFSET (1)
66#define IDE_NSECTOR_OFFSET (2)
67#define IDE_SECTOR_OFFSET (3)
68#define IDE_LCYL_OFFSET (4)
69#define IDE_HCYL_OFFSET (5)
70#define IDE_SELECT_OFFSET (6)
71#define IDE_STATUS_OFFSET (7)
72#define IDE_CONTROL_OFFSET (8)
73#define IDE_IRQ_OFFSET (9)
74
75#define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
76#define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
23579a2a
BZ
77#define IDE_ALTSTATUS_OFFSET IDE_CONTROL_OFFSET
78#define IDE_IREASON_OFFSET IDE_NSECTOR_OFFSET
79#define IDE_BCOUNTL_OFFSET IDE_LCYL_OFFSET
80#define IDE_BCOUNTH_OFFSET IDE_HCYL_OFFSET
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LT
81
82#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
83#define BAD_R_STAT (BUSY_STAT | ERR_STAT)
84#define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
85#define BAD_STAT (BAD_R_STAT | DRQ_STAT)
86#define DRIVE_READY (READY_STAT | SEEK_STAT)
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LT
87
88#define BAD_CRC (ABRT_ERR | ICRC_ERR)
89
90#define SATA_NR_PORTS (3) /* 16 possible ?? */
91
92#define SATA_STATUS_OFFSET (0)
1da177e4 93#define SATA_ERROR_OFFSET (1)
1da177e4 94#define SATA_CONTROL_OFFSET (2)
1da177e4 95
1da177e4
LT
96/*
97 * Our Physical Region Descriptor (PRD) table should be large enough
98 * to handle the biggest I/O request we are likely to see. Since requests
99 * can have no more than 256 sectors, and since the typical blocksize is
100 * two or more sectors, we could get by with a limit of 128 entries here for
101 * the usual worst case. Most requests seem to include some contiguous blocks,
102 * further reducing the number of table entries required.
103 *
104 * The driver reverts to PIO mode for individual requests that exceed
105 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
106 * 100% of all crazy scenarios here is not necessary.
107 *
108 * As it turns out though, we must allocate a full 4KB page for this,
109 * so the two PRD tables (ide0 & ide1) will each get half of that,
110 * allowing each to have about 256 entries (8 bytes each) from this.
111 */
112#define PRD_BYTES 8
113#define PRD_ENTRIES 256
114
115/*
116 * Some more useful definitions
117 */
118#define PARTN_BITS 6 /* number of minor dev bits for partitions */
119#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
120#define SECTOR_SIZE 512
121#define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
122#define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
123
124/*
125 * Timeouts for various operations:
126 */
127#define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
128#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
129#define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
130#define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
131#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
132#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
133
1da177e4
LT
134/*
135 * Check for an interrupt and acknowledge the interrupt status
136 */
137struct hwif_s;
138typedef int (ide_ack_intr_t)(struct hwif_s *);
139
1da177e4
LT
140/*
141 * hwif_chipset_t is used to keep track of the specific hardware
142 * chipset used by each IDE interface, if known.
143 */
528a572d 144enum { ide_unknown, ide_generic, ide_pci,
1da177e4
LT
145 ide_cmd640, ide_dtc2278, ide_ali14xx,
146 ide_qd65xx, ide_umc8672, ide_ht6560b,
147 ide_rz1000, ide_trm290,
148 ide_cmd646, ide_cy82c693, ide_4drives,
149 ide_pmac, ide_etrax100, ide_acorn,
9a0e77f2 150 ide_au1xxx, ide_palm3710
528a572d
BZ
151};
152
153typedef u8 hwif_chipset_t;
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LT
154
155/*
156 * Structure to hold all information about the location of this port
157 */
158typedef struct hw_regs_s {
159 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
160 int irq; /* our irq number */
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LT
161 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
162 hwif_chipset_t chipset;
4349d5cd 163 struct device *dev;
1da177e4
LT
164} hw_regs_t;
165
cbb010c1 166void ide_init_port_data(struct hwif_s *, unsigned int);
57c802e8 167void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
baa8f3e9 168
1da177e4
LT
169static inline void ide_std_init_ports(hw_regs_t *hw,
170 unsigned long io_addr,
171 unsigned long ctl_addr)
172{
173 unsigned int i;
174
175 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
176 hw->io_ports[i] = io_addr++;
177
178 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
179}
180
181#include <asm/ide.h>
182
83d7dbc4
MM
183#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
184#undef MAX_HWIFS
83ae20c8
BH
185#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
186#endif
187
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LT
188/* Currently only m68k, apus and m8xx need it */
189#ifndef IDE_ARCH_ACK_INTR
190# define ide_ack_intr(hwif) (1)
191#endif
192
193/* Currently only Atari needs it */
194#ifndef IDE_ARCH_LOCK
195# define ide_release_lock() do {} while (0)
196# define ide_get_lock(hdlr, data) do {} while (0)
197#endif /* IDE_ARCH_LOCK */
198
199/*
200 * Now for the data we need to maintain per-drive: ide_drive_t
201 */
202
203#define ide_scsi 0x21
204#define ide_disk 0x20
205#define ide_optical 0x7
206#define ide_cdrom 0x5
207#define ide_tape 0x1
208#define ide_floppy 0x0
209
210/*
211 * Special Driver Flags
212 *
213 * set_geometry : respecify drive geometry
214 * recalibrate : seek to cyl 0
215 * set_multmode : set multmode count
216 * set_tune : tune interface for drive
217 * serviced : service command
218 * reserved : unused
219 */
220typedef union {
221 unsigned all : 8;
222 struct {
1da177e4
LT
223 unsigned set_geometry : 1;
224 unsigned recalibrate : 1;
225 unsigned set_multmode : 1;
226 unsigned set_tune : 1;
227 unsigned serviced : 1;
228 unsigned reserved : 3;
1da177e4
LT
229 } b;
230} special_t;
231
1da177e4
LT
232/*
233 * ATA-IDE Select Register, aka Device-Head
234 *
235 * head : always zeros here
236 * unit : drive select number: 0/1
237 * bit5 : always 1
238 * lba : using LBA instead of CHS
239 * bit7 : always 1
240 */
241typedef union {
242 unsigned all : 8;
243 struct {
244#if defined(__LITTLE_ENDIAN_BITFIELD)
245 unsigned head : 4;
246 unsigned unit : 1;
247 unsigned bit5 : 1;
248 unsigned lba : 1;
249 unsigned bit7 : 1;
250#elif defined(__BIG_ENDIAN_BITFIELD)
251 unsigned bit7 : 1;
252 unsigned lba : 1;
253 unsigned bit5 : 1;
254 unsigned unit : 1;
255 unsigned head : 4;
256#else
257#error "Please fix <asm/byteorder.h>"
258#endif
259 } b;
260} select_t, ata_select_t;
261
1da177e4
LT
262/*
263 * Status returned from various ide_ functions
264 */
265typedef enum {
266 ide_stopped, /* no drive operation was started */
267 ide_started, /* a drive operation was started, handler was set */
268} ide_startstop_t;
269
270struct ide_driver_s;
271struct ide_settings_s;
272
e3a59b4d
HR
273#ifdef CONFIG_BLK_DEV_IDEACPI
274struct ide_acpi_drive_link;
275struct ide_acpi_hwif_link;
276#endif
277
1da177e4
LT
278typedef struct ide_drive_s {
279 char name[4]; /* drive name, such as "hda" */
280 char driver_req[10]; /* requests specific driver */
281
165125e1 282 struct request_queue *queue; /* request queue */
1da177e4
LT
283
284 struct request *rq; /* current request */
285 struct ide_drive_s *next; /* circular list of hwgroup drives */
1da177e4
LT
286 void *driver_data; /* extra driver data */
287 struct hd_driveid *id; /* drive model identification info */
7662d046 288#ifdef CONFIG_IDE_PROC_FS
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LT
289 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
290 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
7662d046 291#endif
1da177e4
LT
292 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
293
294 unsigned long sleep; /* sleep until this time */
295 unsigned long service_start; /* time we started last request */
296 unsigned long service_time; /* service time of last request */
297 unsigned long timeout; /* max time to wait for irq */
298
299 special_t special; /* special action flags */
300 select_t select; /* basic drive/head select reg value */
301
302 u8 keep_settings; /* restore settings after drive reset */
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LT
303 u8 using_dma; /* disk is using dma for read/write */
304 u8 retry_pio; /* retrying dma capable host in pio */
305 u8 state; /* retry state */
306 u8 waiting_for_dma; /* dma currently in progress */
307 u8 unmask; /* okay to unmask other irqs */
36193484 308 u8 noflush; /* don't attempt flushes */
1da177e4
LT
309 u8 dsc_overlap; /* DSC overlap */
310 u8 nice1; /* give potential excess bandwidth */
311
312 unsigned present : 1; /* drive is physically present */
313 unsigned dead : 1; /* device ejected hint */
314 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
315 unsigned noprobe : 1; /* from: hdx=noprobe */
316 unsigned removable : 1; /* 1 if need to do check_media_change */
317 unsigned attach : 1; /* needed for removable devices */
1da177e4
LT
318 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
319 unsigned no_unmask : 1; /* disallow setting unmask bit */
320 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
321 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
1da177e4 322 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
c223701c 323 unsigned nodma : 1; /* disallow DMA */
cc12175f 324 unsigned autotune : 1; /* 0=default, 1=autotune */
1da177e4
LT
325 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
326 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
327 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
1da177e4
LT
328 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
329 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
330 unsigned post_reset : 1;
7f8f48af 331 unsigned udma33_warned : 1;
1da177e4 332
1497943e 333 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
1da177e4
LT
334 u8 quirk_list; /* considered quirky, set for a specific host */
335 u8 init_speed; /* transfer rate set at boot */
1da177e4 336 u8 current_speed; /* current transfer rate set */
513daadd 337 u8 desired_speed; /* desired transfer rate set */
1da177e4
LT
338 u8 dn; /* now wide spread use */
339 u8 wcache; /* status of write cache */
340 u8 acoustic; /* acoustic management */
341 u8 media; /* disk, cdrom, tape, floppy, ... */
23579a2a 342 u8 ctl; /* "normal" value for Control register */
1da177e4
LT
343 u8 ready_stat; /* min status value for drive ready */
344 u8 mult_count; /* current multiple sector setting */
345 u8 mult_req; /* requested multiple sector setting */
346 u8 tune_req; /* requested drive tuning setting */
347 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
348 u8 bad_wstat; /* used for ignoring WRERR_STAT */
349 u8 nowerr; /* used for ignoring WRERR_STAT */
350 u8 sect0; /* offset of first sector for DM6:DDO */
351 u8 head; /* "real" number of heads */
352 u8 sect; /* "real" sectors per track */
353 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
354 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
355
356 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
357 unsigned int cyl; /* "real" number of cyls */
26bcb879 358 unsigned int drive_data; /* used by set_pio_mode/selectproc */
1da177e4
LT
359 unsigned int failures; /* current failure count */
360 unsigned int max_failures; /* maximum allowed failure count */
dbe217af 361 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
1da177e4
LT
362
363 u64 capacity64; /* total number of sectors */
364
365 int lun; /* logical unit */
366 int crc_count; /* crc counter to reduce drive speed */
e3a59b4d
HR
367#ifdef CONFIG_BLK_DEV_IDEACPI
368 struct ide_acpi_drive_link *acpidata;
369#endif
1da177e4
LT
370 struct list_head list;
371 struct device gendev;
f36d4024 372 struct completion gendev_rel_comp; /* to deal with device release() */
1da177e4
LT
373} ide_drive_t;
374
8604affd
BZ
375#define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
376
1da177e4
LT
377#define IDE_CHIPSET_PCI_MASK \
378 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
379#define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
380
039788e1 381struct ide_port_info;
1da177e4 382
ac95beed
BZ
383struct ide_port_ops {
384 /* host specific initialization of devices on a port */
385 void (*port_init_devs)(struct hwif_s *);
386 /* routine to program host for PIO mode */
387 void (*set_pio_mode)(ide_drive_t *, const u8);
388 /* routine to program host for DMA mode */
389 void (*set_dma_mode)(ide_drive_t *, const u8);
390 /* tweaks hardware to select drive */
391 void (*selectproc)(ide_drive_t *);
392 /* chipset polling based on hba specifics */
393 int (*reset_poll)(ide_drive_t *);
394 /* chipset specific changes to default for device-hba resets */
395 void (*pre_reset)(ide_drive_t *);
396 /* routine to reset controller after a disk reset */
397 void (*resetproc)(ide_drive_t *);
398 /* special host masking for drive selection */
399 void (*maskproc)(ide_drive_t *, int);
400 /* check host's drive quirk list */
401 void (*quirkproc)(ide_drive_t *);
402
403 u8 (*mdma_filter)(ide_drive_t *);
404 u8 (*udma_filter)(ide_drive_t *);
405
406 u8 (*cable_detect)(struct hwif_s *);
407};
408
5e37bdc0
BZ
409struct ide_dma_ops {
410 void (*dma_host_set)(struct ide_drive_s *, int);
411 int (*dma_setup)(struct ide_drive_s *);
412 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
413 void (*dma_start)(struct ide_drive_s *);
414 int (*dma_end)(struct ide_drive_s *);
415 int (*dma_test_irq)(struct ide_drive_s *);
416 void (*dma_lost_irq)(struct ide_drive_s *);
417 void (*dma_timeout)(struct ide_drive_s *);
418};
419
1da177e4
LT
420typedef struct hwif_s {
421 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
422 struct hwif_s *mate; /* other hwif from same PCI chip */
423 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
424 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
425
426 char name[6]; /* name of interface, eg. "ide0" */
427
428 /* task file registers for pata and sata */
429 unsigned long io_ports[IDE_NR_PORTS];
430 unsigned long sata_scr[SATA_NR_PORTS];
1da177e4 431
1da177e4
LT
432 ide_drive_t drives[MAX_DRIVES]; /* drive info */
433
434 u8 major; /* our major number */
435 u8 index; /* 0 for ide0; 1 for ide1; ... */
436 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
1da177e4
LT
437 u8 bus_state; /* power state of the IDE bus */
438
e95d9c6b 439 u32 host_flags;
6a824c92 440
4099d143
BZ
441 u8 pio_mask;
442
1da177e4
LT
443 u8 ultra_mask;
444 u8 mwdma_mask;
445 u8 swdma_mask;
446
49521f97
BZ
447 u8 cbl; /* cable type */
448
1da177e4
LT
449 hwif_chipset_t chipset; /* sub-module for tuning.. */
450
36501650
BZ
451 struct device *dev;
452
18e181fe
BZ
453 ide_ack_intr_t *ack_intr;
454
1da177e4
LT
455 void (*rw_disk)(ide_drive_t *, struct request *);
456
ac95beed 457 const struct ide_port_ops *port_ops;
f37afdac 458 const struct ide_dma_ops *dma_ops;
bfa14b42 459
1da177e4
LT
460 void (*ata_input_data)(ide_drive_t *, void *, u32);
461 void (*ata_output_data)(ide_drive_t *, void *, u32);
462
463 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
464 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
465
f0dd8712 466 void (*ide_dma_clear_irq)(ide_drive_t *drive);
1da177e4
LT
467
468 void (*OUTB)(u8 addr, unsigned long port);
469 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
470 void (*OUTW)(u16 addr, unsigned long port);
1da177e4
LT
471 void (*OUTSW)(unsigned long port, void *addr, u32 count);
472 void (*OUTSL)(unsigned long port, void *addr, u32 count);
473
474 u8 (*INB)(unsigned long port);
475 u16 (*INW)(unsigned long port);
1da177e4
LT
476 void (*INSW)(unsigned long port, void *addr, u32 count);
477 void (*INSL)(unsigned long port, void *addr, u32 count);
478
479 /* dma physical region descriptor table (cpu view) */
480 unsigned int *dmatable_cpu;
481 /* dma physical region descriptor table (dma view) */
482 dma_addr_t dmatable_dma;
483 /* Scatter-gather list used to build the above */
484 struct scatterlist *sg_table;
485 int sg_max_nents; /* Maximum number of entries in it */
486 int sg_nents; /* Current number of entries in it */
487 int sg_dma_direction; /* dma transfer direction */
488
489 /* data phase of the active command (currently only valid for PIO/DMA) */
490 int data_phase;
491
492 unsigned int nsect;
493 unsigned int nleft;
55c16a70 494 struct scatterlist *cursg;
1da177e4
LT
495 unsigned int cursg_ofs;
496
1da177e4
LT
497 int rqsize; /* max sectors per request */
498 int irq; /* our irq number */
499
1da177e4
LT
500 unsigned long dma_base; /* base addr for dma ports */
501 unsigned long dma_command; /* dma command register */
502 unsigned long dma_vendor1; /* dma vendor 1 register */
503 unsigned long dma_status; /* dma status register */
504 unsigned long dma_vendor3; /* dma vendor 3 register */
505 unsigned long dma_prdtable; /* actual prd table address */
1da177e4 506
1da177e4
LT
507 unsigned long config_data; /* for use by chipset-specific code */
508 unsigned long select_data; /* for use by chipset-specific code */
509
020e322d
SS
510 unsigned long extra_base; /* extra addr for dma ports */
511 unsigned extra_ports; /* number of extra dma ports */
512
1da177e4 513 unsigned present : 1; /* this interface exists */
1da177e4
LT
514 unsigned serialized : 1; /* serialized all channel operation */
515 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
1da177e4 516 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
2ad1e558 517 unsigned mmio : 1; /* host uses MMIO */
1da177e4 518
f74c9141
BZ
519 struct device gendev;
520 struct device *portdev;
521
f36d4024 522 struct completion gendev_rel_comp; /* To deal with device release() */
1da177e4
LT
523
524 void *hwif_data; /* extra hwif data */
525
526 unsigned dma;
e3a59b4d
HR
527
528#ifdef CONFIG_BLK_DEV_IDEACPI
529 struct ide_acpi_hwif_link *acpidata;
530#endif
22fc6ecc 531} ____cacheline_internodealigned_in_smp ide_hwif_t;
1da177e4
LT
532
533/*
534 * internal ide interrupt handler type
535 */
1da177e4
LT
536typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
537typedef int (ide_expiry_t)(ide_drive_t *);
538
0eea6458
BP
539/* used by ide-cd, ide-floppy, etc. */
540typedef void (xfer_func_t)(ide_drive_t *, void *, u32);
541
1da177e4
LT
542typedef struct hwgroup_s {
543 /* irq handler, if active */
544 ide_startstop_t (*handler)(ide_drive_t *);
a6fbb1c8 545
1da177e4
LT
546 /* BOOL: protects all fields below */
547 volatile int busy;
548 /* BOOL: wake us up on timer expiry */
549 unsigned int sleeping : 1;
550 /* BOOL: polling active & poll_timeout field valid */
551 unsigned int polling : 1;
913759ac
AC
552 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
553 unsigned int resetting : 1;
554
1da177e4
LT
555 /* current drive */
556 ide_drive_t *drive;
557 /* ptr to current hwif in linked-list */
558 ide_hwif_t *hwif;
559
1da177e4
LT
560 /* current request */
561 struct request *rq;
a6fbb1c8 562
1da177e4
LT
563 /* failsafe timer */
564 struct timer_list timer;
1da177e4
LT
565 /* timeout value during long polls */
566 unsigned long poll_timeout;
567 /* queried upon timeouts */
568 int (*expiry)(ide_drive_t *);
a6fbb1c8 569
23450319
SS
570 int req_gen;
571 int req_gen_timer;
1da177e4
LT
572} ide_hwgroup_t;
573
7662d046
BZ
574typedef struct ide_driver_s ide_driver_t;
575
f9383c42 576extern struct mutex ide_setting_mtx;
1da177e4 577
7662d046
BZ
578int set_io_32bit(ide_drive_t *, int);
579int set_pio_mode(ide_drive_t *, int);
580int set_using_dma(ide_drive_t *, int);
581
eaec3e7d
BP
582/* ATAPI packet command flags */
583enum {
584 /* set when an error is considered normal - no retry (ide-tape) */
585 PC_FLAG_ABORT = (1 << 0),
586 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
587 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
588 PC_FLAG_DMA_OK = (1 << 3),
589 PC_FLAG_DMA_RECOMMENDED = (1 << 4),
590 PC_FLAG_DMA_IN_PROGRESS = (1 << 5),
591 PC_FLAG_DMA_ERROR = (1 << 6),
592 PC_FLAG_WRITING = (1 << 7),
593 /* command timed out */
594 PC_FLAG_TIMEDOUT = (1 << 8),
595};
596
8303b46e
BP
597struct ide_atapi_pc {
598 /* actual packet bytes */
599 u8 c[12];
600 /* incremented on each retry */
601 int retries;
602 int error;
603
604 /* bytes to transfer */
605 int req_xfer;
606 /* bytes actually transferred */
607 int xferred;
608
609 /* data buffer */
610 u8 *buf;
611 /* current buffer position */
612 u8 *cur_pos;
613 int buf_size;
614 /* missing/available data on the current buffer */
615 int b_count;
616
617 /* the corresponding request */
618 struct request *rq;
619
620 unsigned long flags;
621
622 /*
623 * those are more or less driver-specific and some of them are subject
624 * to change/removal later.
625 */
626 u8 pc_buf[256];
627 void (*idefloppy_callback) (ide_drive_t *);
628 ide_startstop_t (*idetape_callback) (ide_drive_t *);
629
630 /* idetape only */
631 struct idetape_bh *bh;
632 char *b_data;
633
634 /* idescsi only for now */
635 struct scatterlist *sg;
636 unsigned int sg_cnt;
637
638 struct scsi_cmnd *scsi_cmd;
639 void (*done) (struct scsi_cmnd *);
640
641 unsigned long timeout;
642};
643
7662d046 644#ifdef CONFIG_IDE_PROC_FS
1da177e4
LT
645/*
646 * configurable drive settings
647 */
648
649#define TYPE_INT 0
1497943e
BZ
650#define TYPE_BYTE 1
651#define TYPE_SHORT 2
1da177e4
LT
652
653#define SETTING_READ (1 << 0)
654#define SETTING_WRITE (1 << 1)
655#define SETTING_RW (SETTING_READ | SETTING_WRITE)
656
657typedef int (ide_procset_t)(ide_drive_t *, int);
658typedef struct ide_settings_s {
659 char *name;
660 int rw;
1da177e4
LT
661 int data_type;
662 int min;
663 int max;
664 int mul_factor;
665 int div_factor;
666 void *data;
667 ide_procset_t *set;
668 int auto_remove;
669 struct ide_settings_s *next;
670} ide_settings_t;
671
1497943e 672int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
1da177e4
LT
673
674/*
675 * /proc/ide interface
676 */
677typedef struct {
678 const char *name;
679 mode_t mode;
680 read_proc_t *read_proc;
681 write_proc_t *write_proc;
682} ide_proc_entry_t;
683
ecfd80e4
BZ
684void proc_ide_create(void);
685void proc_ide_destroy(void);
5cbf79cd 686void ide_proc_register_port(ide_hwif_t *);
d9270a3f 687void ide_proc_port_register_devices(ide_hwif_t *);
5b0c4b30 688void ide_proc_unregister_device(ide_drive_t *);
5cbf79cd 689void ide_proc_unregister_port(ide_hwif_t *);
7662d046
BZ
690void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
691void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
692
693void ide_add_generic_settings(ide_drive_t *);
694
1da177e4
LT
695read_proc_t proc_ide_read_capacity;
696read_proc_t proc_ide_read_geometry;
697
698#ifdef CONFIG_BLK_DEV_IDEPCI
699void ide_pci_create_host_proc(const char *, get_info_t *);
700#endif
701
702/*
703 * Standard exit stuff:
704 */
705#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
706{ \
707 len -= off; \
708 if (len < count) { \
709 *eof = 1; \
710 if (len <= 0) \
711 return 0; \
712 } else \
713 len = count; \
714 *start = page + off; \
715 return len; \
716}
717#else
ecfd80e4
BZ
718static inline void proc_ide_create(void) { ; }
719static inline void proc_ide_destroy(void) { ; }
5cbf79cd 720static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
d9270a3f 721static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
5b0c4b30 722static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
5cbf79cd 723static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
7662d046
BZ
724static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
725static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
726static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
1da177e4
LT
727#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
728#endif
729
730/*
731 * Power Management step value (rq->pm->pm_step).
732 *
733 * The step value starts at 0 (ide_pm_state_start_suspend) for a
734 * suspend operation or 1000 (ide_pm_state_start_resume) for a
735 * resume operation.
736 *
737 * For each step, the core calls the subdriver start_power_step() first.
738 * This can return:
739 * - ide_stopped : In this case, the core calls us back again unless
740 * step have been set to ide_power_state_completed.
741 * - ide_started : In this case, the channel is left busy until an
742 * async event (interrupt) occurs.
743 * Typically, start_power_step() will issue a taskfile request with
744 * do_rw_taskfile().
745 *
746 * Upon reception of the interrupt, the core will call complete_power_step()
747 * with the error code if any. This routine should update the step value
748 * and return. It should not start a new request. The core will call
749 * start_power_step for the new step value, unless step have been set to
750 * ide_power_state_completed.
751 *
752 * Subdrivers are expected to define their own additional power
753 * steps from 1..999 for suspend and from 1001..1999 for resume,
754 * other values are reserved for future use.
755 */
756
757enum {
758 ide_pm_state_completed = -1,
759 ide_pm_state_start_suspend = 0,
760 ide_pm_state_start_resume = 1000,
761};
762
763/*
764 * Subdrivers support.
4ef3b8f4
LR
765 *
766 * The gendriver.owner field should be set to the module owner of this driver.
767 * The gendriver.name field should be set to the name of this driver
1da177e4 768 */
7662d046 769struct ide_driver_s {
1da177e4
LT
770 const char *version;
771 u8 media;
1da177e4 772 unsigned supports_dsc_overlap : 1;
1da177e4
LT
773 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
774 int (*end_request)(ide_drive_t *, int, int);
775 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
776 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1da177e4 777 struct device_driver gen_driver;
4031bbe4
RK
778 int (*probe)(ide_drive_t *);
779 void (*remove)(ide_drive_t *);
0d2157f7 780 void (*resume)(ide_drive_t *);
4031bbe4 781 void (*shutdown)(ide_drive_t *);
7662d046
BZ
782#ifdef CONFIG_IDE_PROC_FS
783 ide_proc_entry_t *proc;
784#endif
785};
1da177e4 786
4031bbe4
RK
787#define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
788
1da177e4
LT
789int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
790
791/*
792 * ide_hwifs[] is the master data structure used to keep track
793 * of just about everything in ide.c. Whenever possible, routines
794 * should be using pointers to a drive (ide_drive_t *) or
795 * pointers to a hwif (ide_hwif_t *), rather than indexing this
796 * structure directly (the allocation/layout may change!).
797 *
798 */
799#ifndef _IDE_C
800extern ide_hwif_t ide_hwifs[]; /* master data repository */
801#endif
802extern int noautodma;
803
fe80b937
BZ
804ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
805
806static inline ide_hwif_t *ide_find_port(void)
807{
808 return ide_find_port_slot(NULL);
809}
810
1da177e4 811extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
dbe217af
AC
812int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
813 int uptodate, int nr_sectors);
1da177e4 814
1da177e4
LT
815extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
816
cd2a2d96
BZ
817void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
818 ide_expiry_t *);
1da177e4
LT
819
820ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
821
1da177e4
LT
822ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
823
824ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
825
1da177e4
LT
826extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
827
828extern void ide_fix_driveid(struct hd_driveid *);
01745112 829
1da177e4
LT
830extern void ide_fixstring(u8 *, const int, const int);
831
74af21cf 832int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1da177e4 833
1da177e4
LT
834extern ide_startstop_t ide_do_reset (ide_drive_t *);
835
1da177e4
LT
836extern void ide_init_drive_cmd (struct request *rq);
837
1da177e4
LT
838/*
839 * "action" parameter type for ide_do_drive_cmd() below.
840 */
841typedef enum {
842 ide_wait, /* insert rq at end of list, and wait for it */
1da177e4
LT
843 ide_preempt, /* insert rq in front of current request */
844 ide_head_wait, /* insert rq in front of current request and wait for it */
845 ide_end /* insert rq at end of list, but don't wait for it */
846} ide_action_t;
847
1da177e4
LT
848extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
849
1da177e4
LT
850extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
851
9e42237f
BZ
852enum {
853 IDE_TFLAG_LBA48 = (1 << 0),
854 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
74095a91
BZ
855 IDE_TFLAG_FLAGGED = (1 << 2),
856 IDE_TFLAG_OUT_DATA = (1 << 3),
857 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
858 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
859 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
860 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
861 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
862 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
863 IDE_TFLAG_OUT_HOB_NSECT |
864 IDE_TFLAG_OUT_HOB_LBAL |
865 IDE_TFLAG_OUT_HOB_LBAM |
866 IDE_TFLAG_OUT_HOB_LBAH,
867 IDE_TFLAG_OUT_FEATURE = (1 << 9),
868 IDE_TFLAG_OUT_NSECT = (1 << 10),
869 IDE_TFLAG_OUT_LBAL = (1 << 11),
870 IDE_TFLAG_OUT_LBAM = (1 << 12),
871 IDE_TFLAG_OUT_LBAH = (1 << 13),
872 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
873 IDE_TFLAG_OUT_NSECT |
874 IDE_TFLAG_OUT_LBAL |
875 IDE_TFLAG_OUT_LBAM |
876 IDE_TFLAG_OUT_LBAH,
807e35d6 877 IDE_TFLAG_OUT_DEVICE = (1 << 14),
ac026ff2 878 IDE_TFLAG_WRITE = (1 << 15),
866e2ec9
BZ
879 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
880 IDE_TFLAG_IN_DATA = (1 << 17),
57d7366b 881 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
f6e29e35 882 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
c2b57cdc
BZ
883 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
884 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
885 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
886 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
887 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
888 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
889 IDE_TFLAG_IN_HOB_LBAM |
890 IDE_TFLAG_IN_HOB_LBAH,
891 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
892 IDE_TFLAG_IN_HOB_NSECT |
893 IDE_TFLAG_IN_HOB_LBA,
894 IDE_TFLAG_IN_NSECT = (1 << 25),
895 IDE_TFLAG_IN_LBAL = (1 << 26),
896 IDE_TFLAG_IN_LBAM = (1 << 27),
897 IDE_TFLAG_IN_LBAH = (1 << 28),
898 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
899 IDE_TFLAG_IN_LBAM |
900 IDE_TFLAG_IN_LBAH,
901 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
902 IDE_TFLAG_IN_LBA,
903 IDE_TFLAG_IN_DEVICE = (1 << 29),
657cc1a8
BZ
904 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
905 IDE_TFLAG_IN_HOB,
906 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
907 IDE_TFLAG_IN_TF,
908 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
909 IDE_TFLAG_IN_DEVICE,
35cf2b94
TH
910 /* force 16-bit I/O operations */
911 IDE_TFLAG_IO_16BIT = (1 << 30),
395d8ef5
BZ
912 /* ide_task_t was allocated using kmalloc() */
913 IDE_TFLAG_DYN = (1 << 31),
9e42237f
BZ
914};
915
650d841d
BZ
916struct ide_taskfile {
917 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
918
919 u8 hob_feature; /* 1-5: additional data to support LBA48 */
920 u8 hob_nsect;
921 u8 hob_lbal;
922 u8 hob_lbam;
923 u8 hob_lbah;
924
925 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
926
927 union { /*  7: */
928 u8 error; /* read: error */
929 u8 feature; /* write: feature */
930 };
931
932 u8 nsect; /* 8: number of sectors */
933 u8 lbal; /* 9: LBA low */
934 u8 lbam; /* 10: LBA mid */
935 u8 lbah; /* 11: LBA high */
936
937 u8 device; /* 12: device select */
938
939 union { /* 13: */
940 u8 status; /*  read: status  */
941 u8 command; /* write: command */
942 };
943};
944
1da177e4 945typedef struct ide_task_s {
650d841d
BZ
946 union {
947 struct ide_taskfile tf;
948 u8 tf_array[14];
949 };
866e2ec9 950 u32 tf_flags;
1da177e4 951 int data_phase;
1da177e4
LT
952 struct request *rq; /* copy of request */
953 void *special; /* valid_t generally */
954} ide_task_t;
955
9e42237f 956void ide_tf_load(ide_drive_t *, ide_task_t *);
c2b57cdc 957void ide_tf_read(ide_drive_t *, ide_task_t *);
1da177e4
LT
958
959extern void SELECT_DRIVE(ide_drive_t *);
1da177e4 960extern void SELECT_MASK(ide_drive_t *, int);
1da177e4
LT
961
962extern int drive_is_ready(ide_drive_t *);
1da177e4 963
2fc57388
BZ
964void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
965
f6e29e35 966ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1da177e4 967
4d7a984b
TH
968void task_end_request(ide_drive_t *, struct request *, u8);
969
ac026ff2 970int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
9a3c49be
BZ
971int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
972
1da177e4
LT
973int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
974int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
975int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
976
977extern int system_bus_clock(void);
978
979extern int ide_driveid_update(ide_drive_t *);
1da177e4
LT
980extern int ide_config_drive_speed(ide_drive_t *, u8);
981extern u8 eighty_ninty_three (ide_drive_t *);
1da177e4
LT
982extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
983
984extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
985
1da177e4
LT
986extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
987
988extern int ide_spin_wait_hwgroup(ide_drive_t *);
989extern void ide_timer_expiry(unsigned long);
7d12e780 990extern irqreturn_t ide_intr(int irq, void *dev_id);
165125e1 991extern void do_ide_request(struct request_queue *);
1da177e4
LT
992
993void ide_init_disk(struct gendisk *, ide_drive_t *);
994
6d208b39 995#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
725522b5
GKH
996extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
997#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
6d208b39
BZ
998#else
999#define ide_pci_register_driver(d) pci_register_driver(d)
1000#endif
1001
85620436
BZ
1002void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1003void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1da177e4 1004
8e882ba1 1005#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
b123f56e
BZ
1006int ide_pci_set_master(struct pci_dev *, const char *);
1007unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
1008int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
c413b9b9 1009#else
b123f56e
BZ
1010static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1011 const struct ide_port_info *d)
1012{
1013 return -EINVAL;
1014}
c413b9b9
BZ
1015#endif
1016
1da177e4
LT
1017extern void default_hwif_iops(ide_hwif_t *);
1018extern void default_hwif_mmiops(ide_hwif_t *);
1019extern void default_hwif_transport(ide_hwif_t *);
1020
1da177e4
LT
1021typedef struct ide_pci_enablebit_s {
1022 u8 reg; /* byte pci reg holding the enable-bit */
1023 u8 mask; /* mask to isolate the enable-bit */
1024 u8 val; /* value of masked reg when "enabled" */
1025} ide_pci_enablebit_t;
1026
1027enum {
1028 /* Uses ISA control ports not PCI ones. */
a5d8c5c8 1029 IDE_HFLAG_ISA_PORTS = (1 << 0),
6a824c92 1030 /* single port device */
a5d8c5c8 1031 IDE_HFLAG_SINGLE = (1 << 1),
6a824c92
BZ
1032 /* don't use legacy PIO blacklist */
1033 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
e277f91f
BZ
1034 /* set for the second port of QD65xx */
1035 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
26bcb879
BZ
1036 /* use PIO8/9 for prefetch off/on */
1037 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1038 /* use PIO6/7 for fast-devsel off/on */
1039 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1040 /* use 100-102 and 200-202 PIO values to set DMA modes */
1041 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
aedea591
BZ
1042 /*
1043 * keep DMA setting when programming PIO mode, may be used only
1044 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1045 */
1046 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
88b2b32b
BZ
1047 /* program host for the transfer mode after programming device */
1048 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1049 /* don't program host/device for the transfer mode ("smart" hosts) */
1050 IDE_HFLAG_NO_SET_MODE = (1 << 9),
0ae2e178
BZ
1051 /* trust BIOS for programming chipset/device for DMA */
1052 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
807b90d0 1053 /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
0ae2e178 1054 IDE_HFLAG_VDMA = (1 << 11),
33c1002e
BZ
1055 /* ATAPI DMA is unsupported */
1056 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
5e71d9c5
BZ
1057 /* set if host is a "non-bootable" controller */
1058 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
47b68788
BZ
1059 /* host doesn't support DMA */
1060 IDE_HFLAG_NO_DMA = (1 << 14),
1061 /* check if host is PCI IDE device before allowing DMA */
1062 IDE_HFLAG_NO_AUTODMA = (1 << 15),
807b90d0
BZ
1063 /* don't autotune PIO */
1064 IDE_HFLAG_NO_AUTOTUNE = (1 << 16),
9ffcf364 1065 /* host is CS5510/CS5520 */
807b90d0 1066 IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
238e4f14
BZ
1067 /* no LBA48 */
1068 IDE_HFLAG_NO_LBA48 = (1 << 17),
1069 /* no LBA48 DMA */
1070 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
ed67b923
BZ
1071 /* data FIFO is cleared by an error */
1072 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1c51361a
BZ
1073 /* serialize ports */
1074 IDE_HFLAG_SERIALIZE = (1 << 20),
3985ee3b
BZ
1075 /* use legacy IRQs */
1076 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
8acf28c0
BZ
1077 /* force use of legacy IRQs */
1078 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
272a3709
BZ
1079 /* limit LBA48 requests to 256 sectors */
1080 IDE_HFLAG_RQSIZE_256 = (1 << 23),
caea7602
BZ
1081 /* use 32-bit I/O ops */
1082 IDE_HFLAG_IO_32BIT = (1 << 24),
1083 /* unmask IRQs */
1084 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
4db90a14 1085 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1fd18905
BZ
1086 /* serialize ports if DMA is possible (for sl82c105) */
1087 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
8ac2b42a
BZ
1088 /* force host out of "simplex" mode */
1089 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
4166c199
BZ
1090 /* DSC overlap is unsupported */
1091 IDE_HFLAG_NO_DSC = (1 << 29),
807b90d0
BZ
1092 /* never use 32-bit I/O ops */
1093 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1094 /* never unmask IRQs */
1095 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1da177e4
LT
1096};
1097
7cab14a7 1098#ifdef CONFIG_BLK_DEV_OFFBOARD
7cab14a7 1099# define IDE_HFLAG_OFF_BOARD 0
5e71d9c5
BZ
1100#else
1101# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
7cab14a7
BZ
1102#endif
1103
039788e1 1104struct ide_port_info {
1da177e4 1105 char *name;
1da177e4
LT
1106 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1107 void (*init_iops)(ide_hwif_t *);
1108 void (*init_hwif)(ide_hwif_t *);
b123f56e
BZ
1109 int (*init_dma)(ide_hwif_t *,
1110 const struct ide_port_info *);
ac95beed
BZ
1111
1112 const struct ide_port_ops *port_ops;
f37afdac 1113 const struct ide_dma_ops *dma_ops;
ac95beed 1114
1da177e4 1115 ide_pci_enablebit_t enablebits[2];
528a572d 1116 hwif_chipset_t chipset;
9ffcf364 1117 u32 host_flags;
4099d143 1118 u8 pio_mask;
5f8b6c34
BZ
1119 u8 swdma_mask;
1120 u8 mwdma_mask;
18137207 1121 u8 udma_mask;
039788e1 1122};
1da177e4 1123
85620436
BZ
1124int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1125int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1da177e4
LT
1126
1127void ide_map_sg(ide_drive_t *, struct request *);
1128void ide_init_sg_cmd(ide_drive_t *, struct request *);
1129
1130#define BAD_DMA_DRIVE 0
1131#define GOOD_DMA_DRIVE 1
1132
65e5f2e3
JC
1133struct drive_list_entry {
1134 const char *id_model;
1135 const char *id_firmware;
1136};
1137
1138int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
a5b7e70d
BZ
1139
1140#ifdef CONFIG_BLK_DEV_IDEDMA
1da177e4 1141int __ide_dma_bad_drive(ide_drive_t *);
3ab7efe8 1142int ide_id_dma_bug(ide_drive_t *);
7670df73
BZ
1143
1144u8 ide_find_dma_mode(ide_drive_t *, u8);
1145
1146static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1147{
1148 return ide_find_dma_mode(drive, XFER_UDMA_6);
1149}
1150
4a546e04 1151void ide_dma_off_quietly(ide_drive_t *);
7469aaf6 1152void ide_dma_off(ide_drive_t *);
4a546e04 1153void ide_dma_on(ide_drive_t *);
3608b5d7 1154int ide_set_dma(ide_drive_t *);
578cfa0d 1155void ide_check_dma_crc(ide_drive_t *);
1da177e4
LT
1156ide_startstop_t ide_dma_intr(ide_drive_t *);
1157
062f9f02
BZ
1158int ide_build_sglist(ide_drive_t *, struct request *);
1159void ide_destroy_dmatable(ide_drive_t *);
1160
8e882ba1 1161#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1da177e4 1162extern int ide_build_dmatable(ide_drive_t *, struct request *);
b8e73fba
BZ
1163int ide_allocate_dma_engine(ide_hwif_t *);
1164void ide_release_dma_engine(ide_hwif_t *);
f37afdac 1165void ide_setup_dma(ide_hwif_t *, unsigned long);
1da177e4 1166
15ce926a 1167void ide_dma_host_set(ide_drive_t *, int);
1da177e4 1168extern int ide_dma_setup(ide_drive_t *);
f37afdac 1169void ide_dma_exec_cmd(ide_drive_t *, u8);
1da177e4
LT
1170extern void ide_dma_start(ide_drive_t *);
1171extern int __ide_dma_end(ide_drive_t *);
f37afdac 1172int ide_dma_test_irq(ide_drive_t *);
841d2a9b 1173extern void ide_dma_lost_irq(ide_drive_t *);
c283f5db 1174extern void ide_dma_timeout(ide_drive_t *);
8e882ba1 1175#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1da177e4
LT
1176
1177#else
3ab7efe8 1178static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
7670df73 1179static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
2d5eaa6d 1180static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
4a546e04 1181static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
7469aaf6 1182static inline void ide_dma_off(ide_drive_t *drive) { ; }
4a546e04 1183static inline void ide_dma_on(ide_drive_t *drive) { ; }
1da177e4 1184static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
3608b5d7 1185static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
578cfa0d 1186static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1da177e4
LT
1187#endif /* CONFIG_BLK_DEV_IDEDMA */
1188
8e882ba1 1189#ifndef CONFIG_BLK_DEV_IDEDMA_SFF
0d1bad21 1190static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1da177e4
LT
1191#endif
1192
e3a59b4d
HR
1193#ifdef CONFIG_BLK_DEV_IDEACPI
1194extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1195extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1196extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1197extern void ide_acpi_init(ide_hwif_t *hwif);
eafd88a3 1198void ide_acpi_port_init_devices(ide_hwif_t *);
5e32132b 1199extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
e3a59b4d
HR
1200#else
1201static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1202static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1203static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1204static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
eafd88a3 1205static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
5e32132b 1206static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
e3a59b4d
HR
1207#endif
1208
fbd13088 1209void ide_remove_port_from_hwgroup(ide_hwif_t *);
93de00fd 1210void ide_unregister(unsigned int);
1da177e4
LT
1211
1212void ide_register_region(struct gendisk *);
1213void ide_unregister_region(struct gendisk *);
1214
f01393e4 1215void ide_undecoded_slave(ide_drive_t *);
1da177e4 1216
9fd91d95
BZ
1217void ide_port_apply_params(ide_hwif_t *);
1218
c413b9b9
BZ
1219int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1220int ide_device_add(u8 idx[4], const struct ide_port_info *);
0bfeee7d 1221int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
2dde7861
BZ
1222void ide_port_unregister_devices(ide_hwif_t *);
1223void ide_port_scan(ide_hwif_t *);
1da177e4
LT
1224
1225static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1226{
1227 return hwif->hwif_data;
1228}
1229
1230static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1231{
1232 hwif->hwif_data = data;
1233}
1234
3ab7efe8 1235const char *ide_xfer_verbose(u8 mode);
1da177e4
LT
1236extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1237extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1238
2229833c
BZ
1239static inline int ide_dev_has_iordy(struct hd_driveid *id)
1240{
1241 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1242}
1243
6c3c22f3
SS
1244static inline int ide_dev_is_sata(struct hd_driveid *id)
1245{
1246 /*
1247 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1248 * verifying that word 80 by casting it to a signed type --
1249 * this trick allows us to filter out the reserved values of
1250 * 0x0000 and 0xffff along with the earlier ATA revisions...
1251 */
1252 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1253 return 1;
1254 return 0;
1255}
1256
a501633c 1257u64 ide_get_lba_addr(struct ide_taskfile *, int);
1da177e4
LT
1258u8 ide_dump_status(ide_drive_t *, const char *, u8);
1259
1260typedef struct ide_pio_timings_s {
1261 int setup_time; /* Address setup (ns) minimum */
1262 int active_time; /* Active pulse (ns) minimum */
81d368e0
SS
1263 int cycle_time; /* Cycle time (ns) minimum = */
1264 /* active + recovery (+ setup for some chips) */
1da177e4
LT
1265} ide_pio_timings_t;
1266
7dd00083 1267unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
2134758d 1268u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1da177e4
LT
1269extern const ide_pio_timings_t ide_pio_timings[6];
1270
88b2b32b
BZ
1271int ide_set_pio_mode(ide_drive_t *, u8);
1272int ide_set_dma_mode(ide_drive_t *, u8);
1273
26bcb879
BZ
1274void ide_set_pio(ide_drive_t *, u8);
1275
1276static inline void ide_set_max_pio(ide_drive_t *drive)
1277{
1278 ide_set_pio(drive, 255);
1279}
1da177e4
LT
1280
1281extern spinlock_t ide_lock;
ef29888e 1282extern struct mutex ide_cfg_mtx;
1da177e4
LT
1283/*
1284 * Structure locking:
1285 *
ef29888e 1286 * ide_cfg_mtx and ide_lock together protect changes to
1da177e4
LT
1287 * ide_hwif_t->{next,hwgroup}
1288 * ide_drive_t->next
1289 *
1290 * ide_hwgroup_t->busy: ide_lock
1291 * ide_hwgroup_t->hwif: ide_lock
1292 * ide_hwif_t->mate: constant, no locking
1293 * ide_drive_t->hwif: constant, no locking
1294 */
1295
366c7f55 1296#define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1da177e4
LT
1297
1298extern struct bus_type ide_bus_type;
f74c9141 1299extern struct class *ide_port_class;
1da177e4
LT
1300
1301/* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1302#define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1303
1304/* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1305#define ide_id_has_flush_cache_ext(id) \
1306 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1307
7b9f25b5
BZ
1308static inline void ide_dump_identify(u8 *id)
1309{
1310 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1311}
1312
86b37860
CL
1313static inline int hwif_to_node(ide_hwif_t *hwif)
1314{
36501650 1315 struct pci_dev *dev = to_pci_dev(hwif->dev);
1f07e988 1316 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
86b37860
CL
1317}
1318
1b678347
BH
1319static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1320{
1321 ide_hwif_t *hwif = HWIF(drive);
1322
1323 return &hwif->drives[(drive->dn ^ 1) & 1];
1324}
1325
81ca6919
BZ
1326static inline void ide_set_irq(ide_drive_t *drive, int on)
1327{
23579a2a
BZ
1328 ide_hwif_t *hwif = drive->hwif;
1329
1330 hwif->OUTB(drive->ctl | (on ? 0 : 2),
1331 hwif->io_ports[IDE_CONTROL_OFFSET]);
81ca6919
BZ
1332}
1333
c47137a9
BZ
1334static inline u8 ide_read_status(ide_drive_t *drive)
1335{
1336 ide_hwif_t *hwif = drive->hwif;
1337
1338 return hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1339}
1340
1341static inline u8 ide_read_altstatus(ide_drive_t *drive)
1342{
1343 ide_hwif_t *hwif = drive->hwif;
1344
1345 return hwif->INB(hwif->io_ports[IDE_CONTROL_OFFSET]);
1346}
1347
64a57fe4
BZ
1348static inline u8 ide_read_error(ide_drive_t *drive)
1349{
1350 ide_hwif_t *hwif = drive->hwif;
1351
1352 return hwif->INB(hwif->io_ports[IDE_ERROR_OFFSET]);
1353}
1354
7616c0ad
BZ
1355/*
1356 * Too bad. The drive wants to send us data which we are not ready to accept.
1357 * Just throw it away.
1358 */
1359static inline void ide_atapi_discard_data(ide_drive_t *drive, unsigned bcount)
1360{
1361 ide_hwif_t *hwif = drive->hwif;
1362
1363 /* FIXME: use ->atapi_input_bytes */
1364 while (bcount--)
1365 (void)hwif->INB(hwif->io_ports[IDE_DATA_OFFSET]);
1366}
1367
1368static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount)
1369{
1370 ide_hwif_t *hwif = drive->hwif;
1371
1372 /* FIXME: use ->atapi_output_bytes */
1373 while (bcount--)
1374 hwif->OUTB(0, hwif->io_ports[IDE_DATA_OFFSET]);
1375}
1376
1da177e4 1377#endif /* _IDE_H */