[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / i2c / twl4030.h

/*
 * twl4030.h - header for TWL4030 PM and audio CODEC device
 *
 * Copyright (C) 2005-2006 Texas Instruments, Inc.
 *
 * Based on tlv320aic23.c:
 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 *
 */

#ifndef __TWL4030_H_
#define __TWL4030_H_

/*
 * Using the twl4030 core we address registers using a pair
 *	{ module id, relative register offset }
 * which that core then maps to the relevant
 *	{ i2c slave, absolute register address }
 *
 * The module IDs are meaningful only to the twl4030 core code,
 * which uses them as array indices to look up the first register
 * address each module uses within a given i2c slave.
 */

/* Slave 0 (i2c address 0x48) */
#define TWL4030_MODULE_USB		0x00

/* Slave 1 (i2c address 0x49) */
#define TWL4030_MODULE_AUDIO_VOICE	0x01
#define TWL4030_MODULE_GPIO		0x02
#define TWL4030_MODULE_INTBR		0x03
#define TWL4030_MODULE_PIH		0x04
#define TWL4030_MODULE_TEST		0x05

/* Slave 2 (i2c address 0x4a) */
#define TWL4030_MODULE_KEYPAD		0x06
#define TWL4030_MODULE_MADC		0x07
#define TWL4030_MODULE_INTERRUPTS	0x08
#define TWL4030_MODULE_LED		0x09
#define TWL4030_MODULE_MAIN_CHARGE	0x0A
#define TWL4030_MODULE_PRECHARGE	0x0B
#define TWL4030_MODULE_PWM0		0x0C
#define TWL4030_MODULE_PWM1		0x0D
#define TWL4030_MODULE_PWMA		0x0E
#define TWL4030_MODULE_PWMB		0x0F

/* Slave 3 (i2c address 0x4b) */
#define TWL4030_MODULE_BACKUP		0x10
#define TWL4030_MODULE_INT		0x11
#define TWL4030_MODULE_PM_MASTER	0x12
#define TWL4030_MODULE_PM_RECEIVER	0x13
#define TWL4030_MODULE_RTC		0x14
#define TWL4030_MODULE_SECURED_REG	0x15

/*
 * Read and write single 8-bit registers
 */
int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);

/*
 * Read and write several 8-bit registers at once.
 *
 * IMPORTANT:  For twl4030_i2c_write(), allocate num_bytes + 1
 * for the value, and populate your data starting at offset 1.
 */
int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);

/*----------------------------------------------------------------------*/

/*
 * NOTE:  at up to 1024 registers, this is a big chip.
 *
 * Avoid putting register declarations in this file, instead of into
 * a driver-private file, unless some of the registers in a block
 * need to be shared with other drivers.  One example is blocks that
 * have Secondary IRQ Handler (SIH) registers.
 */

#define TWL4030_SIH_CTRL_EXCLEN_MASK	BIT(0)
#define TWL4030_SIH_CTRL_PENDDIS_MASK	BIT(1)
#define TWL4030_SIH_CTRL_COR_MASK	BIT(2)

/*----------------------------------------------------------------------*/

/*
 * GPIO Block Register offsets (use TWL4030_MODULE_GPIO)
 */

#define REG_GPIODATAIN1			0x0
#define REG_GPIODATAIN2			0x1
#define REG_GPIODATAIN3			0x2
#define REG_GPIODATADIR1		0x3
#define REG_GPIODATADIR2		0x4
#define REG_GPIODATADIR3		0x5
#define REG_GPIODATAOUT1		0x6
#define REG_GPIODATAOUT2		0x7
#define REG_GPIODATAOUT3		0x8
#define REG_CLEARGPIODATAOUT1		0x9
#define REG_CLEARGPIODATAOUT2		0xA
#define REG_CLEARGPIODATAOUT3		0xB
#define REG_SETGPIODATAOUT1		0xC
#define REG_SETGPIODATAOUT2		0xD
#define REG_SETGPIODATAOUT3		0xE
#define REG_GPIO_DEBEN1			0xF
#define REG_GPIO_DEBEN2			0x10
#define REG_GPIO_DEBEN3			0x11
#define REG_GPIO_CTRL			0x12
#define REG_GPIOPUPDCTR1		0x13
#define REG_GPIOPUPDCTR2		0x14
#define REG_GPIOPUPDCTR3		0x15
#define REG_GPIOPUPDCTR4		0x16
#define REG_GPIOPUPDCTR5		0x17
#define REG_GPIO_ISR1A			0x19
#define REG_GPIO_ISR2A			0x1A
#define REG_GPIO_ISR3A			0x1B
#define REG_GPIO_IMR1A			0x1C
#define REG_GPIO_IMR2A			0x1D
#define REG_GPIO_IMR3A			0x1E
#define REG_GPIO_ISR1B			0x1F
#define REG_GPIO_ISR2B			0x20
#define REG_GPIO_ISR3B			0x21
#define REG_GPIO_IMR1B			0x22
#define REG_GPIO_IMR2B			0x23
#define REG_GPIO_IMR3B			0x24
#define REG_GPIO_EDR1			0x28
#define REG_GPIO_EDR2			0x29
#define REG_GPIO_EDR3			0x2A
#define REG_GPIO_EDR4			0x2B
#define REG_GPIO_EDR5			0x2C
#define REG_GPIO_SIH_CTRL		0x2D

/* Up to 18 signals are available as GPIOs, when their
 * pins are not assigned to another use (such as ULPI/USB).
 */
#define TWL4030_GPIO_MAX		18

/*----------------------------------------------------------------------*/

/*
 * Keypad register offsets (use TWL4030_MODULE_KEYPAD)
 * ... SIH/interrupt only
 */

#define TWL4030_KEYPAD_KEYP_ISR1	0x11
#define TWL4030_KEYPAD_KEYP_IMR1	0x12
#define TWL4030_KEYPAD_KEYP_ISR2	0x13
#define TWL4030_KEYPAD_KEYP_IMR2	0x14
#define TWL4030_KEYPAD_KEYP_SIR		0x15	/* test register */
#define TWL4030_KEYPAD_KEYP_EDR		0x16
#define TWL4030_KEYPAD_KEYP_SIH_CTRL	0x17

/*----------------------------------------------------------------------*/

/*
 * Multichannel ADC register offsets (use TWL4030_MODULE_MADC)
 * ... SIH/interrupt only
 */

#define TWL4030_MADC_ISR1		0x61
#define TWL4030_MADC_IMR1		0x62
#define TWL4030_MADC_ISR2		0x63
#define TWL4030_MADC_IMR2		0x64
#define TWL4030_MADC_SIR		0x65	/* test register */
#define TWL4030_MADC_EDR		0x66
#define TWL4030_MADC_SIH_CTRL		0x67

/*----------------------------------------------------------------------*/

/*
 * Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS)
 */

#define TWL4030_INTERRUPTS_BCIISR1A	0x0
#define TWL4030_INTERRUPTS_BCIISR2A	0x1
#define TWL4030_INTERRUPTS_BCIIMR1A	0x2
#define TWL4030_INTERRUPTS_BCIIMR2A	0x3
#define TWL4030_INTERRUPTS_BCIISR1B	0x4
#define TWL4030_INTERRUPTS_BCIISR2B	0x5
#define TWL4030_INTERRUPTS_BCIIMR1B	0x6
#define TWL4030_INTERRUPTS_BCIIMR2B	0x7
#define TWL4030_INTERRUPTS_BCISIR1	0x8	/* test register */
#define TWL4030_INTERRUPTS_BCISIR2	0x9	/* test register */
#define TWL4030_INTERRUPTS_BCIEDR1	0xa
#define TWL4030_INTERRUPTS_BCIEDR2	0xb
#define TWL4030_INTERRUPTS_BCIEDR3	0xc
#define TWL4030_INTERRUPTS_BCISIHCTRL	0xd

/*----------------------------------------------------------------------*/

/*
 * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
 */

#define TWL4030_INT_PWR_ISR1		0x0
#define TWL4030_INT_PWR_IMR1		0x1
#define TWL4030_INT_PWR_ISR2		0x2
#define TWL4030_INT_PWR_IMR2		0x3
#define TWL4030_INT_PWR_SIR		0x4	/* test register */
#define TWL4030_INT_PWR_EDR1		0x5
#define TWL4030_INT_PWR_EDR2		0x6
#define TWL4030_INT_PWR_SIH_CTRL	0x7

/*----------------------------------------------------------------------*/

struct twl4030_bci_platform_data {
	int *battery_tmp_tbl;
	unsigned int tblsize;
};

/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
struct twl4030_gpio_platform_data {
	int		gpio_base;
	unsigned	irq_base, irq_end;

	/* package the two LED signals as output-only GPIOs? */
	bool		use_leds;

	/* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
	u8		mmc_cd;

	/* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
	 * should be enabled.  Else, if that bit is set in "pulldowns",
	 * that pulldown is enabled.  Don't waste power by letting any
	 * digital inputs float...
	 */
	u32		pullups;
	u32		pulldowns;

	int		(*setup)(struct device *dev,
				unsigned gpio, unsigned ngpio);
	int		(*teardown)(struct device *dev,
				unsigned gpio, unsigned ngpio);
};

struct twl4030_madc_platform_data {
	int		irq_line;
};

struct twl4030_keypad_data {
	int rows;
	int cols;
	int *keymap;
	int irq;
	unsigned int keymapsize;
	unsigned int rep:1;
};

enum twl4030_usb_mode {
	T2_USB_MODE_ULPI = 1,
	T2_USB_MODE_CEA2011_3PIN = 2,
};

struct twl4030_usb_data {
	enum twl4030_usb_mode	usb_mode;
};

struct twl4030_platform_data {
	unsigned				irq_base, irq_end;
	struct twl4030_bci_platform_data	*bci;
	struct twl4030_gpio_platform_data	*gpio;
	struct twl4030_madc_platform_data	*madc;
	struct twl4030_keypad_data		*keypad;
	struct twl4030_usb_data			*usb;

	/* LDO regulators */
	struct regulator_init_data		*vdac;
	struct regulator_init_data		*vpll1;
	struct regulator_init_data		*vpll2;
	struct regulator_init_data		*vmmc1;
	struct regulator_init_data		*vmmc2;
	struct regulator_init_data		*vsim;
	struct regulator_init_data		*vaux1;
	struct regulator_init_data		*vaux2;
	struct regulator_init_data		*vaux3;
	struct regulator_init_data		*vaux4;

	/* REVISIT more to come ... _nothing_ should be hard-wired */
};

/*----------------------------------------------------------------------*/

int twl4030_sih_setup(int module);

/* Offsets to Power Registers */
#define TWL4030_VDAC_DEV_GRP		0x3B
#define TWL4030_VDAC_DEDICATED		0x3E
#define TWL4030_VAUX1_DEV_GRP		0x17
#define TWL4030_VAUX1_DEDICATED		0x1A
#define TWL4030_VAUX2_DEV_GRP		0x1B
#define TWL4030_VAUX2_DEDICATED		0x1E
#define TWL4030_VAUX3_DEV_GRP		0x1F
#define TWL4030_VAUX3_DEDICATED		0x22

/*
 * Exported TWL4030 GPIO APIs
 *
 * WARNING -- use standard GPIO and IRQ calls instead; these will vanish.
 */
int twl4030_set_gpio_debounce(int gpio, int enable);

#if defined(CONFIG_TWL4030_BCI_BATTERY) || \
	defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
	extern int twl4030charger_usb_en(int enable);
#else
	static inline int twl4030charger_usb_en(int enable) { return 0; }
#endif

/*----------------------------------------------------------------------*/

/* Linux-specific regulator identifiers ... for now, we only support
 * the LDOs, and leave the three buck converters alone.  VDD1 and VDD2
 * need to tie into hardware based voltage scaling (cpufreq etc), while
 * VIO is generally fixed.
 */

/* EXTERNAL dc-to-dc buck converters */
#define TWL4030_REG_VDD1	0
#define TWL4030_REG_VDD2	1
#define TWL4030_REG_VIO		2

/* EXTERNAL LDOs */
#define TWL4030_REG_VDAC	3
#define TWL4030_REG_VPLL1	4
#define TWL4030_REG_VPLL2	5	/* not on all chips */
#define TWL4030_REG_VMMC1	6
#define TWL4030_REG_VMMC2	7	/* not on all chips */
#define TWL4030_REG_VSIM	8	/* not on all chips */
#define TWL4030_REG_VAUX1	9	/* not on all chips */
#define TWL4030_REG_VAUX2_4030	10	/* (twl4030-specific) */
#define TWL4030_REG_VAUX2	11	/* (twl5030 and newer) */
#define TWL4030_REG_VAUX3	12	/* not on all chips */
#define TWL4030_REG_VAUX4	13	/* not on all chips */

/* INTERNAL LDOs */
#define TWL4030_REG_VINTANA1	14
#define TWL4030_REG_VINTANA2	15
#define TWL4030_REG_VINTDIG	16
#define TWL4030_REG_VUSB1V5	17
#define TWL4030_REG_VUSB1V8	18
#define TWL4030_REG_VUSB3V1	19

#endif /* End of __TWL4030_H */
Commit	Line	Data
a603a7fa DB	1	/*
	2	* twl4030.h - header for TWL4030 PM and audio CODEC device
	3	*
	4	* Copyright (C) 2005-2006 Texas Instruments, Inc.
	5	*
	6	* Based on tlv320aic23.c:
	7	* Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	*/
	24
	25	#ifndef __TWL4030_H_
	26	#define __TWL4030_H_
	27
	28	/*
	29	* Using the twl4030 core we address registers using a pair
	30	* { module id, relative register offset }
	31	* which that core then maps to the relevant
	32	* { i2c slave, absolute register address }
	33	*
	34	* The module IDs are meaningful only to the twl4030 core code,
	35	* which uses them as array indices to look up the first register
	36	* address each module uses within a given i2c slave.
	37	*/
	38
	39	/* Slave 0 (i2c address 0x48) */
	40	#define TWL4030_MODULE_USB 0x00
	41
	42	/* Slave 1 (i2c address 0x49) */
	43	#define TWL4030_MODULE_AUDIO_VOICE 0x01
	44	#define TWL4030_MODULE_GPIO 0x02
	45	#define TWL4030_MODULE_INTBR 0x03
	46	#define TWL4030_MODULE_PIH 0x04
	47	#define TWL4030_MODULE_TEST 0x05
	48
	49	/* Slave 2 (i2c address 0x4a) */
	50	#define TWL4030_MODULE_KEYPAD 0x06
	51	#define TWL4030_MODULE_MADC 0x07
	52	#define TWL4030_MODULE_INTERRUPTS 0x08
	53	#define TWL4030_MODULE_LED 0x09
	54	#define TWL4030_MODULE_MAIN_CHARGE 0x0A
	55	#define TWL4030_MODULE_PRECHARGE 0x0B
	56	#define TWL4030_MODULE_PWM0 0x0C
	57	#define TWL4030_MODULE_PWM1 0x0D
	58	#define TWL4030_MODULE_PWMA 0x0E
	59	#define TWL4030_MODULE_PWMB 0x0F
	60
	61	/* Slave 3 (i2c address 0x4b) */
	62	#define TWL4030_MODULE_BACKUP 0x10
	63	#define TWL4030_MODULE_INT 0x11
	64	#define TWL4030_MODULE_PM_MASTER 0x12
65	#define TWL4030_MODULE_PM_RECEIVER 0x13
66	#define TWL4030_MODULE_RTC 0x14
67	#define TWL4030_MODULE_SECURED_REG 0x15
68
69	/*
70	* Read and write single 8-bit registers
71	*/
72	int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
73	int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
74
75	/*
76	* Read and write several 8-bit registers at once.
77	*
78	* IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1
79	* for the value, and populate your data starting at offset 1.
80	*/
3fba19ec DB	81	int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
3fba19ec DB	82	int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
a603a7fa DB	83
	84	/----------------------------------------------------------------------/
	85
	86	/*
	87	* NOTE: at up to 1024 registers, this is a big chip.
	88	*
	89	* Avoid putting register declarations in this file, instead of into
	90	* a driver-private file, unless some of the registers in a block
	91	* need to be shared with other drivers. One example is blocks that
	92	* have Secondary IRQ Handler (SIH) registers.
	93	*/
	94
	95	#define TWL4030_SIH_CTRL_EXCLEN_MASK BIT(0)
	96	#define TWL4030_SIH_CTRL_PENDDIS_MASK BIT(1)
	97	#define TWL4030_SIH_CTRL_COR_MASK BIT(2)
	98
	99	/----------------------------------------------------------------------/
	100
	101	/*
	102	* GPIO Block Register offsets (use TWL4030_MODULE_GPIO)
	103	*/
	104
	105	#define REG_GPIODATAIN1 0x0
	106	#define REG_GPIODATAIN2 0x1
	107	#define REG_GPIODATAIN3 0x2
	108	#define REG_GPIODATADIR1 0x3
	109	#define REG_GPIODATADIR2 0x4
	110	#define REG_GPIODATADIR3 0x5
	111	#define REG_GPIODATAOUT1 0x6
	112	#define REG_GPIODATAOUT2 0x7
	113	#define REG_GPIODATAOUT3 0x8
	114	#define REG_CLEARGPIODATAOUT1 0x9
	115	#define REG_CLEARGPIODATAOUT2 0xA
	116	#define REG_CLEARGPIODATAOUT3 0xB
	117	#define REG_SETGPIODATAOUT1 0xC
	118	#define REG_SETGPIODATAOUT2 0xD
	119	#define REG_SETGPIODATAOUT3 0xE
	120	#define REG_GPIO_DEBEN1 0xF
	121	#define REG_GPIO_DEBEN2 0x10
	122	#define REG_GPIO_DEBEN3 0x11
	123	#define REG_GPIO_CTRL 0x12
	124	#define REG_GPIOPUPDCTR1 0x13
	125	#define REG_GPIOPUPDCTR2 0x14
	126	#define REG_GPIOPUPDCTR3 0x15
	127	#define REG_GPIOPUPDCTR4 0x16
	128	#define REG_GPIOPUPDCTR5 0x17
	129	#define REG_GPIO_ISR1A 0x19
	130	#define REG_GPIO_ISR2A 0x1A
	131	#define REG_GPIO_ISR3A 0x1B
	132	#define REG_GPIO_IMR1A 0x1C
	133	#define REG_GPIO_IMR2A 0x1D
	134	#define REG_GPIO_IMR3A 0x1E
	135	#define REG_GPIO_ISR1B 0x1F
	136	#define REG_GPIO_ISR2B 0x20
	137	#define REG_GPIO_ISR3B 0x21
	138	#define REG_GPIO_IMR1B 0x22
	139	#define REG_GPIO_IMR2B 0x23
	140	#define REG_GPIO_IMR3B 0x24
	141	#define REG_GPIO_EDR1 0x28
	142	#define REG_GPIO_EDR2 0x29
	143	#define REG_GPIO_EDR3 0x2A
	144	#define REG_GPIO_EDR4 0x2B
	145	#define REG_GPIO_EDR5 0x2C
	146	#define REG_GPIO_SIH_CTRL 0x2D
147
148	/* Up to 18 signals are available as GPIOs, when their
149	* pins are not assigned to another use (such as ULPI/USB).
150	*/
151	#define TWL4030_GPIO_MAX 18
152
153	/----------------------------------------------------------------------/
154
155	/*
156	* Keypad register offsets (use TWL4030_MODULE_KEYPAD)
157	* ... SIH/interrupt only
158	*/
159
160	#define TWL4030_KEYPAD_KEYP_ISR1 0x11
161	#define TWL4030_KEYPAD_KEYP_IMR1 0x12
162	#define TWL4030_KEYPAD_KEYP_ISR2 0x13
163	#define TWL4030_KEYPAD_KEYP_IMR2 0x14
164	#define TWL4030_KEYPAD_KEYP_SIR 0x15 /* test register */
165	#define TWL4030_KEYPAD_KEYP_EDR 0x16
166	#define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17
167
168	/----------------------------------------------------------------------/
169
170	/*
171	* Multichannel ADC register offsets (use TWL4030_MODULE_MADC)
172	* ... SIH/interrupt only
173	*/
174
175	#define TWL4030_MADC_ISR1 0x61
176	#define TWL4030_MADC_IMR1 0x62
177	#define TWL4030_MADC_ISR2 0x63
178	#define TWL4030_MADC_IMR2 0x64
179	#define TWL4030_MADC_SIR 0x65 /* test register */
180	#define TWL4030_MADC_EDR 0x66
181	#define TWL4030_MADC_SIH_CTRL 0x67
182
183	/----------------------------------------------------------------------/
184
185	/*
186	* Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS)
187	*/
188
189	#define TWL4030_INTERRUPTS_BCIISR1A 0x0
190	#define TWL4030_INTERRUPTS_BCIISR2A 0x1
191	#define TWL4030_INTERRUPTS_BCIIMR1A 0x2
192	#define TWL4030_INTERRUPTS_BCIIMR2A 0x3
193	#define TWL4030_INTERRUPTS_BCIISR1B 0x4
194	#define TWL4030_INTERRUPTS_BCIISR2B 0x5
195	#define TWL4030_INTERRUPTS_BCIIMR1B 0x6
196	#define TWL4030_INTERRUPTS_BCIIMR2B 0x7
197	#define TWL4030_INTERRUPTS_BCISIR1 0x8 /* test register */
198	#define TWL4030_INTERRUPTS_BCISIR2 0x9 /* test register */
199	#define TWL4030_INTERRUPTS_BCIEDR1 0xa
200	#define TWL4030_INTERRUPTS_BCIEDR2 0xb
201	#define TWL4030_INTERRUPTS_BCIEDR3 0xc
202	#define TWL4030_INTERRUPTS_BCISIHCTRL 0xd
203
204	/----------------------------------------------------------------------/
205
206	/*
207	* Power Interrupt block register offsets (use TWL4030_MODULE_INT)
208	*/
209
210	#define TWL4030_INT_PWR_ISR1 0x0
211	#define TWL4030_INT_PWR_IMR1 0x1
212	#define TWL4030_INT_PWR_ISR2 0x2
213	#define TWL4030_INT_PWR_IMR2 0x3
214	#define TWL4030_INT_PWR_SIR 0x4 /* test register */
215	#define TWL4030_INT_PWR_EDR1 0x5
216	#define TWL4030_INT_PWR_EDR2 0x6
217	#define TWL4030_INT_PWR_SIH_CTRL 0x7
218
219	/----------------------------------------------------------------------/
220
221	struct twl4030_bci_platform_data {
222	int *battery_tmp_tbl;
223	unsigned int tblsize;
224	};
225
226	/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
227	struct twl4030_gpio_platform_data {
228	int gpio_base;
229	unsigned irq_base, irq_end;
230
a30d46c0 DB	231	/* package the two LED signals as output-only GPIOs? */
	232	bool use_leds;
	233
	234	/* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
	235	u8 mmc_cd;
	236
a603a7fa DB	237	/* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
	238	* should be enabled. Else, if that bit is set in "pulldowns",
	239	* that pulldown is enabled. Don't waste power by letting any
	240	* digital inputs float...
	241	*/
	242	u32 pullups;
	243	u32 pulldowns;
	244
	245	int (setup)(struct device dev,
	246	unsigned gpio, unsigned ngpio);
	247	int (teardown)(struct device dev,
	248	unsigned gpio, unsigned ngpio);
	249	};
	250
	251	struct twl4030_madc_platform_data {
	252	int irq_line;
	253	};
	254
	255	struct twl4030_keypad_data {
	256	int rows;
	257	int cols;
	258	int *keymap;
	259	int irq;
	260	unsigned int keymapsize;
	261	unsigned int rep:1;
	262	};
	263
	264	enum twl4030_usb_mode {
	265	T2_USB_MODE_ULPI = 1,
	266	T2_USB_MODE_CEA2011_3PIN = 2,
	267	};
	268
	269	struct twl4030_usb_data {
	270	enum twl4030_usb_mode usb_mode;
	271	};
	272
	273	struct twl4030_platform_data {
	274	unsigned irq_base, irq_end;
	275	struct twl4030_bci_platform_data *bci;
	276	struct twl4030_gpio_platform_data *gpio;
	277	struct twl4030_madc_platform_data *madc;
	278	struct twl4030_keypad_data *keypad;
	279	struct twl4030_usb_data *usb;
	280
dad759ff DB	281	/* LDO regulators */
	282	struct regulator_init_data *vdac;
	283	struct regulator_init_data *vpll1;
	284	struct regulator_init_data *vpll2;
	285	struct regulator_init_data *vmmc1;
	286	struct regulator_init_data *vmmc2;
	287	struct regulator_init_data *vsim;
	288	struct regulator_init_data *vaux1;
	289	struct regulator_init_data *vaux2;
	290	struct regulator_init_data *vaux3;
	291	struct regulator_init_data *vaux4;
	292
a603a7fa DB	293	/* REVISIT more to come ... _nothing_ should be hard-wired */
	294	};
	295
	296	/----------------------------------------------------------------------/
	297
a30d46c0 DB	298	int twl4030_sih_setup(int module);
a30d46c0 DB	299
a603a7fa DB	300	/* Offsets to Power Registers */
	301	#define TWL4030_VDAC_DEV_GRP 0x3B
	302	#define TWL4030_VDAC_DEDICATED 0x3E
	303	#define TWL4030_VAUX1_DEV_GRP 0x17
	304	#define TWL4030_VAUX1_DEDICATED 0x1A
	305	#define TWL4030_VAUX2_DEV_GRP 0x1B
	306	#define TWL4030_VAUX2_DEDICATED 0x1E
	307	#define TWL4030_VAUX3_DEV_GRP 0x1F
	308	#define TWL4030_VAUX3_DEDICATED 0x22
	309
a603a7fa DB	310	/*
	311	* Exported TWL4030 GPIO APIs
	312	*
	313	* WARNING -- use standard GPIO and IRQ calls instead; these will vanish.
	314	*/
a603a7fa	315	int twl4030_set_gpio_debounce(int gpio, int enable);
a603a7fa DB	316
	317	#if defined(CONFIG_TWL4030_BCI_BATTERY) \|\| \
	318	defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
	319	extern int twl4030charger_usb_en(int enable);
	320	#else
	321	static inline int twl4030charger_usb_en(int enable) { return 0; }
	322	#endif
	323
dad759ff DB	324	/----------------------------------------------------------------------/
	325
	326	/* Linux-specific regulator identifiers ... for now, we only support
	327	* the LDOs, and leave the three buck converters alone. VDD1 and VDD2
	328	* need to tie into hardware based voltage scaling (cpufreq etc), while
	329	* VIO is generally fixed.
	330	*/
	331
	332	/* EXTERNAL dc-to-dc buck converters */
	333	#define TWL4030_REG_VDD1 0
	334	#define TWL4030_REG_VDD2 1
	335	#define TWL4030_REG_VIO 2
	336
	337	/* EXTERNAL LDOs */
	338	#define TWL4030_REG_VDAC 3
	339	#define TWL4030_REG_VPLL1 4
	340	#define TWL4030_REG_VPLL2 5 /* not on all chips */
	341	#define TWL4030_REG_VMMC1 6
	342	#define TWL4030_REG_VMMC2 7 /* not on all chips */
	343	#define TWL4030_REG_VSIM 8 /* not on all chips */
	344	#define TWL4030_REG_VAUX1 9 /* not on all chips */
	345	#define TWL4030_REG_VAUX2_4030 10 /* (twl4030-specific) */
	346	#define TWL4030_REG_VAUX2 11 /* (twl5030 and newer) */
	347	#define TWL4030_REG_VAUX3 12 /* not on all chips */
	348	#define TWL4030_REG_VAUX4 13 /* not on all chips */
	349
	350	/* INTERNAL LDOs */
	351	#define TWL4030_REG_VINTANA1 14
	352	#define TWL4030_REG_VINTANA2 15
	353	#define TWL4030_REG_VINTDIG 16
	354	#define TWL4030_REG_VUSB1V5 17
	355	#define TWL4030_REG_VUSB1V8 18
	356	#define TWL4030_REG_VUSB3V1 19
dad759ff	357
a603a7fa	358	#endif /* End of __TWL4030_H */