libata passthru: always enforce correct DEV bit
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / ata.h
CommitLineData
1da177e4
LT
1
2/*
af36d7f0
JG
3 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
4 * Copyright 2003-2004 Jeff Garzik
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 *
22 * libata documentation is available via 'make {ps|pdf}docs',
23 * as Documentation/DocBook/libata.*
24 *
25 * Hardware documentation available from http://www.t13.org/
26 *
1da177e4
LT
27 */
28
29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
32#include <linux/types.h>
33
34/* defines only for the constants which don't work well as enums */
35#define ATA_DMA_BOUNDARY 0xffffUL
36#define ATA_DMA_MASK 0xffffffffULL
37
38enum {
39 /* various global constants */
40 ATA_MAX_DEVICES = 2, /* per bus/port */
41 ATA_MAX_PRD = 256, /* we could make these 256/256 */
42 ATA_SECT_SIZE = 512,
18d6e9d5 43 ATA_MAX_SECTORS_128 = 128,
8b881b04
JG
44 ATA_MAX_SECTORS = 256,
45 ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
1da177e4
LT
46
47 ATA_ID_WORDS = 256,
a0cf733b
TH
48 ATA_ID_SERNO = 10,
49 ATA_ID_FW_REV = 23,
50 ATA_ID_PROD = 27,
11e29e21
AC
51 ATA_ID_OLD_PIO_MODES = 51,
52 ATA_ID_FIELD_VALID = 53,
1da177e4 53 ATA_ID_MWDMA_MODES = 63,
11e29e21
AC
54 ATA_ID_PIO_MODES = 64,
55 ATA_ID_EIDE_DMA_MIN = 65,
56 ATA_ID_EIDE_PIO = 67,
57 ATA_ID_EIDE_PIO_IORDY = 68,
1da177e4 58 ATA_ID_UDMA_MODES = 88,
11e29e21 59 ATA_ID_MAJOR_VER = 80,
1da177e4
LT
60 ATA_ID_PIO4 = (1 << 1),
61
a0cf733b
TH
62 ATA_ID_SERNO_LEN = 20,
63 ATA_ID_FW_REV_LEN = 8,
64 ATA_ID_PROD_LEN = 40,
65
1da177e4 66 ATA_PCI_CTL_OFS = 2,
1da177e4
LT
67 ATA_UDMA0 = (1 << 0),
68 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
69 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
70 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
71 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
72 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
73 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
74 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
75 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
76
77 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
78
79 /* DMA-related */
80 ATA_PRD_SZ = 8,
81 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
82 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
83
84 ATA_DMA_TABLE_OFS = 4,
85 ATA_DMA_STATUS = 2,
86 ATA_DMA_CMD = 0,
87 ATA_DMA_WR = (1 << 3),
88 ATA_DMA_START = (1 << 0),
89 ATA_DMA_INTR = (1 << 2),
90 ATA_DMA_ERR = (1 << 1),
91 ATA_DMA_ACTIVE = (1 << 0),
92
93 /* bits in ATA command block registers */
94 ATA_HOB = (1 << 7), /* LBA48 selector */
95 ATA_NIEN = (1 << 1), /* disable-irq flag */
96 ATA_LBA = (1 << 6), /* LBA28 selector */
97 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
98 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
99 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
100 ATA_BUSY = (1 << 7), /* BSY status bit */
101 ATA_DRDY = (1 << 6), /* device ready */
102 ATA_DF = (1 << 5), /* device fault */
103 ATA_DRQ = (1 << 3), /* data request i/o */
104 ATA_ERR = (1 << 0), /* have an error */
105 ATA_SRST = (1 << 2), /* software reset */
9be1e979
TH
106 ATA_ICRC = (1 << 7), /* interface CRC error */
107 ATA_UNC = (1 << 6), /* uncorrectable media error */
108 ATA_IDNF = (1 << 4), /* ID not found */
1da177e4
LT
109 ATA_ABORTED = (1 << 2), /* command aborted */
110
111 /* ATA command block registers */
112 ATA_REG_DATA = 0x00,
113 ATA_REG_ERR = 0x01,
114 ATA_REG_NSECT = 0x02,
115 ATA_REG_LBAL = 0x03,
116 ATA_REG_LBAM = 0x04,
117 ATA_REG_LBAH = 0x05,
118 ATA_REG_DEVICE = 0x06,
119 ATA_REG_STATUS = 0x07,
120
121 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
122 ATA_REG_CMD = ATA_REG_STATUS,
123 ATA_REG_BYTEL = ATA_REG_LBAM,
124 ATA_REG_BYTEH = ATA_REG_LBAH,
125 ATA_REG_DEVSEL = ATA_REG_DEVICE,
126 ATA_REG_IRQ = ATA_REG_NSECT,
127
128 /* ATA device commands */
129 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
972dcafb
DG
130 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
131 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
1da177e4
LT
132 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
133 ATA_CMD_FLUSH = 0xE7,
134 ATA_CMD_FLUSH_EXT = 0xEA,
135 ATA_CMD_ID_ATA = 0xEC,
136 ATA_CMD_ID_ATAPI = 0xA1,
137 ATA_CMD_READ = 0xC8,
138 ATA_CMD_READ_EXT = 0x25,
139 ATA_CMD_WRITE = 0xCA,
140 ATA_CMD_WRITE_EXT = 0x35,
9a3dccc4 141 ATA_CMD_WRITE_FUA_EXT = 0x3D,
88e49034
TH
142 ATA_CMD_FPDMA_READ = 0x60,
143 ATA_CMD_FPDMA_WRITE = 0x61,
1da177e4
LT
144 ATA_CMD_PIO_READ = 0x20,
145 ATA_CMD_PIO_READ_EXT = 0x24,
146 ATA_CMD_PIO_WRITE = 0x30,
147 ATA_CMD_PIO_WRITE_EXT = 0x34,
8cbd6df1
AL
148 ATA_CMD_READ_MULTI = 0xC4,
149 ATA_CMD_READ_MULTI_EXT = 0x29,
150 ATA_CMD_WRITE_MULTI = 0xC5,
151 ATA_CMD_WRITE_MULTI_EXT = 0x39,
9a3dccc4 152 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
1da177e4
LT
153 ATA_CMD_SET_FEATURES = 0xEF,
154 ATA_CMD_PACKET = 0xA0,
155 ATA_CMD_VERIFY = 0x40,
156 ATA_CMD_VERIFY_EXT = 0x42,
9b847548
JA
157 ATA_CMD_STANDBYNOW1 = 0xE0,
158 ATA_CMD_IDLEIMMEDIATE = 0xE1,
8bf62ece 159 ATA_CMD_INIT_DEV_PARAMS = 0x91,
b6782728
AC
160 ATA_CMD_READ_NATIVE_MAX = 0xF8,
161 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
1e999736
AC
162 ATA_CMD_SET_MAX = 0xF9,
163 ATA_CMD_SET_MAX_EXT = 0x37,
88e49034
TH
164 ATA_CMD_READ_LOG_EXT = 0x2f,
165
166 /* READ_LOG_EXT pages */
167 ATA_LOG_SATA_NCQ = 0x10,
1da177e4 168
5a5dbd18
ML
169 /* READ/WRITE LONG (obsolete) */
170 ATA_CMD_READ_LONG = 0x22,
171 ATA_CMD_READ_LONG_ONCE = 0x23,
172 ATA_CMD_WRITE_LONG = 0x32,
173 ATA_CMD_WRITE_LONG_ONCE = 0x33,
174
1da177e4
LT
175 /* SETFEATURES stuff */
176 SETFEATURES_XFER = 0x03,
177 XFER_UDMA_7 = 0x47,
178 XFER_UDMA_6 = 0x46,
179 XFER_UDMA_5 = 0x45,
180 XFER_UDMA_4 = 0x44,
181 XFER_UDMA_3 = 0x43,
182 XFER_UDMA_2 = 0x42,
183 XFER_UDMA_1 = 0x41,
184 XFER_UDMA_0 = 0x40,
b352e57d
AC
185 XFER_MW_DMA_4 = 0x24, /* CFA only */
186 XFER_MW_DMA_3 = 0x23, /* CFA only */
1da177e4
LT
187 XFER_MW_DMA_2 = 0x22,
188 XFER_MW_DMA_1 = 0x21,
189 XFER_MW_DMA_0 = 0x20,
b4b52db7
AC
190 XFER_SW_DMA_2 = 0x12,
191 XFER_SW_DMA_1 = 0x11,
192 XFER_SW_DMA_0 = 0x10,
b352e57d
AC
193 XFER_PIO_6 = 0x0E, /* CFA only */
194 XFER_PIO_5 = 0x0D, /* CFA only */
1da177e4
LT
195 XFER_PIO_4 = 0x0C,
196 XFER_PIO_3 = 0x0B,
197 XFER_PIO_2 = 0x0A,
198 XFER_PIO_1 = 0x09,
199 XFER_PIO_0 = 0x08,
1da177e4
LT
200 XFER_PIO_SLOW = 0x00,
201
3057ac3c 202 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
203 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
204
169439c2
ML
205 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
206
1da177e4
LT
207 /* ATAPI stuff */
208 ATAPI_PKT_DMA = (1 << 0),
209 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
210 0=to device, 1=to host */
211 ATAPI_CDB_LEN = 16,
212
213 /* cable types */
214 ATA_CBL_NONE = 0,
215 ATA_CBL_PATA40 = 1,
216 ATA_CBL_PATA80 = 2,
fc085150
AC
217 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
218 ATA_CBL_PATA_UNK = 4,
219 ATA_CBL_SATA = 5,
1da177e4
LT
220
221 /* SATA Status and Control Registers */
222 SCR_STATUS = 0,
223 SCR_ERROR = 1,
224 SCR_CONTROL = 2,
225 SCR_ACTIVE = 3,
226 SCR_NOTIFICATION = 4,
227
9be1e979
TH
228 /* SError bits */
229 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
230 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
231 SERR_DATA = (1 << 8), /* unrecovered data error */
232 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
233 SERR_PROTOCOL = (1 << 10), /* protocol violation */
234 SERR_INTERNAL = (1 << 11), /* host internal error */
235 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
236 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
237
1da177e4
LT
238 /* struct ata_taskfile flags */
239 ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
240 ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
241 ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
242 ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
8bf62ece 243 ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
9a3dccc4 244 ATA_TFLAG_FUA = (1 << 5), /* enable FUA */
ea9b395f 245 ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */
1da177e4
LT
246};
247
248enum ata_tf_protocols {
249 /* ATA taskfile protocols */
250 ATA_PROT_UNKNOWN, /* unknown/invalid */
251 ATA_PROT_NODATA, /* no data */
1dce589c 252 ATA_PROT_PIO, /* PIO data xfer */
1da177e4 253 ATA_PROT_DMA, /* DMA */
88e49034 254 ATA_PROT_NCQ, /* NCQ */
1da177e4
LT
255 ATA_PROT_ATAPI, /* packet command, PIO data xfer*/
256 ATA_PROT_ATAPI_NODATA, /* packet command, no data */
257 ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */
258};
259
260enum ata_ioctls {
261 ATA_IOC_GET_IO32 = 0x309,
262 ATA_IOC_SET_IO32 = 0x324,
263};
264
265/* core structures */
266
267struct ata_prd {
268 u32 addr;
269 u32 flags_len;
270};
271
272struct ata_taskfile {
273 unsigned long flags; /* ATA_TFLAG_xxx */
274 u8 protocol; /* ATA_PROT_xxx */
275
276 u8 ctl; /* control reg */
277
278 u8 hob_feature; /* additional data */
279 u8 hob_nsect; /* to support LBA48 */
280 u8 hob_lbal;
281 u8 hob_lbam;
282 u8 hob_lbah;
283
284 u8 feature;
285 u8 nsect;
286 u8 lbal;
287 u8 lbam;
288 u8 lbah;
289
290 u8 device;
291
292 u8 command; /* IO operation */
293};
294
295#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
296#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
297#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
b6782728 298#define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10))
9a3dccc4
TH
299#define ata_id_has_fua(id) ((id)[84] & (1 << 6))
300#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
1da177e4
LT
301#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
302#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
b6782728 303#define ata_id_has_hpa(id) ((id)[82] & (1 << 10))
1da177e4
LT
304#define ata_id_has_wcache(id) ((id)[82] & (1 << 5))
305#define ata_id_has_pm(id) ((id)[82] & (1 << 3))
306#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
307#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
88e49034
TH
308#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
309#define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
1da177e4 310#define ata_id_removeable(id) ((id)[0] & (1 << 7))
b6782728 311#define ata_id_has_dword_io(id) ((id)[50] & (1 << 0))
49554c19
AC
312#define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
313#define ata_id_has_iordy(id) ((id)[49] & (1 << 9))
1da177e4
LT
314#define ata_id_u32(id,n) \
315 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
316#define ata_id_u64(id,n) \
317 ( ((u64) (id)[(n) + 3] << 48) | \
318 ((u64) (id)[(n) + 2] << 32) | \
319 ((u64) (id)[(n) + 1] << 16) | \
320 ((u64) (id)[(n) + 0]) )
321
312f7da2
AL
322#define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
323
3d2ca910
TH
324static inline unsigned int ata_id_major_version(const u16 *id)
325{
326 unsigned int mver;
327
b352e57d
AC
328 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
329 return 0;
330
3d2ca910
TH
331 for (mver = 14; mver >= 1; mver--)
332 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
333 break;
334 return mver;
335}
336
32d90911
TH
337static inline int ata_id_is_sata(const u16 *id)
338{
339 return ata_id_major_version(id) >= 5 && id[93] == 0;
340}
341
057ace5e 342static inline int ata_id_current_chs_valid(const u16 *id)
8bf62ece 343{
9bec2e38
JG
344 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
345 has not been issued to the device then the values of
8bf62ece
AL
346 id[54] to id[56] are vendor specific. */
347 return (id[53] & 0x01) && /* Current translation valid */
348 id[54] && /* cylinders in current translation */
349 id[55] && /* heads in current translation */
350 id[55] <= 16 &&
351 id[56]; /* sectors in current translation */
352}
353
b352e57d
AC
354static inline int ata_id_is_cfa(const u16 *id)
355{
356 u16 v = id[0];
357 if (v == 0x848A) /* Standard CF */
358 return 1;
359 /* Could be CF hiding as standard ATA */
360 if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF &&
361 (id[82] & ( 1 << 2)))
362 return 1;
363 return 0;
364}
365
fc085150
AC
366static inline int ata_drive_40wire(const u16 *dev_id)
367{
32d90911 368 if (ata_id_is_sata(dev_id))
fc085150 369 return 0; /* SATA */
61f216c7 370 if ((dev_id[93] & 0xE000) == 0x6000)
fc085150
AC
371 return 0; /* 80 wire */
372 return 1;
373}
374
057ace5e 375static inline int atapi_cdb_len(const u16 *dev_id)
1da177e4
LT
376{
377 u16 tmp = dev_id[0] & 0x3;
378 switch (tmp) {
379 case 0: return 12;
380 case 1: return 16;
381 default: return -1;
382 }
383}
384
057ace5e 385static inline int is_atapi_taskfile(const struct ata_taskfile *tf)
1da177e4
LT
386{
387 return (tf->protocol == ATA_PROT_ATAPI) ||
388 (tf->protocol == ATA_PROT_ATAPI_NODATA) ||
389 (tf->protocol == ATA_PROT_ATAPI_DMA);
390}
391
07f6f7d0
AL
392static inline int is_multi_taskfile(struct ata_taskfile *tf)
393{
394 return (tf->command == ATA_CMD_READ_MULTI) ||
395 (tf->command == ATA_CMD_WRITE_MULTI) ||
396 (tf->command == ATA_CMD_READ_MULTI_EXT) ||
c2956a3b
AL
397 (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
398 (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
07f6f7d0
AL
399}
400
1da177e4
LT
401static inline int ata_ok(u8 status)
402{
403 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
404 == ATA_DRDY);
405}
406
c6a33e24
AL
407static inline int lba_28_ok(u64 block, u32 n_block)
408{
409 /* check the ending block number */
410 return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
411}
412
413static inline int lba_48_ok(u64 block, u32 n_block)
414{
415 /* check the ending block number */
416 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
417}
418
1da177e4 419#endif /* __LINUX_ATA_H__ */